Features
VN5E010MH-E
Single-channel high-side driver with analog current sense
for automotive applications
Max supply voltage V
Operating voltage range V
Typ. ON-state resistance R
Current limitation (typ) I
OFF-state supply current I
1. Typical value with all loads connected.
■ General
– Inrush current active management by
power limitation
– Very low standby current
– 3 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
– Very low current sense leakage
■ Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
current range
– Current sense disable
– Output short to ground indication
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
■ Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of V
CC
– Overtemperature shutdown with
autorestart (thermal shutdown)
CC
CC
ON
LIMH
S
41 V
4.5 V to 28 V
10 mΩ
85 A
(1)
2 µA
– Reverse battery protection with self switch
on of the Power MOSFET
– Electrostatic discharge protection
Application
■ All types of resistive, inductive and capacitive
loads
Description
The VN5E010MH-E is a single-channel high-side
driver manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
HPAK package. The VN5E010MH-E is designed
to drive 12 V automotive grounded loads
delivering protection, diagnostics and easy 3 V
and 5 V CMOS compatible interface with any
microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with auto
restart and overvoltage active clamp.
A dedicated analog current sense pin is
associated with every output channel in order to
provide enhanced diagnostic functions including
fast detection of overload and short-circuit to
ground through power limitation indication and
overtemperature indication.
The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external
sense resistor with other similar devices
.
May 2010 Doc ID 15681 Rev 5 1/34
www.st.com
1
Contents VN5E010MH-E
Contents
1 Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.6 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.7 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.8 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.9 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2.10 Maximum demagnetization energy (V
= 13.5 V) . . . . . . . . . . . . . . . . . 24
CC
3 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.1 HPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.2 HPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.3 HPAK suggested land pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.4 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2/34 Doc ID 15681 Rev 5
VN5E010MH-E List of tables
List of tables
Table 1. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (VCC = 13 V, Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Current sense (8 V < V
Table 10. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 11. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 13. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 14. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 15. HPAK mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 16. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
< 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
Doc ID 15681 Rev 5 3/34
List of figures VN5E010MH-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) not in scale. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Delay response time between rising edge of ouput current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. I
OUT/ISENSE
Figure 9. Maximum current sense ratio drift vs. load current
Figure 10. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 12. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. T
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
J
Figure 14. OFF-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 16. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 17. Low-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 18. High-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. ON-state resistance vs. T
Figure 21. ON-state resistance vs. V
Figure 22. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. ILIMH vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. High-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 27. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. Low-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 29. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 31. Maximum turn-off current versus inductance
Figure 32. PC board
Figure 33. Rthj-amb vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 25
Figure 34. HPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 35. Thermal fitting model of a single-channel HSD in HPAK
Figure 36. HPAK package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 37. HPAK suggested pad layout
Figure 38. HPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 39. HPAK tape and reel (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
vs. I
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CC
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
(1)
. . . . . . . . . . . . . . . . . . . . . . . . 26
4/34 Doc ID 15681 Rev 5
VN5E010MH-E Block diagram and pin configuration
1 Block diagram and pin configuration
Figure 1. Block diagram
Table 1. Pin functions
Name Function
V
CC
OUT Power output
Battery connection
(1)
GND Ground connection
IN
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state
CS Analog current sense pin, delivers a current proportional to the load current
CS_DIS Active high CMOS compatible pin, to disable the current sense pin
1. Pins 1 and 7 must be externally tied together.
Doc ID 15681 Rev 5 5/34
Block diagram and pin configuration VN5E010MH-E
Figure 2. Configuration diagram (top view) not in scale
1234 567
IN
GND
OUT
Table 2. Suggested connections for unused and not connected pins
Vcc
CS CS_DIS
OUT
Connection / pin CS OUT IN CS_DIS
Floating Not allowed X X X
To ground
Through 1kΩ
resistor
Through 22 kΩ
resistor
Through 10 kΩ
resistor
Through 10 kΩ
resistor
6/34 Doc ID 15681 Rev 5
VN5E010MH-E Electrical specifications
2 Electrical specifications
Figure 3. Current and voltage conventions
I
S
V
CC
I
I
SENSE
V
SENSE
OUT
V
OUT
I
CSD
V
CSD
I
IN
V
IN
CS_DIS
IN
GND
I
GND
OUT
CS
V
CC
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the Table 3: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
program and other relevant quality document.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
-V
I
OUT
-I
I
CSD
V
CSENSE
E
DC supply voltage 41 V
CC
Reverse DC supply voltage 16 V
CC
DC output current Internally limited A
Reverse DC output current 20 A
OUT
I
DC input current -1 to 10 mA
IN
DC current sense disable input current -1 to 10 mA
Current sense maximum voltage (V
Maximum switching energy (single pulse)
MAX
(L = 2.2 mH; R
I
= I
OUT
limL
L
(Typ.))
= 0 Ω; V
= 13.5 V; T
BAT
CC
> 0)
jstart
= 150 °C;
V
- 41
CC
+V
CC
645 mJ
V
V
Doc ID 15681 Rev 5 7/34
Electrical specifications VN5E010MH-E
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Electrostatic discharge
(human body model: R= 1.5 KΩ; C= 100 pF)
4000
2000
4000
5000
5000
V
V
V
V
V
V
V
ESD
ESD
T
–IN
–CS
–CS_DIS
–OUT
–V
CC
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature -40 to 150 °C
T
j
Storage temperature -55 to 150 °C
stg
2.2 Thermal data
Table 4. Thermal data
Symbol Parameter Max. value Unit
R
thj-case
R
thj-amb
Thermal resistance junction-case 0.55 °C/W
Thermal resistance junction-ambient 67.7 °C/W
8/34 Doc ID 15681 Rev 5
VN5E010MH-E Electrical specifications
2.3 Electrical characteristics
Values specified in this section are for 8 V < VCC < 28 V, -40 °C < Tj < 150 °C, unless
otherwise specified.
Table 5. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
R
ON-Rev
V
clamp
I
L(off)
Table 6. Switching (V
Operating supply voltage 4.5 13 28 V
CC
Undervoltage shutdown 3.5 4.5 V
USD
Undervoltage shutdown
hysteresis
ON-state resistance
ON
R
in reverse battery
DSON
condition
Clamp voltage ICC = 20 mA; I
I
Supply current
S
OFF-state output current
= 13 V, Tj = 25 °C)
CC
I
= 6 A; Tj = 25 °C 10
OUT
= 6 A; Tj = 150 °C 20
OUT
I
= 6 A; V
OUT
V
= -13 V; I
CC
= 25 °C
T
j
OFF-state: V
= V
V
IN
OUT
ON-state: V
I
= 0 A
OUT
V
= V
IN
OUT
= 5 V; Tj = 25 °C 13
CC
= -6 A;
OUT
= 0 A 41 46 52 V
OUT
= 13 V; Tj = 25 °C;
CC
= V
CC
= 0 V; V
= 0 V
SENSE
= 13 V; V
CC
= 5 V;
IN
= 13 V;
Tj = 25 °C
V
IN
= V
= 0 V; VCC = 13 V;
OUT
Tj = 125 °C
0.5 V
1.5 3 mA
00.01 3 µA
05
10 mΩ
2 5 µA
Symbol Parameter Test conditions Min. Typ. Max. Unit
mΩI
= 2.2 Ω
R
Turn-on delay time
Turn-off delay time
Turn-on voltage
/dt)
on
slope
Turn-off voltage
/dt)
off
slope
(dV
(dV
t
d(on)
t
d(off)
OUT
OUT
Switching energy
W
ON
losses at turn-on
(t
)
won
Switching energy
W
OFF
losses at turn-off
(t
)
woff
L
(see Figure 5)
R
= 2.2 Ω
L
(see Figure 5)
= 2.2 Ω -(see Figure 23)- V/µs
R
L
R
= 2.2 Ω -(see Figure 25)- V/µs
L
= 2.2 Ω
R
L
(see Figure 5)
= 2.2 Ω
R
L
(see Figure 5)
-40 -µs
-28 -µs
-2 -mJ
-0.6 -mJ
Doc ID 15681 Rev 5 9/34
Electrical specifications VN5E010MH-E
Table 7. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
V
I
IH
V
I(hyst)
V
ICL
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
V
CSCL
a
Table 8. Protection and diagnostics
Low-level input voltage 0.9 V
IL
Low-level input current V
IL
High-level input voltage 2.1 V
IH
High-level input current V
= 0.9 V 1 µA
IN
= 2.1 V 10 µA
IN
Input hysteresis voltage 0.25 V
I
= 1 mA 5.5 7
Input clamp voltage
IN
= -1 mA -0.7
I
IN
Low-level CS_DIS voltage 0.9 V
Low-level CS_DIS current V
= 0.9 V 1 µA
CSD
High-level CS_DIS voltage 2.1 V
High-level CS_DIS current V
= 2.1 V 10 µA
CSD
CS_DIS hysteresis voltage 0.25 V
I
= 1 mA 5.5 7
(1)
CSD
= -1 mA -0.7
I
CSD
CS_DIS clamp voltage
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
= 13 V 60 85 120
I
limH
I
limL
T
T
T
T
HYST
V
DEMAG
V
1. To ensure long term reliability under heavy overload or short-circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
TSD
R
RS
ON
Short-circuit current
Short-circuit current
during thermal cycling
Shutdown
temperature
Reset temperature TRS + 1 TRS + 5 °C
Thermal reset of
status
Thermal hysteresis
TSD-TR
)
(T
Turn-off output voltage
clamp
Output voltage drop
limitation
CC
5 V < V
V
CC
I
OUT
< 28 V 120
CC
= 13 V; TR < Tj < T
= 2 A; V
IN
= 0;
L = 6 mH
= 0.5 A;
I
OUT
Tj = -40 °C to 150 °C
TSD
21 A
150 175 200 °C
135 °C
7°C
V
CC
- 41 V
CC
- 46 V
- 52 V
CC
25 mV
A
10/34 Doc ID 15681 Rev 5
VN5E010MH-E Electrical specifications
Table 9. Current sense (8 V < V
Symbol Parameter Test conditions Min. Typ. Max. Unit
K
K
dK1/K
K
dK2/K
K
dK3/K
I
0
1
2
3
OUT/ISENSE
I
OUT/ISENSE
(1)
Current sense ratio drift
1
I
OUT/ISENSE
(1)
Current sense ratio drift
2
I
OUT/ISENSE
(1)
Current sense ratio drift
3
< 18 V)
CC
I
= 0.25 A; V
OUT
SENSE
Tj = -40 °C to 150 °C
= 25 °C to 150 °C
T
j
I
= 6 A; V
OUT
= -40 °C to 150 °C
T
j
= 25 °C to 150 °C
T
j
I
= 6 A; V
OUT
= 0 V;
V
CSD
SENSE
SENSE
Tj = -40 °C to 150 °C
I
= 10 A; V
OUT
SENSE
Tj = -40 °C to 150 °C
= 25 °C to 150 °C
T
j
I
= 10 A; V
OUT
V
= 0 V;
CSD
= -40 °C to 150 °C
T
j
I
= 25 A; V
OUT
= -40 °C to 150 °C
T
j
= 25 °C to 150 °C
T
j
I
= 25 A; V
OUT
= 0 V;
V
CSD
SENSE
SENSE
SENSE
Tj = -40 °C to 150 °C
= 0.5 V
= 0.5 V
= 0.5 V;
= 4 V
= 4 V;
= 4 V
= 4 V;
3000
7410
12000
3000
7410
11600
5350
5510
6740
6740
8500
7745
-15 15 %
5850
5800
6570
6570
7690
7195
-11 11 %
5915
5850
6420
6420
7000
6755
-8 8 %
I
SENSE0
Analog sense leakage
current
= 0 A; V
I
OUT
V
= 5 V; V
CSD
= -40 °C to 150 °C
T
j
I
= 0 A; V
OUT
= 0 V; VIN= 5 V;
V
CSD
= -40 °C to 150 °C
T
j
I
= 2 A; V
OUT
= 5 V; V
V
CSD
SENSE
= 0 V;
IN
SENSE
SENSE
= 5 V;
IN
= 0 V;
= 0 V;
= 0 V;
01
02
µA
1
Tj = -40 °C to 150 °C
Open load ON-state
I
OL
current detection
threshold
V
SENSE
V
SENSEH
I
SENSEH
Max analog sense
output voltage
Analog sense output
(2)
voltage in fault condition
Analog sense output
(2)
current in fault condition
VIN = 5V, 8V<VCC<18V
=5µA
I
SENSE
I
OUT
V
V
CC
CC
= 18 A; R
= 13 V; R
= 13 V; V
= 3.9 kΩ 5V
SENSE
= 3.9 kΩ 8V
SENSE
= 5 V 9 mA
SENSE
580mA
Doc ID 15681 Rev 5 11/34
Electrical specifications VN5E010MH-E
Table 9. Current sense (8 V < V
< 18 V) (continued)
CC
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
DSENSE1H
t
DSENSE1L
t
DSENSE2H
Δ
t
DSENSE2H
t
DSENSE2L
Delay response time
from falling edge of
CS_DIS pin
Delay response time
from rising edge of
CS_DIS pin
Delay response time
from rising edge of
IN pin
Delay response time
between rising edge of
output current and rising
edge of current sense
Delay response time
from falling edge of
IN pin
V
1.5 A < I
I
(see Figure 4)
V
1.5 A <I
I
(see Figure 4)
V
1.5 A < I
I
(see Figure 4)
V
I
I
I
V
1.5 A < I
I
(see fig Figure 4)
SENSE
SENSE
SENSE
SENSE
SENSE
SENSE
SENSE
SENSE
= 90% of I
OUT
OUTMAX
SENSE
SENSE
< 4 V,
< 25 A
OUT
= 90% of I
SENSE MAX
< 4 V,
< 25 A
OUT
= 10% of I
SENSE MAX
< 4 V,
< 25 A
OUT
= 90% of I
SENSE max
<4V,
= 90% of I
SENSEMAX,
OUTMAX
= 3 A (see Figure 6)
< 4 V,
< 25 A
OUT
= 10% of I
SENSE max
50 100 µs
520µs
270 600 µs
310 µs
100 250 µs
1. Parameter guaranteed by design, it is not tested.
2. Fault condition includes: power limitation and overtemperature.
Figure 4. Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
CURRENT SENSE
t
DSENSE2H
t
DSENSE1L
t
DSENSE1H
t
DSENSE2L
12/34 Doc ID 15681 Rev 5
VN5E010MH-E Electrical specifications
Figure 5. Switching characteristics
V
OUT
t
Won
t
Woff
90%
t
f
dV
OUT
/dt
(off)
dV
OUT
/dt
(on)
80%
t
r
10%
t
INPUT
t
d(on)
t
d(off)
t
Figure 6. Delay response time between rising edge of ouput current and rising
edge of current sense (CS enabled)
V
IN
Δ
t
DSENSE2H
t
I
OUT
90% I
OUTMAX
I
OUTMAX
t
I
SENSE
I
90% I
SENSEMAX
SENSEMAX
t
Doc ID 15681 Rev 5 13/34
Electrical specifications VN5E010MH-E
Figure 7. Output voltage drop limitation
V
cc-Vout
T
=150oC
j
V
on
V
on/Ron(T)
T
=25oC
j
T
=-40oC
j
I
out
Figure 8. I
I
OUT/ISENSE
12800
11600
10400
9200
8000
6800
5600
4400
3200
2000
OUT/ISENSE
vs. I
OUT
A
B
C
D
E
-2 1 4 7 10131619222528
I
(A)
OUT
A: Max, Tj = -40 °C to 150 °C
B: Max, T
C: Typical, T
= 25 °C to 150 °C
j
= -40 °C to 150 °C
j
D: Min, T
E: Min, Tj = -40 °C to 150 °C
= 25 °C to 150 °C
j
14/34 Doc ID 15681 Rev 5
VN5E010MH-E Electrical specifications
Figure 9. Maximum current sense ratio drift vs. load current
dK/K (%)
20
15
10
5
0
-5
-10
-15
-20
4 7 10 13 16 19 22 25 28
A: Max, Tj = -40 °C to 150 °C B: Min, Tj = -40 °C to 150 °C
1. Parameter guaranteed by design; it is not tested.
Table 10. Truth table
Conditions Input Output SENSE (V
Normal operation
Overtemperature
Undervoltage
Overload
A
B
I
(A)
OUT
L
H
L
H
L
H
H
L
H
L
L
L
L
X
(no power limitation)
H
Cycling
(power limitation)
(1)
CSD
0
Nominal
0
V
SENSEH
0
0
Nominal
V
SENSEH
= 0 V)
(1)
Short-circuit to GND
(power limitation)
Negative output voltage
clamp
1. If the V
and external circuit.
is high, the SENSE output is at a high-impedance, its potential depends on leakage currents
CSD
L
H
L
L
0
V
SENSEH
LL 0
Doc ID 15681 Rev 5 15/34
Electrical specifications VN5E010MH-E
Table 11. Electrical transient requirements (part 1)
ISO 7637-2:
2004(E)
Test pul s e
Test levels
(1)
Number of
pulses or
III IV Min. Max.
test times
Burst cycle/pulse
repetition time
Delays and
impedance
1 -75 V -100 V 5000 pulses 0.5 s 5 s 2 ms, 10 Ω
2a +37 V +50 V 5000 pulses 0.2 s 5 s 50 µs, 2 Ω
3a -100 V -150 V 1 h 90 ms 100 ms 0.1µs, 50 Ω
3b +75 V +100 V 1 h 90 ms 100 ms 0.1µs, 50 Ω
4 -6 V -7 V 1 pulse 100 ms, 0.01 Ω
(2)
5b
1. The above test levels must be considered referred to VCC= 13.5 V except for pulse 5b.
2. Valid in case of external load dump clamp: 40 V maximum referred to ground.
Table 12. Electrical transient requirements (part 2)
ISO 7637-2:
+65 V +87 V 1 pulse 400 ms, 2 Ω
Test level results
2004(E)
Test pul s e
III IV
1C C
2a C C
3a C C
3b C C
4C C
(1)
5b
CC
1. Valid in case of external load dump clamp: 40 V maximum referred to ground.
Table 13. Electrical transient requirements (part 3)
Class Contents
C All functions of the device are performed as designed after exposure to disturbance.
E
One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
16/34 Doc ID 15681 Rev 5
VN5E010MH-E Electrical specifications
2.4 Waveforms
Figure 10. Normal operation
INPUT
INPUT
Nominal load Nominal load
Nominal load Nominal load
I
I
OUT
OUT
V
V
SENSE
SENSE
V
V
CS_DIS
CS_DIS
Figure 11. Overload or short to GND
INPUT
INPUT
I
>
I
>
LimH
LimH
I
I
OUT
OUT
V
V
SENSE
SENSE
V
V
CS_DIS
CS_DIS
Power Limitation
Power Limitation
I
I
LimL
LimL
Thermal cycling
Thermal cycling
>
>
Doc ID 15681 Rev 5 17/34
Electrical specifications VN5E010MH-E
Figure 12. Intermittent overload
INPUT
INPUT
I
I
OUT
OUT
V
V
SENSE
SENSE
V
V
CS_DIS
CS_DIS
I
I
LimH
LimH
V
V
SENSEH
SENSEH
>
>
>
>
Overload
Overload
I
I
LimL
LimL
Nominal load
>
>
Nominal load
Figure 13. TJ evolution in overload or short to GND
INPUT
INPUT
I
I
OUT
OUT
T
T
J
J
I
I
LimH
LimH
Self-limitation of fast thermal transients
Self-limitation of fast thermal transients
T
T
J_START
J_START
Power Limitation
Power Limitation
>
>
T
T
TSD
TSD
T
T
R
R
< I
< I
T
T
HYST
HYST
LimL
LimL
18/34 Doc ID 15681 Rev 5
VN5E010MH-E Electrical specifications
2.5 Electrical characteristics curves
Figure 14. OFF-state output current Figure 15. High-level input current
Iloff [ nA]
6000
5000
4000
3000
2000
1000
0
-50 - 25 0 25 50 75 100 125 150 175
Tc [°C]
Iih [uA]
5
4.5
4
Vin= 2.1V
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Figure 16. Input clamp voltage Figure 17. Low-level input voltage
Vicl [V]
7
6.8
6.6
Iin= 1mA
6.4
6.2
6
5.8
5.6
5.4
5.2
5
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Vil [V ]
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Figure 18. High-level input voltage Figure 19. Input hysteresis voltage
Vih [V]
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Vihyst [V]
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Doc ID 15681 Rev 5 19/34
Electrical specifications VN5E010MH-E
V
Figure 20. ON-state resistance vs. T
Ron [m Ohm ]
80
70
case
Figure 21. ON-state resistance vs. V
Ron [m Ohm ]
30
25
60
50
40
Iout= 6A
Vcc= 13V
30
20
15
10
20
10
0
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
5
0
0 5 10 15 20 25 30 35 40
Vcc [V]
Figure 22. Undervoltage shutdown Figure 23. Turn-on voltage slope
Vusd [V]
16
14
12
10
8
6
4
2
0
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
(dV out /dt)On [V/m s]
1000
900
800
700
Vcc= 13V
Rl= 13 Ω
600
500
400
300
200
100
0
-50 - 25 0 25 50 75 100 125 150 175
Tc [°C]
CC
Tc= 150°C
Tc= 125°C
Tc= 25°C
Tc= -40°C
Figure 24. I
LIMH
vs. T
case
Ilim h [A]
100
90
cc= 13V
80
70
60
50
40
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
20/34 Doc ID 15681 Rev 5
Figure 25. Turn-off voltage slope
(dVout/dt)Off [V/ms]
1000
900
800
700
600
500
400
300
200
100
0
-50 - 25 0 25 50 75 100 125 150 175
Vcc= 13V
Rl= 13 Ω
Tc [°C]
VN5E010MH-E Electrical specifications
Figure 26. High-level CS_DIS voltage Figure 27. CS_DIS clamp voltage
Vcsdh [V]
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Vcsdcl [V]
10
9
8
Iin= 1mA
7
6
5
4
3
2
1
0
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Figure 28. Low-level CS_DIS voltage
Vcsdl [V]
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Doc ID 15681 Rev 5 21/34
Electrical specifications VN5E010MH-E
2.6 Application information
Figure 29. Application schematic
+5V
MCU
R
prot
R
prot
R
prot
R
SENSE
C
ext
CS_DIS
IN
CS
45V
2.7 Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
max DC rating. The same applies if the device is subject to transients on the VCC line
CC
that are greater than the ones shown in the ISO 7637-2 2004 (E) table.
GND
V
20V
CC
OUT
D
ld
2.8 MCU I/Os protection
When negative transients are present on the VCC line, the control pins are pulled negative to
approximatly -1.5 V. ST suggests to insert a resistor (R
microcontroller I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of
microcontroller I/Os.
Equation 1
-V
CCpeak
Calculation example:
For V
CCpeak
75 Ω ≤ R
= - 1.5 V; I
≤ 240 kΩ.
prot
latchup
Recommended values: R
22/34 Doc ID 15681 Rev 5
/ I
≥ 20 mA; V
=10 kΩ, C
prot
latchup
≤ R
OHμC
EXT
≤ (V
prot
≥ 4.5 V
= 10 nF.
) in line to prevent the
prot
- VIH ) / I
OHμC
IHmax
VN5E010MH-E Electrical specifications
2.9 Current sense and diagnostic
The current sense pin performs a double function (see Figure 30: Current sense and
diagnostic):
● Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a know ratio K
The current I
external resistor R
minimum (see parameter V
can be easily converted to a voltage V
SENSE
. Linearity between I
SENSE
SENSE
in Table 9: Current sense (8 V < V
OUT
and V
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < V
● Diagnostic flag in fault conditions, delivering a fixed voltage V
maximum current I
SENSEH
in case of the following fault conditions (refer to
< 18 V)).
CC
Table 10: Truth table):
– Power limitation activation
–Overtemperature
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high-impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
.
X
SENSE
by means of an
SENSE
is ensured up to 5 V
CC
SENSEH
< 18 V)). The
up to a
Figure 30. Current sense and diagnostic
V
BAT
V
CC
41V
Overtemperature
Pwr_Lim
CS_DIS
I
OUT/KX
I
SENSEH
V
SENSEH
CURRENT
SENSEn
R
PROT
To uC ADC
R
SENSE
V
SENSE
Main MOSn
GND
OUTn
Load
Doc ID 15681 Rev 5 23/34
Electrical specifications VN5E010MH-E
2.10 Maximum demagnetization energy (V
Figure 31. Maximum turn-off current versus inductance
100
A
B
C
10
I (A)
1
0, 1 1 10 100L (mH)
=13.5 V)
CC
(1)
A
B
C
VIN, I
: T
: T
: T
= 150 °C (single pulse)
jstart
= 100 °C (repetitive pulse)
jstart
= 125 °C (repetitive pulse)
jstart
L
Demagnetization Demagnetization Demagnetization
t
1. Values are generated with R
In case of repetitive pulses, T
the temperature specified above for curves A and B.
=0 Ω.
L
(at beginning of each demagnetization) of every pulse must not exceed
jstart
24/34 Doc ID 15681 Rev 5
VN5E010MH-E Package and PC board thermal data
3 Package and PC board thermal data
3.1 HPAK thermal data
Figure 32. PC board
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,
PCB thickness =1.8 mm, Cu thickness = 70 µm, Copper areas: from minimum pad lay-out to 8 cm
Figure 33. R
thj-amb
(1)
vs. PCB copper area in open box free air condition
RTHj_amb(°C/W)
70
65
2
).
60
55
50
45
40
35
30
0246810
PCB Cu heatsink area (cm^2)
Doc ID 15681 Rev 5 25/34
Package and PC board thermal data VN5E010MH-E
Figure 34. HPAK thermal impedance junction ambient single pulse
ZTH (°C/W)
100
Cu=8 cm2
Cu=2 cm2
Cu=foot print
10
1
0.1
0.001 0.01 0.1 1 10 100 1000
Time (s)
Figure 35. Thermal fitting model of a single-channel HSD in HPAK
1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
(1)
Equation 2: pulse calculation formula
Z
THδ
RTHδ Z
where δ = tP/T
26/34 Doc ID 15681 Rev 5
THtp
1 δ–()+⋅=
VN5E010MH-E Package and PC board thermal data
Table 14. Thermal parameter
Area/island (cm2)Footprint48
R1 (°C/W) 0.01
R2 (°C/W) 0.15
R3 (°C/W) 0.5
R4 (°C/W) 8
R5 (°C/W) 28 22 12
R6 (°C/W) 31 25 16
C1 (W.s/°C) 0.005
C2 (W.s/°C) 0.05
C3 (W.s/°C) 0.1
C4 (W.s/°C) 0.4
C5 (W.s/°C) 0.8 1.4 3
C6 (W.s/°C) 3 6 9
Doc ID 15681 Rev 5 27/34
Package and packing information VN5E010MH-E
4 Package and packing information
4.1 ECOPACK
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com
ECOPACK
®
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
4.2 HPAK mechanical data
Figure 36. HPAK package dimension
.
28/34 Doc ID 15681 Rev 5
VN5E010MH-E Package and packing information
Table 15. HPAK mechanical data
Data book mm
Ref. dim
Nom. Min. Max.
A 2.20 2.40
A1 0.90 1.10
A2 0.03 0.23
b 0.45 0.60
b4 5.20 5.40
c 0.45 0.60
c2 0.48 0.60
D 6.00 6.20
D1 5.10
E 6.40 6.60
E1 5.20
e0.85
e1 1.60 1.80
e2 3.30 3.50
e3 5.00 5.20
H 9.35 10.10
L1
(L1) 2.80
L2 0.80
L4 0.60 1.00
R0.20
V2 0° 8°
Doc ID 15681 Rev 5 29/34
Package and packing information VN5E010MH-E
4.3 HPAK suggested land pattern
Figure 37. HPAK suggested pad layout
(1)
All dimensions are in mm.
1. The land pattern proposed is not intended to overrule User's PCB design, manufacturing and soldering
process rules
30/34 Doc ID 15681 Rev 5
VN5E010MH-E Package and packing information
4.4 Packing information
The devices can be packed in tube or tape and reel shipments (see Table 16: Device
summary).
Figure 38. HPAK
tube shipment (no suffix)
A
Base q.ty 75
C
Bulk q.ty 3000
Tube length (± 0.5) 532
A 6
B 21.3
C (± 0.1) 0.6
B
All dimensions are in mm.
Figure 39. HPAK tape and reel (suffix “TR”)
REEL DIMENSIONS
All dimensions are in mm.
Base q.ty 2500
Bulk q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 16.4
N (min) 60
T (max) 22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width W 16
Tape hole spacing P0 (± 0.1) 4
Component spacing P 8
Hole diameter D (± 0.1/-0) 1.5
Hole diameter D1 (min) 1.5
Hole position F (± 0.05) 7.5
Compartment depth K (max) 2.75
Hole spacing P1 (± 0.1) 2
Top
cover
tape
End
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Start
No componentsNo components Components
500mm min
All dimensions are in mm.
Doc ID 15681 Rev 5 31/34
Order codes VN5E010MH-E
5 Order codes
Table 16. Device summary
Order codes
Package
Tube Tape and reel
6 pins HPAK VN5E010MH-E VN5E010MHTR-E
32/34 Doc ID 15681 Rev 5
VN5E010MH-E Revision history
6 Revision history
Table 17. Document revision history
Date Revision Changes
28-May-2009 1 Initial release.
18-Jun-2009 2
Figure 32: PC board
– Changed footnote
15-Dec-2009 3 Updated Table 7: Logic inputs
25-Jan-2010 4 Updated Table 9: Current sense (8 V < V
27-May-2010 5 Updated Table 15: HPAK mechanical data.
(1)
CC
< 18 V)
Doc ID 15681 Rev 5 33/34
VN5E010MH-E
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