Datasheet VN5E025ASO-E Datasheet (ST)

Page 1
Single channel high-side driver with analog current sense
SO-16L
("1($'5
Features
Max supply voltage V
Operating voltage range V
Max on-state resistance R
Current limitation (typ) I
Off-state supply current I
1. Typical value with all loads connected.
■ General
– Inrush current active management by
power limitation – Very low standby current – 3.0 V CMOS compatible inputs – Optimized electromagnetic emissions – Very low electromagnetic susceptibility – Compliant with European directive
2002/95/EC – Very low current sense leakage – AEC-Q100 qualified
■ Diagnostic functions
– Proportional load current sense – High current sense precision for wide
currents range – Current sense disable – Off-state open-load detection – Output short to V
detection
CC
– Overload and short to ground (power
limitation) indication – Thermal shutdown indication
■ Protections
– Undervoltage shutdown – Overvoltage clamp – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss
of V
CC
CC
CC
ON
LIMH
S
4.5 to 28 V
41 V
25 mΩ
60 A
(1)
2µA
VN5E025ASO-E
for automotive applications
Datasheet − production data
– Overtemperature shutdown with
autorestart (thermal shutdown) – Reverse battery protected – Electrostatic discharge protection
Application
■ All types of resistive, inductive and capacitive
loads
■ Suitable as LED driver
Description
The VN5E025ASO-E is a single channel high­side driver manufactured using ST proprietary VIPower SO-16L package. The device is designed to drive 12 V automotive grounded loads, and to provide protection and diagnostics. It also implements a 3 V and 5 V CMOS-compatible interface for use with any microcontroller.
The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with auto­restart and overvoltage active clamp. A dedicated analog current sense pin is associated with every output channel providing enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication, overtemperature indication, short­circuit to V off-state open-load detection. The current sensing and diagnostic feedback of the whole device can be disabled by pulling the CS_DIS pin high to share the external sense resistor with similar devices.
®
M0-5 technology and housed in
diagnosis and on-state and
CC
June 2012 Doc ID 022463 Rev 3 1/37
This is information on a product in full production.
www.st.com
1
Page 2
Contents VN5E025ASO-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24
3.1.2 Solution 2: diode (D
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1 Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . 27
3.5 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 28
) in the ground line . . . . . . . . . . . . . . . . . . . . . . 25
GND
4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1 SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2/37 Doc ID 022463 Rev 3
Page 3
VN5E025ASO-E List of tables
List of tables
Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Switching characteristics (VCC = 13 V, Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Current sense (8 V < V Table 10. Open-load detection (8 V < V
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 15. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 16. SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
< 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
CC
< 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CC
Doc ID 022463 Rev 3 3/37
Page 4
List of figures VN5E025ASO-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Delay response time between rising edge of output current and rising edge of current
sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. I
Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Short to V Figure 16. T
Figure 17. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 19. Input clamp level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 20. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 21. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 23. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 24. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 27. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 34. Maximum turn off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 35. SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 36. \Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 29
Figure 37. SO-16L thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 38. Thermal fitting model of a single channel HSD in SO-16L
Figure 39. SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 40. SO-16L tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 41. SO-16L tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
/ I
OUT
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
J
vs I
SENSE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . 30
4/37 Doc ID 022463 Rev 3
Page 5
VN5E025ASO-E Block diagram and pin description
V
CC
Control & Diagnostic
LOGIC
DRIVER
V
ON
Limitation
Current
Limitation
Power Clamp
OFF State Open load
Over
temp.
Undervoltage
V
SENSEH
Current
Sense
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
IN
CS
CS_ DIS
GND
OUT
Signal Clamp

1 Block diagram and pin description

Figure 1. Block diagram

Table 1. Pin function

Name Function
V
CC
OUTPUT Power output.
GND
INPUT
Battery connection.
Ground connection. Must be reverse battery protected by an external diode / resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. It controls output switch state.
CURRENT SENSE Analog current sense pin, it delivers a current proportional to the load current.
CS_DIS Active high CMOS compatible pin, to disable the current sense pin.
Doc ID 022463 Rev 3 5/37
Page 6
Block diagram and pin description VN5E025ASO-E

Figure 2. Configuration diagram (top view)

*1'
1&
,1387
&6(16(
1&
&6',6

Table 2. Suggested connections for unused and not connected pins

Connection / pin Current sense N.C. Output Input CS_DIS
Floating Not allowed X
To ground
Through 1 kΩ
resistor
(1)
X
 9FF9FF
1&
1&
1&
287387
287387
287387
9FF9FF
("1($'5
XXX
Through
22 kΩ resistor
Through 10 kΩ
resistor
Through 10 kΩ
resistor
1. X: do not care.
6/37 Doc ID 022463 Rev 3
Page 7
VN5E025ASO-E Electrical specifications
I
S
I
GND
V
CC
V
CC
V
SENSE
OUTPUT
I
OUT
CURRENT SENSE
I
SENSE
INPUT
I
IN
V
IN
V
OUT
GND
CS_DIS
I
CSD
V
CSD
V
F

2 Electrical specifications

Figure 3. Current and voltage conventions

Note: V
F
= V
- VCC during reverse battery condition.
OUT

2.1 Absolute maximum ratings

Applying stress which exceeds the rating listed in Table 3: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit
V
-V
-I
I
-I
I
-I
CSENSE
V
CSENSE
E
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
GND
DC output current Internally limited A
OUT
Reverse DC output current 20 A
OUT
I
DC input current -1 to 10 mA
IN
DC current sense disable input current -1 to 10 mA
CSD
DC reverse CS pin current 200 mA
Current sense maximum voltage
(Typ.)
Doc ID 022463 Rev 3 7/37
Maximum switching energy (single pulse) L=0.8mH; RL=0Ω; V
MAX
I
OUT=IlimL
=13.5V; T
bat
VCC-41
jstart
=150°C;
+V
CC
140 mJ
V V
Page 8
Electrical specifications VN5E025ASO-E
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Electrostatic discharge (Human Body Model: R = 1.5 KΩ; C = 100 pF)
V V V V V
V
V
ESD
ESD
T
T
– INPUT – CURRENT SENSE –CS_DIS –OUTPUT –V
CC
4000 2000 4000 5000 5000
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature -40 to 150 °C
j
Storage temperature -55 to 150 °C
stg

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Typ. value Unit
R
thj-pcb
R
thj-amb
1. The measure is done in accordance with the JESD 51-8.
Thermal resistance junction-pcb
Thermal resistance junction-ambient See Figure 36 °C/W
(1)
19 °C/W

2.3 Electrical characteristics

Values specified in this section are for 8 V < VCC< 28 V; -40°C < Tj< 150°C, unless
otherwise stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
V
clamp
Operating supply
CC
voltage
Undervoltage shutdown 3.5 4.5 V
USD
Undervoltage shutdown hysteresis
I
OUT
On-state resistance
on
I
OUT
I
OUT
Clamp voltage IS= 20 mA 41 46 52 V
Off-state; V V
I
S
Supply current
IN=VOUT=VSENSE=VCSD
On-state; V I
OUT
4.5 13 28 V
0.5 V
=3A; Tj=25°C 25 mΩ
=3A; Tj= 150°C 50 mΩ
=3A; VCC=5V; Tj= 25°C 35 mΩ
=0A
=13V; Tj= 25°C;
CC
=13V; VIN=5V;
CC
=0V
(1)
2
(1)
5
µA
1.5 3 mA
8/37 Doc ID 022463 Rev 3
Page 9
VN5E025ASO-E Electrical specifications
Table 5. Power section (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
VIN=V
=25°C
T
I
L(off1)
1. PowerMOS leakage included.
Table 6. Switching characteristics (VCC=13V, Tj=25°C)
Off-state output current
Output - VCC diode
V
F
voltage
j
VIN=V
= 125°C
T
j
-I
OUT
=0V; VCC=13V;
OUT
=0V; VCC=13V;
OUT
00.01 3 µA
05µA
=2A; Tj= 150°C 0.7 V
Symbol Parameter Test conditions Min. Typ. Max. Unit
=4.3Ω
R
L
(see Figure 6)
=4.3Ω
R
L
(see Figure 6)
RL=4.3Ω (see Figure 6)
RL=4.3Ω (see Figure 6)
—15 —µs
—40 —µs
See
Figure 26
See
Figure 28
—V/µs
—V/µs
—0.4 —mJ
—0.5 —mJ
(dV
(dV
t
d(on)
t
d(off)
OUT
OUT
W
W
ON
OFF
Turn-on delay time
Turn-off delay time
/dt)onTurn-on voltage slope RL=4.3Ω —
/dt)
Turn-off voltage slope RL=4.3Ω —
off
Switching energy losses during t
won
Switching energy losses during t
woff

Table 7. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
V
I
V
I(hyst)
V
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
Input low level voltage 0.9 V
IL
Low level input current VIN=0.9V 1 µA
IL
Input high level voltage 2.1 V
IH
High level input current VIN=2.1V 10 µA
IH
Input hysteresis voltage 0.25 V
I
=1mA 5.5 7 V
Input clamp voltage
ICL
IN
IIN=-1mA -0.7 V
CS_DIS low level voltage 0.9 V
Low level CS_DIS current V
=0.9V 1 µA
CSD
CS_DIS high level voltage 2.1 V
High level CS_DIS current V
=2.1V 10 µA
CSD
CS_DIS hysteresis voltage 0.25 V
Doc ID 022463 Rev 3 9/37
Page 10
Electrical specifications VN5E025ASO-E
Table 7. Logic inputs (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
=1mA 5.5 7 V
V
CSCL
CS_DIS clamp voltage
CSD
I
=-1mA -0.7 V
CSD

Table 8. Protection and diagnostics

(1)
Symbol Parameter Test conditions Min. T yp. Max. Unit
V
= 13 V 43 60 85 A
I
limH
I
limL
T
T
T
T
HYST
V
DEMAG
V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device operates under abnormal conditions this software must limit the duration and number of activation cycles.

T a ble 9. Current sense (8 V < VCC<18V)

DC short circuit current
Short circuit current during thermal cycling
Shutdown temperature 150 175 200 °C
TSD
Reset temperature TRS + 1 TRS + 5 °C
R
Thermal reset of status 135 °C
RS
Thermal hysteresis
TSD-TR
)
(T
Turn-off output voltage clamp
Output voltage drop
ON
limitation
CC
5V<V
<28V 85 A
CC
VCC=13V; T
R<Tj<TTSD
I
=2A; VIN=0;
OUT
L=6mH
I
=0.1A;
OUT
T
= -40°C...150°C
j
(see Figure 8)
15 A
7°C
-41 VCC-46 VCC-52 V
V
CC
25 mV
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
= 0.05 A;
K
LED
K
K
0
1
I
OUT/ISENSE
I
OUT/ISENSE
I
OUT/ISENSE
OUT
V T
I V T
I V
T
= 0.5 V; V
SENSE
= -40°C...150°C
j
=0.5A; V
OUT
=0V;
CSD
= -40°C...150°C
j
=2A; V
OUT
=0V;
CSD
= -40°C...150°C
j
Tj= 25°C...150°C
I
=2A; V
dK1/K
(1)
Current sense ratio drift
1
OUT
=0V;
V
CSD
T
= -40°C...150°C
j
10/37 Doc ID 022463 Rev 3
SENSE
SENSE
SENSE
CSD
=4V;
=4V;
=0V;
=0.5V;
1370 3180 4930
1990 3050 4120
2100
2860
3840
2220
2860
3500
-10 10 %
Page 11
VN5E025ASO-E Electrical specifications
T a ble 9. Current sense (8 V < VCC< 18 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
K
dK2/K
K
dK3/K
I
SENSE0
I
OL
V
SENSE
I
2
OUT/ISENSE
(1)
Current sense ratio drift
2
I
3
OUT/ISENSE
(1)
Current sense ratio drift
3
Analog sense leakage current
Open-load on-state current detection threshold
Max analog sense output voltage
=3A; V
OUT
=0V;
V
CSD
Tj= -40°C...150°C T
= 25°C...150°C
j
=3A; V
I
OUT
V
=0V;
CSD
= -40°C...150°C
T
j
I
=10A; V
OUT
=0V;
V
CSD
Tj= -40°C...150°C Tj= 25°C...150°C
I
=10A; V
OUT
=0V;
V
CSD
= -40°C...150°C
T
j
=0A; V
I
OUT
=5V; VIN=0V;
V
CSD
= -40°C...150°C
T
j
I
=0A; V
OUT
=0V; VIN=5V;
V
CSD
= -40°C...150°C
T
j
I
=2A; V
OUT
=5V; VIN=5V;
V
CSD
= -40°C...150°C
T
j
=5V, 8V<VCC<18V;
V
IN
=5µA
I
SENSE
=3A; V
I
OUT
=4V;
SENSE
2300
2850
2420
2850
=4V;
SENSE
-7 7 %
=4V;
SENSE
2690
2830
2700
2830
=4V;
SENSE
-4 4 %
=0V;
SENSE
01µA
=0V;
SENSE
02µA
=0V;
SENSE
01µA
530mA
=0V 5 V
CSD
3520 3300
3060 3020
V
SENSEH
I
SENSEH
t
DSENSE1H
t
DSENSE1L
t
DSENSE2H
Analog sense output
(2)
voltage in fault condition
Analog sense output
(2)
current in fault condition
Delay response time from falling edge of CS_DIS pin
Delay response time from rising edge of CS_DIS pin
Delay response time from rising edge of INPUT pin
V
=13V; R
CC
=13V; V
V
CC
V
SENSE
0.5 A < I I
SENSE
<4V;
<10A;
OUT
= 90% of I
=3.9KΩ 8V
SENSE
=5V 9 mA
SENSE
SENSE max
40 100 µs
(see Figure 4)
V
0.5 A < I I
SENSE
SENSE
<4V;
<10A;
OUT
= 10% of I
SENSE max
520µs
(see Figure 4)
SENSE
SENSE
<4V;
<10A;
OUT
= 90% of I
SENSE max
80 300 µs
V
0.5 A < I I (see Figure 4)
Doc ID 022463 Rev 3 11/37
Page 12
Electrical specifications VN5E025ASO-E
SENSE CURRENT
INPUT
LOAD CURRENT
CS_DIS
t
DSENSE2H
t
DSENSE2L
t
DSENSE1L
t
DSENSE1H
T a ble 9. Current sense (8 V < VCC< 18 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
SENSE
SENSE
= 90% of I
OUT
OUTMAX
SENSE
SENSE
<4V;
= 90% of I
SENSEMAX,
OUTMAX
= 3 A (see Figure 7)
<4V;
<10A;
OUT
= 10% of I
SENSE max
110 µs
80 250 µs
Δ
t
DSENSE2H
t
DSENSE2L
Delay response time between rising edge of output current and rising edge of current sense
Delay response time from falling edge of INPUT pin
V I
I I
V
0.5 A < I I (see Figure 4)
1. Parameter guaranteed by design, it is not tested.
2. Fault condition includes: power limitation, overtemperature and open-load off-state detection.

Table 10. Open-load detection (8 V < VCC<18V)

Symbol Parameter Test conditions Min. Typ. Max. Unit
Open-load off-state
V
OL
voltage detection
=0V 2 — 4 V
V
IN
threshold
Output short circuit to
t
DSTKON
V
detection delay at
CC
See Figure 5 180 — 1200 µs
turn-off
I
L(off2)r
I
L(off2)f
Off-state output current at V
=4V
OUT
Off-state output current at V
=2V
OUT
=0V; V
V
IN
V
rising from 0 V to 4 V
OUT
V
=0V;
IN
V
SENSE=VSENSEH
SENSE
=0V;
; V
falling from VCC to 2 V
OUT
-120 — 0 µA
-50 — 90 µA
Delay response from
t
d_vol
output rising edge to V
SENSE
rising edge in
=4V; VIN=0V;
V
OUT
V
SENSE
= 90% of V
open-load

Figure 4. Current sense delay characteristics

12/37 Doc ID 022463 Rev 3
SENSEH
—20µs
Page 13
VN5E025ASO-E Electrical specifications
V
IN
V
CS
t
DSTKON
OUTPUT STUCK TO V
CC
V
OUT
> V
OL
V
SENSEH
V
OUT
dV
OUT
/dt
(on)
t
r
80%
10%
t
f
dV
OUT
/dt
(off)
t
d(off)
t
d(on)
INPUT
t
t
90%
t
Won
t
Woff

Figure 5. Open-load off-state delay timing

Figure 6. Switching characteristics

Doc ID 022463 Rev 3 13/37
Page 14
Electrical specifications VN5E025ASO-E
V
IN
I
OUT
I
SENSE
I
OUTMAX
I
SENSEMAX
90% I
SENSEMAX
90% I
OUTMAX
Δ
t
DSENSE2H
t
t
t
V
on
I
out
V
cc-Vout
T
j
=150oC
T
j
=25oC
T
j
=-40oC
V
on/Ron(T)
Figure 7. Delay response time between rising edge of output current and rising
edge of current sense (CS enabled)

Figure 8. Output voltage drop limitation

14/37 Doc ID 022463 Rev 3
Page 15
VN5E025ASO-E Electrical specifications
17 0 0
2200
2700
3200
3700
4200
2345 678910
I
OUT
(A)
I
out
/ I
sense
max Tj = -40 °C to 150 °C
max Tj = 25 °C to 150 °C
min Tj = 25 °C to 150 °C
min Tj = -40 °C to 150 °C
typical value
-10
-5
0
5
10
2345678910
dk/k(%)
I
OUT
(A)
Figure 9. I
OUT
/ I
SENSE
vs I
OUT

Figure 10. Maximum current sense ratio drift vs load current

Note: Parameter guaranteed by design; it is not tested.
Doc ID 022463 Rev 3 15/37
Page 16
Electrical specifications VN5E025ASO-E

Table 11. Truth table

Conditions Input Output Sense (V
Normal operation
L H
L
H
CSD
0
Nominal
=0V)
(1)
Overtemperature
Undervoltage
Overload
Short circuit to GND (power limitation)
Open-load off-state (with external pull-up)
Short circuit to V
CC
(external pull-up disconnected)
Negative output voltage clamp
1. If the V and external circuit.
is high, the SENSE output is at a high impedance, its potential depends on leakage currents
CSD
L H
L H
H
L L
L L
X
0
V
SENSEH
0 0
Nominal
(no power limitation)
H
Cycling
V
SENSEH
(power limitation)
L H
LHV
L H
L L
H H
0
V
SENSEH
SENSEH
V
SENSEH
< Nominal
LL 0
16/37 Doc ID 022463 Rev 3
Page 17
VN5E025ASO-E Electrical specifications

T able 12. Electrical transient requirements (part 1)

ISO 7637-2:
2004(E)
T est puls e
Test levels
(1)
Number of
pulses or
III IV Min. Max.
test times
Burst cycle/pulse
repetition time
Delays and Impedance
1 -75V -100V 5000 pulses 0.5s 5s 2 ms, 10Ω
2a +37V +50V 5000 pulses 0.2s 5s 50µs, 2Ω
3a -100V -150V 1h 90ms 100ms 0.1µs, 50Ω
3b +75V +100V 1h 90ms 100ms 0.1µs, 50Ω
4 -6V -7V 1 pulse 100ms, 0.01Ω
(2)
5b
1. The above test levels must be considered referred to VCC= 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.

T able 13. Electrical transient requirements (part 2)

ISO 7637-2:
+65V +87V 1 pulse 400ms, 2Ω
Test level results
2004E
T est puls e
III VI
1C C
2a C C
3a C C
3b C C
4C C
(1)
5b
1. Valid in case of external load dump clamp: 40V maximum referred to ground.

T able 14. Electrical transient requirements (part 3)

CC
Class Contents
C All functions of the device performed as designed after exposure to disturbance.
E
One or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
Doc ID 022463 Rev 3 17/37
Page 18
Electrical specifications VN5E025ASO-E
I
OUT
V
SENSE
V
CS_DIS
INPUT
Nominal load Nominal load
Normal operation
Power Limitation
I
LimH
>
I
LimL
>
I
OUT
V
SENSE
V
CS_DIS
INPUT
Thermal cycling
Overload or Short to GND

2.4 Waveforms

Figure 11. Normal operation

Figure 12. Overload or short to GND

18/37 Doc ID 022463 Rev 3
Page 19
VN5E025ASO-E Electrical specifications
I
OUT
V
SENSE
V
CS_DIS
INPUT
I
LimH
>
Nominal load
Intermittent Overload
I
LimL
>
Overload
V
SENSEH
>
INPUT
OFF-State Open Load
with external circutry
V
OL
I
OUT
V
SENSE
V
CS_DIS
V
OUT
V
OUT
> V
OL
t
DSTK(on)
V
SENSEH
>

Figure 13. Intermittent overload

Figure 14. Off-state open-load with external circuitry

Doc ID 022463 Rev 3 19/37
Page 20
Electrical specifications VN5E025ASO-E
t
DSTK(on)
V
OUT
> V
OL
Resistive
Short to V
CC
Hard
Short to V
CC
Short to V
CC
I
OUT
V
CS_DIS
V
OUT
V
OL
t
DSTK(on)
T
TSD
T
R
TJ evolution in
Overload or Short to GND
I
LimH
>
< I
LimL
T
J_START
T
HYST
Power Limitation
Self-limitation of fast thermal transients
INPUT
I
OUT
T
J
Figure 15. Short to V
CC

Figure 16. TJ evolution in overload or short to GND

20/37 Doc ID 022463 Rev 3
Page 21
VN5E025ASO-E Electrical specifications
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
300
600
900
1200
1500
Iloff (nA)
Off State Vcc=13V
Vin=Vout=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
1
1,5
2
2,5
3
3,5
4
4,5
5
Iih (µA)
Vin=2.1V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
6
6,2
6,4
6,6
6,8
7
Vicl (V)
lin=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,2
0,4
0,6
0,8
1
1,2
1,4
1,6
1,8
2
Vil (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,5
1
1,5
2
2,5
3
3,5
4
Vih (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,1
0,2
0,3
0,4
0,5
0,6
0,7
0,8
0,9
1
Vihyst (V)

2.5 Electrical characteristics curves

Figure 17. Off-state output current Figure 18. High level input current

Figure 19. Input clamp level Figure 20. Input low level

Figure 21. Input high level Figure 22. Input hysteresis voltage

Doc ID 022463 Rev 3 21/37
Page 22
Electrical specifications VN5E025ASO-E
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
20
40
60
80
Ron (mOhm)
Iout= 3A
Vcc=13V
0 5 10 15 20 25 30 35 40
Vcc (V)
0
10
20
30
40
50
60
Ron (mOhm)
Tc=-40°C
Tc=25°C
Tc=125°C
Tc=150°C
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
1
2
3
4
5
6
7
8
Vusd (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
100
200
300
400
500
600
700
(dVout/dt )On ( V/ms)
Vcc=13V
RI=4.3 Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
40
50
60
70
80
Ilimh (A)
Vcc=13V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
50
100
150
200
250
300
350
400
(dVout/dt )Off (V/m s)
Vcc=13V
RI= 4.3 Ohm
Figure 23. On-state resistance vs T

Figure 25. Undervoltage shutdown Figure 26. Turn-on voltage slope

case
Figure 24. On-state resistance vs V
CC
Figure 27. I
22/37 Doc ID 022463 Rev 3
LIMH
vs T
case

Figure 28. Turn-off voltage slope

Page 23
VN5E025ASO-E Electrical specifications
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,5
1
1,5
2
2,5
3
3,5
4
Vcsdh (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
2
3
4
5
6
7
8
9
10
Vcsdcl(V)
Iin = 1 mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,5
1
1,5
2
2,5
3
Vcsdl (V)

Figure 29. CS_DIS high level voltage Figure 30. CS_DIS clamp voltage

Figure 31. CS_DIS low level voltage

Doc ID 022463 Rev 3 23/37
Page 24
Application information VN5E025ASO-E
V
CC
GND
OUTPUT
D
GND
R
GND
D
ld
Μ
CU
+5V
V
GND
CS_DIS
IINPUT
R
prot
R
prot
CURRENT SENSE
R
prot
R
SENSE
C
ext

3 Application information

Figure 32. Application schematic

3.1 GND protection network against reverse battery

This section provides two solutions for implementing a ground protection network against reverse battery.
3.1.1 Solution 1: resistor in the ground line (R
This can be used with any type of load.
The following shows how to dimension the R
1. R
2. R
where -I
≤ 600mV / (I
GND
≥ (−VCC) / (-I
GND
is the DC reverse ground pin current and can be found in the absolute
GND
S(on)max
GND
)
)
maximum rating section of the device datasheet.
Power dissipation in R
P
=(-VCC)2/R
D
(when VCC<0 during reverse battery situations) is:
GND
GND
This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where I maximum on-state currents of the different devices.
24/37 Doc ID 022463 Rev 3
Please note that, if the microprocessor ground is not shared by the device ground, then the R
produces a shift (I
GND
S(on)max
* R
) in the input thresholds and the status output
GND
GND
resistor:
GND
only)
S(on)max
becomes the sum of the
Page 25
VN5E025ASO-E Application information
values. This shift varies depending on how many devices are ON in case of several high­side drivers sharing the same R
GND
.
If the calculated power dissipation requires the use of a large resistor, or several devices have to share the same resistor, then ST suggests using the here below solution 2.
3.1.2 Solution 2: diode (D
Note that a resistor (R
GND
) in the ground line
GND
=1kΩ) should be inserted in parallel to D
an inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network produces a shift (≈600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift not varies if more than one HSD shares the same diode/resistor network.

3.2 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the V
maximum DC rating. The same applies if the device is subject to transients on the VCC
CC
line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.

3.3 MCU I/O protection

If a ground protection network is used and negative transients are present on the VCC line, the control pins are pulled negative. ST suggests to insert a resistor (R the microcontroller I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of microcontroller I/Os:
if the device drives
GND
) in line to prevent
prot
-V
CCpeak/Ilatchup
≤ R
prot
Calculation example:
For V
CCpeak
5kΩ ≤ R
= - 100V and I
≤ 180kΩ
prot
Recommended values: R
≤ (V
OHμC-VIH-VGND
≥ 20mA; V
latchup
=10kΩ, C
prot
Doc ID 022463 Rev 3 25/37
EXT
) / I
IHmax
OHµC
= 10nF.
≥ 4.5V
Page 26
Application information VN5E025ASO-E
Main MOSn
41V
OUTn
I
Loff2r
R
SENSE
R
PROT
To uC ADC
R
PD
R
PU
V
PU
Pwr_Lim
V
SENSE
PU_CMD
Overtemperature
OL OFF
+
-
V
OL
CURRENT
SENSEn
I
OUT/KX
I
SENSEH
V
BAT
I
Loff2f
V
SENSEH
Load
INPUTn
V
CC
GND
CS_DIS

3.4 Current sense and diagnostic

The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
● Current mirror of the load current in normal operation, delivering a current
proportional to the load current according to a known ratio K
The current I external resistor R minimum (see parameter V
can be easily converted to a voltage V
SENSE
. Linearity between I
SENSE
SENSE
in Table 9: Current sense (8 V < VCC<18V)). The
OUT
and V
current sense accuracy depends on the output current (refer to current sense electrical characteristics Table 9: Current sense (8 V < V
● Diagnostic flag in fault conditions, delivering a fixed voltage V
maximum current I
SENSEH
in case of the following fault conditions (refer to Truth table):
<18V)).
CC
– Power limitation activation
–Overtemperature
– Short to V
in off-state
CC
– Open-load in off-state with additional external components.
A logic level high on the CS_DIS pin simultaneously sets all the current sense pins of the device in a high impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing the sense resistance and ADC line among different devices.
.
X
by means of an
SENSE
is ensured up to 5V
SENSE
SENSEH
up to a

Figure 33. Current sense and diagnostic

26/37 Doc ID 022463 Rev 3
Page 27
VN5E025ASO-E Application information
VVIRV
OLfoffLPD
OFFupPull
OUT
2
min)2(
_
=<⋅=
−
VV
RR
IRRVR
V
OL
PDPU
roffLPDPUPUPD
ONupPull
OUT
4
max
)2(
_
=>
+
=
−

3.4.1 Short to VCC and off-state open-load detection

Short to V
A short circuit between V V
SENSEH
CC
and output is indicated by the relevant current sense pin set to
CC
during the device off-state. Little or no current is delivered by the current sense
during the on-state depending on the nature of the short circuit.
Off-state open-load with exte rnal circuitry
Detection of an open-load in off mode requires an external pull-up resistor (R the output to a positive supply voltage (V
It is preferable that V
is switched off during the module standby mode to avoid an increase
PU
PU
).
) connecting
PU
in overall standby current consumption in normal conditions, that is, when the load is connected.
An external pull-down resistor (R
) connected between output and GND is mandatory to
PD
avoid misdetection in case of floating outputs in off-state (see Figure 33: Current sense and
diagnostic).
R
must be selected in order to ensure V
PD
OUT < VOLmin
unless pulled up by the external
circuitry:
R
≤ 22 KΩ is recommended.
PD
For proper open-load detection in off-state, the external pull-up resistor must be selected according to the following formula:
For the values of V
(8 V < V
CC
<18V).
OLmin,VOLmax, IL(off2)r
Doc ID 022463 Rev 3 27/37
and I
⋅⋅−⋅
see Table 10: Open-load detection
L(off2)f
Page 28
Application information VN5E025ASO-E
1
10
100
0,1 1 10 100L (mH)
I (A)
Demagnetization Demagnetization Demagnetization
t
V
IN
, I
L
C: T
jstart
= 125°C repetitive pulse
A: T
jstart
= 150°C single pulse
B: T
jstart
= 100°C repetitive pulse
A
B
C

3.5 Maximum demagnetization energy (VCC=13.5V)

Figure 34. Maximum turn off current versus inductance

Note: Values are generated with R
In case of repetitive pulses, T must not exceed the temperature specified above for curves A and B.
=0Ω.
L
(at the beginning of each demagnetization) of every pulse
jstart
28/37 Doc ID 022463 Rev 3
Page 29
VN5E025ASO-E Package and PC board thermal data
("1($'5
TBD







    
57+MDPE
("1($'5
1$#$VIFBUTJOLBSFBDN?
35)K@BNC$8

4 Package and PC board thermal data

4.1 SO-16L thermal data

Figure 35. SO-16L PC board

Note: Layout condition of Rth and Zth measurements (PCB: Double Layers, Thermal Vias,FR4
area 77mm X 86 mm, PCB thickness=1.6mm, Cu thickness = 70µm (front and back side), Copper area from minimum pad lay- out to 24 cm2 ).
Figure 36. \R
vs PCB copper area in open box free air condition
thj-amb
Doc ID 022463 Rev 3 29/37
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Package and PC board thermal data VN5E025ASO-E
TBD
("1(3*
Z
THδRTH
δ Z
THtp
1 δ–()+⋅=
where
δ tpT⁄=

Figure 37. SO-16L thermal impedance junction ambient single pulse

=7+&:

&X FP
&X FP
&X IRRWSULQW

    
7LPHV
("1(3*

Figure 38. Thermal fitting model of a single channel HSD in SO-16L

Equation 1: pulse calculation formula:
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VN5E025ASO-E Package and PC board thermal data

Table 15. Thermal parameter

Area/island (cm2)Footprint28
R1 (°C/W) 0.28
R2 (°C/W) 1.8
R3 (°C/W) 4
R4 (°C/W) 8 6 6
R5 (°C/W) 14 13 13
R6 (°C/W) 28 20 14.5
C1 (W.s/°C) 0.001
C2 (W.s/°C) 0.003
C3 (W.s/°C) 0.1
C4 (W.s/°C) 0.5
C5 (W.s/°C) 1 1.5 1.5
C6 (W.s/°C) 3 9 12
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Package and packing information VN5E025ASO-E
("1($'5

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK specifications, grade definitions and product status are available at: www.st.com
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.

5.2 Package mechanical data

Figure 39. SO-16L package dimensions

.
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VN5E025ASO-E Package and packing information

T able 16. SO-16L mechanical data

Millimeters
Symbol
Min Typ Max
A 2.35 2.65
A1 0.10 0.30
B 0.33 0.51
C 0.23 0.32
D 10.10 10.50
E 7.40 7.60
e1.27
H 10.00 10.65
h 0.25 0.75
L 0.40 1.27
k0° 8°
ddd 0.10
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Package and packing information VN5E025ASO-E
!LLDIMENSIONSAREINMM
"ASE1TY  "UL
K1T Y  4UBELE NGTH  !  "  # 
!
#
"
("1($'5

5.3 Packing information

Figure 40. SO-16L tube shipment (no suffix)

Figure 41. SO-16L tape and reel shipment (suffix “TR”)

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VN5E025ASO-E Order codes

6 Order codes

T a ble 17. Device summary

Package
Tube Tape and reel
SO-16L VN5E025ASO-E VN5E025ASOTR-E
Order codes
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Revision history VN5E025ASO-E

7 Revision history

Table 18. Document revision history

Date Revision Changes
10-Nov-2011 1 Initial release.
12-Mar-2012 2 Added Section 5: Package and packing information.
Table 4: Thermal data:
25-Jun-2012 3
–R –R
thj-case
thj-pcb
: added row
: removed row
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VN5E025ASO-E
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