Page 1
Features
VN5772AK-E
Quad smart power solid-state relay
for complete H-bridge configurations
Typ e R
VN5772AK-E 100 mΩ
1. Total resistance of one side in bridge configuration.
2. Typical current limitation value.
■ General features
DS(on)
(1)
I
OUT
18 A
(2)
– Inrush current management by active
power limitation on the high-side switches
– Very low standby current
– Very low electromagnetic susceptibility
– Compliant with European directive
2002/95/EC
■ Protections
– High-side drivers under voltage shutdown
– Overvoltage clamp
– Output current limitation
– High and low-side overtemperature
shutdown
– Short-circuit protection
– ESD protection
■ Diagnostic functions
– Proportional load current sense
– Thermal shutdown indication on both the
high and low-side switches
Applications
■ DC motor driving in full or half-bridge
configuration
■ All types of resistive, inductive and capacitive
loads
Table 1. Device summary
Package
V
CC
36 V
SO-28
Description
The VN5772AK-E is a device formed by three
monolithic chips housed in a standard SO-28
package: a double high-side and two low-side
switches. The double high-side is made using
STMicroelectronics
while the low-side switches are fully protected
VIPower M0-5 OMNIFET III. This device is
suitable to drive a DC motor in a bridge
configuration as well as to be used as a quad
switch for any low-voltage application. The dual
high-side switches integrate built-in non latching
thermal shutdown with thermal hysteresis. An
output current limiter protects the device in
overload conditions. In the case of long overload
duration, the device limits the dissipated power to
a safe level-up to thermal shutdown intervention.
An analog current sense pin delivers a current
proportional to the load current (according to a
known ratio) and indicates overtemperature
shutdown of the relevant high-side switch through
a voltage flag.The low-side switches have built-in
non latching thermal shutdown with thermal
hysteresis, linear current limitation and
overvoltage clamping. In case of long overload
duration, the low-side switches limit the dissipated
power to a safe level up to the thermal shutdown
intervention. Fault feedback for overtemperature
shutdown of the low-side switch is indicated by
the relevant status pin.
Order codes
Tube Tape and reel
®
VIPower® M0-5 technology,
SO-28 VN5772AK-E VN5772AKTR-E
November 2011 Doc ID 16084 Rev 5 1/34
www.st.com
1
Page 2
Contents VN5772AK-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3.1 Electrical characteristics for dual high-side switches . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves for dual high-side switches . . . . . . . . . . 15
2.5 Electrical characteristics for low-side switch . . . . . . . . . . . . . . . . . . . . . . . 17
2.6 Electrical characteristics curves for low-side switch . . . . . . . . . . . . . . . . . 19
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1 Maximum demagnetization energy (V
= 13.5 V) . . . . . . . . . . . . . . . . . 24
CC
4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1 SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.1 ECOPACK® package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2/34 Doc ID 16084 Rev 5
Page 3
VN5772AK-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Dual high-side switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Low side switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Current sense (8 V < VCC < 16 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 11. Truth table high-side driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 12. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 13. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 14. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 15. PowerMOS section - off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 16. PowerMOS section - on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 17. Switching (T
Table 18. Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 19. Input section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 20. STATUS pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 21. Protection and diagnostics (-40 °C < Tj < 150 °C, unless otherwise specified) . . . . . . . . . 18
Table 22. Truth table low-side driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 23. Thermal calculations in clockwise and anti-clockwise operation in steady-state mode . . . 26
Table 24. Thermal resistances definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 25. Single pulse thermal impedance definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 26. Thermal calculations in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 27. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 28. SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 29. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
= 25° C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
j
Doc ID 16084 Rev 5 3/34
Page 4
List of figures VN5772AK-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 4. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 7. High-level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Input voltage clamp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Low level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. High-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Input voltage hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 13. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 15. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 16. I
Figure 17. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 18. Source diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. Static drain source on-resistance vs drain current (3 pin). . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. Static drain source on-resistance vs input voltage (3 pin) . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 21. Static drain source on-resistance vs drain current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 22. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 23. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 24. Normalized on-resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. Normalized input threshold vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 27. Recommended motor operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 28. Waveforms (high-side switches). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 29. Maximum turn-off current vs load inductance
Figure 30. SO-28 PC board
Figure 31. Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 32. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition
Figure 33. SO-28 HSD thermal impedance junction-ambient single pulse . . . . . . . . . . . . . . . . . . . . . 27
Figure 34. SO-28 LSD thermal impedance junction-ambient single pulse. . . . . . . . . . . . . . . . . . . . . . 28
Figure 35. Thermal fitting model of an H-bridge in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 36. SO-28 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 37. SO-28 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 38. Tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
LIMH
(1)
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
(1)
. . . . . . . 26
4/34 Doc ID 16084 Rev 5
Page 5
VN5772AK-E Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
Vcc
Vcc
GND
INPUT1
INPUT2
C.SENSE
clamp
Logic
Overtemp. 1
Overtemp. 2
K
K
Undervoltage
Driver 1
Current limiter 1
Vds limiter 1
Power limitation
IDS1
IDS2
Clamp 1
Driver 2
Current limiter 2
VDS limiter 2
Power limitation
Overvoltage
Clamp
SOURCE1
Clamp 2
SOURCE2
DRAIN3
INPUT3
STATUS3
STATUS4
INPUT4
LOGIC
Over
Temperature
LOGIC
Over
Temperature
Linear
Current
Limiter
Overvoltage
Clamp
Linear
Current
Limiter
SOURCE3
DRAIN4
SOURCE4
Doc ID 16084 Rev 5 5/34
Page 6
Block diagram and pin description VN5772AK-E
Table 2. Pin description
No pin Name Function
1, 3, 25, 28 DRAIN 3 Drain of switch 3 (low-side switches)
2 INPUT 3 Input of switch 3 (low-side switch)
4 STATUS 3 Status of switch 3 (low-side switch)
11 STATUS 4 Status of switch 4 (low-side switch)
5, 10, 19, 24 V
CC
6 GND Ground of switches 1 and 2 (high-side switches)
8 INPUT 1 Input of switch 1 (high-side switch)
7 INPUT 2 Input of switch 2 (high-side switch)
Drain of switches 1 and 2 (high-side switches) and power supply
voltage
9 C.SENSE
Analog current sense pin, delivers a current proportional to the load
current
12, 14, 15, 18 DRAIN 4 Drain of switch 4 (low-side switches)
13 INPUT 4 Input of switch 4 (low-side switch)
16, 17 SOURCE 4 Source of switch 4 (low-side switches)
22, 23 SOURCE 2 Source of switch 2 (high-side switches)
20, 21 SOURCE 1 Source of switch 1 (high-side switches)
26, 27 SOURCE 3 Source of switch 3 (low-side switches)
Figure 2. Configuration diagram (top view)
DRAIN 3
INPUT 3
DRAIN 3
STATUS 3
STATUS 3
V
CC
GND
INPUT 2
DRAIN 3
SOURCE 3
SOURCE 3
DRAIN 3
V
CC
SOURCE 2
SOURCE 2
INPUT 1
C.SENSE
V
CC
STATUS 4
STATUS 4
DRAIN 4
INPUT 4
DRAIN 4
6/34 Doc ID 16084 Rev 5
SOURCE 1
SOURCE 1
V
CC
DRAIN 4
SOURCE 4
SOURCE 4
DRAIN 4
Page 7
VN5772AK-E Electrical specification
2 Electrical specification
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to the conditions in the tables below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE program
and other relevant quality document.
Table 3. Dual high-side switch
Symbol Parameter Value Unit
V
-V
- I
GND
I
OUT
- I
OUT
I
-I
CSENSE
V
CSENSE
E
MAX
V
ESD
V
ESD
T
T
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
DC output current Internally limited A
Reverse DC output current -12 A
DC input current -1 to 10 mA
IN
DC reverse C.SENSE pin current 200 mA
V
Current sense maximum voltage
CC
+V
Maximum switching energy (single pulse)
(L = 3 mH; RL=0Ω; V
= I
(Typ.)
I
OUT
limL
)
=13.5V; T
bat
jstart
= 150 °C;
104 mJ
Electrostatic discharge (human body model: R = 1.5 KΩ;
C = 100 pF)
– Input
– Current sense
– SOURCE
–V
CC
/DRAIN
n
n
4000
2000
5000
5000
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature -40 to 150 °C
j
Storage temperature -55 to 150 °C
stg
- 41
CC
V
V
V
V
V
V
Doc ID 16084 Rev 5 7/34
Page 8
Electrical specification VN5772AK-E
Table 4. Low side switch
Symbol Parameter Value Unit
V
I
I
-I
I
STAT
DSn
INn
Drain-source voltage (V
Input current -1 to 10 mA
Drain current Internally limited A
Dn
Reverse DC output current -4 A
Dn
DC status current -1 to 10 mA
Electrostatic discharge (R = 1.5 KΩ, C = 100 pF):
V
ESD1
–Drain
– Supply, status, input
V
ESD2
T
Electrostatic discharge on output pins only
(R = 330 Ω, C = 150 pF)
Operating junction-temperature -40 to 150 °C
T
j
Storage temperature -55 to 150 °C
stg
2.2 Thermal data
Table 5. Thermal data
Symbol Parameter Max. value Unit
R
thj-leadHS
R
thj-leadLS
R
thj-amb
Thermal resistance junction-case (high-side switch) 22 °C/W
Thermal resistance junction-case (low-side switch) 21 °C/W
Thermal resistance junction-ambient (high-side switch) 47 °C/W
Thermal resistance junction-ambient (low-side switch) 57 °C/W
= 0 V) Internally clamped V
INn
5000
4000
2000 V
V
8/34 Doc ID 16084 Rev 5
Page 9
VN5772AK-E Electrical specification
2.3 Electrical characteristics
2.3.1 Electrical characteristics for dual high-side switches
Values specified in this section are for 8 V < VCC<36V; -40°C<Tj< 150 °C, unless
otherwise specified (for each channel).
Table 6. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
V
clamp
I
L(off)
1. PowerMOS leakage included.
2. For each channel.
Operating supply
CC
voltage
Undervoltage
USD
shutdown
Undervoltage
shutdown hysteresis
On-state resistance
ON
Voltage clamp IS = 20 mA 41 46 52 V
I
Supply current
S
Off-state output
(2)
current
Output - VCC diode
V
F
voltage
(2)
4.5 13 36 V
3.5 4.5 V
0.5 V
= 3 A; Tj = 25 °C 50
I
OUT
= 3 A; Tj = 150 °C 100
OUT
I
= 3 A; V
OUT
Off-state: V
V
IN=VOUT
On-state: V
=0A
I
OUT
VIN=V
OUT
=25°C
T
j
V
IN=VOUT
T
=125°C
j
I
= 3A, Tj = 150 °C 0.7 V
OUT
= 5 V; Tj = 25 °C 65
CC
= 13 V; Tj = 25 °C,
CC
= V
CC
=0V; VCC=13V,
=0V; VCC=13V,
= 0 V
SENSE
=13V; VIN=5V,
00.01 3
05
(1)
2
36mA
mΩI
(1)
5
µA
µA
Table 7. Switching (VCC = 13 V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
(dV
/dt)onTurn-on voltage slope RL = 6.5 Ω —
OUT
(dV
OUT
/dt)
Turn-on delay time RL = 6.5 Ω (see
Turn-off delay time RL = 6.5 Ω (see
Turn-off voltage slope RL = 6.5 Ω —
off
Figure 4
Figure 4
)— 25 — µs
)— 20 — µs
See
Figure 15
See
Figure 17
—V/µs
—V/µs
Doc ID 16084 Rev 5 9/34
Page 10
Electrical specification VN5772AK-E
Table 7. Switching (VCC = 13 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
W
ON
W
OFF
Table 8. Logic inputs
Switching energy
losses during t
won
Switching energy
losses during t
woff
RL = 6.5 Ω (see
RL = 6.5 Ω (see
Figure 4
Figure 4
)— 0.24 — mJ
)— 0.2 — mJ
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
I(hyst)
V
Table 9. Protection and diagnostics
Low-level input voltage 0.9 V
IL
I
Low-level input current V
IL
High-level input voltage 2.1 V
IH
I
High-level input current V
IH
= 0.9 V 1 µA
IN
= 2.1 V 10 µA
IN
Input voltage hysteresis 0.25 V
I
= 1 mA 5.5 7
Input voltage clamp
ICL
IN
= -1 mA -0.7
I
IN
(1)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
= 13 V 12 18 24 A
I
limH
DC short-circuit
current
CC
5V<VCC<36V 24 A
V
I
T
T
T
HYST
V
DEMAG
V
1. To ensure long-term reliability under heavy overload or short-circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Short-circuit current
limL
during thermal cycling
Shutdown
TSD
temperature
Reset temperature TRS + 1 TRS + 5 °C
T
R
Thermal reset of
RS
STATUS
Thermal hysteresis
(T
- TR)
TSD
Turn-off output voltage
clamp
Output voltage drop
ON
limitation
= 13 V; TR < Tj < T
V
CC
= 2 A; V
I
OUT
I
= 0.1 A,
OUT
= -40 °C to 150 °C
T
j
(see
Figure 5
IN
)
TSD
150 175 200 °C
135 °C
= 0; L = 6 mH VCC - 41 V
7A
7°C
CC
- 46 V
- 52 V
CC
25 mV
10/34 Doc ID 16084 Rev 5
Page 11
VN5772AK-E Electrical specification
Table 10. Current sense (8 V < V
Symbol Parameter Test conditions Min. Typ. Max. Unit
K
K
K
K
I
OUT
I
OUT
I
OUT
I
OUT
/ I
/ I
/ I
/ I
SENSE
SENSE
SENSE
SENSE
0
1
2
3
< 16 V)
CC
I
= 0.35 A; V
OUT
SENSE
Tj = -40 °C to 50 °C
I
= 1 A; V
OUT
SENSE
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
I
= 2 A; V
OUT
SENSE
Tj = -40 °C to 150 °C
T
= 25 °C to 150 °C
j
I
= 6 A; V
OUT
T
= -40 °C to 150 °C
j
SENSE
Tj = 25 °C to 150 °C
= 0.5 V;
= 0.5 V;
= 4 V;
= 4 V;
1430 2140 2890
1470
2020
2610
1570
2020
2470
1740
2020
2320
1790
2020
2250
1890
2010
2140
1890
2010
2140
V
SENSE
I
SENSE0
V
SENSEH
I
SENSEH
t
DSENSE2H
t
DSENSE2L
Max analog sense output
voltage
Analog sense leakage
current
Analog sense output
voltage in overtemperature
condition
Analog sense output
current in overtemperature
condition
Delay response time from
rising edge of INPUT pin
Delay response time from
falling edge of INPUT pin
I
= 4 A; 5 V
OUT
= 0 A,
I
OUT
V
V
SENSE
= 0 V,
IN
= 0 V,
01
Tj = -40 °C to 150 °C
= 0 A,
I
OUT
V
V
T
V
V
V
0.5 A < I
I
(see
V
0.5 A < I
I
(see
= 0 V,
SENSE
= 5 V,
IN
= -40 °C to 150 °C
j
= 13 V, R
CC
= 13 V, V
CC
SENSE
SENSE
Figure 3
SENSE
SENSE
Figure 3
SENSE
SENSE
< 4 V,
< 4 A,
OUT
= 90% of I
)
< 4 V,
< 4 A,
OUT
= 10% of I
)
02
= 10 KΩ 9V
= 5 V 8 mA
80 250 µs
SENSE max
100 250 µs
SENSE max
µA
Doc ID 16084 Rev 5 11/34
Page 12
Electrical specification VN5772AK-E
Figure 3. Current sense delay characteristics
INPUT
LOAD CURRENT
SENSE CURRENT
t
DSENSE2H
t
DSENSE2L
Figure 4. Switching time waveforms
V
OUTn
80%
/dt
dV
OUT
(on)
90%
dV
/dt
OUT
(off)
V
INn
t
d(on)
Figure 5. Output voltage drop limitation
Vcc-Vout
Tj=150oC
Von
Von/Ron(T)
10%
t
d(off)
Tj=25
o
C
Tj=-40
o
C
Iout
t
t
12/34 Doc ID 16084 Rev 5
Page 13
VN5772AK-E Electrical specification
Table 11. Truth table high-side driver
Conditions Input Output Sense
Normal operation
Overtemperature
Undervoltage
Short-circuit to GND
(R
≤ 10 mΩ)
SC
Short-circuit to V
CC
Negative output voltage
clamp
L
H
L
H
L
H
L
H
H
L
H
L
H
L
L
L
L
L
L
L
V
SENSEH
H
H
0
Nominal
0
V
SENSEH
0
0
0
0 if Tj < T
if Tj > T
0
< Nominal
TSD
TSD
LL 0
Doc ID 16084 Rev 5 13/34
Page 14
Electrical specification VN5772AK-E
Table 12. Electrical transient requirements (part 1/3)
ISO 7637-2:
2004(E)
test pulse
Test levels
III IV
(2)
Number of
pulses or
test times
(1)
Burst cycle / pulse
repetition time
Delays and
Impedance
1 -75V -100V 5000 pulses 0.5s 5s 2 ms, 10Ω
2a +37V +50V 5000 pulses 0.2s 5s 50µs, 2Ω
3a -100V -150V 1h 90ms 100ms 0.1µs, 50Ω
3b +75V +100V 1h 90ms 100ms 0.1µs, 50Ω
4 -6V -7V 1 pulse 100ms, 0.01Ω
(3)
5b
1. Valid for HSD and H-bridge configuration
2. The above test levels must be considered referred to VCC= 13.5 V except for pulse 5b.
3. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 13. Electrical transient requirements (part 2/3)
ISO 7637-2:
+65V +87V 1 pulse 400ms, 2Ω
Test level results
(1)
2004E
test pulse
III VI
1C C
2a C C
3a C C
3b C C
4C C
(2)
5b
CC
1. The above test levels must be considered referred to VCC= 13.5 V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 14. Electrical transient requirements (part 3/3)
Class Contents
C All functions of the device performed as designed after exposure to disturbance.
E
One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
14/34 Doc ID 16084 Rev 5
Page 15
VN5772AK-E Electrical specification
2.4 Electrical characteristics curves for dual high-side switches
Figure 6. Off-state output current Figure 7. High-level input current
Figure 8. Input voltage clamp Figure 9. Low level input voltage
Figure 10. High-level input voltage Figure 11. Input voltage hysteresis
Doc ID 16084 Rev 5 15/34
Page 16
Electrical specification VN5772AK-E
Figure 12. On-state resistance vs T
case
Figure 13. On-state resistance vs V
Figure 14. Undervoltage shutdown Figure 15. Turn-on voltage slope
CC
Figure 16. I
LIMH
vs T
case
16/34 Doc ID 16084 Rev 5
Figure 17. Turn-off voltage slope
Page 17
VN5772AK-E Electrical specification
2.5 Electrical characteristics for low-side switch
Values specified in this section are for -40 °C < Tj < 150 °C, unless otherwise specified
Table 15. PowerMOS section - off
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CLAMP
V
CLTH
I
DSS
Table 16. PowerMOS section - on
Drain-source voltage
clamp
Drain-source threshold
voltage clamp
Zero input voltage
Drain current
=0V)
(V
IN
VIN = 0 V; ID = 2 A 41 46 52 V
= 0 V; ID = 2 mA 36 V
V
IN
V
DS
V
DS
= 13 V; V
= 13 V; V
= 0 V; Tj = 25°C 0 3
IN
= 0 V; Tj = 125°C 0 5
IN
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
= 5 V; ID = 2 A; Tj = 25 °C — — 50 mΩ
R
DS(on)
Table 17. Switching (Tj = 25° C, unless otherwise specified)
Static drain-source
on-resistance
IN
VIN = 5 V; ID = 2 A; Tj = 150 °C — — 100 mΩ
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
W
W
t
r
t
f
ON
OFF
Turn-on delay time RL = 6.5 Ω; V
Turn-off delay time RL = 6.5 Ω; V
Turn-on voltage slope RL = 6.5 Ω; V
Turn-off voltage slope RL = 6.5 Ω; V
Switching energy losses
during t
won
Switching energy losses
during t
woff
RL = 6.5 Ω; V
RL = 6.5 Ω; V
= 13 V — 6 — µs
CC
= 13 V — 20 — µs
CC
= 13 V — 10 — µs
CC
= 13 V — 10 — µs
CC
= 13 V — 0.04 — mJ
CC
= 13 V — 0.06 — mJ
CC
µA
Table 18. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
(1)
V
SD
Forward on voltage ISD = 2 A; V
= 0 V — 0.8 — V
IN
1. Pulsed: Pulse duration = 300 μs, duty cycle 1.5%
Table 19. Input section
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
Supply current from input pin
ISS
On-state: V
=0V
V
DS
IN
= 5 V;
30 110 µA
Doc ID 16084 Rev 5 17/34
Page 18
Electrical specification VN5772AK-E
Table 19. Input section (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
= 1 mA 5.5 7
V
V
INTH
Table 2 0. S TAT U S pin
Input voltage clamp
ICL
Input voltage threshold V
Symbol Parameter Test conditions Min. Typ. Max. Unit
S
= -1 mA -0.7
I
S
= VIN; ID = 1 mA 1 3.5 V
DS
V
V
STAT
I
LSTAT
C
STAT
V
STCL
Table 21. Protection and diagnostics (-40 °C < Tj < 150 °C, unless otherwise
Status low output
voltage
Status leakage current
STATUS pin input
capacitance
Status voltage clamp
= 1 mA 0.5 V
I
STAT
Normal operation,
V
= 5 V
STAT
Normal operation,
V
= 5 V
STAT
I
= 1 mA 5.5 7
STAT
= -1 mA -0.7
I
STAT
10 µA
100 pF
specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
T
limH
I
limL
t
dlim
T
DC short-circuit current V
Short-circuit current
during thermal cycling
Step response current limit V
Overtemperature shutdown 150 175 200 °C
TSD
Overtemperature reset 135 °C
R
= 13 V, V
DS
V
= 13 V, TR < Tj < T
DS
= 5 V, V
IN
= 5 V 192738 A
IN
TSD
= 13 V 20 µs
DS
11 A
V
Table 22. Truth table low-side driver
Conditions Input Drain Status
Normal operation
Overtemperature
18/34 Doc ID 16084 Rev 5
L
H
L
H
H
L
H
H
H
H
H
L
Page 19
VN5772AK-E Electrical specification
C
2.6 Electrical characteristics curves for low-side switch
Figure 18. Source diode forward
Vf (mV)
1000
950
900
850
800
750
700
650
600
550
500
012345 67
characteristics
Figure 19. Static drain source on-resistance
vs drain current (3 pin)
R
(mΩ)
DS(on)
14000
12600
11200
9800
8400
7000
5600
4200
2800
1400
0
00.511.522.533.544.5
Tj = 150
Tj = 25 °C
Tj = -40 °
Id (A)
Figure 20. Static drain source on-resistance
vs input voltage (3 pin)
R
(mΩ)
DS(on)
120
108
Id = 3 A
96
84
72
60
48
36
24
12
Tj = 150
Tj = 25 °C
Tj = -40 °C
Figure 21. Static drain source on-resistance
vs drain current
R
(mΩ )
DS(on)
120
110
100
90
80
70
60
50
40
30
20
01234567
A
B
D
F
0
22.533.544.555.566.57
Vin (V)
A : Vin = 3.5 V, Tj = 150 °C
B : Vin = 5 V, Tj = 150 °C
C : Vin = 3.5 V, Tj = 25 °C
Figure 22. Transfer characteristics Figure 23. Output characteristics
Id (A)
35
33
31
29
27
25
B
C
A
23
21
19
17
15
2.5 3 3.5 4 4.5 5 5.5
Vin (V)
A: Tj = -40 °C B: Tj = 25 °C C: Tj = 150 °C
Id (A)
40.0
35.0
30.0
25.0
20.0
15.0
10.0
5.0
0.0
0.00.30.60.91.31.92.73.84.96.17.38.39.5
Id (A)
C
Id (A)
D : Vin = 5 V, Tj = 25 °C
E : Vin = 3.5 V, Tj = -40 °C
F : Vin = 5 V, Tj = -40 °C
V
(V)
DS
Vin = 3 V
E
Doc ID 16084 Rev 5 19/34
Page 20
Electrical specification VN5772AK-E
Figure 24. Normalized on-resistance vs
temperature
Ron (mΩ)
100
90
80
70
60
50
40
30
20
10
0
-50 -25 0 25 50 75 100 125 150 175
Iout = 2 A
Tj (° C)
Figure 25. Normalized input threshold vs
temperature
Vin th (V)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -25 0 25 50 75 100 125 150 175 200
Tj (°C)
Id = 1 mA
20/34 Doc ID 16084 Rev 5
Page 21
VN5772AK-E Application information
3 Application information
Figure 26. Typical application schematic
Mostly motor bridge drivers use a reverse battery protection diode (D) inside supply rail.
This diode prevents a reverse current flow back to Vbatt in case the bridge gets disabled via
the logic inputs while motor inductance still carries energy. In order to prevent a hazardous
overvoltage at circuit supply terminal (V
), a blocking capacitor (C) is needed to limit the
CC
voltage overshoot. As basic orientation, 50 µF per 1 A load current is recommended. In
alternative, also a Zener protection (Z) is suitable.
Even if a reverse polarity diode is not present, it is recommended to use a capacitor or zener
at V
because a similar problem appears in case supply terminal of the module has
CC
intermittent electrical contact to the battery or gets disconnected while motor is operating.
Doc ID 16084 Rev 5 21/34
Page 22
Application information VN5772AK-E
Figure 27. Recommended motor operation
e
e
s
s
i
i
w
w
k
k
c
c
o
o
l
l
c
c
r
r
n
n
e
e
t
t
o
o
i
i
n
n
t
t
u
u
a
a
r
r
o
o
e
e
C
C
a
a
p
p
o
o
P
P
Flyback energy charged
Flyback energy charged
into capacitor C
into capacitor C
n
p
p
o
o
t
t
s
s
r
r
o
o
t
t
o
o
m
m
e
e
v
v
i
i
s
s
s
s
Dead time to avoid cross conduction
Dead time to avoid cross conduction
n
o
o
i
i
t
t
a
a
r
r
e
e
p
p
o
o
o
o
t
t
o
se
se
i
i
mo
m
e
e
kw
kw
v
v
i
i
c
c
t
t
o
o
c
c
l
l
A
A
C
C
Flyback spike during cross
Flyback spike during cross
current protection time
current protection time
p
p
o
o
t
t
s
s
r
r
t
t
t
t
Input 1
Input 1
Input 2
Input 2
Input 3
Input 3
Input 4
Input 4
Vz
Vz
Vcc
Vcc
+I M
+I M
-I M
-I M
se
se
i
i
ckw
ckw
o
o
l
l
C
C
n
n
o
o
i
i
t
t
a
a
r
r
e
e
p
p
o
o
s
s
s
s
a
a
P
P
Flyback clamped
Flyback clamped
by Zener di ode Z
by Zener di ode Z
p
p
o
o
t
t
s
s
r
r
o
o
t
t
o
o
m
m
e
e
v
v
i
i
22/34 Doc ID 16084 Rev 5
Page 23
VN5772AK-E Application information
Figure 28. Waveforms (high-side switches)
NORMAL OPERATION
INPUT
LOAD CURRENT
CURRENT SENSE
UNDERVOLTAGE
V
V
CC
INPUT
LOAD CURRENT
CURRENT SENSE
V
USD
USDhyst
INPUT
LOAD VOLTAGE
LOAD CURRENT
CURRENT SENSE
T
j
T
R
INPUT
LOAD CURRENT
SENSE CURRENT
T
TSD
T
RS
current
limitation
SHORT TO V
<Nominal
OVERLOAD OPERATION
power
limitation
OVERLOAD NORMAL LOAD
CC
thermal cycling
<Nominal
I
LIMH
I
LIML
V
SENSEH
Doc ID 16084 Rev 5 23/34
Page 24
Application information VN5772AK-E
3.1 Maximum demagnetization energy (V
Figure 29. Maximum turn-off current vs load inductance
I (A)
100
A
B
10
I (A)
1
0.1 1 10 100L (mH)
I (A)
100
C
HSD
LSD
= 13.5 V)
CC
(1)
A
B
10
I (A)
1
0.1 1 10 100L (mH)
A: Single pulse
B: Repetitive pulse Tj = 100 °C
VIN, I
L
C
Demagnetization
C: Repetitive pulse Tj = 125 °C
Demagnetization
Demagnetization
t
1. Values are generated with RL = 0 Ω
In case of repetitive pulses, T
the temperature specified above for curves B and C.
(at beginning of each demagnetization) of every pulse must not exceed
jstart
24/34 Doc ID 16084 Rev 5
Page 25
VN5772AK-E Package and PC board thermal data
4 Package and PC board thermal data
4.1 SO-28 thermal data
Figure 30. SO-28 PC board
(1)
("1($'5
1. Layout condition of Rth and Zth measurements (Board finish thickness 1.6 mm +/- 10%; Board double
layers; Board dimension 77x86; Board Material FR4; Cu thickness 0.070mm (front and back side); Thermal
vias separation 1.2 mm; Thermal via diameter 0.3 mm +/- 0.08 mm; Cu thickness on vias 0.025 mm).
Figure 31. Chipset configuration
LOW-SIDE
CHIP
channel 3
R
thB
R
thAB
HIGH-SIDE
CHIP
channels 1,2
R
thA
R
thAC
LOW-SIDE
CHIP
channel 4
R
thC
R
thBC
Doc ID 16084 Rev 5 25/34
Page 26
Package and PC board thermal data VN5772AK-E
Figure 32. Auto and mutual Rthj-amb vs PCB copper area in open box free air
condition
#7
1. See
Table 23. Thermal calculations in clockwise and anti-clockwise operation in steady-
Figure 31
. For more detailed information see
(1)
#U!REAREFERTO0#"LAYOUT
Table 23
and
Table 24
2TH!
2TH"2TH#
2TH!"2TH!#
2TH"#
'!0'#&4
.
state mode
HS1HS2LS3LS
On Off Off On
Off On On Off
4
P
R
P
R
dHS1
thHSLS
dHS2
thHSLS
x R
x R
T
thHS
+ T
thHS
+ T
jHS12
amb
amb
+ P
+ P
dLS4
dLS3
x
x
P
P
P
P
dHS1
dLS4
dHS2
dLS3
x R
x R
x R
x R
T
jLS3
thHSLS
thLSLS
thHSLS
thLS
+ T
+ T
+
+
amb
amb
P
P
P
P
dHS1
dLS4
dHS2
dLS3
x R
x R
x R
x R
T
jLS4
thHSLS
thLS
thHSLS
thLSLS
+ T
+
amb
+
+ T
amb
Table 24. Thermal resistances definitions
R
= R
thHS
R
= R
thLS
R
thHSLS
R
thLSLS
1. values dependent on PCB heatsink area.
Table 25. Single pulse thermal impedance definitions
Z
thHS
Z
= Z
thLS
thLS3
Z
1. values dependent on PCB heatsink area.
Z
thHSLS
thLSLS
= Z
= Z
thHS1
thLS3
= R
thHS1LS4
= R
thLS3LS4
= Z
thHS12LS3
thLS3LS4
= R
= R
thLS4
thHS2
thLS4
= R
= Z
thHS2LS3
thHS12LS4
High-side chip thermal resistance junction-to-ambient
(HS
Low-side chip thermal resistance junction-to-ambient
Mutual thermal resistance junction-to-ambient
between high-side and low-side chips
Mutual thermal resistance junction-to-ambient
between low-side chips
High-side chip thermal impedance junction-to-ambient
Low-side chip thermal impedance junction-to-ambient
Mutual thermal impedance junction-to-ambient between
high-side and low-side chips
Mutual thermal impedance junction-to-ambient between lowside chips
(1)
or HS2 in on-state)
1
(1)
26/34 Doc ID 16084 Rev 5
Page 27
VN5772AK-E Package and PC board thermal data
Table 26. Thermal calculations in transient mode
T
jHS12
T
Z
jLS3
T
jLS4
Z
thHS
thHSLS
Z
thHSLS
x P
dHS12
x P
x P
+ Z
dHS12
dHS12
thHSLS
+ Z
+ Z
thLS
thLSLS
x (P
x P
dLS3
x P
dLS3
dLS3
+ P
+ Z
dLS4
thLSLS
+ Z
(1)
thLS
) + T
x P
x P
amb
dLS4
dLS4
+ T
+ T
amb
amb
1. Calculation is valid in any dynamic operating condition. Pd values set by user.
Figure 33. SO-28 HSD thermal impedance junction-ambient single pulse
#UFOOTPRINT
#UCM>
#UC M>
#UFOOTPRINT
#UCM>
#UC M>
#7
:4( (3$ CUAREA
TIMESEC
'!0'#&4
Doc ID 16084 Rev 5 27/34
Page 28
Package and PC board thermal data VN5772AK-E
Figure 34. SO-28 LSD thermal impedance junction-ambient single pulse
:4( ,3$ CUAREA
#UFOOTPRINT
#UCM>
#UC M>
#UFOOTPRINT
#UCM>
#UC M>
:
LS
#7
:
LSLS
TIMESEC
Equation 1: Pulse Calculation Formula
Z
THδ
R
TH
δ Z
THtp
1 δ–()+⋅=
where δ = tP/T
'!0'#&4
28/34 Doc ID 16084 Rev 5
Page 29
VN5772AK-E Package and PC board thermal data
Figure 35. Thermal fitting model of an H-bridge in SO-28
("1($'5
Table 27. Thermal parameters
Area/island (cm
2)
(1)
FP 4 16
R1 = R5 = R6 = R10 (°C/W) 1.5
R2 = R7 = R11 (°C/W) 5.5
R3 (°C/W) 36 34 32
R4 (°C/W) 50 43 36
R8 = R12 (°C/W) 40 38 36
R9 = R13 (°C/W) 54 52 50
R14 = R15 (°C/W) 120
R16 = R17 (°C/W) 200
R18 (°C/W) 400 350 300
C1 = C5 (W·s/°C) 0.00025
C2 = C7 = C11 (W·s/°C) 0.04
C3 (W·s/°C) 0.2
C4 (W·s/°C) 2.2 3 4
C6 = C10 (W·s/°C) 0.00075
C8 = C12 (W·s/°C) 0.15
C9 = C13 (W·s/°C) 1.6 1.8 2
1. A blank space means that the value is the same as the previous one
Doc ID 16084 Rev 5 29/34
Page 30
Package and packing information VN5772AK-E
5 Package and packing information
5.1 ECOPACK® package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com
ECOPACK
®
is an ST trademark.
5.2 Package mechanical data
Figure 36. SO-28 package dimensions
.
30/34 Doc ID 16084 Rev 5
Page 31
VN5772AK-E Package and packing information
Table 28. SO-28 mechanical data
Millimeters
Symbol
Min. Typ. Max.
A 2.65
a1 0.10 0.30
b 0.35 0.49
b1 0.23 0.32
C0.50
c1 45° (typ.)
D 17.7 18.1
E 10.00 10.65
e1.27
e3 16.51
F 7.40 7.60
L 0.40 1.27
S8° (max.)
Doc ID 16084 Rev 5 31/34
Page 32
Package and packing information VN5772AK-E
5.3 Packing information
Figure 37. SO-28 tube shipment (no suffix)
Base q.ty 28
Bulk q.ty 700
C
B
A
Figure 38. Tape and reel shipment (suffix “TR”)
Tube length (± 0.5) 532
A3.5
B13.8
C (± 0.1) 0.6
All dimensions are in mm.
Reel dimensions
Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 16.4
N (min) 60
T (max) 22.4
Tape dimensions
According to Electronic Industries
Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width W 16
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 12
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 7.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2
End
All dimensions are in mm.
Start
Top
cover
tape
500mm min
Empty components pockets
sealed with cover tape.
User direction of feed
No componentsNo components Components
500mm min
32/34 Doc ID 16084 Rev 5
Page 33
VN5772AK-E Revision history
6 Revision history
Table 29. Document revision history
Date Revision Changes
30-Jul-2009 1 Initial release.
Updated following figures:
–
Figure 29: Maximum turn-off current vs load inductance(1)
–
Figure 32: Auto and mutual Rthj-amb vs PCB copper area in open
box free air condition(1)
10-Sep-2009 2
–
Figure 33: SO-28 HSD thermal impedance junction-ambient single
pulse
–
Figure 34: SO-28 LSD thermal impedance junction-ambient single
pulse
Updated
Table 27: Thermal parameters
.
14-Jan-2010 3 Updated
Updated
13-Jul-2011 4
Updated
Updated
Table 17: Switching (Tj = 25° C, unless otherwise specified)
– Changed (dV
– Changed (dV
02-Nov-2011 5
Added following tables:
–
Table 12: Electrical transient requirements (part 1/3)
–
Table 13: Electrical transient requirements (part 2/3)
–
Table 14: Electrical transient requirements (part 3/3)
Figure 26: Typical application schematic
Features
list
.
Figure 35: Thermal fitting model of an H-bridge in SO-28
Table 27: Thermal parameters
:
/dt)
/dt)
on
off
to t
to t
r
f
OUT
OUT
Doc ID 16084 Rev 5 33/34
Page 34
VN5772AK-E
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