ST STTS424 User Manual
Memory module temperature sensor
Features
■ Temperature sensor compliant with JEDEC
JC42.4
Temperature sensor
■ Temperature sensor resolution:
0.25°C (typ)/LSB
■ Temperature sensor accuracy:
– ± 1°C from +75°C to +95°C
– ± 2°C from +40°C to +125°C
– ± 3°C from –40°C to +125°C
■ ADC conversion time: 125 ms (max)
■ Supply voltage: 2.7 V to 3.6 V
■ Maximum operating supply current: 200 µA
■ Hysteresis selectable set points from: 0, 1.5, 3,
6.0°C
■ Ambient temperature sensing range: –40°C to
125°C
■ Supports bus timeout
STTS424
TDFN8 (DN)
2 mm x 3 mm (max height 0.80 mm)
Two-wire bus
■ 2-wire SMBus/I
■ Supports up to 400 kHz transfer rate
■ Does not initiate clock stretching
2
C - compatible serial interface
Packages
■ 2 mm x 3 mm TDFN8, height: 0.80 mm (max)
RoHS compliant, halogen-free
■
a. Compliant to JEDEC MO-229, WCED-3
April 2009 Rev 6 1/36
(a)
www.st.com
1
Contents STTS424
Contents
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Serial communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Device type identifier (DTI) code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.1 A0, A1, A2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.2 V
2.2.3 SDA (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.4 SCL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.5 EVENT
2.2.6 V
(ground) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
SS
(open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
(power) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
DD
3 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 SMBus/I2C communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2 SMBus/I
3.3 SMBus/I
2
C slave sub-address decoding . . . . . . . . . . . . . . . . . . . . . . . . . 12
2
C AC timing consideration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.4 SMBus timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4 Temperature sensor registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.1 Capability register (read-only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1.1 Alarm window trip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1.2 Critical trip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.2 Configuration register (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2.1 Event thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2.2 Interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2.3 Comparator mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2.4 Shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2.5 Event output pin functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.3 Temperature register (read-only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.3.1 Temperature format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.4 Temperature trip point registers (r/w) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.5 Manufacturer ID register (read-only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.6 Device ID and device revision ID register (read-only) . . . . . . . . . . . . . . . 25
2/36
STTS424 Contents
5 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
9 Package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
10 Landing pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3/36
List of tables STTS424
List of tables
Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 2. AC SMBus and I
Table 3. Temperature sensor registers summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 4. Pointer register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 5. Pointer register select bits (type, width, and default values). . . . . . . . . . . . . . . . . . . . . . . . 15
Table 6. Capability register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 7. Capability register bit definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 8. Configuration register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 9. Configuration register bit definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 10. Hysteresis as applied to temperature movement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 11. Legend for Figure 9: Event output boundary timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 12. Temperature register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 13. Temperature register bit definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 14. Temperature trip point register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 15. Alarm temperature upper boundary register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 16. Alarm temperature lower boundary register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 17. Critical temperature register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 18. Manufacturer ID register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 19. Device ID and device revision ID register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 20. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 21. Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 22. DC and AC characteristics - temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 23. TDFN8 – 8-lead thin dual flat, no-lead (2 mm x 3 mm) mechanical data (DN) . . . . . . . . . . 30
Table 24. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 25. Parameters for landing pattern - TDFN package (DN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 26. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2
C compatibility timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4/36
STTS424 List of figures
List of figures
Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2. TDFN8 connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. SMBus/I
Figure 5. SMBus/I
Figure 6. SMBus/I
Figure 7. SMBus/I
Figure 8. Hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 9. Event output boundary timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 10. TDFN8 – 8-lead thin dual flat, no-lead (2 mm x 3 mm) package outline (DN) . . . . . . . . . . 30
Figure 11. Device topside marking information (TDFN-8L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 12. Landing pattern - TDFN package (DN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2
C write to pointer register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2
C write to pointer register, followed by a read data word. . . . . . . . . . . . . . . . . . . 11
2
C write to pointer register, followed by a write data word . . . . . . . . . . . . . . . . . . 12
2
C timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5/36
Description STTS424
1 Description
The STTS424 is targeted for DIMM modules in mobile personal computing platforms
(laptops), server memory modules, and other industrial applications. The thermal sensor
(TS) in the STTS424 is fully compliant with the JEDEC specification which defines memory
module thermal sensors requirements for mobile platforms.
The TS provides space as well as cost savings for mobile and server platform dual inline
memory modules (DIMM) manufacturers as it is packaged in the compact 2 mm x 3 mm
(height 0.80 mm) 8-lead TDFN package which is compliant to JEDEC MO-229, variation
WCED-3.
The temperature sensor includes a band gap-based temperature sensor and 10-bit analogto-digital converter (ADC) which monitor and digitize the temperature to a resolution of up to
0.25°C. The typical accuracies over these temperature ranges are:
● ±3°C (max) over the full temperature measurement range of –40°C to 125°C
● ±2°C in the +40°C to +125°C temperature range and
● ±1°C in the +75°C to +95°C temperature range
The temperature sensor in the STTS424 is specified for operating at supply voltages from
2.7 V to 3.6 V. Operating at 3.3 V, the supply current is 100 µA (typ).
The on-board sigma delta ADC converts the measured temperature to a digital value that is
calibrated in °C. For Fahrenheit applications, a lookup table or conversion routine is
required. The STTS424 is factory-calibrated and requires no external components to
measure temperature.
The digital temperature sensor component has user-programmable registers that provide
the capabilities for DIMM temperature-sensing applications. The open drain event output pin
is active when the monitoring temperature exceeds a programmable limit, or it falls above or
below an alarm window. The user has the option to set the event output as a critical
temperature output. This pin can be configured to operate in either a comparator mode for
thermostat operation or in interrupt mode.
6/36
STTS424 Serial communications
2 Serial communications
The STTS424 has a simple 2-wire SMBus/I2C-compatible digital serial interface which
allows the user to access the data in the temperature register at any time. It communicates
via the serial interface with a master controller which operates at speeds of up to 400 kHz. It
also gives the user easy access to all of the STTS424 registers in order to customize device
operation.
2.1 Device type identifier (DTI) code
The JC42.4 temperature sensor has its own unique I2C address, which ensures that there
are no compatibility or data translation issues. The DTI code is the unique 4-bit address,
'0011'.
The full I
and A2 pins. This allows up to 8 unique addresses, hence 8 STTS424 devices may be
connected on the same bus.
Figure 1. Logic diagram
2
C address consists of the unique DTI code and 3 bits determined by the A0, A1,
V
DD
SDA
(1)
EVENT
(1)
SCL
STTS424
V
SS
AI12947
1. SDA and EVENT are open drain.
Table 1. Signal names
A
2
A
1
A
0
Pin Symbol Description Direction
1 A0 Serial bus address selection pin. Can be tied to V
2 A1 Serial bus address selection pin. Can be tied to V
3 A2 Serial bus address selection pin. Can be tied to V
4V
SS
5SDA
Supply ground
(1)
Serial data Input/output
or VDD. Input
SS
or VDD. Input
SS
or VDD. Input
SS
6 SCL Serial clock Input
(1)
7 EVENT
Event output pin. Open drain and active-low. Output
8V
1. SDA and EVENT are open drain.
DD
Supply power (2.7 V to 3.6 V)
See Section 2.2: Pin descriptions on page 9 for details.
7/36
Serial communications STTS424
Figure 2. TDFN8 connections (top view)
1. SDA and EVENT are open drain.
Figure 3. Block diagram
Temperature
Sensor
A0
A1
A2
GND
ADC
Capability
Register
Configuration
Register
Temperature
Register
V
1
2
3
4
8
7
6
5
8
V
DD
DD
EVENT
SCL
(1)
SDA
AI12262
Logic Control
Comparator
Timing
Upper
Register
Lower
Register
Critical
Register
(1)
EVENT
7
Address Pointer
Register
A0
1
A1
2
A2
3
8/36
SMBus/I2C
Interface
V
SS
4
Manufacturer
ID
Device ID/
Revision
SCL
SDA
6
5
AI12948
STTS424 Serial communications
2.2 Pin descriptions
2.2.1 A0, A1, A2
A2, A1, and A0 are selectable address pins for the 3 LSBs of the I2C interface address.
They can be set to V
2.2.2 VSS (ground)
This is the reference for the power supply. It must be connected to system ground.
2.2.3 SDA (open drain)
This is the serial data input/output pin.
2.2.4 SCL
This is the serial clock input pin.
2.2.5 EVENT (open drain)
This output pin is open drain and active-low and functions as an alert interrupt.
or GND to provide 8 unique address selections.
DD
2.2.6 VDD (power)
This is the supply voltage pin, and ranges from +2.7 V to +3.6 V.
9/36
Operation STTS424
3 Operation
The STTS424 TS continuously monitors the ambient temperature and updates the
temperature data registers at least eight times per second. Temperature data is latched
internally by the device and may be read by software from the bus host at any time.
The SMBus/I
same bus. This means that up to 8 memory modules can be supported, given that each
module has one such slave device address slot.
After initial power-on, the configuration registers are set to the default values. The software
can write to the configuration register to set bits per the bit definitions in Section 3.1:
SMBus/I
3.1 SMBus/I2C communications
The registers in this device are selected by the pointer register. At power-up, the pointer
register is set to “00”, which is the capability register location. The pointer register latches
the last location it was set to. Each data register falls into one of three types of user
accessibility:
1. Read-only
2. Write-only and
3. WRITE/READ same address.
2
C slave address selection pins allow up to 8 such devices to co-exist on the
2
C communications.
A WRITE to this device will always include the address byte and the pointer byte. A WRITE
to any register other than the pointer register, requires two data bytes.
Reading this device is achieved in one of two ways:
● If the location latched in the pointer register is correct (most of the time it is expected
that the pointer register will point to one of the read temperature registers because that
will be the data most frequently read), then the READ can simply consist of an address
byte, followed by retrieval of the two data bytes.
● If the pointer register needs to be set, then an address byte, pointer byte, repeat start,
and another address byte will accomplish a READ.
The data byte transfers the MSB first. At the end of a READ, this device can accept either an
acknowledge (ACK) or no acknowledge (No ACK) status from the master. The No ACK
status is typically used as a signal for the slave that the master has read its last byte. This
device subsequently takes up to 125 ms to measure the temperature.
Note: STTS424 does not initiate clock stretching which is an optional I
2
C bus feature.
10/36
STTS424 Operation
Figure 4. SMBus/I2C write to pointer register
SCL
SDA
Figure 5. SMBus/I
SCL
SDA
Master
SCL
(continued)
19
1199
0 1 1 A2 A1 A0 R/W 0 0 0 0 0 D2 D1 D0
0
Start
by
Master
Address Byte
ACK
by
STTS424
2
C write to pointer register, followed by a read data word
1199
0 1 1 A2 A1 A0 R/W 0 0 0 0 0 D2 D1 D0
0
Start
by
Address Byte
ACK
by
STTS424
1919
Pointer Byte
Pointer Byte
ACK
by
STTS424
AI12264
ACK
by
STTS424
SDA
(continued)
Repeat
Start
by
Master
0 0 1 1 A2 A1 A0
Address Byte
R/W
ACK
by
STTS424
D14D15
D13
D12
D9D10D11
D7 D6 D5 D4 D3 D2 D1 D0
D8
MSB Data Byte LSB Data Byte
ACK
by
Master
No ACK
by
Master
Stop
Cond.
by
Master
AI12265
11/36
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