Sony RM-VZ950T Service manual

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Page 1

RM-VZ950T

SERVICE MANUAL

Ver 1.0 2000. 08

SPECIFICATIONS

AEP Model

REMOTE COMMANDER

Page 2

TABLE OF CONTENTS

1. GENERAL

Getting Started ................................................................ 3

Location of Controls ....................................................... 4

Basic Operations ............................................................. 5

Advanced Features .......................................................... 13

Additional Information ................................................... 18

Appendix ......................................................................... 19

2. DISASSEMBLY

2-1. Case (Lower) ................................................................... 21

2-2. Remote Control Board.................................................... 21

2-3. Case, Inner....................................................................... 22

3. TEST MODE.............................................................. 23

4. DIAGRAMS

4-1. Block Diagram ................................................................ 27

4-2. Printed Wiring Boards..................................................... 29

4-3. Schematic Diagram......................................................... 31

4-4. IC Pin Function Description ........................................... 35

5. EXPLODED VIEW ................................................... 36

6. ELECTRICAL PARTS LIST ............................... 37

Notes on chip component replacement

• Never reuse a disconnected chip component.

• Notice that the minus side of a tantalum capacitor may be damaged by heat.

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SECTION 1

GENERAL

This section is extracted from instruction manual.

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• This set can be disassemble in the order shown below.

SECTION 2

DISASSEMBLY

Set

Note: Follow the disassembly procedure in the numerical order given.

2-1. CASE (LOWER)

Case (Lower) Remote Control Board Case, Inne

two hexagon socket bolts

(2.6

three claws

Remote the battery case lid in the direction of arrow

two screws (P2

2-2. REMOTE CONTROL BOARD

filter

case (lower)

Rotate two brackets to remove.

Remove the remote control boar in the direction of arrow A.

two claws

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wire

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2-3. CASE, INNER

thirty-one switches

two screws (P2 × 4)

jog board

key, rubber

Note on mounting the switches

1. Mount each switch, meeting its bosses with respective guides.

2. Mount each switch to original position, as its shape is different each other.

NOTE ON MOUNTING THE RUBBER FOOT

Pull the knob of rubber foot.

cover, LCD

escutcheon, jog

Pull out the inner case.

After mounting, cut off the knob of rubber foot.

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SECTION 3

TEST MODE

[GENERAL]

The test mode of this set consists of six test items including BATT test, LCD test, KEY test, LEARN test, MEMORY test, and MEMORY ERASE test and further each test item comprises several check items.

[Setting/Releasing Test Mode]

Setting the test mode: Push the [SET] key while pushing the [MENU ] key. The “B ATT TEST” will be displayed, when the test mode is set. Releasing the test mode: If the specified key is not pushed for more than 60 seconds while the set is waiting for key input for the test item selection, or if the test item “EXIT TEST” is selected.

[Test Item Selection]

1. Operation key In the test mode, operate the jog dial and [SET] key.

2. Operating method

(1) Progress operation

Pushing the jog, progress the check items in order.

(2) Next test operation

• Clicking the left jog button at the check item selection causes

the “NEXT TEST” to be displayed for confirmation. (“NEXT TEST” is displayed on LCD with “NEXT” blinking)

• Pushing the jog with the “NEXT TEST” on LCD causes the

next test item of current test to be displayed for selection.

• Clicking the right jog button with the “NEXT TEST” on LCD

causes the set to return to the check item before the “NEXT TEST” display.

• Clicking the left jog button with the “NEXT TEST” on LCD is

ignored.

(3) Skip operation

• Clicking the right jog button while the set is waiting for key

input causes the “SKIP” to be displayed for confirmation. (“SKIP” is blinking on the LCD)

• Pushing the jog with the “SKIP” on LCD allows the set to pro-

ceed to the next check item of current item.

• Clicking the right jog button with the “SKIP” on LCD causes

the set to return to the check item before the “SKIP” display.

• Clicking the left jog button with the “SKIP” on LCD is ignored.

The skip operation at the last check item for each item causes the next test item to be displayed for selection.

3. Test item selection display list

• Test items (1) BATT test selection display: “BATT TEST” is displayed (with

“BATT” blinking)

(2) LCD test selection display: “LCD TEST” is displayed (with

“LCD” blinking)

(3) KEY test selection display: “KEY TEST” is displayed (with

“KEY” blinking)

(4) LEARN test selection display: “LEARN TEST” is displayed

(with “LEARN” blinking)

(5) MEMOR Y test selection display: “MEMORY TEST” is dis-

played (with “MEMORY” blinking)

(6) MEMOR Y ERASE test selection display: “DEL MEMOR Y”

is displayed (with “DEL” blinking)

(7) EXIT test selection display: “EXIT TEST” is displayed (with

“EXIT” blinking)

• (1) is displayed immediately after the test mode is set. Each time the right jog button is clicked, the display varies in order of (1) → (2) → (3) → (4) → (5) → (6) → (7) → (1) → and so on. Also, the display v aries in the re v er se direction when the left jog button is clicked.

• Pushing the jog at any display causes the displayed test mode to be activated.

• The test item selection screen will appear, if any test item finished, or the test mode was released in the next test. At this time, the LCD will display the next test item of currently selected test item. However, any test item can be selected there through the jog operation.

[Test Mode Items]

1. BATT test

(1) Battery voltage check: Whether the battery voltage is below or over 2.5 V is checked. “BATT CHECK LOW” is displayed if the battery voltage is below

2.5 V, or “BATT CHECK GOOD” is displayed if over 2.5 V The

battery voltage is checked at 0.5 second interval until the jog is pushed, and LCD display is updated. Proceed to (2) if the jog is pushed

(2) DC/DC stop check: DC/DC is stopped whichever the battery voltage is below or over

2.5 V The set waits f or either key input or jog operation. When

either the key or jog is operated, DC/DC starts, and after LCD initial setting, the BATT test is conducted, and then the “LCD TEST” is displayed for selection.

(4) Others If no key is pushed for more than 60 seconds while the set is waiting for the check item selection of current test item, the next test item is displayed.

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2. LCD test

LCD display: Explanatory notes

Second digit

First digit

First line

Second line

Third digit

Fourth digit

Fifth digit

Sixt digit

(10) Sixth digit character, vertical one-column dots horizontal

scanning check: The display of the fifth digit is cleared, and the similar to (5) check is made to the 2, 3 line characters on the sixth digit. Proceed to (11) if the jog is pushed.

(11) Backlight blinking check: The backlight turns on for 0.5 sec when “BACK LIGHT ON” is displayed, and it turns off for 0.5 sec when “BACK LIGHT OFF” is displayed. This is repeated until the jog is pushed. When the jog is pushed, the backlight turns off, the LCD test finishes, and the “KEY TEST” is displayed for selection.

Third line

(1) Transmission mark blinking check: Only the “

” is displayed for 0.5 sec and hidden for 0.5 sec

repeatedly. Proceed to (2) if the jog is pushed.

(2) First line, horizontal one-r ow dots vertical scanning check: The transmission mark is cleared, and horizontal one-row dots of 2 to 5 digit characters on the first line are displayed from the top row to the bottom row, every 0.3 sec for each row . This is repeated until the jog is pushed. Proceed to (3) if the jog is pushed.

(3) Second line, horizontal one-row dots vertical scanning check: The display of the first line is cleared, and the similar to (2) check is made to the 1 to 6 digit characters on the second line. Proceed to (4) if the jog is pushed.

(4) Third line, horizontal one-row dots vertical scanning check: The display of the second line is cleared, and the similar to (2) check is made to the 1 to 6 digit characters on the third line. Proceed to (5) if the jog is pushed.

(5) First digit character, vertical one-column dots horizontal

scanning check: The display of the third line is cleared, and horizontal one-column dots of 2, 3 digit characters on the first digit are displayed from the left to the right, every 0.3 sec for each column. This is repeated until the jog is pushed. Proceed to (6) if the jog is pushed.

(6) Second digit character, vertical one-column dots horizontal

scanning check: The display of the first digit is cleared, and the similar to (5) check is made to the 1 to 3 line characters on the second digit. Proceed to (7) if the jog is pushed.

3. KEY test When a key other than that specified on the LCD was pushed, or when multiple keys were pushed, “KEY CHECK NG??” is displayed for one second, and then the LCD returns to the screen displayed last.

1 key check:

(1) The set waits for the input of 1 key when “push POWER key” is displayed. When 1 key is pushed, the initially preset TV POWER key data code is outputted from the REM (output of 3 frames), and the set proceeds to (2).

(2) t key check: The set waits for the input of t key when “push INPUT key” is displayed. When the t key is pushed, the set proceeds to (3).

(3) / key check: The set waits for the input of / key when “push TEXT key” is displayed. When the / key is pushed, the set proceeds to (4).

a key check:

(4) The set waits for the input of a key when “push TV key” is displayed. When the a key is pushed, the set proceeds to (5).

(5) [1] key check: The set waits for the input of [1] key when “push 1 key” is displayed. When the [1] key is pushed, the set proceeds to (6).

(6) [2] key check: The set waits for the input of [2] key when “push 2 key” is displayed. When the [2] key is pushed, the set proceeds to (7).

(7) [3] key check: The set waits for the input of [3] key when “push 3 key” is displayed. When the [3] key is pushed, the set proceeds to (8).

(7) Third digit character, vertical one-column dots horizontal

scanning check: The display of the second digit is cleared, and the similar to (5) check is made to the 1 to 3 line characters on the third digit. Proceed to (8) if the jog is pushed.

(8) Fourth digit character, vertical one-column dots horizontal

scanning check: The display of the third digit is cleared, and the similar to (5) check is made to the 1 to 3 line characters on the fourth digit. Proceed to (9) if the jog is pushed.

(9) Fifth digit character, vertical one-column dots horizontal

scanning check: The display of the fourth digit is cleared, and the similar to (5) check is made to the 1 to 3 line characters on the fifth digit. Proceed to (10) if the jog is pushed.

(8) [4] key check: The set waits for the input of [4] key when “push 4 key” is displayed. When the [4] key is pushed, the set proceeds to (9).

(9) [5] key check: The set waits for the input of [5] key when “push 5 key” is displayed. When the [5] key is pushed, the set proceeds to (10).

(10) [6] key check: The set waits for the input of [6] key when “push 6 key” is displayed. When the [6] key is pushed, the set proceeds to (11).

(11) [7] key check: The set waits for the input of [7] key when “push 7 key” is displayed. When the [7] key is pushed, the set proceeds to (12).

(12) [8] key check: The set waits for the input of [8] key when “push 8 key” is displayed. When the [8] key is pushed, the set proceeds to (13).

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(13) [9] key check: The set waits for the input of [9] key when “push 9 key” is displayed. When the [9] key is pushed, the set proceeds to (14).

(14) [1- -/--] key check: The set waits for the input of [1- -/--] key when “push -/— ke y” is displayed. When the [1- -/--] key is pushed, the set proceeds to (15).

(15) [0] key check: The set waits for the input of [0] key when “push 0 key” is displayed. When the [0] key is pushed, the set proceeds to (16).

(16) [2-] key check: The set waits for the input of [2-] key when “push 2- key” is displayed. When the [2-] key is pushed, the set proceeds to (17).

(17) [ $RED%] key check: The set waits for the input of [ $RED%] key when “push RED key” is displayed. When the [ $RED%] key is pushed, the set proceeds

to (18).

(18) [ $GREEN%] key check: The set waits for the input of [ $GREEN%] key when “push GREEN key” is displayed. When the [ $GREEN%] key is pushed, the set

proceeds to (19).

(19) [ $YELLOW%] key check: The set waits for the input of [ $YELLOW%] key when “push YELLOW key” is displayed. When the [ $YELLOW%] key is

pushed, the set proceeds to (20).

[ $BLUE%] key check:

(20) The set waits for the input of [ $BLUE%] k ey when “push BLUE key” is displayed. When the [ $BLUE%] key is pushed, the set

proceeds to (21).

(21) N v key check: The set waits for the input of N v key when “push UP key” is displayed. When the N v key is pushed , the set proceeds to (22).

(22) m b key check: The set waits for the input of m b key when “push ← key” is displayed. When the m b key is pushed, the set proceeds to (23).

(23) M B key check: The set waits for the input of M B key when “push → key” is displayed. When the M B key is pushed, the set proceeds to (24).

(24) x V key check: The set waits for the input of x V key when “push DOWN key” is displayed. When the x V key is pushed, the set proceeds to (25).

(25) [MENU ] key check: The set waits for the input of [MENU ] key when “push MENU key” is displayed. When the [MENU ] key is pushed, the set

proceeds to (26).

(26) [OK ] key check: The set waits for the input of [OK ] key when “push OK key” is displayed. When the [OK ] key is pushed, the set proceeds to

(27).

(27)

[ +] key check:

The set waits for the input of [ +] key when “push VOL + key” is displayed. When the [ +] key is pushed, the set proceeds to

(28).

(28) [ --] key check: The set waits for the input of [ --] key when “push VOL - key” is displayed. When the [ --] key is pushed, the set proceeds to

(29).

(29) % key check: The set waits for the input of % key when “push MUTE key” is displayed. When the % key is pushed, the set proceeds to (30).

(30) [PROGR +] key check: The set waits for the input of [PROGR +] key when “push CH + key” is displayed. When the [PROGR +] key is pushed, the set proceeds to (31).

(31) [PROGR --] key check: The set waits for the input of [PROGR --] key when “push CH - key” is displayed. When the [PROGR --] key is pushed, the set proceeds to (32).

(32)

key check: The set waits for the input of key when “push RECALL key” is displayed. When the

key is pushed, the set proceeds to (33).

(33) Jog right check: The set waits for the jog right turn when “turn RIGHT JOG” is displayed. When the jog is turned to the right, the set proceeds to (34). (In this item, “SKIP” is disabled)

(34) Jog left check: The set waits for the jog left turn when “turn LEFT JOG” is displayed. When the jog is turned to the left, the Key test f inishes and the “LEARN TEST” is displayed for selection. (In this item, “NEXT TEST” is disabled)

4. LEARN test The learn function is tested. Infrared data are sent from other remote commander to the photodetector for the learn function to test if the learn function operates normally, and the learned data are outputted through infrared when the jog is pushed. Check if the learning data are identical to the infrared output data using an external device. (For the test, use the exclusi v e checker in the f actory, and the product in the field)

(1) Infrared input check: The set waits for the input of infrared data (PDT) when “input LEARN” is displayed on the LCD. If infrared data input is abnormal, “NG input LEARN” is displayed on the LCD. “input LEARN”is again displayed when the jog is pushed. If infrared data input is normal, “GOOD input LEARN” is displayed on the LCD. The set proceeds to (2) when the jog is pushed.

(2) Learned data output check: The learned data are outputted by the amount of 3 frames from the REM. Then, the Learn test finished, and the set proceeds to the MEMORY test.

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5. MEMORY test

• For the EEPROM, the memory occupation display, writing error history display, error test, and data erasing are carried out.

• For the writing error history display, whether the data writing error occurred since the EEPROM was erased last is displayed.

• For the error test, the data are written to all areas, and then whether all data are correct is checked and the result is displayed.

• After the error test finished, the data in all areas of EEPROM are erased and all settings are initialized.

(1) EEPROM memory occupation display How many percents of all memory areas are occupied with the learned data is displayed in steps of 10%. When no data is stored, 0% is displayed, or otherwise, the unit place is rounded up. The set proceeds to (2) when the jog is pushed.

(2) EEPROM writing error history display In actual, each time the writing error occurred in the EEPROM, the error flag turns on. “MISSED MEMORY” is displayed on the LCD if the error flag is present, or “NO MISSED MEMORY” is displayed if not present. The set proceeds to (3) when the jog is pushed.

(3) EEPROM error test

(a) Memory writing confirmation display

“WRITE MEMORY” and “push SETkey MEMORY” are alternately displayed on the LCD every second. T he set proceeds to (b) if the SET key is pushed.

(b) Memory data writing (-1)

The lower 8-bit values of the memory addresses are written to all areas. If an error occurred during data writing, the set goes to (g) with the error flag turned on, or if no error occurs, the set proceeds to (c).

(g) Memory check result display

“TEST GOOD MEMORY” is displa yed on the LCD if the error flag is not present, or “TEST ERROR MEMORY” is displayed if the error flag is present. Push the jog, and the MEMORY test finishes and the “MEMORY ERASE” is displayed f or selection.

6. MEMORY ERASE (1) Memory erasing

(a) Memory erasing confirmation display

“DELETE MEMORY” and “push SETk e y MEMORY” are alternately displayed on the LCD every second. The set proceeds to (b) if the SET key is pushed.

(b) All bytes in the EEPROM are erased to return all set-

tings to initial state. During this operation if an error occurred, the set goes to (c) with the error flag turned on, or if no error occurs, the set proceeds to (c) with the error flag not turned on. For the LCD display of (a) and (b), see below.

DEL

MEMORY

“DEL GOOD MEMORY” is displayed on the LCD if the error flag is not present, or “DEL NG MEMORY” is displayed if the error flag is present. Push the jog, and the MEMORY ERASE test finishes and the test items are displayed for selection.

DEL

MEMORY

All bytes are read for checking. If an error occurred during data check, the set goes to (g) with the error flag turned on, or if no error occurs, the set proceeds to (d).

(d) Memory data writing (-2)

The inverted lo wer 8-bit values of the memory addresses are written to all areas. If an error occurred during data writing, the set goes to (g) with the error flag turned on, or if no error occurs, the set proceeds to (e).

(e) Memory data check (-2)

All bytes are read for checking. If an error occurred during data check, the set goes to (g) with the error flag turned on, or if no error occurs, the set proceeds to (f).

(f) Memory erasing

All bytes are erased to return all settings to initial state. If an error occurred, the set goes to (g) with the error flag turned on, or if no error occurs, the set proceeds to (g). For the LCD display of (b) to (f), see below.

TTES

MEMORY

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4-1. BLOCK DIAGRAM

RM-VZ950T

SECTION 4

DIAGRAMS

REMOTE CONTROL

SIGNAL RECEIVER

BUFFER,

WAVEFORM

SHAPING

IC4

SW1

FUNCTION

D3, 4

REMOTE CONTROL

SIGNAL TRANSMITTER

CHARACTOR GENERATOR

CIRCUIT

CURSOR BLINK

CONTROL CIRCUIT

DISPLAY

DATA RAM

TIMING

GENERATOR

PARALLEL/

SERIAL

CONVERTER

CIRCUIT

30 32 37

SHIFT

& LATCH

CIRCUIT

SHIFT

CIRCUIT

V5OUT

BOOSTER

CIRCUIT

SEGMENT

DRIVER

COMMON

DRIVER

S1 – S15,

S21 – S25, S41 – S50

C1 – C7,

C9 – C15, C17 – C23

CMK1

VCI

1 – 8, 59 – 73,

79 – 83, 99, 100

11 – 17,

19 – 25, 51 – 57

LCD1

LIQUID CRYSTAL DISPLAY

43 – 50

40 41 42

LED DRIVE

DB0 – DB7

R/W E

RESET

BUFFER

RESET

CIRCUIT

BUSY FLAG

IN/OUT

DATA

LIQUID CRYSTAL DISPLAY DRIVER

IC2

ADDRESS

COUNTER

INSTRUCTION

& DECODER

PDT

PCNT

JDT1

JDT2

JDT3

JST

REM

DB0 – DB7

76 – 80, 1 – 3

6 39

LRST

Ref No.

S11

S12

S13

S14

S15

S16

S17

S21

S22

S23

S25

S26

S27

S31

S32

S33

S34

PANEL DESIGNATION

x (BLUE) M B

PROGR –

2 – OK X

PROGR +

SET

8 x (YELLOW)

Ref No.

S35

S41

S42

S43

S44

S45

S46

S52

S53

S55

S56

S57

S62

S63

S64

S65

KEY MATRIX S11 – 17, S21 – 23, S25 – 27, S31 – 35, S41 – 46, S52, S53,

S55 – 57, S62 – 65

PANEL DESIGNATION

N v

x (GREEN) x V 2 +

1 – -/-MENU z

2 – %

x (RED) m b

19 – 2552 – 57

KDT1 – KDT7KST1 – KST7

SYSTEM

CONTROLLER

IC1

–5V

REGULATOR

IC8

SDA

16 5

SCL

36 – 39

BL1 – BL4

LPOW

RESET

VDET

SDA

SCL

EEPROM

IC3

D5 – 8

(LCD BACK LIGHT)

SYSTEM CONTROLLER (IC1),

EEPROM (IC3), LED B+

LCD B+

LIQUID CRYSTAL DISPLAY

DRIVER (IC2) B+

B+ SWITCH

RESET SIGNAL

GENERATOR

IC7

DC/DC

CONVERTER

IC5

VOLTAGE

DETECT

IC6

LCD B+

DRY BATTERY

SIZE “AA”

(IEC DESIGNATION R6)

2PCS. 3V

5MHz

– 27 – – 28 –

Page 28

RM-VZ950T

(

)

4-2. PRINTED WIRING BOARDS

123 4 5 6 7 8 9 10 11 12 13 14

D5-8

• Semiconductor Location

Ref. No. Location

D1 F-2 D2 F-11 D3 G-1 D4 F-1 D5 C-8 D6 C-7 D7 C-8 D8 C-7

IC1 F-4

Ref. No. Location

IC2 G-8 IC3 F-3 IC4 G-3 IC5 F-12 IC6 G-4 IC7 G-4 IC8 E-9

Q1 E-2 Q2 E-6

Note on Printed Wiring Boards:

• Y : parts extracted from the conductor side.

•

: Through hole.

: internal component.

• : Pattern from the side which enables seeing.

• : Carbon pattern. (The other layers' patterns are not indicated.)

Caution: Pattern face side: Parts on the pattern face side seen from (Conductor Side) the pattern face are indicated. Parts face side: Parts on the par ts face side seen from (Component Side) the parts face are indicated.

DRY BATTERY

SIZE “AA”

IEC DESIGNATION R6

2PCS. 3

– 29 –

– 30 –

Page 29

4-3. SCHEMATIC DIAGRAM • See page 33 for Waveforms. • See page 34 for IC Block Diagrams.

RM-VZ950T

Note on Schematic Diagram:

• All capacitors are in µF unless otherwise noted. pF: µµF 50 WV or less are not indicated except for electrolytics and tantalums.

• All resistors are in Ω and 1/ specified.

W or less unless otherwise

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WAVEFORM

SHAPING

•

: internal component.

• C : panel designation.

• U : B+ Line.

• V : B– Line.

• Power voltage is dc 3 V and fed with regulated dc power supply from battery terminal.

• Voltages and waveforms are dc with respect to ground under no-signal conditions.

• Voltages are taken with a VOM (Input impedance 10 MΩ). Voltage variations may be noted due to normal production tolerances.

• Waveforms are taken with a oscilloscope. Voltage variations may be noted due to normal production tolerances.

• Circled numbers refer to waveforms.

Page 30

• Waveforms

098765432

098

– REMOTE CONTROL Board –

1 IC1 yl (X2)

1V/DIV, 50 ns/DIV

200 ns

2 IC5 4 (LX)

1V/DIV, 5 µs/DIV

3.9 Vp-p

4.6 Vp-p

11.4

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• IC Block Diagrams

IC2 NJU6424FG1-T

SEG43 SEG44

SEG45

SEG46

SEG47

SEG48

SEG49

SEG50

COMMK2

COM24

COM23 COM22

COM21

COM20

COM19

COM18

COM17

COM8

COM7

COM6

COM5

COM4

COM3

COM2

COM1

SEGMENT

SIGNAL DRIVER

COMMON

SIGNAL DRIVER

BIAS

CIRCUIT

SEG42SEG41

SEG40SEG39SEG38SEG37SEG36SEG35SEG34SEG33SEG32SEG31

100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76

50BIT SHIFT

50BIT

LATCH

CIRCUIT

26BIT SHIFT

TIMING

GENERATOR

CIRCUIT

CR OSCILLATOR

CIRCUIT

PARALLEL/SERIAL

CONVERTER

CIRCUIT

CURSOR

BLINK

CONTROL

CIRCUIT

ADDRESS COUNTER

SEG30SEG29SEG28SEG27SEG26SEG25SEG24SEG23SEG22SEG21

CHARACTOR GENERATOR

BOOSTER

CIRCUIT

9600BIT

DISPLAY DATA RAM

CHARACTOR GENERATOR

30 X 8BITS

INSTRUCTION

DECODER

32 X 5BIT

RESET

CIRCUIT

INSTRUCTION

SEG20SEG19SEG1

DATA

IN/OUT BUFFER

BUSY FLAG

SEG17

SEG16

SEG15

SEG14

SEG13

SEG12

SEG11 SEG10

SEG9

SEG8

SEG7

SEG6

SEG5

SEG4

SEG3

SEG2

SEG1

COM16

COM15

COM14 COM13

COM12

COM11

COM10

COM9

OMMK1

IC5 XC6372C361PR-T

SLOW START

REFERENCE

VDD

VOLTAGE

CHIP

ENABLE

COMPARATOR

–

VOUT

BIAS

PHASE

OSC2

LIMITER

PWM/PFM CONTROL

OSC 100kHz

30 31 3833 3432 35 36 37

OSC1

VLX

VSS

BUFFER

V5OUT

39 40 41 42 43 44 45 46 47 48 49 50

C2–

C2+

VCI

C1–

C1+

VDD

RESET

VSS

R/W

DB0

DB1

DB2

DB3

DB4

DB5

DB6

DB7

– 34 –

Page 32

4-4. IC PIN FUNCTION DESCRIPTION

• MAIN BOARD IC1 µPD780058GK-A04-9EU (SYSTEM CONTROLLER)

Pin No. Pin Name I/O Description

1 to 3 DB5 to DB7 I/O

4 AVSS — 5 LPOW O 6 LRST O 7 AVREF1 I 8RSO

9RWO

10 E O

11 to 15 P20 to P24 —

16 SDA I/O 17 P26 — 18 SCL O

19 to 25 KDT1 to KDT7 I

26 P47 — 27 PCNT O 28 IPOW O

29, 30 P52, P53 —

31 CE O 32 P55 — 33 VSS1 —

34, 35 P56, P57 — 36 to 39 BL1 to BL4 — 40 to 43 P64 to P67 —

44 REM O 45 to 51 P31 to P37 — 52 to 57 KST1 to KST6 O

58 JST O

59 P127 —

60 RESET I

61 PDT I

62 P01 —

63 JDT1 I

64 JDT2 I

65 JDT3 I

66 VDET I

67 VSS0 —

68 VDD1 —

69 X2 O

70 X1 I

71 IC —

72 XT2 O

73 XT1 I

74 VDD0 —

75 AVREF0 I 76 to 80 DB0 to DB4 I/O

Two-way data bus with the liquid crystal display driver (IC2) Ground terminal (for A/D converter) Power on/off control signal output for the liquid crystal display driver (IC2) “L”: power on Reset signal output to the liquid crystal display driver (IC2) “L”: reset Reference voltage input terminal (for A/D converter) Register selection signal output to the liquid crystal display driver (IC2)

Data read/write selection signal output to the liquid crystal display driver (IC2) “L”: data write, “H”: data read

Data enable signal output to the liquid crystal display driver (IC2) Not used (open) Two-way data bus with the EEPROM (IC3) Not used (open) Serial data transfer clock signal output to the EEPROM (IC2) Key data input from the key matrix “L” input when key pressing Not used (open) Learning control signal output to the TC4069 (IC4) Not used (open) Not used (open) Power on/off control signal output supply to the DC/DC converter (IC5) “H”: power on Not used (open) Ground terminal Not used (open) LED drive signal output of the liquid crystal display back light (D5 to D8) “L”: LED on Not used (open) LED drive signal output of the remote control signal transmitter (D3, D4) “H”: LED on Not used (open) Key scan output to the key matrix “L” output when key waiting Jog scan output to the rotary encoder (SW1) Not used (open)

System reset signal input from the reset signal generator (IC7) “L”: reset For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”

Learning data input from the TC4069 (IC4) Not used (open) Jog dial pulse input of the rotary encoder (SW1) (A phase input) Jog dial pulse input of the rotary encoder (SW1) (B phase input) Push switch input of the rotary encoder (SW1) Voltage detection signal input terminal Ground terminal Power supply terminal (+3.6V) Main system clock output terminal (5 MHz) Main system clock input terminal (5 MHz) Internal connection terminal (connected to ground) Sub system clock output terminal Not used (open) Sub system clock input terminal Not used (open) Power supply terminal (+3.6V) Reference voltage input terminal (for A/D converter) Two-way data bus with the liquid crystal display driver (IC2)

– 35 –

Page 33

SECTION 5

EXPLODED VIEW

NOTE:

• -XX and -X mean standardized parts, so they may have some difference from the original one.

• Color Indication of Appearance Parts Example: KNOB, BALANCE (WHITE) . . . (RED)

↑↑

Parts Color Cabinet's Color

not supplied

• Items marked “*” are not stocked since they are seldom required for routine service. Some delay should be anticipated when ordering these items.

• The mechanical parts with no reference number in the exploded views are not supplied.

• Accessories and packing materials are given in the last of the electrical parts list.

not supplied

Ref. No. Part No. Description Remark

1 3-220-687-01 FOOT, RUBBER 2 3-220-680-01 LID, BATTERY CASE 3 3-220-683-01 CASE (LOWER) 4 3-220-686-01 TERMINAL (C), BATTERY

* 5 3-220-677-01 EDGE, SIDE

6 3-220-679-01 BUTTON (B) 7 3-220-681-01 CASE (TOP)

* 8 3-220-672-01 ESCUTCHEON, JOG

9 3-220-691-01 PANEL, LCD 10 3-220-692-01 COVER, LCD

not supplied

LCD1

Ref. No. Part No. Description Remark

14 3-220-689-01 TERMINAL, ZEBRA

* 15 1-679-852-11 REMOTE CONTROL BOARD

16 9-885-008-54 WIRE 17 3-220-684-01 TERMINAL (A), BATTERY 18 3-220-685-01 TERMINAL (B), BATTERY

19 3-220-676-01 FILTER

* 20 3-220-674-01 DOOM, POLY

21 3-220-678-01 BUTTON (A) LCD1 9-885-008-47 DISPLAY PANEL, LIQUID CRYSTAL #1 7-685-104-14 SCREW +P 2X6 TYPE2 NON-SLIT

* 11 3-220-682-01 CASE, INNER

12 A-4541-208-A JOG BOARD, COMPLETE

* 13 3-220-675-01 KEY, RUBBER

#2 7-621-996-05 BOLT, HEXAGON SOCKET 2.6X5 #3 7-685-102-19 SCREW +P 2X4 NON-SLIT TYPE 2

– 36 –

Page 34

SECTION 6

ELECTRICAL PARTS LIST

JOG

REMOTE CONTROL

NOTE:

• Due to standardization, replacements in the parts list may be different from the parts specified in the diagrams or the components used on the set.

• -XX and -X mean standardized parts, so they may have some difference from the original one.

• RESISTORS All resistors are in ohms. METAL: Metal-film resistor. METAL OXIDE: Metal oxide-film resistor. F: nonflammable

Ref. No. Part No. Description Remark Ref. No. Part No. Description Remark

A-4541-208-A JOG BOARD, COMPLETE

********************

< CONNECTOR >

CN2 9-885-008-53 CONNECTOR 5P

< JOG ENCODER >

SW1 1-473-406-11 ENCODER, ED JOG (FUNCTION)

**************************************************************

* 1-679-852-11 REMOTE CONTROL BOARD

**********************

3-220-684-01 TERMINAL (A), BATTERY 3-220-685-01 TERMINAL (B), BATTERY 3-220-689-01 TERMIAL, ZEBRA

< CAPACITOR >

C1 1-126-607-21 ELECT CHIP 47uF 20% 4V C2 1-126-204-21 ELECT CHIP 47uF 20% 16V C3 1-128-008-21 ELECT CHIP 3.3uF 20% 35V C4 1-128-008-21 ELECT CHIP 3.3uF 20% 35V C5 1-128-008-21 ELECT CHIP 3.3uF 20% 35V

C6 1-128-008-21 ELECT CHIP 3.3uF 20% 35V C7 1-164-230-11 CERAMIC CHIP 220PF 5% 50V C8 1-162-967-11 CERAMIC CHIP 0.0033uF 10% 50V C9 1-164-361-11 CERAMIC CHIP 0.047uF 16V C10 1-164-361-11 CERAMIC CHIP 0.047uF 16V

C11 1-164-361-11 CERAMIC CHIP 0.047uF 16V C12 1-164-361-11 CERAMIC CHIP 0.047uF 16V C13 1-164-361-11 CERAMIC CHIP 0.047uF 16V C14 1-164-361-11 CERAMIC CHIP 0.047uF 16V C15 1-164-361-11 CERAMIC CHIP 0.047uF 16V

C16 1-164-361-11 CERAMIC CHIP 0.047uF 16V

< CONNECTOR >

• Items marked “*” are not stocked since they are seldom required for routine service. Some delay should be anticipated when ordering these items.

• SEMICONDUCTORS In each case, u: µ, for example: uA. . : µA. . uPA. . : µPA. . uPB. . : µPB. . uPC. . : µPC. . uPD. . : µPD. .

• CAPACITORS uF: µF

• COILS uH: µH

D4 8-719-053-06 LED SLR-932A-7

D5 8-719-058-69 LED LNJ308G8JRA (LCD BACK LIGHT)

D6 8-719-058-69 LED LNJ308G8JRA (LCD BACK LIGHT) D7 8-719-058-69 LED LNJ308G8JRA (LCD BACK LIGHT) D8 8-719-058-69 LED LNJ308G8JRA (LCD BACK LIGHT)

< IC >

IC1 8-759-699-74 IC uPD780058GK-A04-9EU IC2 9-885-008-48 IC NJU6424FG1-T IC3 9-885-008-49 IC HN58X24256FPI-T IC4 8-759-530-29 IC TC4069UBFT (EL, N) IC5 9-885-008-50 IC XC6372C361PR-T

IC6 8-759-479-03 IC S-80825ANNP-EDN-T2 IC7 8-759-665-49 IC S-80818ANNP-EDF-T2 IC8 9-885-008-51 IC XC62KN5002MR-T

< COIL >

L1 1-412-032-11 INDUCTOR CHIP 100uH

< TRANSISTOR >

Q1 8-729-047-62 TRANSISTOR 2SC3440-T12-1F Q2 9-885-008-52 TRANSISTOR 2SA1603A-T

< RESISTOR >

R1 1-218-867-11 METAL CHIP 6.8K 5% 1/16W R2 1-216-833-11 METAL CHIP 10K 5% 1/16W R3 1-216-833-11 METAL CHIP 10K 5% 1/16W R4 1-216-861-11 METAL CHIP 2.2M 5% 1/16W R5 1-218-726-11 METAL CHIP 27K 5% 1/16W

R6 1-216-840-11 METAL CHIP 39K 5% 1/16W R7 1-216-818-11 METAL CHIP 560 5% 1/16W R8 1-216-846-11 METAL CHIP 120K 5% 1/16W R9 1-216-833-11 METAL CHIP 10K 5% 1/16W R10 1-216-833-11 METAL CHIP 10K 5% 1/16W

When indicating parts by reference number, please include the board.

(REMOTE CONTROL SIGNAL TRANSMITTER)

CN1 9-885-008-53 CONNECTOR 5P

< DIODE >

D1 9-885-008-55 DIODE TPS705 (HATA)

(REMOTE CONTROL SIGNAL RECEIVER) D2 8-719-076-88 DIODE MA2Z720001S0 D3 1-807-851-11 LED SLR-931A

(REMOTE CONTROL SIGNAL TRANSMITTER)

R11 1-216-857-11 METAL CHIP 1M 5% 1/16W R12 1-216-857-11 METAL CHIP 1M 5% 1/16W R13 1-216-845-11 METAL CHIP 100K 5% 1/16W R14 1-216-845-11 METAL CHIP 100K 5% 1/16W R15 1-216-857-11 METAL CHIP 1M 5% 1/16W

R16 1-216-839-11 METAL CHIP 33K 5% 1/16W R17 1-216-845-11 METAL CHIP 100K 5% 1/16W R18 1-216-845-11 METAL CHIP 100K 5% 1/16W

– 37 –

Page 35

RM-VZ950T

REMOTE CONTROL

Ref. No. Part No. Description Remark

R19 1-216-845-11 METAL CHIP 100K 5% 1/16W R20 1-216-845-11 METAL CHIP 100K 5% 1/16W

R21 1-216-134-91 METAL CHIP 2.2 5% 1/8W R22 1-216-134-91 METAL CHIP 2.2 5% 1/8W R23 1-216-811-11 METAL CHIP 150 5% 1/16W R24 1-216-810-11 METAL CHIP 120 5% 1/16W R25 1-216-810-11 METAL CHIP 120 5% 1/16W

R26 1-216-810-21 METAL CHIP 120 5% 1/16W R27 1-216-810-11 METAL CHIP 120 5% 1/16W

< VIBRATOR >

X1 1-767-452-11 VIBRATOR, CERAMIC (5MHz)

**************************************************************

MISCELLANEOUS

***************

16 9-885-008-54 WIRE LCD1 9-885-008-47 DISPLAY PANEL, LIQUID CRYSTAL

**************************************************************

ACCESSORIES & PACKING MATERIALS

********************************

3-223-637-11 MANUAL, INSTRUCTION (ENGLISH, GERMAN) 3-223-637-21 MANUAL, INSTRUCTION (FRENCH, ITALIAN) 3-223-637-31 MANUAL, INSTRUCTION (DUTCH, SWEDISH) 3-223-637-41 MANUAL, INSTRUCTION

(SPANISH, PORTUGUESE)

3-223-638-11 MANUAL, INSTRUCTION (for PRESET)

(ENGLISH, FRENCH, GERMAN, SPANISH,

DUTCH, SWEDISH, ITALIAN, PORTUGUESE)

Ref. No. Part No. Description Remark

9-927-994-11

Sony Corporation

Audio Entertainment Group

– 38 –

Printed in Japan C 2000. 8

2000H0538-1

Published by General Engineering Dept.