Sharp FO4ML Service Manual

FO-4ML/8ML/12ML

SERVICE MANUAL

No. 00ZFO4MLCUSME

FACSIMILE
OPTION MEMORY
UPGRADE PWB

FO-4ML
FO-8ML

MODEL

This machine is an Option Memory Unit appli­cable to the FO-6700.

CONTENTS

[1] General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

[2] Installation procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

[3] Diagnostic mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

[4] Circuit schematics and parts layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Parts guide

FO-12ML

Parts marked with " " is important for maintaining the safety of the set. Be sure to replace these parts with specified ones for
maintaining the safety and performance of the set.

This document has been published to be used

SHARP CORPORATION

1 - 1

for after sales service only.
The contents are subject to change without notice.

FO-4ML/8ML/12ML

[1] General description

This machine is an Option Memory Unit applicable to the FO-6700.
It enhances the memory-aided functions such as sequential simultane­ous sending and through-memory substitute reception of facsimile.

[2] Installation procedure

(Pay attention to static electricity)

To install the Option Memory Unit, check the following in advance.

1) Make sure that the remaining memory capacity is 0%.
If the remaining memory capacity is not 0%, this implies that any data
remains in the image memory on the Main Control PWB.

2) Check that a sufficient quantity of paper exists. If there is no paper or
paper is lacking, replenish the machine with paper, and print the data
received and stored in the memory.

3) Then, check whether there is any confidentially received information,
seeing the confidential reception data list ("FUNC" + "2" + "1" + "0").
If any confidentially received information is found, input the ID No. of
specific reception box, and print the confidentially received informa­tion.

4) After that, check whether there is timer sending information, seeing
the timer sending information list ("FUNC" + "2" + "0" + "2"). It is
required to teach users that any timer sending information, if exists,
is cleared after the Option Memory Unit is installed and, accordingly,
users have to set again the timer sending and do the timer sending.

Install the Option Memory Unit in the following procedure.

1) Remove the Rear Cabinet of facsimile.

2) Loose two screws on the Standard Memory PWB and remove two
spacers. Then, remove the Standard Memory PWB from two locking
spacers and the connector.

3) Connect the Option Memory PWB to the connector CNOP of Main
Control PWB and insert two locking spacers into the holes on the
board. Then, tighten two screws with each spacers. (Fig. 1)

4) Mount the Rear Cabinet.

5) After installation turn on power switch with pressing "ST ART" + "STOP"
key.

[3] Diagnostic mode

Successively input "FUNC" + "9" + " " + "8" + "#" + "7". Then, appears.

ROM:FAB0

After that, press the "START" key.
Then, appears.

01:

SOFT SWITCH MODE

PRESS START KEY

Select the Flash Memory Test, using the one-touch key "12".

12:

FLASH MEMORY

PRESS START KEY

In the diagnostic mode perform the Image Memory (Standard, Option)
write/read test, as well as complete erase test.
When the "START" key is pressed,

S––E
TEST EXECUTING

appears, and the indication changes from "–" to "■" whenever data is
written in the Flash Memory.

After completion of writing of data in all Flash Memories, the following
indication appears.

S

E

TEST EXECUTING

After that the long-tone buzzer (normal end) sounds, and at the same
time the following indication appears.

13:

ALL ENTRYFAX/TEL

PRESS START KEY

( is ROM
version.)

MEMORY CLEAR?

1=ALL, 2=IMAGE, 3=NO

appears.
Then, press "2" key to perform "IMAGE" clear.

PLEASE WAI T A MOMENT

appears.
Then, after several seconds,

SEP
M:00% STAND BY AUTO

26 TUE AM10:47

appears.

• The data initially registered will not be deleted by this operation.

– 1 –

Then, the result table (Fig. 3) is printed.

ROM/RAM CHECK LIST

MAIN: ROM = OK

= OK
= OK
= OK

VER.=FAB0X SUM =DE0E

SUM =1C86

VER.=FAB0A

P C U :

SRAM
DRAM

M/C=00

F/W=412250G001J0

CPU

SEP–25–2000 MON 10:43 AM

FLASH MEMORY = OK (15S, 24S, 27S)
BANK CHANGEOVER = OK

BANK = OK

FLASH MEMORY CHECK REPORT

SIZE=5MB(With Option Flash memory)

SEP–25–2000 MON 10:45 AM

FLASH MEMORY = OK (11S, 23S, 22S, 25S, 21S, 22S, 24S)
BANK CHANGEOVER = OK

BANK = OK

FLASH MEMORY CHECK REPORT

SIZE=12MB (With Option Flash memory ### 8MBYTE ###)

SEP–25–2000 MON 10:51 AM

FLASH MEMORY = OK (16S, 22S, 24S, 36S, 37S, 23S, 25S, 23S, 22S)
BANK CHANGEOVER = OK

BANK = OK

FLASH MEMORY CHECK REPORT

SIZE=16MB (With Option Flash memory ==== 12MBYTE ====)

SEP–25–2000 MON 11:08 AM

FLASH MEMORY = OK (10S, 26S, 23S, 30S, 24S)
BANK CHANGEOVER = OK

BANK = OK

FLASH MEMORY CHECK REPORT

SIZE=8MB(With Option Flash memory ### 4MBYTE ###)

SEP–25–2000 MON 10:40 AM

In case of mismatch, the buzzer emits 9 short tones .
After that, the result table (Fig. 4) is output.

1) If any error occurred, check connection of connector CNOP (check
for bending and breakage of pin of connector), check that the Option
Memory Unit has been mounted as specified, and then turn on again
the power supply, and check.

2) If the same error occurs persistently after the measures stated in item
1 above were taken, replace the Option Memory Unit, and check.

3) If the same error occurs again after the measures stated in item 2)
were taken, check the Main Control PWB.

FO-4ML/8ML/12ML

Fig. 2

OPTION MEMORY
PWB UNIT
FO-4ML/8ML/12ML

CNOP

Fig. 1

MAIN CONTROL PWB

Fig. 3 (FO-4ML)

Fig. 3 (FO-8ML)

Fig. 3 (FO-12ML)

Fig. 4

– 2 –

FO-4ML/8ML/12ML

1

2

6

4

3

5

BDEFG

I

HCA

BDEFG

I

HCA

1

2

6

4

3

5

4

5

6

7

8

1011121317181920222324

262728

525047454139363451494644403835

33

14

2

55

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10

D15

D14

D13

D12

D11

D10

D8D7D6D5D4D3D2D1D0

D9

A20

DQ15

DQ14

DQ13

DQ12

DQ11

DQ10

DQ9

DQ8

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

CE0

CE1

/WE

DG

18161412975320

10

/OPMWE

/OPMRD

DG

18161412975320

10

DG

18161412975320

10

DG

25

DG

325331116329

30

NCNCNC

BYTE

3/5

RP

RY/BY

54561593743214248

DG

DG

DG

1514131211

10

9

7

16

8

DG

FLBK1

123

645

A

B

G1

G2A

G2B

C

Y0Y1Y3Y4Y5Y6Y7

Y2

VCC

GND

+5V

/MWRH

/MRD

MA19

MA18

MA17

MA16

MA15

246

8

111315

17

1

19

1A1

1A2

1A4

2A1

2A2

2A3

2A4

1A3

1G

2G

1Y1

1Y2

1Y4

2Y1

2Y2

2Y3

2Y4

1Y3

VCC

GND

+5V

C113

0.1

D2

HRW0502A

D1

HRW0502A

MA11

MA10

MA9

MA8

MA7

246

8

111315

17

1

19

1A1

1A2

1A4

2A1

2A2

2A3

2A4

1A3

1G

2G

1Y1

1Y2

1Y4

2Y1

2Y2

2Y3

2Y4

1Y3

VCC

GND

+5V

C110

0.1

MA12

MA13

MA14

246

8

111315

17

1

19

1A1

1A2

1A4

2A1

2A2

2A3

2A4

1A3

1G

2G

1Y1

1Y2

1Y4

2Y1

2Y2

2Y3

2Y4

1Y3

VCC

GND

C100

0.1

+5V

+5V

+5V

+5V

+5V

+5V

+5V

+5V

C107

0.1

IC1

74HC244

OCTAL BUFFERS

R129 91

R128 91

R127 91

R126 91

R125 91

A19

A18

A17

A16

A15

DG DG

DG

R124 91

R123 91

R122 91

R121 91

R120 91

A14

A13

A12

A11

A10

R119 91

R118 91

R117 91

A9A8A7

IC2

74HC244 OCTAL BUFFERS

IC3

74HC244 OCTUL BUFFERS

R115 91

R114 91

A5

A4

R113 91

R112 91

R111 91

A3A2A1

R116 91 A6

DG

MA5

MA4

MA3

MA2

MA1

MA6

MA[19:1]

FLBK4

R100

0

A9A8A7A6A5A4A3A2A1

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10A9A8A7A6A5A4A3A2A1A0

/OE

/FLS0

/OPMWE

/OPMRD

/FLBSY

TCS2

WP

VPP

VCC

VCC

VCC

GND

GND

GND

GND 0

VCC 0

R102

0

C116

0.1

C118

0.1

C101

0.1

C102

0.1

C4

22/16

FLBK2

FLBK3

/FLOPT

/FLS0

/FLS1

/FLS2

/FLS3

/FLS4

/FLS5

/FLS6

/FLS7

IC6

74HC138

3-TO-8 LINE DECORDERS

45678

1011121317181920222324

262728

525047454139363451494644403835

33

14

2

55

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10

D15

D14

D13

D12

D11

D10

D8D7D6D5D4D3D2D1D0

D9

IC5

LH28F016SUT

16Mbit FLASH MEMORY

A20

DQ15

DQ14

DQ13

DQ12

DQ11

DQ10

DQ9

DQ8

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

CE0

CE1

/WE

25

325331116329

30

NCNCNC

BYTE

3/5

RP

RY/BY

54561593743214248

FLBK4

A9A8A7A6A5A4A3A2A1

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10A9A8A7A6A5A4A3A2A1A0

/OE

WP

VPP

VCC

VCC

VCC

GND

GND

GND

TCS2

/FLBSY

+5V

R103

4.7K

DG

/FLS1

/OPMWE

/OPMRD

GND 0

VCC 0

R104

0

C120

0.1

C122

0.1

C103

0.1

C104

0.1

C6

22/16

A[19:1]

(*1)

(*1)

(3-5E)

(3-5E)

(1-2E)

(1-5C)

(1-5C)

(1-2E)

(1-5C)

(1-5C)

(1-4E)

(1-4H)

(2-4C)

(2-4E)

(2-4G)

(2-2C)

(2-2E)

(2-2G)

(*1) : (1-3E)(1-3H)(2-2C)(2-2E)

(2-2G)(2-4C)(2-4E)(2-4G)

D[15:0]

(3-6B)

(2-6H)(3-6B)

(3-3C)

(3-3C)

(3-3E)

(3-3C)

(3-3E)

(3-5C)

(3-5C)

(3-5E)

(3-5E)

(3-3C)

(2-6A)

(3-5C)

(3-5C)

(3-5E)

(3-5E)

IC4

LH28F016SUT

16Mbit FLASH MEMORY

[4] Circuit schematics and parts layout

Option Memory PWB circuit (FO-4ML, FO-8ML, FO-12ML) 1/3

– 3 –

FO-4ML/8ML/12ML

1

2

6

4

3

5

BDEFG

I

HCA

BDEFG

I

HCA

1

2

6

4

3

5

4

5

6

7

8

101112131718192022

23

252627

5250474541393634514946444038353314

2

A19

A18

A17

A16

A15

A14

A13

A12

A11

D14

D13

D12

D10

D9D8D7D6D5D4D3

D2

A10A9A8A7A6

D11

IC7

LH28F016SUT

16Mbit FLASH MEMORY

A20

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10A9A8A7A6A4A3

A2

DQ15

DQ14

DQ13

DQ12

DQ11

DQ10

DQ9

DQ8

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

CE0

CE1

A5A4A3A2A1

24

28

A5

A1

A0

D15

D1

D0

RY/BY

BYTE

3/5RPNCNCNC

/OE

/WE

WP

VCC

VPP

VCC

VCC

GND

GND

GND

55545615937432142

48

32

53

31

1163

29

30

DG

R105

0

C124

0.1

C126

0.1

C108

0.1

C109

0.1

GND 0

VCC 0

45678

101112131718192022

23

252627

5250474541393634514946444038353314

2

A19

A18

A17

A16

A15

A14

A13

A12

A11

D14

D13

D12

D10

D9D8D7D6D5D4D3

D2

A10A9A8A7A6

D11

A20

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10A9A8A7A6A4A3

A2

DQ15

DQ14

DQ13

DQ12

DQ11

DQ10

DQ9

DQ8

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

CE0

CE1

A5A4A3A2A1

24

28

A5

A1

A0

D15

D1

D0

RY/BY

BYTE

3/5RPNCNCNC

/OE

/WE

WP

VCC

VPP

VCC

VCC

GND

GND

GND

55545615937432142

48

32

53

31

1163

29

30

DG

R108

0

C132

0.1

C133

0.1

C117

0.1

C119

0.1
GND 0

VCC 0

DG

DG

45678

101112131718192022

23

252627

5250474541393634514946444038353314

2

A19

A18

A17

A16

A15

A14

A13

A12

A11

D14

D13

D12

D10

D9D8D7D6D5D4D3

D2

A10A9A8A7A6

D11

A20

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10A9A8A7A6A4A3

A2

DQ15

DQ14

DQ13

DQ12

DQ11

DQ10

DQ9

DQ8

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

CE0

CE1

A5A4A3A2A1

24

28

A5

A1

A0

D15

D1

D0

RY/BY

BYTE

3/5RPNCNCNC

/OE

/WE

WP

VCC

VPP

VCC

VCC

GND

GND

GND

55545615937432142

48

32

53

31

1163

29

30

DG

R106

0

C128

0.1

C129

0.1

C111

0.1

C112

0.1

GND 0

VCC 0

45678

101112131718192022

23

252627

52

504745413936345149464440383533

14

2

A19

A18

A17

A16

A15

A14

A13

A12

A11

D14

D13

D12

D10

D9D8D7D6D5D4D3

D2

A10A9A8A7A6

D11

A20

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10A9A8A7A6A4A3

A2

DQ15

DQ14

DQ13

DQ12

DQ11

DQ10

DQ9

DQ8

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

CE0

CE1

A5A4A3A2A1

24

28

A5

A1

A0

D15

D1

D0

RY/BY

BYTE

3/5RPNCNCNC

/OE

/WE

WP

VCC

VPP

VCC

VCC

GND

GND

GND

55545615937432142

48

32

53

31

1163

29

30

DG

R109

0

C134

0.1

C135

0.1

C121

0.1

C123

0.1

GND 0

VCC 0

45678

101112131718192022

23

252627

5250474541393634514946444038353314

2

A19

A18

A17

A16

A15

A14

A13

A12

A11

D14

D13

D12

D10

D9D8D7D6D5D4D3

D2

A10A9A8A7A6

D11

A20

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10A9A8A7A6A4A3

A2

DQ15

DQ14

DQ13

DQ12

DQ11

DQ10

DQ9

DQ8

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

CE0

CE1

A5A4A3A2A1

24

28

A5

A1

A0

D15

D1

D0

RY/BY

BYTE

3/5RPNCNCNC

/OE

/WE

WP

VCC

VPP

VCC

VCC

GND

GND

GND

55545615937432142

48

32

53

31

1163

29

30

DG

R107

0

C130

0.1

C131

0.1

C114

0.1

C115

0.1

GND 0

VCC 0

45678

101112131718192022

23

252627

52

504745413936345149464440383533

14

2

A19

A18

A17

A16

A15

A14

A13

A12

A11

D14

D13

D12

D10

D9D8D7D6D5D4D3

D2

A10A9A8A7A6

D11

A20

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10A9A8A7A6A4A3

A2

DQ15

DQ14

DQ13

DQ12

DQ11

DQ10

DQ9

DQ8

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

CE0

CE1

A5A4A3A2A1

24

28

A5

A1

A0

D15

D1

D0

RY/BY

BYTE

3/5RPNCNCNC

/OE

/WE

WP

VCC

VPP

VCC

VCC

GND

GND

GND

55545615937432142

48

32

53

31

1163

29

30

DG

R110

0

C136

0.1

C137

0.1

C125

0.1

C127

0.1

GND 0

VCC 0

/FLS6

/OPMWE

/OPMRD

C5

22/16

C7

22/16

C3

22/16

/FLS5

/OPMWE

/OPMRD

/FLS7

/OPMWE

/OPMRD

/FLS2

/OPMWE

/OPMRD

/FLS3

/OPMRD

/OPMWE

/FLS4

/OPMWE

/OPMRD

C1

22/16

C2

22/16

/FLBSY

TCS2

DG

DG

DG

DG

/FLBSY

TCS2

/FLBSY

TCS2

/FLBSY

TCS2

DG

DG

DG

DG

DG

DG

+5V

+5V

/FLBSY

TCS2

+5V

/FLBSY

TCS2

+5V

+5V

+5V

+5V

+5V

+5V

+5V

+5V

+5V

+5V

+5V

+5V

+5V

+5V

+5V

D[15:0]

A[19:1]

FLBK4

C8

22/16

FLBK4

FLBK4

FLBK4

FLBK4

FLBK4

(3-5E)

(3-5E)

(1-2E)

(1-5C)

(1-5C)

(3-5E)

(3-5E)

(1-2E)

(1-5C)

(1-5C)

(3-5E)

(3-5E)

(1-2E)

(1-5C)

(1-5C)

(3-5E)

(3-5E)

(1-2E)

(1-5C)

(1-5C)

(1-2E)

(1-5C)

(1-5C)

(1-6D)

(3-6B)

(3-5E)

(3-5E)

(1-2E)

(1-5C)

(1-5C)

(3-5E)

(3-5E)

(1-6H)

IC8

LH28F016SUT

16Mbit FLASH MEMORY

IC9

LH28F016SUT

16Mbit FLASH MEMORY

IC12

LH28F016SUT

16Mbit FLASH MEMORY

IC11

LH28F016SUT

16Mbit FLASH MEMORY

IC10

LH28F016SUT

16Mbit FLASH MEMORY

THE ALL PARTS IN THIS

AREA ARE MOUNTED IN

FO-8ML/12ML,

NOT MOUTED IN FO-4ML

THE ALL PARTS IN THIS

AREA ARE MOUNTED

ONLY IN FO-12ML,

NOT MOUTED IN THE

OTHER MODELS

THE ALL PARTS IN THIS

AREA ARE MOUNTED IN

FO-8ML/12ML,

NOT MOUTED IN FO-4ML

(3-3C)

(3-3C)

(3-5C)

(3-5C)

(3-5C)

(3-5C)

(3-3C)

(3-3C)

(3-5C)

(3-5C)

(3-3C)

(3-3C)

(3-5C)

(3-5C)

(3-5C)

(3-5C)(3-5C)

(3-5C)

2/3

Option Memory PWB circuit (FO-4ML, FO-8ML, FO-12ML)

– 4 –