Intended for analog and digital satellite receivers,
the LNBK is a monolithic linear voltage regulator,
assembled in Multiwatt-15, PowerSO-20 and
PowerSO-10,specifically designed to provide the
powering voltages and the interfacing signals to
the LNB downconverter situated in the antenna
via the coaxial cable.It has thesamefunctionality
of the LNBP1X and LNBP20 series, at a reduced
output current capability. Since most satellite
receivers have two antenna ports, the output
voltage of the regulator is available at one of two
logic-selectable output pins (LNBA,LNBB). When
the IC is powered and put in Stand-by (EN pin
LOW), both regulator outputs are disabled to
allowtheantennadownconverterstobe
supplied/controlled by others satellite receivers
sharing the samecoaxial lines. In this occurrence
the device will limit at 3 mA (max) the backward
current that could flow from LNBA and LNBB
output pins to GND.
For slave operation in single dish, dual receiver
systems, the bypass function is implemented by
an electronic switch between theMaster Input pin
LNBK20
Multiwatt-15
10
1
PowerSo-20PowerSO-10
(MI) and the LNBA pin, thus leaving all LNB
powering and control functions to the Master
Receiver. This electronic switch is closed when
the device is powered and EN pin is LOW.
The regulator outputs can be logic controlled to
be 13 or 18 V (typ.) by mean of the VSEL pin for
remote controlling of LNBs. Additionally, it is
possible to increment by 1V (typ.) the selected
voltage value to compensate the excess voltage
drop along the coaxial cable (LLC pinHIGH).
In order to reduce the power dissipation of the
device when the lowest output voltage is
selected, the regulator has two Supply Input pins
CC1
and V
V
respectively at 16V (min) and 23V (min), and an
internal switch automatically will select the
suitable supply pin according to the selected
output voltage. If adequate heatsink is provided
and higher power losses are acceptable, both
supply pins can be powered by the same 23V
sourcewithoutaffecting anyothercircuit
performance.
The ENT (Tone Enable) pin activates the internal
oscillatorso that the DC output is modulatedby a
±0.3 V, 22KHz (typ.) square wave. This internal
.They mustbepowered
CC2
September 1998
1/18
LNBK10 SERIES - LNBK20
oscillator is factory trimmed within a tolerance of
±2KHz, thus no further adjustments neither
external componentsare required.
A burst coding of the 22KHz tone can be
accomplished thanks to the fast response of the
ENT input and the prompt oscillator start-up. This
helps designers who want to implement the
DiSEqC protocols(*).
In order to improve design flexibility and to allow
implementation of newcomingLNB remote
control standards, an analogic modulation input
pin is available (EXTM). An appropriate DC
blocking capacitor must be used to couple the
modulatingsignal source to the EXTMpin. When
external modulation is not used, the relevant pin
canbe leftopen.
Two pins are dedicated to the overcurrent
protection/monitoring: CEXT andOLF. The
overcurrent protection circuit works dynamically:
as soon as an overload is detected in eitherLNB
output, the output is shut-down for a time Toff
CEXT and GND. Simultaneously the OLF pin,
that is an open collector diagnostic output flag,
from HIGH IMPEDANCE state goes LOW. After
the time has elapsed,the output is resumedfor a
time t
=1/15t
on
(typ.) and OLF goes in HIGH
off
IMPEDANCE. If the overload is still present, the
protection circuit will cycle again through t
until the overload is removed. Typical ton+t
t
on
off
and
value is 1200ms when a 4.7µF externalcapacitor
is used.
This dynamic operation can greatly reduce the
power dissipation in short circuit condition, still
ensuring excellent power-on start up even with
highlycapacitiveloads on LNB outputs.
The device is packaged in Multiwatt15 for
thru-holes mounting and in PowerSO-20 for
surface mounting. When a limited functionality in
a smaller package matches design needs, a
range of cost-effective PowerSO-10 solutions is
also offered. All versions have built-in thermal
protectionagainst overheatingdamage.
determined by the capacitor connected between
(*): External components are needed to comply to level 2.x and above (bidirectional) DiSEqC bus hardware requirements. DiSEqC is
a trademark of EUTELSAT.
1317NA9NANA1010NA
Collector). Normally in
HIGH IMPEDANCE,goes
LOW when current or
thermal overload occurs.
MIMaster InputIn stand-by mode, the
1418NA101010NANANA
voltage onMI is routed to
LNBApin. Canbe left
openif bypass functionis
notneeded
LNBBOutput PortSeetruth tables for voltage
151910NANANANANANA
and port selection.
NOTE: The limited pin availability of thePowerSO-10 package leads todrop some functions.
6666666
3/18
LNBK10 SERIES - LNBK20
ABSOLUTE MAXIMUMRATING
SymbolParameterValueUnit
V
DC InputVoltage(VCC1,VCC2,MI)28V
i
OutputCurrent (LNBA, LNBB)Internally limited
I
o
Logic InputVoltage (ENT, EN,OSEL, VSEL,LLC)-0.5 to 7V
V
i
BypassSwitchCurrent900mA
I
SW
Power Dissipation at T
P
tot
StorageTemperature Range- 40 to 150
T
stg
Operating JunctionTemperature Range- 40 to 125
T
op
Absolute Maximum Ratingsare those values beyondwhich damage to the devicemay occur. Functional operation under these conditions
is not implied
THERMAL DATA
SymbolParameterValueUnit
R
thj-case
Thermal ResistanceJunction-case2
LOGICCONTROLS TRUTH TABLES
Control I/OPin NameLH
OUTOLFI
INENT22KHz tone OFF22KHz t o ne ON
INENSee table belowSee table below
INOS ELSee table belowSee table below
INV S ELSee ta ble belowSee table below
INLLCSee table belowSee table below
<85oC14W
case
OUT>IOMAX
or Tj>150OCI
OUT<IOMAX
o
o
o
C/W
C
C
ENOSELVSELLLCPV
LXXX V
LNBA
-0.4V (typ.)Disabled
MI
HLLL13V (typ. )Disabled
HLHL18V (t yp.)Disabled
HLLH14V (ty p. )Disabled
HLHH19V (typ. )Disabled
HHLLDisable d13V (t yp . )
HHHLDisable d18V (t yp . )
HHLHD is able d14V (typ. )
HHHHDisabled19V ( t yp.)
NOTE: All logicinput pins have internal pull-down resistor (typ. = 250KΩ)
V
LNBB
4/18
BLOCK DIAGRAM
LNBK10 SERIES - LNBK20
5/18
LNBK10 SERIES - LNBK20
ELECTRICAL CHARACTERISTICS FOR LNBKSERIES (Tj= 0 to 85oC, Ci=0.22 µF, Co=0.1 µF,
EN=H,ENT=L, LLC=L, V
=16V,V
IN1
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
IN1VCC1
V
IN2VCC2
V
O1
V
O2
∆V
O
∆V
O
SupplyVoltageIO=400mA, ENT=H, VSEL=L, LLC=L
SupplyVoltageIO=400mA, ENT=VSEL=H, LLC=L
OutputVoltageIO=400 mA, VSEL=H, LLC=L
OutputVoltageIO=400 mA, VSEL=L, LLC=L
LineRegulationV
LoadRegulationV
SVRSupply VoltageRejection
I
t
OutputCurrent Limiting400500600mA
MAX
Dynamic Overload Protection
OFF
OFF Time
t
Dynamic Overload Protection
ON
ON Time
F
A
D
t
G
V
ToneFrequencyENT=H202224KHz
TONE
ToneAmplitudeENT=H0.40.60.8Vpp
TONE
ToneDuty CucleENT=H405060%
TONE
ToneRise or FallTimeENT=H51015µs
r,tf
External Modulation Gain∆
EXT M
External Modulation Input
EXTM
Voltage
Z
External Modulation
EXT M
Impedance
V
BypassSwitchVoltage Drop
SW
(MI toLNBA)
V
Overload FlagPinLogic LowIOL=8mA0.280.5V
OL
Overload FlagPinOFF State
I
OZ
Leakage Current
Control Input PinLogic Low0.8V
V
IL
Control Input PinLogic High2.5V
V
IH
Control Pins Input CurrentVIH=5V20µA
I
IH
Supply CurrentOutputsDisabled (EN=L)0.31mA
I
CC
Supply CurrentENT=H, I
I
CC
I
T
OutputBackward CurrentEN=L, V
OBK
Thermal ShutdownThreshold150
SHDN
IN2
=23V,I
=50mA, (unless otherwisespecified)
OUT
27
=400mA, ENT=H, VSEL=L, LLC=H1516
I
O
=400mA, ENT=VSEL=H, LLC=H
I
O
=400 mA, VSEL=H, LLC=H
I
O
I
=400 mA, VSEL=L, LLC=H
O
=15to19V, V
IN1
=22to26V, V
V
IN2
IN1=VIN2
=50to400mA
I
O
V
IN1=VIN2
=22V, V
=23± 0.5Vac,fac=50 KHz
Outputshorted, C
Outputshorted, C
/∆V
V
OUT
, f = 10Hz to 40KHz
EXTM
OUT
OUT
EXT
EXT
=13V
=18V
= 13 or 18V,
OUT
=4.7µF
=4.7µF
22
23
17.318
19
12.513
14
65150m V
45dB
1100ms
t
OFF
5
5
/15ms
5
27
27
27
18.7V
13.5V
50
50
mV
mV
AC Coupling400mV
f = 10Hzto 40KHz400Ω
EN=L, ISW=300mA, V
= 4V0.350.6V
CC2-VMI
VOH=6V10µA
= 400mA3.16mA
OUT
0.23mA
V
IN1=VIN2
LNBA=VLNBB
=22V or floating
=18V
V
V
V
V
V
V
pp
o
C
6/18
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