The S3C7295 single-chip CMOS microcontroller has been designed for high performance using Samsung's
newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers).
With an up-to-704-dot LCD direct drive capability, and flexible 8-bit timer/counter, the S3C7295 offers an
excellent design solution for a mid-end LCD game.
Up to 8 pins of the 80-pin QFP package can be dedicated to I/O. Six vectored interrupts provide fast response to
internal and external events. In addition, the S3C7295's advanced CMOS technology provides for low power
consumption.
OTP
The S3C7295 microcontroller is also available in OTP (One Time Programmable) version, S3P7295. S3P7295
microcontroller has an on-chip 16K-byte one-time-programable EPROM instead of masked ROM.
The S3P7295 is comparable to S3C7295, both in function and in pin configuration.
1-1
PRODUCT OVERVIEW S3C7295/P7295
FEATURES
Memory
•256 × 4-bit RAM (excluding LCD display RAM)
•16,384 × 8-bit ROM
8 I/O Pins
•I/O: 8 pins
LCD Controller/Driver
•44 segments and 16 common terminals
(8, 12 and 16 common selectable)
•Internal resistor circuit for LCD bias
•Voltage doubler
•All dot can be switched on/off
8-bit Basic Timer
•4 interval timer functions
•Watch-dog timer
8-bit Timer/Counter
•Programmable 8-bit timer
•Arbitrary clock output (TCLO0)
•Inverted clock output (TCLO0)
Memory-Mapped I/O Structure
•Data memory bank 15
Power-Down Modes
•Idle mode (only CPU clock stops)
•Stop mode (main system oscillation stops)
•Sub system clock stop mode
Oscillation Sources
•Crystal, ceramic, or RC for main system clock
•Crystal oscillator for subsystem clock
•Main system clock frequency: 4.19 MHz
(typical)
•Subsystem clock frequency: 32.768 kHz
•CPU clock divider circuit (by 4, 8, or 64)
Instruction Execution Times
•0.95, 1.91, 15.3 µs at 4.19 MHz (main)
•122 µs at 32.768 kHz (subsystem)
Operating Temperature
•– 40 °C to 85 °C
Watch Timer
•Time interval generation: 0.5 s, 3.9 ms
at 32768 Hz
INT0, INT1I/OExternal interrupts. The triggering edge for INT0
INT2I/OQuasi-interrupt with detection of rising or falling
INT4I/OExternal interrupt with detection of rising or falling
BUZI/O2 kHz, 4 kHz, 8 kHz or 16 kHz frequency output for
BUZ
CLOI/OClock output9
TCLO0
TCLO0I/OTimer/counter 0 clock output11P0.0/K0
COM0–COM15OLCD common signal outputH-639–24–
SEG0–SEG43OLCD segment signal outputH-640–80,
I/O4-bit I/O port.
1-bit and 4-bit read/write and test are possible.
Individual pins are software configurable as input or
output.
Individual pins are software configurable as open-
drain or push-pull output.
Individual pull-up resistors are software assignable;
pull-up resistors are automatically disabled for
output pins.
I/OSame as port 0.E-17
and INT1 is selectable.
edges
edges.
buzzer sound.
I/OInverted BUZ signal9P0.2/CLO/K2
I/OInverted Timer/counter 0 clock output10P0.1/K1
DescriptionCircuit
Type
E-111
NumberShare Pin
TCLO0/K0
10
9
8
6
5
4
7, 6P1.0, P1.1
5P1.2
4P1.3
8P0.3/K3
1–3
TCLO0/K1
CLO/BUZ/K2
BUZ/K3
INT0
INT1
INT2
INT4
P0.2/BUZ/K2
–
1-5
PRODUCT OVERVIEW S3C7295/P7295
Table 1-1. S3C7295 Pin Descriptions (Continued)
Pin NamePin
Type
DescriptionCircuit
Type
Number Share Pin
K0–K3I/OExternal interrupt (triggering edge is selectable)E-111–8P0.0–P0.3
V
DD
V
SS
RESET
–Power supply–12–
–Ground–13–
IReset input (active low)B19–
CA, CB–Capacitor terminal for voltage doubling–20, 21–
VCL0–LCD power supply input–22–
BIASODoubling voltage level output–23–
X
in, Xout
–Crystal, ceramic or RC oscillator pins for system
–15, 14–
clock
XT
in, XTout
TESTI
NOTE: Pull-up resistors for all I/O ports are automatically disabled if they are configured to output mode.
–Crystal oscillator pins for subsystem clock–17, 18–
Test input (must be connected to VSS)
–16–
1-6
S3C7295/P7295PRODUCT OVERVIEW
PIN CIRCUIT DIAGRAMS
V
VDD
PNE
VDD
DD
PULL-UP
RESISTOR
P-CHANNEL
IN
N-CHANNEL
Figure 1-3. Pin Circuit Type A
V
DD
DATA
OUTPUT
DISABLE
V
LC0
V
LC1
P-CH
N-CH
SCHMITT TRIGGER
RESISTOR
ENABLE
Figure 1-5. Pin Circuit Type E-1
I/O
PULL-UP
RESISTOR
IN
SCHMITT TRIGGER
Figure 1-4. Pin Circuit Type B
V
LC2
SEG/COM DATA
V
LC3
V
LC4
V
SS
Figure 1-6. Pin Circuit Type H-6
OUT
1-7
S3C7295/P7295ELECTRICAL DATA
13ELECTRICAL DATA
OVERVIEW
In this section, information on S3C7295 electrical characteristics is presented as tables and graphics.
The information is arranged in the following order:
Standard Electrical Characteristics
— Absolute maximum ratings
— D.C. electrical characteristics
— Main system clock oscillator characteristics
— Subsystem clock oscillator characteristics
— I/O capacitance
— A.C. electrical characteristics
— Operating voltage range
Miscellaneous Timing Waveforms
— A.C timing measurement point
— Clock timing measurement at X
— Clock timing measurement at XT
— TCL timing
— Input timing for RESET
— Input timing for external interrupts
— Serial data transfer timing
Stop Mode Characteristics and Timing Waveforms
— RAM data retention supply voltage in stop mode
— Stop mode release timing when initiated by RESET
— Stop mode release timing when initiated by an interrupt request
in
in
13-1
ELECTRICAL DATAS3C7295/P7295
Table 13-1. Absolute Maximum Ratings
(TA = 25 °C)
ParameterSymbolConditionsRatingUnits
Supply Voltage
Input Voltage
Output Voltage
Output Current High
V
I
DD
V
V
O
OH
–– 0.3 to + 4.5V
Ports 0, 1– 0.3 to VDD + 0.3V
I
–– 0.3 to VDD + 0.3V
One I/O pin active– 15mA
All I/O pins active– 30
Output Current Low
I
OL
One I/O pin active+ 30 (Peak value)mA
(note)
+ 15
Total for pins 0, 1+ 100 (Peak value)
(note)
+ 60
Operating Temperature
Storage Temperature
T
A
T
stg
–– 40 to + 85
–– 65 to + 150
°
C
°
C
NOTE: The values for Output Current Low ( IOL ) are calculated as Peak Value × Duty .