Samsung KS88P4504, KS88C4504 Datasheet
KS88C4504/P4504 PRODUCT OVERVIEW
1 PRODUCT OVERVIEW
SAM87 RC PRODUCT FAMILY
Samsung's new SAM87RC family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a
wide range of integrated peripherals, and various mask-programmable ROM sizes. Timer/counters with selectable
operating modes are included to support real-time operations. Many SAM87RC microcontrollers have an external
interface that provides access to external memory and other peripheral devices. The sophisticated interrupt
structure recognizes up to eight interrupt levels. Each level can have one or more interrupt sources and vectors.
Fast interrupt processing (within a minimum six CPU clocks) can be assigned to specific interrupt levels.
KS88C4504 MICROCONTROLLER
The KS88C4504 single-chip microcontroller is fabricated using a highly advanced CMOS process. Its design is
based on the powerful SAM87RC CPU core. Stop and Idle power-down modes were implemented to reduce
power consumption. The size of the internal register file is logically expanded, increasing the addressable on-chip
register space to 1040 bytes. A flexible yet sophisticated external interface is used to access up to 64-Kbytes of
program and data memory. The KS88C4504 is a versatile microcontroller that is ideal for use in a wide range of
general-purpose applications such as CD-ROM/DVD-ROM drives.
Using the SAM87RC modular design approach, the following peripherals were integrated with the SAM87RC
CPU core:
— Five configurable 8-bit general I/O ports
— One 2-bit general I/O ports
— Full-duplex serial data port with one synchronous operating modes
— Two 8-bit timers with interval timer
— Two 16-bit timers/counters with PWM operating modes or capture modes
— One voltage level detector pin
— Four embedded chip selection pins (CS0–CS4) or normal I/O ports
— Two programmable 8-bit PWM modules with corresponding output pins
— A/D converter with 4 selectable input pins
OTP
The KS88C4504 microcontroller is also avaiable in OTP(One Time Programmable) version, KS88P4504
The KS88P4504 microcontroller has an on-chip 4K-byte one-time-programable EPROM instead of masked ROM.
The KS88P4504 is comparable To KS88C4504, both in function and in pin configuration.
1-1
PRODUCT OVERVIEW KS88C4504/P4504
FEATURES
CPU
• SAM87RC CPU core
Memory
• 1040-byte internal register file
• 4-Kbyte internal program memory
External Interface
• 64K-byte external data memory
• 64K-byte external program memory area
(ROMless)
• 60K-byte external program memory and 4K-byte
internal program memory
ADC
• Can be used as a general input/output port
• 8-bit resolution four channels
SIO
• 8-bit transmit/receive mode
• 8-bit receive mode
• LSB-first or MSB-first transmission selectable
• Internal or external clock mode
8-bit Timers
• Two 8-bit timers with interval timer mode
(Timer A and B)
16-bit Timer/Counters
• Two programmable 16-bit timer/counters
• Interval, or event counter mode operation
• 16-bit capture and 16-bit PWM mode
• Internal or external clock source
Basic Timer (Watchdog Timer)
• Overflow signal makes a system reset
• 8-bit timer with interval timer mode
General I/O Ports
• Five 8-bit general I/O ports (port 0, 1, 2, 3, 4)
• One 2-bit general I/O port (port 5)
• Port 2 can drive LED directly
Interrupts
• Six edge-driven external interrupts
• Two level-driven external interrupts
• Fast interrupt mode processing
PWM
• Four output channels
(PWM0, PWM1, TCPWM, TDPWM)
• 8-bit resolution with a 4-bit prescaler
(PWM0, PWM1)
• From 16-bit counter (Timer C/D)
(TCPWM, TDPWM)
Embedded chip selection
• To reduce interface glue logic, chip selection
logic is bold
Voltage level detector
• To prevent MCU from malfunctioning in an
unstable power level, a voltage level detector
circuit is inserted
Operating Voltage Range
• 2.7 V to 5.5 volts (@12 MHz)
Operating Temperature Range
• – 40 °C to + 85 °C
Package Types
• 80-pin QFP or TQFP
Operating frequency
• 25 MHz (4.5 V to 5.5 V)
1-2
KS88C4504/P4504 PRODUCT OVERVIEW
BLOCK DIAGRAM
EXTERNAL ADDRESS/DATA
P5.1
WAIT
P5.0(
P4.0–P4.7/
CS0–CS4
TCCK
TDCK
TCOUT
TDOUT
SO
SCK
A8–A15
External Interface Block
RESET
EA
)
SI
Port 5
Port 4/
Chip
selection
Logic
Timers
A and B
Timers
C and D
Serial
Port
Port I/O
& Interrupt
Control
SAM8 BUS
SAM87 RC
CPU
1040-Byte
Register File
SAM8 BUS
Watchdog
timer
D0–D7A0–A7
,V
SS1
,V
SS2
P0.0–P0.3
P0.4–P0.7/
ADC0–ADC3
P1.0–P1.4
P1.5–P1.7/
SI, SO, SCK
P2.0–P2.7/
INT0–INT7
P3.0–P3.7/
TDCK, TCCK
TDCAP, TCCAP
TCOUT, TDOUT
PWM0, PWM1
Port 0
Port 1
Port 2
Port 3
V
V
DD1
DD2
AV
SS
(Internal)
AV
REF
A/D
Converter
ADC0 /P0.4 –
ADC3 /P0.7
4-Kbyte
ROM
Figure 1-1. KS88C4504 Block Diagram
PWM
Module
PWM0 PWM1
1-3
PRODUCT OVERVIEW KS88C4504/P4504
PIN ASSIGNMENT
A10
A11
A12
A13
A14
A15
80
79
78
77
76
75
A9
74
A8
73
A7
72
A6
71
A5
70
A4
69
A3
68
A2
67
A1
66
A0
65
PM
DM
RD
WR
VLD
P5.1
P5.0/
WAIT
/ P4.7
CS3
/ P4.6
CS2
/ P4.5
CS1
/ P4.4
CS0
V
DD1
V
SS1
XOUT
XIN
EA
P4.3
P4.2
RESET
P4.1
P4.0
PWM1/P3.7
PWM0/P3.6
TDOUT/P3.5
1
2
3
4
5
6
7
8
9
10
11
12
13
KS88C4504
80-QFP
(TOP VIEW)
14
15
16
17
18
19
20
21
22
23
24
38
37
36
35
34
33
32
31
30
29
28
27
26
25
39
40
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
D7
D6
D5
D4
D3
D2
D1
D0
P0.0
P0.1
P0.2
V
DD2
V
SS2
P0.3
AVREF
P0.4/ADC0
P0.5/ADC1
P0.6/ ADC2
P0.7/ ADC3
P1.0
P1.1
P1.2
P1.3
P1.4
1-4
P1.6/SO
P1.7/
P2.0/INT0
P2.1/INT1
P2.2/INT2
P2.3/INT3
P2.4/INT4
P2.5/INT5
P2.6/INT6
P2.7/INT7
P3.0/TDCK
P3.1/TCCK/
P3.2/TDCAP
P3.3/TCCAP
P3.4/TCOUT
SCK
Figure 1-2. KS88C4504 Pin Assignments
P1.5/SI
KS88C4504/P4504 PRODUCT OVERVIEW
PIN ASSIGNMENTS (Continued)
A10
A11
A12
A13
A14
A15
80
79
78
77
76
75
A9
74
A8
73
A7
72
A6
71
A5
70
A4
69
A3
68
A2
67
A1
66
A0
65
D7
64
D6
63
D5
62
D4
61
P5.0/
CS3
CS2
CS1
CS0
PM
DM
WR
VLD
P5.1
WAIT
/ P4.7
/ P4.6
/ P4.5
/ P4.4
V
DD1
V
SS1
XOUT
XIN
P4.3
P4.2
RESET
P4.1
RD
EA
1
2
3
4
5
6
7
8
9
10
11
12
13
KS88C4504
80-TQFP
(TOP VIEW)
14
15
16
17
18
19
20
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
P1.7/SCK
P2.0/INT0
P2.1/INT1
P2.2/INT2
P2.3/INT3
P2.4/INT4
P2.5/INT5
P2.6/INT6
P2.7/INT7
P3.0/TDCK
P3.1/TCCK/
P3.2/TDCAP
P3.3/TCCAP
P3.4/TCOUT
TDOUT/P3.5
PWM0/P3.6
PWM1/P3.7
P4.0
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
P1.5/SI
P1.6/SO
D3
D2
D1
D0
P0.0
P0.1
P0.2
V
DD2
V
SS2
P0.3
AVREF
P0.4/ADC0
P0.5/ADC1
P0.6/ ADC2
P0.7/ ADC3
P1.0
P1.1
P1.2
P1.3
P1.4
Figure 1-3. KS88C4504 Pin Assignments
1-5
PRODUCT OVERVIEW KS88C4504/P4504
PIN DESCRIPTIONS
Table 1-1. KS88C4504/P4504 Pin Descriptions
Pin
Name
Pin
Type
Pin Description Circuit
P0.0–P0.7 I/O Bit programmable port; input or output mode
selected by software; normal input or push-pull
output with software assignable pull-up (P0.0–
P0.3) or pull-down (P0.4–P0.7). Alternately,
P0.4–P0.7 can be use as a ADC input port with
8-bit resolution.
P1.0–P1.7 I/O Bit programmable port; input or output mode
selected by software; normal input or push-pull
output with software assignable pull-up. P1.5–
P1.7 can be used as a synchronous SIO port
P1.5/SI
P1.6/SO
P1.7/SCK
P2.0–P2.7 I/O General I/O port with normal input or push-pull
output with software; assignable pull-up. Bit
programmable.
Alternately, P2.0–P2.7 can be used as inputs for
external interrupts, INT0–INT7 (with noise filter
and interrupt control). INT0/INT1 is level
interrupts.
P3.0–P3.7 I/O General I/O port with bit programmable pins.
Normal input or push-pull output with software
assignable pull-up. Input or output mode is
selectable by software. Respectively, each pin
can serve as (with noise filters):
P3.0/timer D clock input (TDCK)
P3.1/timer C clock input (TCCK)
P3.2/timer D capture input (TDCAP)
P3.3/timer C capture input (TCCAP)
P3.4/timer C out (TCOUT)/PWM out (TCPWM)
P3.5/timer D out (TDOUT)/PWM out (TDPWM)
P3.6/PWM0 output port
P3.7/PWM1 output port
P4.0–P4.7 I/O General I/O port with bit programmable pins.
Normal input or push-pull output with software
assignable pull-up. Input or output mode is
selectable by software. P4.0–P4.7 can alternately
be used as inputs for embedded chip selection
output.
P4.4/CS0
P4.5/CS1
P4.6/CS2
P4.7/CS3
Pin
Type
Number
2, 3 56–54,
51, 49–46
Share
Pins
ADC0–
ADC3
3 45–38 SI, SO, SCK
4 37–30 INT0–INT7
3, 5 29–22 TDCK
TCCK
TDCAP
TCCAP
TDOUT/
TDPWM
TCOUT/
TCPWM
PWM0
PWM1
3, 5 21, 20, 18,
CS0–CS3
17, 11–8
1-6
KS88C4504/P4504 PRODUCT OVERVIEW
Table 1-1. KS88C4504/P4504 Pin Descriptions (Continued)
Pin
Name
P5.0–P5.1 I/O General I/O port with bit programmable
Pin
Type
Pin
Description
Circuit
Type
QFP Pin
Number
5 7 WAIT
Share
Pins
pins. Normal input or push-pull, output
mode. Alternately It can use as external
interface control signal P5.0/WAIT signal
ADC0–ADC3 I Analog input pins for A/D converter
2 49–46 P0.4–P0.7
module. Alternatively used as generalpurpose I/O
AV
REF
–
A/D converter reference voltage
50 –
AVSS is connected to ground internally
PWM0, PWM1 O Pulse width modulation output pins 5 23,22
P3.6
P3.7
INT0–INT7 I External interrupt input pins 4 37–30 P2.0–P2.7
TCCK, TDCK I External clock input for timer C and timer D 3 28,29 P3.1/P3.0
TCCAP,TDCAP I Timer C/ timer D capture input 3 26,27 P3.3/P3.2
WAIT
I Input pin for the slow memory timing signal
5 7 P5.0
from the external interface
RESET
I
System reset pin (pull-up resistor: 240 kΩ)
EA I 5V: ROMless operating
1 19 –
– 16 –
0V: internal 4K and external 60K
addressing mode
V
DD1
, V
SS1
– Power input pins for CPU operation
– 12,13 –
(internal) and Power input for OTP writing
V
DD2
XIN, X
, V
SS2
OUT
– Power input pins for port output (external) – 53,52 –
– Main oscillator pins – 15,14 –
SI,SO,SCK I/O synchronous SIO communication port 3 40,39,38 P1.5/P1.6
P1.7
A0–A15 O Address output for external device 6 65–80 –
D0–D7 I/O Data I/O for external device 7 57–64 –
PM,DM O External memory selection output – 1,2 –
RD,WR O Memory read/write output – 3,4 –
CS0–CS3 O Embedded chip selection output 5 11–8 P4.4–P4.7
TCOUT,TDOUT O 16-bit timer PWM mode output 5 25,24 P3.4, P3.5
VLD – Voltage Level Detect Pin – 5 –
NOTE: VDD1 must be connected to VDD2 in users application circuit, VSS1 & VSS2 also.
1-7
PRODUCT OVERVIEW KS88C4504/P4504
PIN CIRCUITS
Table 1-2. Pin Circuit Assignments for the KS88C4504/P4504
Circuit Number Circuit Type KS88C4504 Assignments
1 Input RESET pin
2 I/O A/D converter input pins, ADC0–ADC3, P0.4–P0.7
3 I/O Port 0, 1, 3, 4, and 5
4 I/O P2 (INT0–INT7)
5 I/O P3 (TDCK, TCCK, TDCAP, TCCAP, TCOUT, TDOUT, TCPWM,
TDPWM, PWM0, PWM1)
6 Output A0–A15,PM, DM, RD, WR
7 I/O D0–D7
1-8
KS88C4504/P4504 PRODUCT OVERVIEW
V
DD
Pull-up
Resistor
(Typical 240 KΩ)
Input
Figure 1-4. Pin Circuit Type 1 (RESET)
V
DD
Data
Output Disable
Normal Input
ADC Port
Selection
ADC In
Pull-down
Enable
V
SS
Enable ADC
Figure 1-5. Pin Circuit Type 2 (ADC0–ADC3)
In/Out
1-9
PRODUCT OVERVIEW KS88C4504/P4504
V
DD
Pull-up
Enable
V
DD
Data
In/Out
Output
Disable
Normal Input
SCK
Input
Noise
Filter
Figure 1-6. Pin Circuit Type 3
1-10
KS88C4504/P4504 PRODUCT OVERVIEW
V
DD
Pull-up
Resistor
Pull-up
Enable
V
DD
Data
In/Out
Output Disable
V
SS
External
Interrupt
Noise Filter
Input
Normal
Input
Figure 1-7. Pin Circuit Type 4
1-11
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