INTEGRATED CIRCUITS
MF RC530
ISO 14443A Reader IC
Short Form Specification |
February 2002 |
Revision 2.0 |
|
Philips
Semiconductors
Philips Semiconductors |
Short Form Specification Rev. 2.0 February 2002 |
|
|
ISO 14443A Reader IC |
MF RC530 |
|
|
CONTENTS |
|
|
1 |
INTRODUCTION ................................... |
3 |
1.1 |
Scope ................................................... |
3 |
1.2 |
Features ............................................... |
3 |
1.3 |
Applications........................................... |
3 |
2 |
BLOCK DIAGRAM................................. |
4 |
3 |
MF RC530 PINNING.............................. |
5 |
3.1 |
Pinning Diagram.................................... |
5 |
3.2 |
Pin Description...................................... |
6 |
3.2.1 |
Antenna Interface .................................. |
6 |
3.2.2 |
Analog Supply ....................................... |
6 |
3.2.3 |
Digital Supply ........................................ |
6 |
3.2.4 |
Auxillary Pin .......................................... |
6 |
3.2.5 |
Reset Pin .............................................. |
7 |
3.2.6 |
Oscillator............................................... |
7 |
3.2.7 |
MIFARE® Interface ................................ |
7 |
3.2.8 |
Parallel Interface.................................... |
7 |
3.2.9 |
SPI Compatible Interface........................ |
8 |
3.3 |
Applications........................................... |
8 |
3.3.1 |
Connecting Different µController's........... |
8 |
3.3.2 |
Application Example .............................. |
9 |
4 |
MIFARE® CLASSIC RELATED ITEMS... |
10 |
4.1 |
CRYPTO I: Card Authentication............. |
10 |
4.1.1 |
Initiating Card Authentication................. |
10 |
4.1.2 |
Second Part of Card Authentication ....... |
10 |
5 |
ELECTRICAL SPECIFICATION............. |
11 |
5.1 |
DC Characteristics ............................... |
11 |
5.2 |
Start up Characteristics......................... |
11 |
MIFAREâ is a registered trademark of Philips Electronics N.V
2 |
PUBLIC |
Philips Semiconductors |
Short From Specification Rev. 2.0 February 2002 |
|
|
ISO 14443A Reader IC |
MF RC530 |
|
|
1 INTRODUCTION
1.1 Scope
The MF RC530 is member of a new family of highly integrated reader ICs for contactless communication at 13.56 MHz. This reader IC family utilises an outstanding modulation and demodulation concept completely integrated for all kinds of passive contactless communication methods and protocols at 13.56 MHz. The MF RC530 is pincompatible to the MF RC500, the MF RC531 and the SL RC400.
The MF RC530 supports all layers of the ISO14443A communication scheme. The MF RC530 supports contactless
communication using MIFARE® Higher Baudrates. The internal transmitter part is able to drive an antenna designed for proximity operating distance (up to 100 mm) directly without additional active circuitry.
The receiver part provides a robust and efficient implementation of a demodulation and decoding circuitry for signals from ISO14443A compatible transponders.
The digital part handles the complete ISO14443A framing and error detection (Parity & CRC). Additionally it supports the fast MIFARE® Classic security algorithm to authenticate MIFARE® Classic (e.g. MIFARE® Standard, MIFARE® Light) products.
A comfortable parallel interface, which can be directly connected to any 8-bit µ-Processor gives high flexibility for the reader/terminal design. Additionally a SPI compatible interface is supported.
1.2 Features
∙Highly integrated analog circuitry to demodulate and decode card response
∙Buffered output drivers to connect an antenna with minimum number of external components
∙Proximity operating distance (up to 100 mm)
∙Supports ISO 14443A
∙Supports MIFARE® Dual Interface Card ICs and supports MIFARE® Classic protocol
∙Supports contactless communication with higher baudrates up to 424kHz
∙Crypto1 and secure non-volatile internal key memory
∙Pin-compatible to the MF RC500, MF RC531 and the SL RC400
∙Parallel µ-Processor interface with internal address latch and IRQ line
∙SPI compatible interface
∙Flexible interrupt handling
∙Automatic detection of the used µ-Processor interface type
∙Comfortable 64 byte send and receive FIFObuffer
∙Hard reset with low power function
∙Power down mode per software
∙Programmable timer
∙Unique serial number
∙Bitand byte-oriented framing
∙Internal oscillator buffer to connect 13.56 MHz quartz, optimised for low phase jitter
∙3.3 V to 5 V operation for transmitter (antenna driver) in short range and proximity applications
∙3.3 V or 5V operation for the digital part
1.3 Applications
The MF RC530 is tailored to fit the requirements of various applications using contactless communication based on ISO/IEC 14443A standard where cost-effectiveness, small size, high performance with a single voltage supply are important.
∙Public transport terminals
∙Handheld terminals
∙On board units
∙Contactless PC terminals
∙Metering
∙Contactless public phones
3 |
PUBLIC |
Philips Semiconductors |
Short From Specification Rev. 2.0 February 2002 |
|
|
ISO 14443A Reader IC |
MF RC530 |
|
|
2 BLOCK DIAGRAM
The block diagram shows the main internal parts of the MF RC530.
The parallel µController interface automatically detects the kind of 8 bit parallel interface connected to it. It includes a comfortable bidirectional FIFO buffer and a configurable interrupt output. This gives the flexibility to connect a variety of µC, even low cost devices, still meeting the requirements of high speed contactless transactions.
Additionally a SPI compatible interface will be supported. The MF RC530 acts as a slave during the SPI communication. The SPI clock SCK has to be generated by the master. The SPI interface includes a comfortable bi-directional FIFO buffer.
The Data processing part performs parallel serial conversion of the data. It supports framing including CRC and parity generation / checking. It
operates in full transparent mode thus supporting all layers of ISO 14443A.
The status and control part allows configuration of the device to adapt to environmental influences and to adjust to operate with best performance.
For communication with MIFARE® Classic products like MIFARE® Standard or MIFARE® Light a high speed CRYPTO 1 stream cipher unit and a secure non-volatile key memory is implemented.
The analog circuit includes a transmitting part with a very low impedance bridge driver output. This allows an operating distance up to 100mm. The receiver is able to detect and decode even very weak responses. Due to a highly sophisticated implementation the receiver is no longer a limiting factor for the operating distance.
|
|
MF RC530 |
|
|
|||
|
Status and Control |
|
|
|
|
||
Data Bus |
|
|
|
Crypto1 Security |
|
|
|
Data Processing |
|
& Key Memory |
|
|
|||
|
|
|
|
||||
|
Parallel |
Parallel/Serial |
|
|
|
® |
|
|
µController |
Conversion |
|
|
|
||
Addr. Bus |
|
|
|
MIFARE |
|||
CRC/Parity Generation & |
Analog |
||||||
Interface |
Check |
|
Status and Control |
Classic |
|||
|
with FIFO |
|
|
Circuitry |
|||
|
|
|
|
||||
Control |
BufferFraming Generation & |
|
|
Integrated |
® |
||
Lines |
|
Check |
|
Data Processing |
Demodulator, |
MIFARE |
|
Bit Coding and Decoding |
Pro/ProX |
||||||
|
Parallel/Serial |
Bit-Decoder, |
|||||
|
|
|
|
|
|||
|
|
|
|
Conversion |
Output Drivers |
|
|
|
SPI |
|
CRC/Parity Generation & |
|
ISO14443A |
||
|
|
|
Check |
|
|||
Adress and |
Interface |
|
|
Framing Generation & |
|
|
|
Data Bus |
with FIFO |
|
|
Check |
|
|
|
|
Bit Coding and Decoding |
|
|
||||
|
Buffer |
|
|
|
|||
|
|
Figure 2-1: MF RC530 Block Diagram |
|
4 |
PUBLIC |