NOTATION PUBLIC "-//ALDUS//NOTATION TAGGED IMAGE FILE FORMAT//EN"
ENTITY SYSTEM "warning.tif"
1. LOCATION OF CONTROLS
Base Unit
Fig. 1
Page 3
Handset
Fig. 2
Page 4
2. DISASSEMBLY INSTRUCUTIONS
Page 5
3. SETTINGS
Page 6
3.1. CONNECTION
Plug in the AC adaptor cord and the telephone line cord to the bottom of the
unit. Then connect the cords as shown.
Fig. 11
- USE ONLY WITH Panasonic AC ADAPTOR KX-TCA11CE.
- Be careful not to confuse the telephone line jack with the AC adaptor jack on
the base unit. If connected improperly, the base unit will not work and
damage may occur.
- The AC adaptor must remain connected at all times. (It is normal for the
adaptor to feel warm during use.)
- The unit will not work during a power failure. We recommend you connect a
standard telephone on the same line for power protection.
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- If your unit is connected to a PBX which does not support Caller ID services,
you cannot access those services.
4. HOW TO REPLACE THE RF UNIT OF HANDSET
When replacing the P.C. Board No. PQUP10927ZB and PQUP10927YA, the
hotmelt removing and putting operation is required.
1. Cool the P.C. Board in the freezer for 10 minutes, then remove the hotmelt of
the hatched parts in Fig. 12 with the tip of minus screwdriver.
2. Remove the solder of each pin on RF unit, then remove the RF unit from the
P.C. Board.
3. After soldering the new RF unit on the P.C. Board surely, put the hotmelt on
the hatched part in the Fig. 12.
4. Note:
Above-mentioned hotmelt removing and putting operation is only for the P.C.
Board No. PQUP10927ZB and PQUP10927YA.
5. There is no need of the hotmelt removing and putting operation for the PC
Board No. PQUP10927ZC.
Fig. 12
Page 8
Page 9
5. BLOCK DIAGRAM RF UNIT (BASE UNIT)
6. BLOCK DIAGRAM BASEBAND SECTION AND LINE
INTERFACE (BASE UNIT)
Page 10
7. CIRCUIT OPERATION (BASE UNIT)
7.1. R.F. SECTION (SEE BLOCK DIAGRAM Fig. 13)
7.2. THE BASE-BAND SECTION (SEE BLOCK DIAGRAM Fig.
14)
7.2.1. INTRODUCTION
The base-band section consists of a base-band integrated circuit (BBIC), a Flash
PROM, an EEPROM, and an AND Gate.
7.2.2. THE BASE-BAND INTEGRATED CIRCUIT (BBIC)
The PQVINSC14424 (IC101) is a CMOS device designed to handle all the audio,
signal and data processing needed in a DECT base unit. It contains a "burst
mode controller” microprocessor which takes care of DECT specific physical
layer and radio section control. It also contains two ADPCM transcoders, a low
Page 11
power 14 bit codec (ADC/DAC), various other ADC´s, DAC´s and timers, a
gaussian filter for the DECT GFSK modulation method, clock and data recovery
circuits, a clock oscillator circuit, a DTMF generator (DSP), an echo suppression
circuit (DSP), and a pair of gain controllable audio amplifiers for line input and
line output and a general purpose microcontroller.
The IC101 interfaces to its external PROM (IC102) via a data/address/control
bus. It connects to the EEPROM via a serial interface, and a second serial
interface is used during manufacture and service to connect to an external
computer.
7.2.3. FLASH PROM (SEE Fig. 15)
The 1 Mbit (IC102) Flash PROM contains the operational firmware for the
microcontroller. It is interfaced to the data/address/control bus using address
lines A0 to A16, data lines D0 to D7, and chip select (pin 30), output enable (pin
32), and write (pin 7).
7.2.4. EEPROM (SEE Fig. 15)
The electrically erasable PROM PQVINM4C32L (IC103) is used to store all the
temporary operating parameters for the base (see EEPROM LAYOUT). It uses a
two-line serial data interface with the BBIC, with bi-directional data on pin 5
(TP94), and clock on pin 6 (TP93).
7.2.5. CLOCK GENERATION (SEE Fig. 15)
A single clock generator in the BBIC uses an external crystal X101 to derive all
clock frequencies used in the base. The crystal is tuned to the exact frequency
of 10.368 MHz during manufacture by feeding a DC voltage from a DAC in the
microcontroller (from pin 14 of IC101) to the varicap diode D104 (TP112).
The BBIC provide buffered clock signals RFCLK (pin 11, TP139) at 10.368 MHZ
for the Frequency Synthesizer, which is only active during the PLL lock period.
Other clock is SCLK on pin 1 (3.456MHz). The basic data rate for TRADAT and
RECDAT is 1.152 Mbits/s, which is 10.368 MHs divided by 9. The data rate for the
serial interface to the phase-lock-loop is also 1.152 Mbits/s.
Circuit Diagram
Page 12
Page 13
7.2.6. LOCATOR KEY (SEE Fig. 15)
The keyboard “Locator (Page)” button is connected to pin 68 (TP154) of the
IC101. When pressed the base transmits a message to the handset, which then
beeps.
7.2.7. FACTORY SERIAL PORT (SEE Fig. 15)
In order to communicate with the handset during manufacture and servicing
(using a PC) a serial data link has been provided. Serial data input/output is
provided on J102 (TP151), and a ground is provided on J103. The bi-directional
serial data line is split into two at IC101 pin 27 (input) and pin 26 (output). Data
rate is 9600 baud J103. D105provides ESD protection, and R117 and C146
provide RF de-coupling.
7.2.8. BUZZER CIRCUIT (SEE Fig. 15)
A square-wave signal from IC101 pin 41 (TP103) is used to sound the buzzer via
switching transistor T101 (TP101). Various tones and cadences are used
dependent on function. Buzzer volume is varied by changing the duty cycle of
the drive waveform. D101 provides quenching of back-emf generated when T101
turns off.
7.2.9. OFF HOOK AND CALLER LED´S (SEE Fig. 15)
When the Handset is in “Talk” mode, the Off-Hook LED D102 is switched on by
transistor T102 (on), using a control line from pin 28 of IC101 (TP106). “On the
TCD952 the caller” LED is switched via T103.
7.2.10. AUDIO PATH-RX AUDIO-LINE INPUT (SEE Fig. 16)
Audio from the Line Interface TXAF (TP123) enters the BBIC on pin 58. R111 and
C113 are to balance the line input amplifier, into the ADC part of the codec,
where it is sampled and turned into digital data. The burst mode controller then
processes this raw data (called the B-field) performing encryption and
scrambling, adding the various other fields that go together to produce the GAP
standard DECT frame, assigning to a time slot and channel etc. The data then
passes through the gaussian filter to emerge on pin 22 as TRADAT, (TP132).
7.2.11. AUDIO PATH - TX AUDIO - LINE OUTPUT (SEE Fig. 16)
Audio from the receiver RECDAT enters the BBIC on pin 20 and passes through
the clock recovery circuit. The burst mode controller separates out the B-field
data, and performs de-encryption and de-scrambling as required. It then goes to
Page 14
the DAC part of the codec where data is turned back into analogue audio. The
audio signal is amplified by the gain-controlled line output amplifier, and
balanced audio is output on pin 63, and fed as RXAF (TP120) to the Line
Interface.
Circuit Diagram
Page 15
7.3. THE LINE INTERFACE SECTION (SEE BLOCK
DIAGRAM Fig. 15)
7.3.1. INTRODUCTION
This section consists of the telephone line interface, bell detector, hookswitch,
pulse dialing circuits, audio circuits, DC mask & line impedance circuits, power
supplies, and battery charger circuits.
7.3.2. TELEPHONE LINE INTERFACE (SEE Fig. 17)
The telephone line is connected (via 2 or 3 jumpers selected for country of
destination) to a bridge rectifier D8. Surge suppressor SA3 protects against
excessive line voltages. Test points are TP14 (A), TP13 (B), TP21 (S) and TP15
(E). Bridge rectifier D8 provides for lines of either polarity. The output of D8 is
“Line +” (TP50) and “Line -” which is ground.
7.3.3. EARTH RECALL (SEE Fig. 17)
For countries that require Earth Recall facilities, relay RLY1 is provided to short
the E line to the A or B lines. The relay is energised when transistor T2 is
switched on by a high level on the EARTH control line (TP77) from the BB-IC
IC101. D1 will quench the large back-emf voltage that would otherwise occur
across the relay coil when T2 turns off.
7.3.4. BELL DETECTOR (SEE Fig. 17)
The AC ringing signal is detected by optocoupler IC2, using its internal diode in
conjunction with D4. DC from the line is blocked by the wall plug inside. The
other components D2, D3, and R3 reduce current and increase the circuit
impedance in line with national requirements. When ringing is detected IC2 will
turn on, and the RING line (TP76) will be dragged to a low voltage.
Circuit Diagram
Page 16
7.3.5. CLIP CIRCUITS (SEE Fig. 17)
The caller ID signal is detected by IC4.
7.3.6. HOOKSWITCH (AND PULSE DIALING) (SEE Fig. 18)
T8 is the hookswitch, driven by T9. When the phone is “off-hook”, the HOOK
control signal from the BBIC will be a high logic level (+3V), and all both
transistors will be on, thus T8 will “loop” the line. The zenner diode D10
protects transistors T11 to T13 against transient line voltages.
7.3.7. PULSE DIALING (SEE Fig. 18)
During pulse dialing the hookswitch (T8, T9) is used to generate the pulses
using the HOOK control signal, which is set high during pulses. To force the line
impedance low during the “pause” intervals between dial pulses, the
PAUSE-DIAL signal turns on T11, which turns on T12 harder (increases current),
thus reducing line impedance (see 7.3.10. BATTERY CHARGER (SEE Fig. 19))
Page 17
7.3.8. AUDIO CIRCUITS (SEE Fig. 18)
The line output signal from the BBIC RXAF (TP120) is amplified by T13. The
RXAF line is DC coupled to T13 thus making it work as a current limiter (typically
< 8mA). The emitter load of T13 is complex to achieved the correct frequency
response, since the line load (for UK) is also complex. The line input signal
TXAF (TP123) is taken from the junction of R41 and R70. Phase cancellation of
the line output audio occurs at this point, so that only incoming line audio
should be passed to the BBIC on TXAF.
Circuit Diagram
7.3.9. POWER SUPPLIES (SEE Fig. 19)
The AC Adaptor for the KX-TCD952PDB consists of two separate isolated DC
supplies providing a +8 V supply for the base circuitry, and a 9 V supply only for
the charger circuit. The isolation is because the main base circuitry is
connected to the telephone line, so potentially hazardous voltages may be
present, while the charger circuitry has charge contacts that could be touched
by the operator, so the two supplies must be kept separate. The 8 V supply from
the AC Adaptor is connected via J2 pin 1 (TP90) +8 V, and J2 pin 2 (TP89)
ground. The unregulated +8 V supply is fed to the first regulator.This regulator
IC7 provides a regulated output pin 2 (TP91) of +4.0 V (called +4V). The second
regulator IC6 is fed with +4V and provides the stable +3.0V supply (TP95).
During power-up this regulator generates a RESET signal (TP94) which is used
to reset the microcontroller and BBIC.
7.3.10. BATTERY CHARGER (SEE Fig. 19)
The 9 V supply from the AC Adaptor is connected via J2 pin 6 (TP82) positive,
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and J2 pin 5 (TP78) negative. The constant current battery charger circuit is
made up of T14 and T15 (series pass transistor) and associated components.
Charging detector circuit T16 switches on when a charging current flows
through R64 and D11, and turns on the “Charging” LED D12. The charge
contacts are J5. Charge current flows in via J5 (negative), through T15, R63, AC
Adaptor 9 V supply, R64, D11, and out via J5 (positive).
Circuit Diagram
8. BLOCK DIAGRAM RF UNIT (HANDSET)
Page 19
9. BLOCK DIAGRAM BASE-BAND SECTION
(HANDSET)
Page 20
10. CIRCUIT OPERATION (HANDSET)
10.1. THE BASE-BAND SECTION (SEE BLOCK DIAGRAM
Fig. 21)
10.1.1. INTRODUCTION
The base-band section consists of a base-band integrated circuit (BBIC), a Flash
PROM, an EEPROM, an LCD Display, a Microphone, an Earpiece, and power
supply/battery management circuits.
10.1.2. THE BASE-BAND INTEGRATED CIRCUIT (BBIC)
The National SC14405 BBIC (IC1) is a CMOS device designed to handle all the
audio, signal and data processing needed in a DECT handset. It contains two
microprocessors - one general purpose - while the other ìburst mode controllerî
takes care of DECT specific physical layer and radio section control.The BBIC
also contains the ADPCM transcoders, a low power 14 bit codec (ADC/DAC),
various other ADCís, DACís and timers, a UART for data communication with RF
Page 21
unit, a gaussian filter for the DECT GFSK modulation method, clock and data
recovery circuits, a clock oscillator circuit, a battery management circuit, and a
pair of gaincontrollable amplifiers for the microphone and earpiece.
10.1.3. FLASH PROM (SEE Fig. 22)
The 2 Mbit Flash PROM IC2 contains the operational firmware for the BBIC’s
general purpose microprocessor. It is interfaced to the BBIC using address lines
AD0 to AD17, data lines DAB0 to DAB7, and the chip select (IC1 pin 84), read (IC1
pin 86), and write (IC1 pin 93) control lines.
Fig. 22
Circuit Diagram
10.1.4. LCD DISPLAY, AND DISPLAY DRIVER (SEE Fig. 23)
The LCD display also receives data via a serial interface. Serial data is sent to
LCD display on pin 3 (TP70). The RS signal (pin 1, TP67) is used by the BBIC to
send either commands or data.
Fig. 23
Circuit Diagram
Page 22
10.1.5. AUDIO PATH - TX AUDIO (SEE Fig. 24)
Balanced audio from the microphone (TP40 and TP41) enters the BBIC at pins
61 and 63. A balanced bias voltage for the (“electret” type) microphone is
supplied by the BBIC from pins 60 and 64 via R31 and R32. This supply is
de-coupled by R22, R27, C21, C28, and C22. RF de-coupling of the microphone
signal is provided by R27, C25, R28, C26, R24, R25, and C20. The microphone
audio signals are coupled to the BBIC via C22 and C23, which provide some
high pass filtering.
In the BBIC audio passes through the gain-controlled microphone amplifier, into
the ADC part of the codec, where it is sampled and turned into digital data. The
burst mode controller then processes this raw data (called the B-field)
performing encryption and scrambling, adding the various other fields that go
together to produce the GAP standard DECT frame, assigning to a time slot and
channel etc. The data then passes through the gaussian filter to emerge on pin
20 as TRADAT.
10.1.6. AUDIO PATH - RX AUDIO (SEE Fig. 24)
Audio from the receiver RECDAT (TP54) enters the BBIC on pin 18 and passes
through the clock recovery circuit. The burst mode controller separates out the
B-field data, and performs de-encryption and de-scrambling as required. It then
Page 23
goes to the DAC part of the codec where data is turned back into analogue
audio. The audio signal is amplified by the gain-controlled earpiece amplifier,
and balanced audio is output on pins 65 and 66, and fed to the earpiece (TP31
and TP32). The leads feeding the earpiece are RF de-coupled by C15 to R22,
C17, C16, R23, and C18. C19 provides low pass filtering.
Fig. 24
Circuit Diagram
10.1.7. CLOCK GENERATION (SEE Fig. 25)
A single clock generator in the BBIC uses an external crystal X1 to derive all
clock frequencies used in the handset. The crystal is tuned to the exact
frequency of 10.368 MHz during manufacture by feeding a DC voltage from an
internal DAC (from pin 12) to the varicap diode D12 (TP25). The RFCLK output
(pin 10, TP56) is a buffered clock signal at 10.368 MHz for the Frequency
Synthesizer, that is only active during the PLL lock period (see section 1.3). The
basic data rate for TX-DATA and RX-DATA is 1.152 Mbits/s, which is divided by
9. The data rate for the serial interface to the phase-lock-loop is also 1.152
Mbits/s.
10.1.8. KEYBOARD (SEE Fig. 25)
Page 24
The keyboard “On” button is connected directly to pin 41 of the BBIC (TP10).
When pressed it turns the handset on and off (must be held for off). All other
keys are connected in a row/column matrix. They are scanned in six rows using
scan pulses (only active when keys are pressed) from IC1 pins 28 to 33. The four
key matrix columns are input to the BBIC on pins 31 to 34.
Fig. 25
Circuit Diagram
10.1.9. FACTORY SERIAL PORT (SEE Fig. 21)
Page 25
In order to communicate with the handset during manufacture and servicing
(using a PC) a serial data link has been provided. Serial data input/output is
provided on J6 (TP65), and a ground is provided on J7. The bi-directional serial
data line is split into two at IC1 pin 27 (input) and pin 26 (output). Data rate is
9600 baud or 115.2 kBaud. D13 provides ESD protection, and R37 and C56
provide RF de-coupling.
10.1.10. BUZZER CIRCUIT (SEE Fig. 26)
A square-wave signal from IC1 pin 45 is used to sound the buzzer via switching
transistor T5 (TP22). Various tones and cadences are used dependent on
function. Buzzer volume is varied by changing the duty cycle of the drive
waveform. D11 provides quenching of back-emf generated when T5 turns off.
10.1.11. BATTERY SUPPLY (SEE Fig. 26)
The three cell NiCd/NiMH rechargeable battery supplies the handset via 2A fuse
(actually a coil), and is de-coupled by C3 and C4. It directly supplies T3 in the
baseband section, and also the Tx PA in the RF Section. It also supplies IC1
(de-coupled by C9), and most of the RF Section (VCC-OC) (decupled by R35 and
C47, C48 and VCC-PA).
10.1.12. MAIN 3V REGULATOR (SEE Fig. 26)
The BBIC measures the battery voltage on pins 58 using an internal ADC. If the
battery voltage is below 3.36 V, TC3 is switched to power off mode. R7 and C5
provide a reset pulse (TP84) used for resetting the BBIC when power on. The +3
V supply (TP10) is fed to the BBIC, Flash PROM, EEPROM, and Display Driver.
10.1.13. BATTERY CHARGING CIRCUIT (SEE Fig. 26)
The charge circuit is designed to operate with a constant current charger in the
base. L1, L2, D2 and D4 protect against electro-static discharge (ESD). The
charging current from the base is turned on and off by T1 using a control signal
from the BBIC (pin 39, TP6) via T2. R3 provides initial current in the event of a
totally flat battery, and D6 protects against the high voltage present on the
charge contacts if there is no battery in the handset. R4 and R5 provide a signal
for the BBIC to detect (pin 40) that the handset had been placed on the base
charger. If the handset is off, it will be switched on, and charging will start.
Fig. 26
Circuit Diagram
Page 26
11. ADJUSTMENT (BASE UNIT)
Adjustment objectives
itemSymptomRemedy
frequencySynchronization with the portable handset is lost
immediately.
No link is established.
Perform the adjustments
described in item(1).
Page 27
Tools required for adjustments
- Frequency counter
- Personal computer
- Serial communication tool
- Test software (batch files)
- Line simulator
- Oscillator
- Audio level meter
Item(1)
1. Connect the serial link to test computer to J102 (serial data) and J103 (GND).
2. Connect the AC adaptor.
3. Connect the frequency counter to TP148 (SCLK) and J103 (GND).
4. Send batch file “FIXFREQ.BAT”
5. Send “SETFREQ.BAT” to set the clock frequency. The default value is 80.
Increase the value to increase the frequency. The clock frequency must be
3,456 kHz ± 0.007 kHz.
12. ADJUSTMENT (HANDSET)
Adjustment objectives
itemSymptomRemedy
frequencySynchronization with the portable handset is lost
immediately.
No link is established.
batteryThe communication (standby) times is short.Perform the adjustments
The low battery display period is too long or too
short.
Perform the adjustments
described in item(1).
described in item(2).
Tools required for adjustments
Page 28
- Frequency counter
- Power supply unit (DC 3V~5V, 1A)
- Personal computer
- Serial communication tool
- Test software (batch files)
Item(1)
1. Connect the serial link to test computer to J6 (serial data) and J8 (GND).
2. Turn off power for the base unit.
3. Input a 3.9V supply to the handset J5 (+) and J8 (GND).
4. Connect the frequency counter to TP56 and J8 (GND).
5. Press the “power on” button.
6. Send batch file “FIXFREQ.BAT”.
7. Use batch file “SETFREQ.BAT” to set the clock frequency. The default value
is 80. Increase the value to increase the frequency and vice-versa. The clock
frequency must be 10,368.000 kHz ± 0.02 kHz.
Item(2)
1. Connect the serial link to test computer for J6 (serial data) and J8 (GND).
2. Set the battery voltage to 4.6V at J1 and J2.
3. Press the “power on” button.
4. Send batch file “READBATT.BAT”. The returned hex value is M2.
5. Send batch file “WRTBATT.BAT M2”.
6. Set the battery voltage to 3.5V at J5 (+).
7. Send batch file “READBATT.BAT”. The returned hex value is M1.
8. Send batch file “WRTBATT.BAT M1”.
9. Calculate the low value 2 level:
10. Send “WRTBATT.BAT M3”.
Page 29
13. CHECK PROCEDURE (BASE UNIT)
13.1. TEST EQUIPMENT REQUIRED AND EQUIPMENT
SETUP
13.2. INITIAL POWER + BBIC TESTS
1. Turn on the 10V supply.
2. Check for approx. 70 mA current on the 10V supply.
3. Check the 4V supply voltage (TP91). It must be 3.88 ±0.2V.
4. Check the 3.3V supply voltage (TP95). It must be 3.0 ±0.2V.
5. Connect SCLK (TP148) to CH.1 on the scope.
6. Check if the clock waveform is 3,456 kHz.
7. Send batch file “SELF TEST”.
13.3. SET THE CLOCK FREQUENCY
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1. Send batch file “FIX FREQ”.
2. Check for approx. 90 mA current on the 8V supply.
3. Transfer SCLK (TP148) to the frequency counter.
4. Send batch file “SETFREQ nn” to set the clock frequency. The default value of
nn is 80. Increase the value to increase the frequency and vice-versa. The
clock frequency must be 3,456 kHz ( ± 0.007 kHz).
13.4. QUICK Tx CHECK
1. Set the CMD60 to MODULE TEST.
2. Send batch file “H”.
3. Confidence check of Power (NTP): it must be +20 to +25 dBm.
4. Confidence check of Frequency Offset: it must be 0 ± 40 kHz.
5. Confidence check of Deviation of B field Data Type 01010101: it must be 207
to 270 kHz.
13.5. LOOPBACK TEST
1. Set the CMD60 to MANUAL TEST.
2. Set the CMD60 TRAFFIC CARRIER to 5.
3. Send batch file “TESTMODE”.
4. On the CMD60, press “SETUP CONNECT”.
5. Check the Power (NTP): It must be +20 to +25 dBm.
6. Press MODULATION.
7. Set Data Type to “Fig. 27”.
8. Check the Frequency Drift: it must be 0 ± 45 kHz/ms.
9. Check the Frequency Offset: it must be 0 ± 40 kHz.
10. Send batch file ìWREE 00 16 nmî to adjust the Deviation (Max. B Field) with
Data Type: 01010101. Increase the value nm to increase the Deviation and
vice-versa. The least significant digit (m) of the value must be 1 (i.e. only the
values 31, 41, 51, 61 etc. are allowed). The Deviation must be 207 to 270 kHz.
11. Check the Deviation (Max. ± B Field) with Data Type “Fig. 27”: it must be 202
to 404 kHz.
12. Press MENU UP.
13. Press POWER RAMP.
Page 31
14. Check the Burst fits mask.
15. Press MENU UP.
16. Press BER.
17. Note the Sensitivity (reduce RF LEVEL for a BER of approx. 1000ppm) : the
RF LEVEL must be < - 90 dBm.
18. Press MENU UP.
19. Press BEARER RELEASE.
Note:
These tests can be repeated on Traffic Carriers 5 and 9.
13.6. TELEPHONE LINE TESTS
1. Connect the tel line from the base under test to the line simulator.
2. Send batch file “OFFHOOK”.
3. Check if the green “In-Use” LED is on.
4. Set the line current to 40 mA on the line simulator.
5. Send batch file “ONHOOK”.
6. Check that the line current is 0 ± 0.5 mA.
7. Check if the green “In-Use” LED is off.
8. Send batch file “OFFHOOK”.
9. Check the DC Voltage on TP45. It must be 9.5 ± 0.5V.
10. Send batch file “LINIMP 1”.
11. Check the DC Voltage on TP45. It must be < 3.5V.
12. Send batch file “LINIMP 0”.
13. Send batch file “PULDIAL”.
14. Observe on the line simulator current meter that 5 dial pulses are output
causing the current to reduce to approx. 20mA.
15. Send batch file “STRTDTMF”.
16. Check on the scope that a DTMF waveform is output on that tel line.
17. Send batch file “STOPDTMF”.
18. Disconnect the tel line from the base under test to the line simulator.nm
19. Connect the “Bell” Oscillator to the tel line.
20. Set the “Bell” Oscillator voltage to 32V RMS 23Hz.
Page 32
21. Send batch file “RINGDET”.
22. Check that the ringing voltage has been detected (1 = detected).
13.7. CHARGE CURRENT TEST
1. Connect the 11V supply to J2 pin 6 (+) and J2 pin 5 (-).
2. Connect the ammeter with a series load resistor of 56ΩΩ/2 W to J3 (+) and J4 (-).
3. Switch on the 11V supply.
4. Check the Charge Voltage to J3 and J4 9.5 ± 0.5 V.
5. Switch off the 11V supply.
6. Connect the 11V supply to the “11V Supply” sockets on the test jig.
14. CHECK PROCEDURE (HANDSET)
14.1. TEST EQUIPMENT REQUIRED AND EQUIPMENT
SETUP
NOTATION PUBLIC "-//ALDUS//NOTATION TAGGED IMAGE FILE FORMAT//EN"
ENTITY SYSTEM "14_01_01.tif"
14.2. INITIAL POWER + BBIC TESTS
1. Turn on the 3.9V supply.
2. Press the “Power-on” button.
3. Check for a “beep” and approx 80 mA current on the 3.9V supply.
4. Check the 3.0V supply voltage (TP10). It must be 2.85 +/- 0.3.
5. Connect RFCLK (TP56) to CH.1 on the scope. Send batch file RFCLK1.
6. Check if the clock waveform is 10,368.000 kHz, +/- 40Hz.
7. Send batch file ”SELF TEST”. The first 4 digits are FLASH ROM checksum,
the next 2 digits are RAM test, and must be 00.
14.3. SET CLOCK FREQUENCY
1. Send batch file “RFCLK1”.
2. Connect RFCLK (TP56) to the frequency counter.
Page 33
3. Send batch file “SET FREQ nn” to set the clock frequency. The default value
of nn is 80. Increase the value to increase the frequency. The clock frequency
must be 10,368.000 kHz ± 0.04 kHz.
14.4. QUICK Tx CHECK
1. Set the CMD60 to MODULE TEST.
2. Send batch file “H”.
3. Confidence check of Power (NTP): must be +20 to +25 dBm.
4. Confidence check of Frequency Offset: must be 0 ± 40 kHz.
5. Confidence check of Deviation of B field Data Type 01010101: must be 207 to
270 kHz.
14.5. LOOPBACK TEST
1. Set the CMD60 to MANUAL TEST.
2. Set the CMD60 TRAFFIC CARRIER to 5.
3. Send batch file “TESTMODE”.
4. On the CMD60 press “SETUP CONNECT”.
5. Check Power (NTP): must be +20 to +25 dBm.
6. Press MODULATION.
7. Set Data Type to “Fig. 27”.
8. Check the Frequency Drift: must be 0 ± 45 kHz/ms.
9. Check the Frequency Offset: must be 0 ± 40 kHz.
10. Send batch file ìWREE 00 16 nmî to adjust the Deviation (Max. B Field) with
Data Type: 01010101. Increase the value nm to increase the Deviation and
vice-versa. The least significant digit (m) of the value must be 1 (i.e. only the
values 31, 41, 51, 61 etc. are allowed). The Deviation must be 207 to 270 kHz
11. Check the Deviation (Max. ± B Field) with Data Type “Fig. 27”: must be 201 to
404 kHz.
12. Press MENU UP.
13. Press POWER RAMP
14. Check the Burst fits mask.
15. Press MENU UP.
16. Press BER.
Page 34
17. Note the Sensitivity (reduce the RF LEVEL for a BER of approx. 1000ppm) :
RF LEVEL must be < - 90 dBm
18. Press MENU UP.
19. Press BEARER RELEASE.
Note:
These tests can be repeated on Traffic Carriers 0 and 9.
15. TROUBLESHOOTING GUIDE
15.1. HANDSET: DOES NOT OPERATE
NOTATION PUBLIC "-//ALDUS//NOTATION TAGGED IMAGE FILE FORMAT//EN"
ENTITY SYSTEM "15_01_01.tif"
NOTATION PUBLIC "-//ALDUS//NOTATION TAGGED IMAGE FILE FORMAT//EN"
ENTITY SYSTEM "15_01_02.tif"
15.2. HANDSET: LINK
NOTATION PUBLIC "-//ALDUS//NOTATION TAGGED IMAGE FILE FORMAT//EN"
ENTITY SYSTEM "15_02_01.tif"
NOTATION PUBLIC "-//ALDUS//NOTATION TAGGED IMAGE FILE FORMAT//EN"
ENTITY SYSTEM "15_02_02.tif"
NOTATION PUBLIC "-//ALDUS//NOTATION TAGGED IMAGE FILE FORMAT//EN"
ENTITY SYSTEM "15_02_03.tif"
15.3. HANDSET: DOES NOT LINK
NOTATION PUBLIC "-//ALDUS//NOTATION TAGGED IMAGE FILE FORMAT//EN"
ENTITY SYSTEM "15_03_01.tif"
15.4. BASE UNIT: DOES NOT CHARGE
NOTATION PUBLIC "-//ALDUS//NOTATION TAGGED IMAGE FILE FORMAT//EN"
ENTITY SYSTEM "15_04_01.tif"
15.5. HANDSET: DOES NOT CHARGE
Page 35
Refer to the simplified manual (cover) for other areas.
Notes:
1. The marking (RTL) indicates that the Retention Time is limited for this item.
After the discontinuation of this assembly in production, the item will
continue to be available for a specific period of time. The retention period of
availability is dependent on the type of assembly, and in accordance with the
laws governing parts and product retention.
After the end of this period, the assembly will no longer be available.
2. Important safety notice
Components identified by mark have special characteristics important for
safety. When replacing any of these components, use only manufacture´s
specified parts.
3. The S mark indicates service standard parts and may differ from production
parts.
4. RESISTORS & CAPACITORS
Unless otherwise specified;
All resistors are in ohms (ΩΩ) k = 1000 ΩΩ, M = 1000kΩΩ
All capacitors are in MICRO FARADS (µµF) P=µµµµF
*Type & Wattage of Resistor