OKI MSM6636 Datasheet
¡ Semiconductor MSM6636
¡ Semiconductor
MSM6636
SAE-J1850 Communication Protocol Conformity Transmission Controller for Automotive LAN
GENERAL DESCRIPTION
The MSM6636 is a transmission controller for automotive LAN based on data communication
protocol SAE-J1850. This LSI can realize a data bus topology bus LAN system with a PWM bit
encoding method (41.6 K bps). In addition to a protocol control circuit, MSM6636 has an enclosed
quartz oscillation circuit, host CPU interface (clock synchronous serial / UART), a transmit/
receive buffer, and a bus receiver circuit that decreases the burden on the host CPU.
FEATURES
• Based on SAE-J1850 CLASS B DATA COMMUNICATION NETWORK INTERFACE (issued
August 12, 1991)
• CSMA/CD (Carrier-sense multiple access with collision detection)
• Internal transmit buffer (1 frame) and receive buffer (2 frames)
• Bit encoding: PWM (Pulse Width Modulation)
• Transmission Speed: 41.6K bps
• Multi-address setting with physical addressing: 1 type / functional addressing: 15 types
• Address filter function by multi-addressing (broadcasting possible)
• Automatic retransmission function by arbitration loss and non ACK
• 3 types of in-frame response support:
q Single-byte response from a single recipient
w Multi-byte response from a single recipient (with CRC code)
e Single-byte response from multiple recipients (ID response as ACK)
• Error detection by cyclic redundancy check (CRC)
• Various communication error detections
• Dual-wire bus abnormality detection by internal bus receiver and fault tolerance function
• Host CPU interface is LSB first / serial, 4 modes supported
q Clock synchronous serial (no parity)
Normal mode: 8-bit data
MPC Mode: 8-bit data + MPC bit (1: address / 0: data select bit)
w UART (yes/no parity selectable)
Normal mode: 1 start bit + 8-bit data + (parity) + 1 stop bit
MPC mode: 1 start bit + 8-bit data + MPC bit + (parity) + 1 stop bit
• Sleep Function
Low current consumption mode by oscillation stop (IDS Max < 50µA)
SLEEP / WAKE UP control from host CPU, WAKE UP via LAN bus
• Available package 18pin DIP, 18 pin QFJ (PLCC) and 24pin SOP.
1
MSM6636 ¡ Semiconductor
BLOCK DIAGRAM
CPU
x'tal
Receive
Register
Status Register
Serial Interface
Transmission Register
Response Register
Clock
Generator
Buffer Register
Receive
Buffer
Address Register
Converter
Checker
Generator
Converter
MSM6636
S-P
CRC
LAN Controller
PWM
Decoder
Receive Controller
Transmission Controller
CRC
P-S
Address
Filter
Degital
Filter
Bus
Receiver
PWM
Encoder
LAN
Bus
Input
LAN
Bus
Output
2
¡ Semiconductor MSM6636
PIN CONFIGURATION (TOP VIEW)
18pin Plastic DIP
1
AVDD DVDD
2
BO– RES
3
BI– INT
4
BI+ TXD
5
BO+ RXD
6
AGND
7
U-C A-D
8
M-N OSC0
9
DGND OSC1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
1
PIN DESCRIPTION
Pin Name I/O Function
AVDD 1 — Analog power supply pin
BO – 2 O LAN - BUS output –
BI – 3 I
BI + 4 I
BO + 5 O
AGND 9 — Analog ground pin
U - C 10 I 0: UART 1: clock synchronous serial select pin
M - N 11 I 0: MPC mode 1:normal mode select pin
DGND 12 — Digital ground pin
OSC 1 13 O Crystal oscillation output
OSC 0 14 I Crystal oscillation input
A - D
SCLK / PAE 16 I Serial clock input/Parity select pin
RXD 20 I Serial data input pin
TXD 21 O Serial data output pin
INT 22 O Interrupt output pin
RES 23 I Reset input pin
DVDD 24 — Digital power supply pin
SCLK
/PAE
18pin Plastic QFJ
BO–M-N
AVDDDGND
DVDDOSC1
11817
2
3
BI– INT
4
BI+ TXD
5
BO+ RXD
6
AGND
7
U-C A-D
8 9 10 11
Pin #
DIP/
SOP
QFJ
1
2
3
4
5
LAN - BUS input –
LAN - BUS input +
LAN - BUS output +
6
7
8
9
10
11
12
15 I
0: data communication
1: address communication
13
14
15
16
17
18
RESOSC0
16
15
14
13
12
24pin Plastic SOP
1
AVDD DVDD
2
BO– RES
3
BI– INT
4
BI+ TXD
5
BO+ RXD
6
NC NC
7
NC NC
8
NC NC
SCLK
/PAE
9
AGND SCLK/PAE
10
U-C A-D
11
M-N OSC0
12
DGND OSC1
NC: No Connection
24
23
22
21
20
19
18
17
16
15
14
13
3
MSM6636 ¡ Semiconductor
ABSOLUTE MAXIMUM RATINGS
DGND = AGND = 0V
Parameter Symbol
Power Supply Voltage DVDD, AVDD
Input Voltage V
Output Voltage V
Power Dissipation
Storage Temperature T
P
D(DIP)
P
D(QFJ)
P
D(SOP)
STG
I
O
1
*
2
*
3
*
Condition Rated Value Unit
-0.3~7.0 V
AVDD = DVDD
AVDD = DVDD
-0.3~DVDD+0.3 V
-0.3~DVDD+0.3 V
Ta = 25°C 860 mW
Ta = 25°C 960 mW
Ta = 25°C 830
-55~150 °C
mW
D(DIP)
D(QFJ)
D(SOP)
*1
: 18PIN DIP package power dissipation
*2
: 18PIN QFJ package power dissipation
*3
: 24PIN SOP package power dissipation
P
P
P
Power Dissipation Curve
< 18PIN DIP package > < 18PIN QFJ package >
1000
860
[mW]
D(DIP)
500
Power dissipation P
1000
[mW]
830
-40 25 125 150
Ambient temperature Ta (°C)
< 24PIN SOP package >
1000
960
[mW]
D(QFJ)
500
-40 25 125 150
Power dissipation P
Ambient temperature Ta (°C)
D(SOP)
500
-40 25 125 150
Power dissipation P
Ambient temperature Ta (°C)
4
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