OKI MSM64P155-003GS-BK, MSM64P155-xxxGS-BK, MSM64P155L-002GS-BK, MSM64P155-001GS-BK, MSM64P155L-xxxGS-BK Datasheet

E2E0050-18-95

This version: Sep. 1998

MSM64P155/64P155L¡ Semiconductor

Preliminary

¡ Semiconductor

MSM64P155/64P155L

4-Bit Microcontroller with Built-in LCD Driver and Melody Circuit

GENERAL DESCRIPTION

The MSM64P155 (1.5 V)/64P155L (3.0 V) is a one-time-programmable ROM version product,
which has one-time PROM (OTP) as internal program memory. On the other hand, the
MSM64155 is a mask ROM-version product, which has mask ROM as internal program memory.
Unlike the mask ROM-version MSM64155 which has a P-well CMOS structure, the MSM64P155/
64P155L has been fabricated with the N-well CMOS-structured EPROM process technology.
Therefore, the MSM64P155/64P155L differs from the MSM64155 in the polarity of the power
supply for LCD bias generation and in the external circuit structure.
Unlike the mask ROM-version product, the MSM64P155/64P155L cannot be supplied in the
form of a chip. The MSM64P155/64P155L is an OTP-version product used to evaluate an
application program.
The MSM64P155/64P155L has two operation modes, microcontroller operation mode and
PROM mode. The microcontroller operation mode is used to operate the MSM64P155/64P155L
like a mask ROM-version product and the PROM mode is used to program or read the PROM.

FEATURES

• Operating range
Operating voltage (mask option) : 1.5 V/3.0 V
Operating frequency : 32.768 kHz crystal oscillation

Approx. 32 kHz RC oscillation

• Minimum instruction execution time : 91 ms

• General memory space : 4064 bytes (PROM)

• Local memory space : 256 nibbles

• LCD driver : 64

Common driver ¥ 4
Segment driver ¥ 60
1/4 duty, 1/3 bias; 240 segments (60 ¥ 4)
1/3 duty, 1/3 bias; 180 segments (60 ¥ 3)

• I/O port
Input-output port : 2 ports ¥ 4 bits (open-drain output/CMOS output

selectable; pull-down resistor input/high-impedance
input selectable)

Input port : 1 port ¥ 2 bits (pull-down resistor input/high-impedance

input selectable)
1 port ¥ 4 bits (pull-down resistor input/high-impedance
input selectable)

Output port : 1 port ¥ 4 bits (CMOS output)

• Event counter : 1 channel

• Melody output : 2

• Capture circuits : 2 channels

256 Hz, 128 Hz, 64 Hz, 32 Hz

1/29

• Interrupt sources : 10 sources

External 4, time base 4, melody 2

(When TST3 = "1", six time base sources)

• Clock generation circuit (mask option) : Crystal/RC oscillation

• Package:
100-pin plastic QFP (QFP100-P-1420-0.65-BK)
Product name :

MSM64P155-001GS-BK (crystal oscillation, 1.5 V, blanked PROM)
MSM64P155L-002GS-BK (crystal oscillation, 3.0 V, blanked PROM)
MSM64P155-003GS-BK (RC oscillation, 1.5 V, blanked PROM)
MSM64P155L-004GS-BK (RC oscillation, 3.0 V, blanked PROM)
MSM64P155-xxxGS-BK (crystal/RC oscillation, 1.5 V, written PROM)
MSM64P155L-xxxGS-BK (crystal/RC oscillation, 3.0 V, written PROM)
xxx indicates a code number.

MSM64P155/64P155L¡ Semiconductor

2/29

BLOCK DIAGRAM

BSRHALTMIEF

TR2 TR0 TR1

(4)

PCM PCL

PCH

ROM

4064B

MSM64P155/64P155L¡ Semiconductor

C2C1V

BIAS

DD3VDD2VDD1

COM1
COM2
COM3
COM4

OSC0

OSC1

RESET

TST1
TST2
TST3

V

C

BA HL XY

CLK

RST

TST

SS

BUP CAPR PORT2 EVENT PORT3 PORT4 PORT6 PORT7

ALU

(4) (4)

TIMING

CONTROLLER

TBC

INT

A8 to A11

A7 to A0

RAM

256N

DB7 to DB0

ROMRSP

4

IR

DECODER

IR

PORT ADDRESS

DB7 to DB0

(8)

INTC

(8)

PORT ADDRESS

INT INTINTINT

LCD

MD0

INT

MD1

INT

SEG0

SEG59

MD0

MD0

MD1

MD1

is the CPU core (nx-4/20).

P2.0

P2.1

P2.2

P2.3

P3.0

P3.1

P4.0

P4.1

P4.2

P4.3

P6.0

P6.1

P6.2

P6.3

P7.0

P7.1

P7.2

P7.3

3/29

PIN CONFIGURATION (TOP VIEW)

DD3

DD2

DD1

V

100

V

V

98

99

C1

97

C2

96

COM1

95

COM3

COM2

93

94

SEG0

COM4

91

92

SEG2

SEG1

89

90

SEG4

SEG3

87

88

SEG6

SEG5

85

86

SEG8

SEG7

83

84

MSM64P155/64P155L¡ Semiconductor

SEG10

SEG9

81

82

RESET

OSC0

OSC1

V

PP

P2.3
P2.2
P2.1
P2.0
P3.1
P3.0
P4.3
P4.2
P4.1
P4.0
P6.3
P6.2
P6.1
P6.0
P7.3
P7.2
P7.1
P7.0

V

SS

MD0

MD0
MD1

MD1

TST3
TST2
TST1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

80

79

78

77

76

75

74

73

72

71

70

69

68

67

66

65

64

63

62

61

60

59

58

57

56

55

54

53

52

51

SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40

32

31

34

33

37

36

35

40

39

38

43

42

41

46

45

44

49

48

47

(NC)

SEG42

SEG43

SEG44

SEG45

SEG46

SEG47

SEG48

SEG49

SEG50

SEG51

SEG52

SEG53

SEG54

SEG55

SEG56

SEG57

SEG58

SEG59

100-Pin Plastic QFP

Note: Pins marked as (NC) are no-connection pins which are left open.

50

SEG41

4/29

PIN DESCRIPTIONS

Basic Functions

MSM64P155/64P155L¡ Semiconductor

Power
Supply

Oscillation

Test

Pin

23

100

99

98
97

96

4

2

3

30
29

28

Symbol

V

SS

V

DD1

V

DD2

V

DD3

C1

C2

V

PP

OSC0

OSC1

TST1

TST2

TST3

TypeFunction

—

Digital supply voltage (0 V)

—

Digital positive power supply (1.5 V spec.)

Description

Bias output for LCD driver (3.0 V spec.)

—

Digital positive power supply (3.0 V spec.)
Bias output for LCD driver (1.5 V spec.)

Bias output for LCD driver (+4.5 V)

—
—

Pins for connecting a capacitor for generating LCD driving bias

—
—

Positive power supply for writing programming data to PROM
(+12.5 V)

I

Clock oscillation pins:
Either a crystal (32.768 kHz) and a capacitor (10 to 30 pF) are
connected to these pins or a resistor (1 MW) is.

O

I

Input pins for test:
These pins are internally pulled down to V

I

When this pin is set to "H" level, the 256 Hz and 4 Hz interrupts are

I

SS

.

enabled, and then the MSM64P155 can be used as an OTP version
of the MSM64152A, MSM64153A, and MSM64158A.

RESET

1I

RESET

System reset input pin :
Setting this pin to "H" level puts this device into a reset state.
Then, setting this pin to "L" level starts executing an instruction from
address 000H.
This pin is internally connected to V

through a pull-down resistor.

SS

5/29

Basic Functions (continued)

MSM64P155/64P155L¡ Semiconductor

Pin DescriptionTypeFunction

Ports 4-bit input port (port 2) :

10

14

13
12

11

18

17
16

15

22

21

20 P7.2
19

Melody
Drivers

LCD
Drivers

95

94
93

92

Symbol

8

7
6

5

9

P2.0

P2.1

P2.2
P2.3

P3.0

P3.1

P4.0

P4.1

P4.2
P4.3

P6.0

P6.1

P6.2
P6.3

P7.0

P7.1

P7.3

MD0

MD0

MD1

MD1

COM1

COM2

COM3
COM4

I

Select between pull-down resistor input and high impedance input
for each bit with the port 2 control register (P2CON).
When configured for secondary functions, an external interrupt and
capture circuit trigger input are allocated.
If P2.0 to P2.3 are set to "H" level, the device enters system reset
mode.

I 2-bit input port (port 3) :

Select between pull-down resistor input and high impedance input
with the port 3 control register (P3CON).
When configured for a secondary function, an external interrupt is
allocated to P3.0 and an event counter is allocated to P3.1.

O

4-bit output port (port 4) :
4-bit CMOS output port.

4-bit input-output port (port 6) :

I/O

Select between input and output, between pull-down resistor input
and high impedance input, and between open-drain output and CMOS
output with the port 6 control register (P6CON). When configured
for a secondary function, an external interrupt is allocated.

4-bit input-output port (port 7) :

I/O

Select between input and output, between pull-down resistor input
and high impedance input, and between open-drain output and CMOS
output with the port 7 control register (P7CON). When configured for
a secondary function, an external interrupt is allocated.

O Output pin of melody driver 0.25
O Inverted output pin of MD0 output.24

O Output pin of melody driver 1.26

O Inverted output pin of MD1 output.27

O

LCD common signal output pins.

O

O

O

6/29

Basic Functions (continued)

MSM64P155/64P155L¡ Semiconductor

LCD
Drivers

Pin DescriptionTypeFunction

91

Symbol

SEG0

SEG1
SEG2

SEG3
SEG4

SEG5
SEG6

SEG7

SEG8

SEG9

SEG10

SEG11
SEG12

SEG13
SEG14

SEG15
SEG16

O

LCD segment signal output pins.

O90
O89

O88
O87

O86
O85

O84

O83

O82
O81

O80
O79

O78
O77

O76
O75

SEG17

SEG18
SEG19

SEG20
SEG21

SEG22
SEG23

SEG24
SEG25

SEG26
SEG27

SEG28

SEG29

SEG30
SEG31
SEG32

SEG33
SEG34

O74

O73

O72

O71
O70

O69
O68

O67
O66

O65
O64

O63

O62

O61
O60
O59

O58
O57

SEG35

SEG36
SEG37

SEG38

SEG39

O56

O55
O54

O53

O52

7/29

Basic Functions (continued)

MSM64P155/64P155L¡ Semiconductor

LCD
Drivers

Pin DescriptionTypeFunction

51

39

38
37

36
35
34

33

32

31

Symbol

SEG40

SEG41
SEG42

SEG43

SEG44

SEG45
SEG46

SEG47

SEG48

SEG49
SEG50

SEG51

SEG52

SEG53
SEG54

SEG55
SEG56

SEG57

SEG58

SEG59

O

LCD segment signal output pins.

O50
O49

O48
O47

O46
O45

O44

O43

O42
O41

O
O

O
O

O
O
O

O

O

8/29

Secondary Functions

MSM64P155/64P155L¡ Semiconductor

External
Interrupts

Pin DescriptionTypeFunction

10

18

17
16

15

22

21
20

Symbol

8

7
6

5

P2.0

P2.1
P2.2

P2.3

P3.0

P6.0

P6.1
P6.2

P6.3

P7.0

P7.1
P7.2

I

P2.0 to P2.3 secondary functions :
These are level-triggered external interrupt input pins.
Select interrupt enable/disable for each bit with the P2 interrupt
enable register (P2IE).
If P2.0 to P2.3 pins are set to "H" level for a minimum of 2 seconds,
the device enters system reset mode.
P2.0, P2.1 secondary functions :
trigger input pins for capture circuit.

I

P3.0 secondary function :
This is an input pin for external interrupt. This pin can receive an
interrupt at a rising edge, a falling edge, or at both rising and falling
edges.

I

P6.0 to P6.3 secondary functions :
These are level-triggered external interrupt input pins.

I

P7.0 to P7.3 secondary functions :
These are level-triggered external interrupt input pins.

Counter
Input

19

P7.3

9Event

P3.1

I

P3.1 secondary function :
Input port for event counter

9/29