Low-power FM stereo radio for handheld applications
Rev. 05 — 26 January 2007Product data sheet
1.General description
The TEA5767HN is a single-chip electronically tuned FM stereo radio for low-voltage
applications with fully integrated Intermediate Frequency (IF) selectivity and
demodulation. The radio is completely adjustment-free and only requires a minimum of
small and low cost external components. The radio can be tuned to the European, US,
and Japanese FM bands.
2.Features
n High sensitivity due to integrated low-noise RF input amplifier
n FM mixer forconversion to IF of the US/Europe (87.5 MHz to 108 MHz) and Japanese
(76 MHz to 91 MHz) FM band
n Preset tuning to receive Japanese TV audio up to 108 MHz
n RF Automatic Gain Control (AGC) circuit
n LC tuner oscillator operating with low cost fixed chip inductors
n FM IF selectivity performed internally
n No external discriminator needed due to fully integrated FM demodulator
n Crystal reference frequency oscillator; the oscillator operates with a 32.768 kHz clock
crystal or with a 13 MHz crystal and with an externally applied 6.5 MHz reference
frequency
n Phase-locked loop (PLL) synthesizer tuning system
n I2C-bus and 3-wire bus, selectable via pin BUSMODE
n 7-bit IF counter output via the bus
n 4-bit level information output via the bus
n Soft mute
n Signal dependent mono to stereo blend [Stereo Noise Cancelling (SNC)]
n Signal dependent High Cut Control (HCC)
n Soft mute, SNC and HCC can be switched off via the bus
n Adjustment-free stereo decoder
n Autonomous search tuning function
n Standby mode
n Two software programmable ports
n Bus enable line to switch the bus input and output lines into 3-state mode
NXP Semiconductors
3.Quick reference data
Table 1.Quick reference data
V
CCA=VCCD=VCC(VCO)
for V
the emf value is given; unless otherwise specified.
RF
SymbolParameterConditionsMinTypMax Unit
V
CCA
V
CC(VCO)
V
CCD
I
CCA
I
CC(VCO)
I
CCD
f
FM(ant)
T
amb
FM overall system parameters; see
V
RF
S
−200
S
+200
V
AFL
V
AFR
analog supply voltage
Voltage-Controlled
Oscillator (VCO)
supply voltage
digital supply voltage
analog supply currentoperating; V
VCO supply currentoperating; V
digital supply currentoperating; V
FM input frequency76-108MHz
ambient temperatureV
RF sensitivity input
voltage
low side 200 kHz
selectivity
high side 200 kHz
selectivity
left audio frequency
output voltage
right audio frequency
output voltage
= 2.7 V; T
TEA5767HN
Low-power FM stereo radio for handheld applications
=25°C; AC values are given in RMS;
amb
[1]
2.53.05.0V
[1]
2.53.05.0V
[1]
2.53.05.0V
= 3 V6.08.410.5 mA
CCA
Standby mode; V
CC(VCO)
Standby mode; V
CCD
Standby mode; V
bus enable line HIGH305680µA
bus enable line LOW111926µA
CCA=VCC(VCO)=VCCD
2.5 V to 5 V
Figure 13
fRF= 76 MHz to 108 MHz;
∆f = 22.5 kHz; f
(S+N)/N = 26 dB;
de-emphasis = 75 µs; L = R;
B
n.c.1not connected
CPOUT2charge pump output of synthesizer PLL
VCOTANK13VCO tuned circuit output 1
VCOTANK24VCO tuned circuit output 2
V
CC(VCO)
DGND6digital ground
V
CCD
DATA8bus data line input/output
CLOCK9bus clock line input
n.c.10not connected
WRITE/READ11write/read control input for the 3-wire bus
BUSMODE12bus mode select input
BUSENABLE13bus enable input
SWPORT114software programmable port 1
SWPORT215software programmable port 2
XTAL116crystal oscillator input 1
22left audio frequency output voltage
23right audio frequency output voltage
26reference voltage
32gain control current for IF filter
34analog supply voltage
…continued
7.Functional description
7.1Low-noise RF amplifier
The Low Noise Amplifier (LNA) input impedance together with the LC RF input circuit
defines an FM band filter. The gain of the LNA is controlled by the RF AGC circuit.
7.2FM mixer
The FM quadrature mixer converts the FM RF (76 MHz to 108 MHz) to an IF of 225 kHz.
7.3VCO
The varactor tuned LC VCO provides the Local Oscillator (LO) signal for the FM
quadrature mixer. The VCO frequency range is 150 MHz to 217 MHz.
Product data sheetRev. 05 — 26 January 20076 of 40
NXP Semiconductors
7.4Crystal oscillator
The crystal oscillator can operate with a 32.768 kHz clock crystal or a 13 MHz crystal. The
temperature drift of standard 32.768 kHz clock crystals limits the operational temperature
range from −10 °Cto+60°C.
The PLL synthesizer can be clocked externally with a 32.768 kHz, a 6.5 MHz or a 13 MHz
signal via pin XTAL2.
The crystal oscillator generates the reference frequency for:
• The reference frequency divider for the synthesizer PLL
• The timing for the IF counter
• The free-running frequency adjustment of the stereo decoder VCO
• The center frequency adjustment of the IF filters
7.5PLL tuning system
The PLL synthesizer tuning system is suitable to operate with a 32.768 kHz or a 13 MHz
reference frequency generated by the crystal oscillator or applied to the IC from an
external source. The synthesizer can also be clocked via pin XTAL2 at 6.5 MHz. The PLL
tuning system can perform an autonomous search tuning function.
TEA5767HN
Low-power FM stereo radio for handheld applications
7.6RF AGC
The RF AGC prevents overloading and limits the amount of intermodulation products
created by strong adjacent channels.
7.7IF filter
Fully integrated IF filter.
7.8FM demodulator
The FM quadrature demodulator has an integrated resonator to perform the phase shift of
the IF signal.
7.9Level voltage generator and analog-to-digital converter
The FM IF analog level voltage is converted to 4 bits digital data and output via the bus.
7.10IF counter
The IF counter outputs a 7-bit count result via the bus.
7.11Soft mute
The low-pass filtered level voltage drives the soft mute attenuator at low RF input levels.
The soft mute function can be switched off via the bus.
7.12MPX decoder
The PLL stereo decoder is adjustment-free. The stereo decoder can be switched to mono
via the bus.
Product data sheetRev. 05 — 26 January 20077 of 40
NXP Semiconductors
7.13Signal dependent mono to stereo blend
With a decreasing RF input levelthe MPX decoder blends from stereo to mono to limit the
output noise. The continuous mono to stereo blend can also be programmed via the bus
to an RF level depending switched mono to stereo transition. Stereo Noise Cancelling
(SNC) can be switched off via the bus.
7.14Signal dependent AF response
The audio bandwidth will be reduced with a decreasing RF input level. This function can
be switched off via the bus.
7.15Software programmable ports
Two software programmable ports (open-collector) can be addressed via the bus.
The port 1 (pin SWPORT1) function can be changed with write data byte 4 bit 0
(see Table 13). Pin SWPORT1 is then output for the ready flag of read byte1.
7.16I2C-bus and 3-wire bus
TEA5767HN
Low-power FM stereo radio for handheld applications
The 3-wire bus and the I2C-bus operate with a maximum clock frequency of 400 kHz.
Before any READ or WRITE operation the pin BUSENABLE has to be HIGH for at
least 10 µs.
The I2C-bus mode is selected when pin BUSMODE is LOW, when pin BUSMODE is HIGH
Product data sheetRev. 05 — 26 January 20079 of 40
NXP Semiconductors
Low-power FM stereo radio for handheld applications
8.I2C-bus, 3-wire bus and bus-controlled functions
8.1I2C-bus specification
TEA5767HN
Information about the I2C-bus can be found in the brochure
it” (order number 9398 393 40011)
The standard I2C-bus specification is expanded by the following definitions:
IC address: 110 0000b
Structure of the I2C-bus logic: slave transceiver
Subaddresses are not used
The maximum LOW-level input and the minimum HIGH-level input are specified to
0.2V
The pin BUSMODE must be connected to ground to operate the IC with the I2C-bus.
Remark: The I2C-bus operates at a maximum clock frequency of 400 kHz. It is not
allowed to connect the IC to an I2C-bus operating at a higher clock rate.
and 0.45V
CCD
8.1.1Data transfer
Data sequence: address, byte 1, byte 2, byte 3, byte 4 and byte 5 (the data transfer has to
be in this order). The Least Significant Bit (LSB) = 0 of the address indicates a WRITE
operation to the TEA5767HN.
Bit 7 of each byte is considered as the Most Significant Bit (MSB) and has to be
transferred as the first bit of the byte.
The data becomes valid bitwise at the appropriate falling edge of the clock. A STOP
condition after any byte can shorten transmission times.
respectively.
CCD
“The I2C-bus and how to use
.
When writing to the transceiver by using the STOP condition before completion of the
whole transfer:
• The remaining bytes will contain the old information
• If the transfer of a byte is not completed, the new bits will be used, but a new tuning
cycle will not be started
The IC can be switched into a low current Standby mode with the standby bit; the bus is
then still active. The standby current can be reduced by deactivating the bus interface
(pin BUSENABLE LOW). If the bus interface is deactivated (pin BUSENABLE LOW)
without the Standby mode being programmed, the IC maintains normal operation, but is
isolated from the bus lines.
The software programmable output (SWPORT1) can be programmed to operate as a
tuning indicator output. As long as the IC has not completed a tuning action,
pin SWPORT1 remains LOW. The pin becomes HIGH, when a preset or search tuning is
completed or when a band limit is reached.
The reference frequency divider of the synthesizer PLL is changed when the MSB in
byte 5 is set to logic 1. The tuning system can then be clocked via pin XTAL2 at 6.5 MHz.
Product data sheetRev. 05 — 26 January 200711 of 40
NXP Semiconductors
SDA
TEA5767HN
Low-power FM stereo radio for handheld applications
t
f
SCL
t
HD;STA
t
SU;BUSEN
BUSENABLE
tf = fall time of both SDA and SCL signals: 20+ 0.1Cb < tf < 300 ns, where Cb = capacitive load on bus line in pF.
tr = rise time of both SDA and SCL signals: 20 + 0.1Cb < tf < 300 ns, where Cb = capacitive load on bus line in pF.
t
= hold time (repeated) START condition. After this period, the first clock pulse is generated: > 600 ns.
HD;STA
t
= HIGH period of the SCL clock: > 600 ns.
HIGH
t
= LOW period of the SCL clock > 1300 ns.
LOW
t
= set-up time for a repeated START condition: > 600 ns.
SU;STA
t
= data hold time: 300 ns < t
HD;DAT
Remark: 300 ns lower limit is added because the ASIC has no internal hold time for the SDA signal.
t
= data set-up time: t
SU;DAT
t
= set-up time for STOP condition: > 600 ns.
SU;STO
t
= bus free time between a STOP and a START condition: > 600 ns.
BUF
Cb = capacitive load of one bus line: < 400 pF.
t
SU;BUSEN
t
HO;BUSEN
= bus enable set-up time: t
= bus enable hold time: t
Remark: The terms SDA and SCL are the corresponding terms used by the I2C-bus for the DATA and CLOCK signals
respectively.
Fig 6. I2C-bus timing diagram
t
HD;DAT
r
t
HD;DAT
< 900 ns.
t
SU;STA
t
HD;STA
t
> 100 ns. If ASIC is used in a standard mode I2C-bus system, t
SU;BUSEN
HO;BUSEN
> 10 µs.
> 10 µs.
t
LOW
SU;DAT
t
HIGH
SU;DAT
t
t
f
t
SU;STO
SU;DAT
BUF
> 250 ns.
t
HO;BUSEN
001aae349
8.33-wire bus specification
The 3-wire bus controls the write/read, clock and data lines and operates at a maximum
clock frequency of 400 kHz.
Hint: By using the standby bit the IC can be switched into a low current Standby mode. In
Standby mode the IC must be in the WRITE mode. When the IC is switched to READ
mode, during standby, the IC will hold the data line down. The standby current can be
reduced by deactivating the bus interface (pin BUSENABLE LOW). If the bus interface is
deactivated (pin BUSENABLE LOW) without the Standby mode being programmed, the
IC maintains normal operation, but is isolated from the clock and data line.
8.3.1Data transfer
Data sequence: byte 1, byte 2, byte 3, byte 4 and byte 5 (the data transfer has to be in this
order).
Product data sheetRev. 05 — 26 January 200712 of 40
NXP Semiconductors
A positive edge at pin WRITE/READ enables the data transfer into the IC. The data has to
be stable at the positive edge of the clock. Data maychange while the clock is LOW and is
written into the IC on the positive edge of the clock. Data transfer can be stopped after the
transmission of new tuning information with the first two bytes or after each following byte.
A negative edge at pin WRITE/READ enables the data transfer from the IC. The
WRITE/READ pin changes while the clock is LOW. With the negative edge at
pin WRITE/READ the MSB of the first byte occurs at pin DATA.
The bits are shifted on the negative clock edge to pin DATA and can be read on the
positive edge.
To do two consecutive read or write actions, pin WRITE/READ has to be toggled for at
least one clock period. When a search tuning request is sent, the IC autonomously starts
searching the FM band; the search direction and search stop level can be selected. When
a station with a field strength equal to or greater than the stop level is found, the tuning
system stops and the ready flag bit is set to HIGH. When, during search, a band limit is
reached, the tuning system stops at the band limit and the band limit flag bit is set to
HIGH. The ready flag is also set to HIGH in this case.
TEA5767HN
Low-power FM stereo radio for handheld applications
The software programmable output (SWPORT1) can be programmed to operate as a
tuning indicator output. As long as the IC has not completed a tuning action,
pin SWPORT1 remains LOW. The pin becomes HIGH, when a preset or search tuning is
completed or when a band limit is reached.
The reference frequency divider of the synthesizer PLL is changed when the MSB in
byte 5 is set to logic 1. The tuning system can then be clocked via pin XTAL2 at 6.5 MHz.
8.3.2Power-on reset
At Power-on reset the mute is set, all other bits are random. To initialize the IC all bytes
have to be transferred.
Product data sheetRev. 05 — 26 January 200729 of 40
NXP Semiconductors
TEA5767HN
Low-power FM stereo radio for handheld applications
Table 32.Dynamic characteristics
V
CCA=VCCD=VCC(VCO)
For V
the emf value is given; unless otherwise specified.
RF
= 2.7 V; T
…continued
=25°C; AC values given in RMS;
amb
SymbolParameterConditionsMinTypMaxUnit
High cut control
TC
de-em
de-emphasis time
constant
VRF=1mV
data byte 5 bit 6 = 0385062µs
data byte 5 bit 6 = 1577593µs
=1µV
V
RF
data byte 5 bit 6 = 0114150186µs
data byte 5 bit 6 = 1171225279µs
Mono to stereo blend control
α
cs(stereo)
stereo channel separation VRF=45µV; R = L = 0 or
41016dB
R = 0 and L = 1 including 9 %
pilot; ∆f = 75 kHz; f
mod
= 1 kHz;
data byte 3 bit 3 = 0;
data byte 4 bit 1 = 1
Mono to stereo switched
α
cs(stereo)
stereochannel separation
switching from mono to
stereo with increasing RF
input level
R = L = 0 or R = 0 and L = 1
including 9 % pilot;
∆f = 75 kHz; f
mod
= 1 kHz;
data byte 3 bit 3 = 0;
data byte 4 bit 1 = 0
V
= 1 mV24--dB
RF
=20µV--1dB
V
RF
Bus-driven mute functions
Tuning mute
α
mute
V
AFL
and V
AFR
muting
data byte 1 bit 7 = 1--−60dB
depth
V
α
mute(L)
α
mute(R)
muting depthdata byte 3 bit 1 = 1;
AFL
V
muting depthdata byte 3 bit 2 = 1;
AFR
f
= 1 kHz; R
AF
f
= 1 kHz; R
AF
load(L)
load(R)
--−80dB
<30kΩ
--−80dB
<30kΩ
[1] Calculation of this 14-bit word can be done as follows:
formula for high side injection:; formula for low side injection:
where:
N = decimal value of PLL word;
f
= the wanted tuning frequency [Hz];
RF
fIF= the intermediate frequency [Hz] = 225 kHz;
f
= the reference frequency [Hz] = 32.768 kHz for the 32.768 kHz crystal; f
ref
clocked with 6.5 MHz.
Example for receiving a channel at 100 MHz with high side injection:
The PLL word becomes 2FCAh.
[2] VRF in Figure 13 is replaced by V
[3] Low side and high side selectivity can be switched by changing the mixer from high side to low side LO injection.
pulse width for write enable3-wire bus enabled1-µs
pulse width for read enable3-wire bus enabled1-µs
clock set-up time3-wire bus enabled300-ns
read mode data output hold time 3-wire bus enabled10-ns
read mode output delay time3-wire bus enabled-400ns
write mode set-up time3-wire bus enabled100-ns
write mode hold time3-wire bus enabled100-ns
TEA5767HN
Low-power FM stereo radio for handheld applications
-V
CCD
V
CCD
3-wire bus enabled-400kHz
3-wire bus enabled1-µs
3-wire bus enabled1-µs
16. Test information
Table 34.Component list for Figure 1 and Figure 13
ComponentParameterValueTolerance TypeManufacturer
R1resistor with low
temperature coefficient
D1 and D2varicap for VCO tuning--BB202Philips
L1RF band filter coil120 nH±2%Q
L2 and L3VCO coil33 nH±2%Q
XTAL13MHz13 MHz crystal--NX4025GA
C
Product data sheetRev. 05 — 26 January 200733 of 40
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xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
NXP Semiconductors
47 nF47 nF33 nF
LIMDEC2
2928272625
R1
22 nF
V
CCA
4.7 Ω
100 pF
40 Ω
L1
V
RF
27 pF
47 pF
22 µF
4.7 nF
LOOPSW
I
gain
AGND
V
CCA
RFI1
RFGND
RFI2
TAGC
32
33
34
I/Q-MIXER
1st FM
35
36
37
38
39
TUNING SYSTEM
23
CPOUTVCOTANK2 V
39 nF10 nF
10 kΩ
100 kΩ
AGC
VCO
VCOTANK1
D1L3D2
2
N1
L2
GAIN
STABILIZATION
RESONANCE
AMPLIFIER
IF CENTRE
FREQUENCY
ADJUST
programmable divider output
reference frequency divider output
45
CC(VCO)
LIMDEC1 TIFCV
LIMITER
LEVEL
ADC
6789
DGNDCLOCK
12 Ω
V
CCD
47 nF
DEMODULATOR
COUNTER
I
ref
MUX
2
I
C-BUS
AND
3-WIRE BUS
CCD
22 nF
IF
TEA5767HN
PROGRAMMABLE
DATAV
ref
POWER
SUPPLY
SOFTWARE
PORT
pilot
mono
MPXOTMUTE
SOFT
MUTE
MPX
DECODER
1, 10, 20, 21,
30, 31, 40
n.c.
33 nF
V
AFR
242322
SDS
CRYSTAL
OSCILLATOR
mhc284
V
AFL
19
18
17
16
15
14
13
12
11
PILFIL
33 kΩ
PHASEFIL
XTAL2
C
pull
XTAL1
SWPORT2
SWPORT1
BUSENABLE
BUSMODE
WRITE/READ
1 nF
22 nF
22 nF
(1)
10 kΩ
10 kΩ
C
comp
(1)
32.768 kHz
or
13 MHz
V
CCA
Low-power FM stereo radio for handheld applications
TEA5767HN
(1) C
Value of C
comp
must be as close as possible to the value of C
pull
and C
data depends on crystal specification.
pull
Fig 13. Application and test diagram
47 Ω
22 nF
V
CC(VCO)
of the crystal.
load
NXP Semiconductors
Low-power FM stereo radio for handheld applications
17. Package outline
HVQFN40: plastic thermal enhanced very thin quad flat package; no leads;
40 terminals; body 6 x 6 x 0.85 mm
A
D
terminal 1
index area
B
E
TEA5767HN
SOT618-1
A
A
1
detail X
c
e
1
e
1120
L
10
E
h
1
terminal 1
index area
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
Product data sheetRev. 05 — 26 January 200734 of 40
NXP Semiconductors
18. Soldering
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note
soldering description”
18.1Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
18.2Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
TEA5767HN
Low-power FM stereo radio for handheld applications
AN10365 “Surface mount reflow
.
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
• Board specifications, including the board finish, solder masks and vias
• Package footprints, including solder thieves and orientation
• The moisture sensitivity level of the packages
• Package placement
• Inspection and repair
• Lead-free soldering versus PbSn soldering
18.3Wave soldering
Key characteristics in wave soldering are:
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
Product data sheetRev. 05 — 26 January 200735 of 40
NXP Semiconductors
18.4Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
• Solder paste printing issues including smearing, release, and adjusting the process
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
Table 35.SnPb eutectic process (from J-STD-020C)
Package thickness (mm)Package reflow temperature (°C)
< 2.5235220
≥ 2.5220220
TEA5767HN
Low-power FM stereo radio for handheld applications
higher minimum peak temperatures (see Figure 15) than a PbSn process, thus
reducing the process window
window for a mix of large and small components on one board
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough forthe solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 35 and 36
Volume (mm3)
< 350≥ 350
Table 36.Lead-free process (from J-STD-020C)
Package thickness (mm)Package reflow temperature (°C)
Volume (mm3)
< 350350 to 2000> 2000
< 1.6260260260
1.6 to 2.5260250245
> 2.5250245245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 15.
Product data sheetRev. 05 — 26 January 200738 of 40
NXP Semiconductors
20. Legal information
20.1Data sheet status
TEA5767HN
Low-power FM stereo radio for handheld applications
Document status
Objective [short] data sheetDevelopmentThis document contains data from the objective specification for product development.
Preliminary [short] data sheet QualificationThis document contains data from the preliminary specification.
Product [short] data sheetProductionThis document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was publishedand may differin case of multiple devices. The latest product status
information is available on the Internet at URL
[1][2]
Product status
20.2Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included hereinand shall have no liability forthe consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the sameproduct type number(s) and title. A short data sheet is intended
for quickreference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
20.3Disclaimers
General — Information in this document is believed to be accurate and
reliable. However,NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
[3]
http://www.nxp.com.
Definition
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device.Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at
http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyanceor implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
20.4Trademarks
Notice: Allreferenced brands, product names,service namesand trademarks
are the property of their respective owners.
I2C-bus — logo is a trademark of NXP B.V.
21. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.