NSC 5962-8765601SA, 5962-8765601RA, 5962-87656012A Datasheet
54FCT273
Octal D-Type Flip-Flop
General Description
The ’FCT273 has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered
Clock (CP) and Master Reset (MR) inputs load and reset
(clear) all flip-flops simultaneously.
The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s Q output.
All outputs will be forced LOW independently of Clock or
Data inputsby a LOW voltage level on the MR input. The device is usefulfor applicationswhere the true output onlyis required and the Clock and Master Reset are common to all
storage elements.
Features
n Eight edge-triggered D flip-flops
n Buffered common clock
n Buffered, asynchronous Master Reset
n See ’FCT377 for clock enable version
n See ’FCT373 for transparent latch version
n See ’FCT374 for TRI-STATE
®
version
n Output sink capability of 32 mA, source capability of
12 mA
n TTL input and output level compatible
n CMOS power consumption
n Standard Microcircuit Drawing (SMD) 5962-8765601
Ordering Code
Military Package Package Description
Number
54FCT273DMQB J20A 20-Lead Ceramic Dual-In-Line
54FCT273FMQB W20A 20-Lead Cerpack
54FCT273LMQB E20A 20-Lead Ceramic Leadless Chip Carrier, Type C
Connection Diagrams
Pin Description
Names
D
0–D7
Data Inputs
MR
Master Reset
(Active LOW)
CP Clock Pulse Input
(Active Rising Edge)
Q
0–Q7
Data Outputs
TRI-STATE®is a registered trademark of National Semiconductor Corporation.
Pin Assignment for DIP
and Flatpack
DS100956-1
Pin Assignment
for LCC
DS100956-2
August 1998
54FCT273 Octal D-Type Flip-Flop
© 1998 National Semiconductor Corporation DS100956 www.national.com
Truth Table
Mode Select-Function Table
Operating Mode Inputs Output
MR
CP D
n
Q
n
Reset (Clear) L X X L
Load “1” H N h H
Load “0” H N l L
H=HIGH Voltage Level steady state
h=HIGH Voltage Level one setup time prior to the LOW-to-HIGH clock transition
L=LOW Voltage Level steady state
I=LOW Voltage Level one setup time prior to the LOW-to-HIGH clock transition
X=Immaterial
N=LOW-to-HIGH clock transition
Logic Diagram
DS100956-3
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature −65˚C to +150˚C
Ambient Temperature under Bias −55˚C to +125˚C
Junction Temperature under Bias
Ceramic −55˚C to +175˚C
V
CC
Pin Potential to
Ground Pin −0.5V to +7.0V
Input Voltage (Note 2) −0.5V to +7.0V
Input Current (Note 2) −30 mA to +5.0 mA
Voltage Applied to Any Output
in the Disabled or
Power-Off State −0.5V to +4.75V
in the HIGH State −0.5V to V
CC
Current Applied to Output
in LOW State (Max) twice the rated I
OL
(mA)
DC Latchup Source Current −500 mA
(Across Comm Operating Range)
Over Voltage Latchup V
CC
+ 4.5V
Recommended Operating
Conditions
Free Air Ambient Temperature
Military −55˚C to +125˚C
Supply Voltage
Military +4.5V to +5.5V
Note 1: Absolute maximum ratings are valuesbeyond which the device may
be damaged or have its usefullifeimpaired. Functional operation under these
conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol Parameter FCT240
Units V
CC
Conditions
Min Max
V
IH
Input HIGH Voltage 2.0 V Recognized HIGH Signal
V
IL
Input LOW Voltage 0.8 V Recognized LOW Signal
V
CD
Input Clamp Diode Voltage −1.2 V Min I
IN
=
−18 mA
V
OH
Output HIGH
Voltage
54FCT 4.3 V Min I
OH
=
−300 uA
54FCT 2.4 V Min I
OH
=
−12 mA
V
OL
Output LOW
Voltage
54FCT 0.2 V Min I
OL
=
300 µA
54FCT 0.5 V Min I
OL
=
32 mA
I
IH
Input HIGH Current 5 µA Max V
IN
=
5.5V
I
IL
Input LOW Current −5 µA Max V
IN
=
0.0V
I
OS
Output Short-Circuit Current −60 mA Max V
OUT
=
0.0V
I
CCQ
Power Supply Current 1.5 mA Max VIN= 0.2V or VIN= 5.3V
∆I
CC
Power Supply Current 2.0 mA Max VIN= 3.4V
I
CCT
Total Power Supply Current
6.0 mA Max
V
IN
=
3.4V or V
IN
= GND, OE =
GND, fI= 10Mhz, outputs open,
one bit toggling - 50%duty cycle
4.0 mA Max
V
IN
=
5.3V or V
IN
= 0.2V,OE =
GND, fI= 10Mhz, outputs open,
one bit toggling - 50%duty cycle
I
CCD
Dynamic I
CC
0.25 mA/MHz Max
Outputs Open,OE=GND, One Bit
Toggling, 50%Duty Cycle
AC Electrical Characteristics
Symbol Parameter 54FCT Units Fig. No.
T
A
=
−55˚C to +125˚C
V
CC
=
4.5V to 5.5V
C
L
=
50 pF
Min Max
t
PLH
Propagation Delay 2.0 15.0 ns
Figures 2, 5
t
PHL
CP to O
n
2.0 15.0
t
PHL
Propagation Delay 2.0 15.0 ns
Figures 2, 5
MR to O
n
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