Note: In printed manuals all A3 drawings are located at the back of the binder
Issue 2 06/98
Page 3–3
NHA–3
System Module
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Technical Documentation
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Issue 2 06/98
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Technical Documentation
Introduction
The H700 system module controls the operation of the transceiver.
These tasks include UI module control (keyboard, LCD, transducers,
accessory control), and all system signalling, audio processing , and RF
functions.
Technical Specifications
Modes of Operation
The module has 4 basic modes:
– Charging only: The phone is off, the only functions are battery charg-
ing
– Local mode: The phone is under external control via MBUS.
– Standby mode: the phone is ready to receive and make calls.
– Conversation mode: the phone is in a call, all RX and TX paths are ac-
tive.
System Module
External signals and connections.
The module has 2 connections:
– Board to board connector:
X200 44 way connector to the UI module.
– RF antenna connection:
X201 GND clip, X202 ANT clip.
The connectivity, functionality and performance of the board to board
connector is described in the UI module description. The pin numbering is
identical in the UI module and system module.
The performance of the antenna connection is described in the
Performance section
internal Signals
Table 3. Baseband / RF interface signals
Control signalDescription
VBATTBattery supply voltage
GNDBattery ground connection
PACFiltered PWM power control signal for the transmitter
PAENPower amplifier enable
VTXRegulated dc voltage for the low power transmitter stages
TXIIndicates when RF is present at the output of the transmitter
RXENXEnables the LNA, IF buffer ,FMIF and AFC buffer
SYNDATSerial data bus for programming the synthesiser
SYNCLKSerial data clk input for the synthesiser
SYNTHENXEnables UHF VCO/buffer and controls synthesiser power down.
AFCDACVoltage used to control TCXO output frequency
LOCKDETIndicates when synthesisers are in lock
TXMODModulation signal containing AMPS/NAMPS modulation
Technical Documentation
PAMS
REFFREQ VCTCXO output used to provide baseband clock
NEGVCLKRequired for synthesiser voltage doubler
Functional Description
Baseband Circuit Description
General
The audio/logic unit consists of 4 ICs: AMSA system asic D400, MCU
D300, EEPROM D301, and CHAOS2 charger switch asic N200. These
ICs together with the supporting discrete circuitry make up the Baseband
block.
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Technical Documentation
System Module
Baseband Block Diagram
RF
Figure 1. Baseband Block Diagram
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NHA–3
System Module
AMSA System Asic D400
AMSA is a 100pin TQFP mixed signal asic with the following functionality:
– Power–on / reset control, watchdog timer.
– Modem for AMPS/NAMPS
– Audio Processing for AMPS/NAMPS
– PLL and clock generation for BB system (using VTCXO as reference)
– I/O ports, allowing interrupt controlled MCU activity from keyboard and
accessories.
AMSA D400 signals
PAMS
Technical Documentation
pin
Power up / Reset /Clock generation signals
2LowbattRstXLow battery reset input
3OnRstXPLL–on reset delay input.
73PwrKeyXPower key input for power on only
74ChrgDetCharger detection input for power on only.
76RegenVRX regulator and MCU enable.
20MCUClk4.8MHz MCU clock output
98BBRstXMCU reset
4NegVClk320kHz clock for RF voltage doubler.
5LCDClk160kHz LCD clock output
92,93PLLRC1,2PLLRC filter connection for the 19.2Mhz AMSA PLL.
95TCXOexternal 14.85MHz reference input for AMSA PLL
100XInTied to GND, selects internal PLL.
AMSA / MCU interface
22 – 29D7 – D0Data bus
31 – 36A0 – A5AMSA Address bus
53AFCDACDAC output controlling VTCXO frequency
89IF450kHz 2nd IF counter input.
97SYNTHENXSynth power enable (used for RX part in H700)
75RXENXRX power enable (used for VCO supply enable in H700)
81FMENPLL PM modulation enable, for blocked channel elimination.
83LNABOOSTOpen drain linearises the LNA in transmit mode
84VTXENVTX enable signal
85FSELAMPS/NAMPS filter selection
87P AENTransmit PA enable signal
labelFunction
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Technical Documentation
pinFunctionlabel
UI / accessory control signals
7 (not used)
8 (not used)
9ReqAAudio request accessory interrupt.
10MBUS_AMSAMBUS detection produces an interupt
13LCDRstXLCD reset signal
55TxVMidDC bias for TX path. Decoupled to GND
58XMicAccessory microphone audio input
59BMic2Internal microphone dc bias voltage.
60BMic1Headset dc bias / handsfree mute voltage.
61CMicdecoupling pin for BMiC
63Mic2Internal microphone audio input.
64Mic1Headset microphone audio input.
65, 68MicGain 1 , 2Mic amplifier gain feedback path
51, 69STI,STOsidetone signal path
71TxOTransmit modulation audio output to RF
82BMicDisDischarge for BMic1 capacitor.
System Module
Microcontroller D300
This 80pin QFP MCU has the following features: internal ROM with code
protection, RAM, 8 channel 10bit A–D converter, Serial interface, and 6
configuarable I/0 ports.
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System Module
Microcontroller D300 signals
PAMS
Technical Documentation
pin
1PACTX power control
3BuzzPWMBuzzer signal to UI PCB
7ChrgMonPullChrgMon adjustment (high Z in reset, logic 0 when MCU
9TxDMBUS transmit serial data
10RxDMBUS receive serial data
13 – 20D0 – D7AMSA data bus
22 – 27A0 – A5AMSA address bus
37IntEarEnInternal earpiece driver enable
39RdXAMSA read control line
40WrXAMSA write control line
41CSAMSA chip select
59RFTEMPRF temperature monitor
60RSSISignal strength indication
61TXITransmit Indicator
62BTempBattery temperature
63BSIBattery size indication
64AccIDAccessory ID A–D input connected to ReqA
65ChrgMonCharger voltage monitor
66BattMonBattery voltage monitor
70IntXAMSA interrupt
72LOCKDETSynth lock detect
73SYNCLKSynth Control, clock
74SYNDATSynth Control, data
75ChrgCrtlELVI fast charger control (32Hz)
76SYNDATENXSynth Control, enable
77VIBRAVibration alert enable (10kHz), multiplexed onto BTEMP
78SDAI2C Bus, data,
79ChrgSWCharger switch control for Chaos2
80SCLI2C Bus, clock
labelFunction
running.)
LCDDCSerial LCD driver data or command.
LCDSDASerial LCD driver data
LCDSDCLKSerial LCD driver data clock
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Technical Documentation
EEPROM D301
This memory device contains non–volatile memory used to store user
defined memory locations, subscriber information, phone tuning data, and
production and service data. ESN is stored in protected one time
programmable section. Bi–directional communication is by serial I
to the MCU.
Regulation
There are 3 regulators producing the baseband and RF supplies. The
nominal voltage is 2.9V +/–0.1 for each regulator:
– Baseband regulator, N201, is the baseband supply from which VL, VA,
VPLL,and VBB is derived.
N201 is enabled by voltage detector N202, when VBATT is of a sufficient voltage to guarantee a valid baseband supply. If VBATT falls below the detector threshold, N200 will turn off the baseband supply and
put the phone into reset.
– VRX regulator, N203, is the supply for the RF receive section.
It is enabled by RegEn signal from AMSA’s power up block.
System Module
2
C bus
– VTX regulator , the supply for the low power RF TX section, is made
by discrete dual transistors V200, V201, and uses VRX as it’s reference.
It is enabled by software whenever the transmit path is required.
CHAOS2 asic N200 and charging control
CHAOS2 is basically an analog switch controlled by software, with some
additional integrated protection and start–up mechanisms.
When a charger is connected, CHAOS2 provides a start–up current of
60mA (nom) to VBATT, up to 4.0V(max). When SW recognises the
charger via ChrgMon A–D input on the MCU, it takes over control of the
charger current flow to the battery by controlling Chaos2 with the ChrgSW
signal.
ChrgMon has two ranges controlled by open drain ChrgMonAdj signal:
ChrgMonAdj=0 is the default. ChrgMonAdj = open is only used when
sensing current across CHAOS2 when using the 3 wire ELVI fast
chargers.
When phone is in reset, ChrgMonPull is high impedance to ensure there is
sufficient voltage on ChrgMon at AMSA pin74 to wake up the phone.
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RF Circuit Description
PAMS
Technical Documentation
Power
Control
90MHz
VHF VCO
TXIF
Loop Filter
824 – 849 MHz
TXDUPI
Power
coupler
TXPAO
PA
TXPAI
Tx Filter
TXBO
824 – 849 MHz
TXMO
TXLO
Tx Mixer
Tx & Rx Synthesizer
VRXSYN
TXDUPO
4–pole
Duplexer
914 – 939MHz
UHF VCO
4–pole
4–pole
VRXVCO
PTXANT
869 – 894 MHz
PRXLO
LPF
LNA
Interstage
Filter
Rx Mixer
44.55MHz
X3
SAW
IF AMP
First IF Filter 45MHz
450KHz
FM IF Processor
AMPS NAMPS
GND
VBATT
PAEN
Page 3–12
VTX
VTCXO
14.85MHz
TXI
PAC
NEGVCLOCK
TXMOD
LOCKDET
SYNCLK
SYNDATENX
SYNDAT
REFFREQ
AFCDAC
SYNTHENX
RSSI
IF2
RXAF
RTEMP
FSEL
VRX
RXENX
LNABOOST
Figure 2. RF Block Diagram
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Technical Documentation
Receiver
The receiver is a dual–conversion super–heterodyne using two
intermediate frequencies, 45 MHz and 450 kHz. The design implements
the necessary filtering and control required for NAMPS operation although
these components will not be fitted in AMPS only modules.
The RF signal from the duplexer RX port (via an additional low pass filter)
is applied to the RF amplifier. The amplifier is realized with transistor V10.
Amplifier stage input matching is accomplished with Z20 and Z23. R49,
R53, R47 and R52 are used for biasing. Output matching is carried out by
Z13 and Z14, R48 provides wideband stability. Components C86, and C85
are used for RF bypassing.
There is additional circuitry, R59 and C91, to boost the LNA current in Tx
mode.
Next the signal is filtered with Z17. The filter is followed by a single
balanced diode mixer, realized with a printed balun, C82, C83 and V9.
System Module
After the mixer the 45MHz IF signal is amplified with V11. The input
matching is realized with L7, C96, C102 and L9 which also forms a
22.5MHz notch. The purpose of this notch is to effectively improve the
IIP2 performance of the amplifier with respect to the half IF. The Output
matching is formed by L8, R44, C90 and C89.
After the IF amplifier the 45 MHz IF signal is filtered with crystal filter Z18.
Output matching is provided by R55 and dc blocked by C94.
The second mixer, the LO buffer transistor, IF amplifier and quadrature
detector are all integrated in the circuit N5. The second LO frequency,
44.55 MHz, is the third harmonic of the VCTXO frequency. The LO signal
is realized with tank circuit C81, C84 and L6. After the mixer the 450kHz
IF signal is filtered with ceramic filters Z22 (NAMPS) or Z11
(AMPS/NAMPS). Selection is made using an integrated switch N4. The IF
amplifier output signal is phase shifted by resonance circuit C99, C87,
R51 and L5. After this the signal is fed to a quadrature detector, this
multiplies the phase shifted signal with the original limited 450KHz IF.
The output of the limited 450KHz IF is buffered using V12 and associated
components. This is used for AFC.
Signal DAF is low pass filtered by R63 and C106. The DAF, RSSI and 2nd
IF signal (450 kHz) are fed to the AMSA ASIC.
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System Module
Rx Synthesizer
The UHF LO signal is generated by a digital phase locked loop (PLL). The
output frequency of the loop is obtained from a voltage–controlled
oscillator (VCO). The loop gain, and hence the bandwidth, of the PLL
can be varied by data word programming. The VCO output signal is
sufficiently high enough to drive the receiver mixer. The injection level
required by the receiver mixer is about +2 dBm. In addition, the signal
from the VCO is fed to the synthesizer input and the transmit mixer LO
port.
The overall division ratio of the chain is selected within the synthesizer
according to the desired channel.
The internal dividers of the dual synthesizer are programmed serially on
the SDATA (synthesizer data) line from the processor into an internal shift
register also located in the synthesizer. Data transfer is timed with SCLK
clock pulses.
PAMS
Technical Documentation
The divided frequency is compared with a highly stable reference
frequency by a phase comparator in the PLL circuit. The phase
comparator controls the VCO frequency by means of a DC voltage
through the loop filter so as to keep the divided frequency applied to the
phase comparator equal to the fixed reference frequency.
The reference frequency is 10 kHz for both transmit and receive
synthesizers. This reference frequency is obtained from voltage controlled
crystal oscillator (VCXO). Oscillator frequency is 14.85 MHz. The VCXO
frequency is divided by 1485.
Rx Loop Filter
Phase comparator output is pin 3. If the VCO frequency is too high, the
output goes low and discharges the integrator capacitor C30. After this,
the DC control voltage and the VCO frequency will decrease.
If the VCO frequency is too low, the output goes high and charges the
integrator capacitor C30. Thereafter the DC control voltage and the VCO
frequency will go up.
Output pulses from the phase detector have to be supplied to the loop
filter. The function of the integrator is to convert positive and negative
pulses to a steady DC voltage. The remaining ripple and AC components
are filtered in the lowpass filter.
Rx VCO
Page 3–14
The VCO (circuit ref. G2) produces a level of +2 dBm level to the first Rx
mixer and delivers about –10dBm to both the synthesiser and the Tx
mixer.
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Technical Documentation
Tx Synthesizer
The transmitter synthesizer generates a frequency modulated 90 MHz
fixed frequency signal for the transmitter section. The final output
frequency is generated by mixing the Rx LO with 90 MHz and extracting
the lower sideband.
The TX offset synthesizer consists of a 90 MHz PLL circuit, passive loop
filter and a 90 MHz VCO equipped with a chip coil resonator. The
bandwidth of the PLL can be varied by data word programming.
Modulation is brought to the VCO and applied to the opposite end of the
varactor.
See later for description of modulation filters.
TX VCO
The VCO is a Clapp type oscillator. The oscillator’s resonance frequency
is determined by a standard parallel LC tank circuit. The centre frequency
of the resonance circuit is adjustable only by use of the PLL and contains
no alignment. The VCO signal is fed directly to the prescaler and to the Tx
mixer.
System Module
Tx Loop Filter
Output current pulses from the phase detector are supplied to the loop
filter. These are then integrated, which converts positive and negative
current pulses to a DC voltage. The remaining ripple is filtered in the
low–pass filter accomplished with passive resistors and capacitors.
Transmitter
The modulated signal from the transmit mixer is applied to the input of
the transmit mixer buffer. This stage requires high gain and linearity, it’s
function is to amplify the transmit signal up to the required drive level for
the power amplifier.
The buffer must have good linearity to prevent the generation of
intermodulation products. The input of the amplifier is matched to the
mixer output impedance with the output of the amplifier directly matched
to 50 Ohms. The buffer is switched ON with the power amplifier enable
control signal.
The output of the transmit mixer buffer then passes through a SAW filter .
The filter is used to reduce the level of unwanted spurii and transmitter
noise due to the Tx mixer buffer, mixer and oscillator circuits. The output
of the filter drives directly into the PA MMIC.
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System Module
The power amplifier is an integrated 2 stage RF gain block using GaAs
technology. The device is capable of +31.5dBm output power at 3.6V with
a minimum of 50% efficiency. Output power control is achieved by varying
the voltage on the VPC input. Internally VPC sets the bias to both stages
in the MMIC. There is no negative voltage required with this device.
ALC is used to maintain the power output over frequency, temperature
and battery voltage variation. The RF is detected via directional coupler
and Schottky diode. Rectified RF is compared with a filtered PWM
reference from baseband. This provides an error signal used to control a
series PNP transistor connected between VBATT and VPC.
The PWM signal must be filtered to prevent the generation of AM
sidebands. This filtering must be sufficient to reduce the sidebands and
also meet the power level switching time specification.
A TXI signal is used to prevent false transmissions. This signal is
monitored by the microprocessor and if the level is not appropriate for the
status of the transmitter, the PA is disabled.
PAMS
Technical Documentation
AFC Function
The transceiver unit is equipped with AFC function, i.e. it uses the
incoming receive signal from base station as a frequency reference. The
control loop consists of the receiver, the IF counter and an 8–bit D/A
converter in the AMSA ASIC and the VTCXO, which is used as a
reference oscillator of the synthesizer.
The 2nd IF signal (450 kHz) from the receiver is fed to AMSA. The IF
counter counts the received frequency. If the frequency differs from the
programmed value, the CPU adjusts the frequency of the VTCXO by
changing the output voltage of the D/A converter. This adjustment
continues until the desired receive frequency is achieved. AFC is not
active during a channel scan.
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Technical Documentation
Parts List
Amps System Module Authenticated
p.n 0200756 EDMS issue 11.11 PCB version 10.1
ItemCodeDescriptionValueType
R0011430710Chip resistor22 5 % 0.063 W 0402
R0021430778Chip resistor10 k5 % 0.063 W 0402
R0031430778Chip resistor10 k5 % 0.063 W 0402
R0041430758Chip resistor1.5 k5 % 0.063 W 0402
R0051430770Chip resistor4.7 k5 % 0.063 W 0402
R0061430762Chip resistor2.2 k5 % 0.063 W 0402
R0071430754Chip resistor1.0 k5 % 0.063 W 0402
R0081430718Chip resistor47 5 % 0.063 W 0402
R0091430796Chip resistor47 k5 % 0.063 W 0402
R0101430796Chip resistor47 k5 % 0.063 W 0402
R0111430804Chip resistor100 k5 % 0.063 W 0402
R0121430772Chip resistor5.6 k5 % 0.063 W 0402
R0131430770Chip resistor4.7 k5 % 0.063 W 0402
R0141430718Chip resistor47 5 % 0.063 W 0402
R0151430796Chip resistor47 k5 % 0.063 W 0402
R0161430772Chip resistor5.6 k5 % 0.063 W 0402
R0171430710Chip resistor22 5 % 0.063 W 0402
R0181430784Chip resistor15 k5 % 0.063 W 0402
R0191430700Chip resistor10 5 % 0.063 W 0402
R0201430744Chip resistor470 5 % 0.063 W 0402
R0221430796Chip resistor47 k5 % 0.063 W 0402
R0231430778Chip resistor10 k5 % 0.063 W 0402
R0251430710Chip resistor22 5 % 0.063 W 0402
R0261430762Chip resistor2.2 k5 % 0.063 W 0402
R0281430742Chip resistor390 5 % 0.063 W 0402
R0291430690Chip jumper0402
R0301430814Chip resistor270 k5 % 0.063 W 0402
R0321430758Chip resistor1.5 k5 % 0.063 W 0402
R0331430758Chip resistor1.5 k5 % 0.063 W 0402
R0341430754Chip resistor1.0 k5 % 0.063 W 0402
R0351430788Chip resistor22 k5 % 0.063 W 0402
R0371430714Chip resistor33 5 % 0.063 W 0402
R0381430714Chip resistor33 5 % 0.063 W 0402
R0391430760Chip resistor1.8 k5 % 0.063 W 0402
R0401430754Chip resistor1.0 k5 % 0.063 W 0402
R0421430710Chip resistor22 5 % 0.063 W 0402
R0441430742Chip resistor390 5 % 0.063 W 0402
System Module
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NHA–3
System Module
R0461430778Chip resistor10 k5 % 0.063 W 0402
R0471430732Chip resistor180 5 % 0.063 W 0402
R0481430734Chip resistor220 5 % 0.063 W 0402
R0491430772Chip resistor5.6 k5 % 0.063 W 0402
R0501430720Chip resistor56 5 % 0.063 W 0402
R0511430772Chip resistor5.6 k5 % 0.063 W 0402
R0521430762Chip resistor2.2 k5 % 0.063 W 0402
R0531430776Chip resistor8.2 k5 % 0.063 W 0402
R0541430700Chip resistor10 5 % 0.063 W 0402
R0551430760Chip resistor1.8 k5 % 0.063 W 0402
R0561430758Chip resistor1.5 k5 % 0.063 W 0402
R0571430784Chip resistor15 k5 % 0.063 W 0402
R0581430758Chip resistor1.5 k5 % 0.063 W 0402
R0591430770Chip resistor4.7 k5 % 0.063 W 0402
R0611430726Chip resistor100 5 % 0.063 W 0402
R0621430832Chip resistor2.7 k5 % 0.063 W 0402
R0631430770Chip resistor4.7 k5 % 0.063 W 0402
R0641430778Chip resistor10 k5 % 0.063 W 0402
R0671430718Chip resistor47 5 % 0.063 W 0402
R0681430700Chip resistor10 5 % 0.063 W 0402
R0691430151Chip resistor10 5 % 0.063 W 0603
R0701430730Chip resistor150 5 % 0.063 W 0402
R0731430738Chip resistor270 5 % 0.063 W 0402
R0741430754Chip resistor1.0 k5 % 0.063 W 0402
R0751430690Chip jumper0402
R2001430800Chip resistor68 k5 % 0.063 W 0402
R2011430814Chip resistor270 k5 % 0.063 W 0402
R2021430810Chip resistor180 k5 % 0.063 W 0402
R2031430814Chip resistor270 k5 % 0.063 W 0402
R2041430810Chip resistor180 k5 % 0.063 W 0402
R2061430804Chip resistor100 k5 % 0.063 W 0402
R2071430788Chip resistor22 k5 % 0.063 W 0402
R2101430762Chip resistor2.2 k5 % 0.063 W 0402
R3011430778Chip resistor10 k5 % 0.063 W 0402
R3021430796Chip resistor47 k5 % 0.063 W 0402
R3031430796Chip resistor47 k5 % 0.063 W 0402
R3041430754Chip resistor1.0 k5 % 0.063 W 0402
R3051430778Chip resistor10 k5 % 0.063 W 0402
R3061430778Chip resistor10 k5 % 0.063 W 0402
R3071430796Chip resistor47 k5 % 0.063 W 0402
R3081430796Chip resistor47 k5 % 0.063 W 0402
R3091430796Chip resistor47 k5 % 0.063 W 0402
R3101430796Chip resistor47 k5 % 0.063 W 0402
Technical Documentation
PAMS
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PAMS
NHA–3
Technical Documentation
R3111430788Chip resistor22 k5 % 0.063 W 0402
R3131430778Chip resistor10 k5 % 0.063 W 0402
R4001430778Chip resistor10 k5 % 0.063 W 0402
R4011430776Chip resistor8.2 k5 % 0.063 W 0402
R4031430788Chip resistor22 k5 % 0.063 W 0402
R4051430804Chip resistor100 k5 % 0.063 W 0402
R4061430786Chip resistor18 k5 % 0.063 W 0402
R4071430810Chip resistor180 k5 % 0.063 W 0402
R4081430726Chip resistor100 5 % 0.063 W 0402
R4091430814Chip resistor270 k5 % 0.063 W 0402
R4101430762Chip resistor2.2 k5 % 0.063 W 0402
R4111430762Chip resistor2.2 k5 % 0.063 W 0402
R4121430814Chip resistor270 k5 % 0.063 W 0402
R4131430796Chip resistor47 k5 % 0.063 W 0402
R4161430804Chip resistor100 k5 % 0.063 W 0402
R4171430796Chip resistor47 k5 % 0.063 W 0402
R4181430762Chip resistor2.2 k5 % 0.063 W 0402
C0012320552Ceramic cap.47 p5 % 50 V 0402
C0022312410Ceramic cap.1.0 u10 % 16 V 1206
C0032320620Ceramic cap.10 n5 % 16 V 0402
C0042320552Ceramic cap.47 p5 % 50 V 0402
C0052320620Ceramic cap.10 n5 % 16 V 0402
C0062320552Ceramic cap.47 p5 % 50 V 0402
C0072320620Ceramic cap.10 n5 % 16 V 0402
C0092320620Ceramic cap.10 n5 % 16 V 0402
C0102320620Ceramic cap.10 n5 % 16 V 0402
C0112320534Ceramic cap.8.2 p0.25 % 50 V 0402
C0122312410Ceramic cap.1.0 u10 % 16 V 1206
C0132320552Ceramic cap.47 p5 % 50 V 0402
C0142320552Ceramic cap.47 p5 % 50 V 0402
C0152320781Ceramic cap.47 n20 % 16 V 0603
C0162320602Ceramic cap.4.7 p0.25 % 50 V 0402
C0172320530Ceramic cap.5.6 p0.25 % 50 V 0402
C0182320552Ceramic cap.47 p5 % 50 V 0402
C0192320552Ceramic cap.47 p5 % 50 V 0402
C0202320534Ceramic cap.8.2 p0.25 % 50 V 0402
C0212611668Tantalum cap.4.7 u20 % 10 V 3.2x1.6x1.6
C0222320552Ceramic cap.47 p5 % 50 V 0402
C0232320602Ceramic cap.4.7 p0.25 % 50 V 0402
C0242320781Ceramic cap.47 n20 % 16 V 0603
C0252320546Ceramic cap.27 p5 % 50 V 0402
C0262320552Ceramic cap.47 p5 % 50 V 0402
C0292310011Ceramic cap.150 n10 % 16 V 0805
System Module
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NHA–3
System Module
C0302320109Ceramic cap.15 n5 % 25 V 0603
C0322320109Ceramic cap.15 n5 % 25 V 0603
C0332320520Ceramic cap.2.2 p0.25 % 50 V 0402
C0352611668Tantalum cap.4.7 u20 % 10 V 3.2x1.6x1.6
C0382320618Ceramic cap.4.7 n5 % 25 V 0402
C0392320552Ceramic cap.47 p5 % 50 V 0402
C0422320779Ceramic cap.100 n10 % 16 V 0603
C0432320538Ceramic cap.12 p5 % 50 V 0402
C0452320546Ceramic cap.27 p5 % 50 V 0402
C0462320779Ceramic cap.100 n10 % 16 V 0603
C0472610017Tantalum cap.33 u20 % 10 V 6.0x3.2x2.5
C0482320544Ceramic cap.22 p5 % 50 V 0402
C0502320620Ceramic cap.10 n5 % 16 V 0402
C0522320552Ceramic cap.47 p5 % 50 V 0402
C0532320544Ceramic cap.22 p5 % 50 V 0402
C0542320560Ceramic cap.100 p5 % 50 V 0402
C0552320620Ceramic cap.10 n5 % 16 V 0402
C0562320544Ceramic cap.22 p5 % 50 V 0402
C0572320602Ceramic cap.4.7 p0.25 % 50 V 0402
C0582320744Ceramic cap.1.0 n10 % 50 V 0402
C0602320618Ceramic cap.4.7 n5 % 25 V 0402
C0612610003Tantalum cap.10 u20 % 10 V 3.2x1.6x1.6
C0622611668Tantalum cap.4.7 u20 % 10 V 3.2x1.6x1.6
C0632320544Ceramic cap.22 p5 % 50 V 0402
C0642320620Ceramic cap.10 n5 % 16 V 0402
C0652320550Ceramic cap.39 p5 % 50 V 0402
C0672320540Ceramic cap.15 p5 % 50 V 0402
C0702320781Ceramic cap.47 n20 % 16 V 0603
C0722320546Ceramic cap.27 p5 % 50 V 0402
C0742320781Ceramic cap.47 n20 % 16 V 0603
C0752320620Ceramic cap.10 n5 % 16 V 0402
C0762320620Ceramic cap.10 n5 % 16 V 0402
C0792320620Ceramic cap.10 n5 % 16 V 0402
C0802320540Ceramic cap.15 p5 % 50 V 0402
C0812320570Ceramic cap.270 p5 % 50 V 0402
C0822320526Ceramic cap.3.9 p0.25 % 50 V 0402
C0832320151Ceramic cap.50 V 0402
C0842320546Ceramic cap.27 p5 % 50 V 0402
C0852320556Ceramic cap.68 p5 % 50 V 0402
C0862320744Ceramic cap.1.0 n10 % 50 V 0402
C0872310490Ceramic cap.360 p2 % 50 V 0805
C0882320534Ceramic cap.8.2 p0.25 % 50 V 0402
C0892320534Ceramic cap.8.2 p0.25 % 50 V 0402
Technical Documentation
PAMS
Page 3–20
Issue 2 06/98
PAMS
NHA–3
Technical Documentation
C0902320548Ceramic cap.33 p5 % 50 V 0402
C0912320546Ceramic cap.27 p5 % 50 V 0402
C0922320514Ceramic cap.1.2 p0.25 % 50 V 0402
C0932320781Ceramic cap.47 n20 % 16 V 0603
C0942320620Ceramic cap.10 n5 % 16 V 0402
C0952320620Ceramic cap.10 n5 % 16 V 0402
C0962320584Ceramic cap.1.0 n5 % 50 V 0402
C0972320522Ceramic cap.2.7 p0.25 % 50 V 0402
C0992320548Ceramic cap.33 p5 % 50 V 0402
C1002320618Ceramic cap.4.7 n5 % 25 V 0402
C1012320546Ceramic cap.27 p5 % 50 V 0402
C1022320564Ceramic cap.150 p5 % 50 V 0402
C1032320522Ceramic cap.2.7 p0.25 % 50 V 0402
C1042312410Ceramic cap.1.0 u10 % 16 V 1206
C1052320546Ceramic cap.27 p5 % 50 V 0402
C1062320584Ceramic cap.1.0 n5 % 50 V 0402
C1072312293Ceramic cap.Y5 V 1206
C1082611668Tantalum cap.4.7 u20 % 10 V 3.2x1.6x1.6
C1152320620Ceramic cap.10 n5 % 16 V 0402
C1162320546Ceramic cap.27 p5 % 50 V 0402
C1172320546Ceramic cap.27 p5 % 50 V 0402
C1182320546Ceramic cap.27 p5 % 50 V 0402
C2002312296Ceramic cap.Y5 V 1210
C2012611668Tantalum cap.4.7 u20 % 10 V 3.2x1.6x1.6
C2032320620Ceramic cap.10 n5 % 16 V 0402
C2052611668Tantalum cap.4.7 u20 % 10 V 3.2x1.6x1.6
C2062320620Ceramic cap.10 n5 % 16 V 0402
C2072611668Tantalum cap.4.7 u20 % 10 V 3.2x1.6x1.6
C2082312292Ceramic cap.470 n20 % Y5 V 1210
C2092320546Ceramic cap.27 p5 % 50 V 0402
C3002320620Ceramic cap.10 n5 % 16 V 0402
C3012320620Ceramic cap.10 n5 % 16 V 0402
C3022320781Ceramic cap.47 n20 % 16 V 0603
C3042320620Ceramic cap.10 n5 % 16 V 0402
C3052320620Ceramic cap.10 n5 % 16 V 0402
C3062320620Ceramic cap.10 n5 % 16 V 0402
C4012320779Ceramic cap.100 n10 % 16 V 0603
C4022320781Ceramic cap.47 n20 % 16 V 0603
C4032320620Ceramic cap.10 n5 % 16 V 0402
C4042320781Ceramic cap.47 n20 % 16 V 0603
C4052320781Ceramic cap.47 n20 % 16 V 0603
C4062320781Ceramic cap.47 n20 % 16 V 0603
C4072320781Ceramic cap.47 n20 % 16 V 0603