Note: In printed manuals all A3 drawings are located at the back of the binder
Issue 2 06/98
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NHA–3
System Module
PAMS
Technical Documentation
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Issue 2 06/98
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Technical Documentation
Introduction
The H700 system module controls the operation of the transceiver.
These tasks include UI module control (keyboard, LCD, transducers,
accessory control), and all system signalling, audio processing , and RF
functions.
Technical Specifications
Modes of Operation
The module has 4 basic modes:
– Charging only: The phone is off, the only functions are battery charg-
ing
– Local mode: The phone is under external control via MBUS.
– Standby mode: the phone is ready to receive and make calls.
– Conversation mode: the phone is in a call, all RX and TX paths are ac-
tive.
System Module
External signals and connections.
The module has 2 connections:
– Board to board connector:
X200 44 way connector to the UI module.
– RF antenna connection:
X201 GND clip, X202 ANT clip.
The connectivity, functionality and performance of the board to board
connector is described in the UI module description. The pin numbering is
identical in the UI module and system module.
The performance of the antenna connection is described in the
Performance section
internal Signals
Table 3. Baseband / RF interface signals
Control signalDescription
VBATTBattery supply voltage
GNDBattery ground connection
PACFiltered PWM power control signal for the transmitter
PAENPower amplifier enable
VTXRegulated dc voltage for the low power transmitter stages
TXIIndicates when RF is present at the output of the transmitter
RXENXEnables the LNA, IF buffer ,FMIF and AFC buffer
SYNDATSerial data bus for programming the synthesiser
SYNCLKSerial data clk input for the synthesiser
SYNTHENXEnables UHF VCO/buffer and controls synthesiser power down.
AFCDACVoltage used to control TCXO output frequency
LOCKDETIndicates when synthesisers are in lock
TXMODModulation signal containing AMPS/NAMPS modulation
Technical Documentation
PAMS
REFFREQ VCTCXO output used to provide baseband clock
NEGVCLKRequired for synthesiser voltage doubler
Functional Description
Baseband Circuit Description
General
The audio/logic unit consists of 4 ICs: AMSA system asic D400, MCU
D300, EEPROM D301, and CHAOS2 charger switch asic N200. These
ICs together with the supporting discrete circuitry make up the Baseband
block.
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System Module
Baseband Block Diagram
RF
Figure 1. Baseband Block Diagram
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System Module
AMSA System Asic D400
AMSA is a 100pin TQFP mixed signal asic with the following functionality:
– Power–on / reset control, watchdog timer.
– Modem for AMPS/NAMPS
– Audio Processing for AMPS/NAMPS
– PLL and clock generation for BB system (using VTCXO as reference)
– I/O ports, allowing interrupt controlled MCU activity from keyboard and
accessories.
AMSA D400 signals
PAMS
Technical Documentation
pin
Power up / Reset /Clock generation signals
2LowbattRstXLow battery reset input
3OnRstXPLL–on reset delay input.
73PwrKeyXPower key input for power on only
74ChrgDetCharger detection input for power on only.
76RegenVRX regulator and MCU enable.
20MCUClk4.8MHz MCU clock output
98BBRstXMCU reset
4NegVClk320kHz clock for RF voltage doubler.
5LCDClk160kHz LCD clock output
92,93PLLRC1,2PLLRC filter connection for the 19.2Mhz AMSA PLL.
95TCXOexternal 14.85MHz reference input for AMSA PLL
100XInTied to GND, selects internal PLL.
AMSA / MCU interface
22 – 29D7 – D0Data bus
31 – 36A0 – A5AMSA Address bus
53AFCDACDAC output controlling VTCXO frequency
89IF450kHz 2nd IF counter input.
97SYNTHENXSynth power enable (used for RX part in H700)
75RXENXRX power enable (used for VCO supply enable in H700)
81FMENPLL PM modulation enable, for blocked channel elimination.
83LNABOOSTOpen drain linearises the LNA in transmit mode
84VTXENVTX enable signal
85FSELAMPS/NAMPS filter selection
87P AENTransmit PA enable signal
labelFunction
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pinFunctionlabel
UI / accessory control signals
7 (not used)
8 (not used)
9ReqAAudio request accessory interrupt.
10MBUS_AMSAMBUS detection produces an interupt
13LCDRstXLCD reset signal
55TxVMidDC bias for TX path. Decoupled to GND
58XMicAccessory microphone audio input
59BMic2Internal microphone dc bias voltage.
60BMic1Headset dc bias / handsfree mute voltage.
61CMicdecoupling pin for BMiC
63Mic2Internal microphone audio input.
64Mic1Headset microphone audio input.
65, 68MicGain 1 , 2Mic amplifier gain feedback path
51, 69STI,STOsidetone signal path
71TxOTransmit modulation audio output to RF
82BMicDisDischarge for BMic1 capacitor.
System Module
Microcontroller D300
This 80pin QFP MCU has the following features: internal ROM with code
protection, RAM, 8 channel 10bit A–D converter, Serial interface, and 6
configuarable I/0 ports.
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Microcontroller D300 signals
PAMS
Technical Documentation
pin
1PACTX power control
3BuzzPWMBuzzer signal to UI PCB
7ChrgMonPullChrgMon adjustment (high Z in reset, logic 0 when MCU
9TxDMBUS transmit serial data
10RxDMBUS receive serial data
13 – 20D0 – D7AMSA data bus
22 – 27A0 – A5AMSA address bus