NEC UPG174TA-E3, UPG174TA Datasheet
DATA SHEET
GaAs INTEGRATED CIRCUIT
PG174TA
µµµµ
L-BAND PA DRIVER AMPLIFIER
DESCRIPTION
The µPG174TA is L-Band PA driver amplifier developed for digital cellular telephone and PCS applications. This
device feature high output power and low distortion with 2.8 V low voltage and 35 mA low current operation. It is
housed in a very small 6-pin minimold package available on tape-and-reel and easy to install and contributes to
miniaturizing the systems.
FEATURES
DD
Low operation voltage : V
y
Low distortion : P
y
Off-chip input and output matching
Low operation current : IDD = 35 mA TYP. @ VDD = 2.8 V, fRF = 1 429 to 1 453 MHz, P
y
Off-chip input and output matching
6-pin minimold package
y
= 2.8 V
adj1
= –60 dBc TYP. @ VDD = 2.8 V, fRF = 1 429 to 1 453 MHz, P
out
= +10 dBm
out
= +10 dBm
APPLICATION
Digital Cellular: PDC1.5G, DCS1800, PCS, etc.
y
ORDERING INFORMATION
Part Number Package Supplying Form
µ
PG174TA-E3 6-pin minimold
Remark
To order evaluation samples, please contact your local NEC sales office. (Part number for sample order:
PG174TA)
µ
Carrier tape width is 8 mm.
Qty 3kp/reel.
ABSOLUTE MAXIMUM RATINGS (TA = +25°C)
Parameters Symbol Ratings Unit
Supply Voltage V
Input Power P
Total Power Dissipat i on P
Operating Ambient Temperature T
Storage Temperature T
Mounted on a 50 × 50 × 1.6 mm double copper clad epoxy glass PWB, T
Note
DD
in
tot
A
stg
6.0 V
–10 dBm
Note
170
–30 to +90 °C
–35 to +150 °C
mW
A
= +85°C
Caution The IC must be handled with care to prevent static discharge because its circuit composed of
GaAs HJ-FET.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P13230EJ2V0DS00 (2nd edition)
Date Published January 2000 N CP(K)
Printed in Japan
The mark shows major revised points.
©
1998, 2000
PIN CONNECTION AND INTERNAL BLOCK DIAGRAM
(Top View)
3
2
1
4
5
G1D
6
(Bottom View)
4
5
6
3
3
2
1
2
1
RECOMMENDED OPERATING CONDITIONS (TA = +25°C)
Parameters Symbol MIN. TYP. MAX. Unit
µµµµ
PG174TA
Pin No. Connection
4
5
6
1GND
2GND
3IN
DD2
DD1
& OUT
4V
5GND
6V
Supply Voltage 1, 2 V
Input Power P
DD1, 2
in
+2.7 +2.8 +3.0 V
– –22 –20 dBm
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, T
A
= +25°C, V
DD1
= V
DD2
= +2.8 V,
/4DQPSK modulated signal input,
ππππ
off-chip input and output matching)
Parameters Symbol Test Conditions MIN. TYP. MAX. Unit
Operating Frequency f 1 429 – 1 453 MHz
DD
adj1
adj2
P
Pin = –22 dBm 32.0 34.0 – dB
Pin = –22 dBm – 35 40 mA
out
P
= +10 dBm, ∆f = ±50 kHz – –60 –55 dBc
out
P
= +10 dBm, ∆f = ±100 kHz – –65 –60 dBc
Power Gain G
Total Current I
Adjacent Channel Power Leakage 1 P
Adjacent Channel Power Leakage 2 P
REFERENCE CHARACTERISTICS
(Unless otherwise specified, T
A
= +25°C, V
DD1
= V
DD2
= +2.8 V, f = 1 429 to 1 453 MHz,
off-chip input and output matching)
Parameters Symbol MIN. TYP. MAX. Unit
Input Return Loss RL
Output Return Loss RL
2
in
out
Data Sheet P13230EJ2V0DS00
–10–dB
–10–dB
EVALUATION CIRCUIT
DD1
V
= V
DD2
= +2.8 V, f = 1 429 to 1 453 MHz
R1
µµµµ
PG174TA
V
DD1
V
DD2
C2
IN
Zo = 50 Ω
Using the NEC Evaluation board
Parts List Value
C1, C2 1 000 pF
C3 2.0 pF
R1 10
L1 6.8 nH
L2 3.3 nH
C1
4
L2
OUT
C3
5
6
Zo = 50 Ω
G1D
32
L1
Ω
1
Data Sheet P13230EJ2V0DS00
3
µµµµ
PG174TA
EVALUATION BOARD (Epoxy Glass,
V
DD1
38 mm
IN
= 4.6, 0.4 mm thickness)
εεεε
40 mm
OUT
V
DD2
IN
V
DD1
OUT
C3
R1
C2
C1
L1
L2
V
DD2
4
Data Sheet P13230EJ2V0DS00
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