NEC UPD17P218GT, UPD17P218CT Datasheet

DATA SHEET

MOS INTEGRATED CIRCUIT

µ

PD17P218

4-BIT SINGLE-CHIP MICROCONTROLLER

FOR INFRARED REMOTE CONTROLLER

DESCRIPTION

The µPD17P218 is a model of the µPD17218 with a one-time PROM instead of an internal mask ROM.

Since the user can write programs to the

production of the

When reading this document, also read the documents related to the

Detailed functions are described in the following user’s manual. Read this manual when designing your

system.

µ

PD17215, 17216, 17217 or 17218 systems.

µ

PD172×× Series User’s Manual: IEU-1317

µ

PD17P218, it is ideal for experimental production or small-scale

µ

PD17215, 17216, 17217 and 17218.

★

FEATURES

• Pin compatible with

• Carrier generator circuit for infrared remote controller (REM output)

• 17K architecture: General-purpose register method

• Program memory (one-time PROM): 16K bytes (8192 × 16)

• Data memory (RAM): 223 × 4 bits

• Pull-up resistor can be connected to RESET pin

• Low-voltage detection circuit (WDOUT output)

• Operating voltage range: 2.0 to 5.5 V (fx = 4 MHz: normal mode, 8

Note: Can be selected by mask option with the mask model.

µ

PD17215, 17216, 17217 and 17218 (except PROM programming function)

Note

.

Note

µ

s)

2.2 to 5.5 V (fx = 4 MHz: high-speed mode, 4 µs)

3.5 to 5.5 V (f

x = 8 MHz: high-speed mode, 2

µ

s)

APPLICATIONS

Preset remote controllers, toys, and portable systems

ORDERING INFORMATION

Part Number Package Quality Grade

µ

PD17P218GT 28-pin plastic SOP (375 mil) Standard

µ

PD17P218CT 28-pin plastic shrink DIP (400 mil) Standard

Please refer to “Quality Grade on NEC Semiconductor Devices” (Document number IEI-1209) published by NEC

Corporation to know the specification of quality grade on the devices and its recommended applications.

Document No. IC - 3252

(O. D. No. IC - 8797) Date Published September 1994 P Printed in Japan

The information in this document is subject to change without notice.

The mark ★ shows major revised points.

©

1994

PIN CONFIGURATION (TOP VIEW)

(1) Normal operation mode

µ

PD17P218

P0D 2

P0D 3 P0D 0

INT P0C 3

P0E 0 P0C 2

P0E 1 P0C 1

P0E 2 P0C 0

P0E 3 P0B 3

REM P0B 2

V DD P0B 1

X OUT P0B 0

X IN P0A 3

GND P0A 2

RESET P0A 1

WDOUT P0A 0

128

227

326

425

524

µ

PD17P218GT

623

722

821

920

10 19

11 18

12 17

13 16

14 15

PD17P218CT

P0D 1

GND : Ground

INT : External interrupt request signal input

0-P0A3 : Port 0A (CMOS input)

P0A

P0B0-P0B3 : Port 0B (CMOS input)

0-P0C3 : Port 0C (N-ch open-drain output)

P0C

P0D0-P0D3 : Port 0D (N-ch open-drain output)

P0E0-P0E3 : Port 0E (CMOS push-pull output)

REM : Remote controller transmission output (CMOS push-pull output)

RESET : Reset input

DD : Positive power supply

V

WDOUT : Hang-up detection/low-voltage detection output (N-ch open-drain output)

IN, XOUT : Oscillation connection

X

2

(2) PROM programming mode

µ

PD17P218

D 2

D 3 D 0

V

PP

(L)

(Open) MD 2

V DD MD 1

(Open)

CLK

GND

(L)

(Open)

128

227

326

425

524

µ

PD17P218GT

623

722

821

920

10 19

11 18

12 17

13 16

14 15

PD17P218CT

D 1

D 7

D 6

D 5

D 4

MD

MD 0

3

(L)

Note: Those enclosed in parentheses indicate the processing of the pins not used in PROM programming

mode.

L : Ground these pins through a resistor (470 W).

Open : Do not connect anything to these pins.

CLK : PROM clock input

0-D7 : PROM data I/O

D

GND : Ground

0-MD3 : PROM mode selection

MD

VDD : Positive power supply

VPP : PROM writing power supply

3

BLOCK DIAGRAM

µ

PD17P218

P0A P0A

P0B /MD

0

P0B /MD

1

P0B /MD

2

P0B /MD

3

P0C /D

0

P0C /D

1

P0C /D

2

P0C /D

3

P0D /D

0

P0D /D

1

P0D /D

2

P0D /D

3

P0E P0E

0

1

2

3

P0A

RF

RAM

×

223 4 bits

0

1

2

3

P0B

SYSTEM REG.

Remote Control Divider

8-bit Timer/ Counter

Interrupt Controller

REM

INT/V

PP

ALU

4

5

6

7

P0C

Instruction

One Time PROM

×

0

1

2

3

P0D

8192 16 bits

Decoder

RESET

WDOUT

Program Counter

0

1

2

3

P0E

Stack 5 13 bits×

Power Supply Circuit

CPU Clock

V

DD

GND

Basic Interval/

Watchdog Timer

OSC

X /CLK

IN

X

OUT

4

µ

PD17P218

CONTENTS

1. DIFFERENCES BETWEEN µPD17P218 AND µPD17215/17216/17217/17218 .................................. 6

2. PIN FUNCTIONS................................................................................................................................. 7

2.1 IN NORMAL MODE ................................................................................................................................ 7

2.2 IN PROM PROGRAMMING MODE ........................................................................................................ 8

2.3 PIN I/O CIRCUITS ................................................................................................................................... 8

2.4 PROCESSING OF UNUSED PINS .......................................................................................................... 11

2.5 NOTES ON USING INT AND RESET PINS ........................................................................................... 11

3. WRITING/VERIFYING ONE-TIME PROM (PROGRAM MEMORY) .................................................. 12

3.1 OPERATION MODE FOR WRITING/VERIFICATION OF PROGRAM MEMORY .................................. 12

3.2 PROGRAM MEMORY WRITE PROCEDURE ......................................................................................... 13

3.3 PROGRAM MEMORY READ PROCEDURE ........................................................................................... 14

★ ★

4. ELECTRICAL SPECIFICATIONS (PRELIMINARY) ........................................................................... 15

5. PACKAGE DRAWINGS .................................................................................................................... 23

6. RECOMMENDED SOLDERING CONDITIONS ................................................................................ 25

APPENDIX A. FUNCTION OF µPD17215 SUB-SERIES PRODUCTS ................................................. 26

APPENDIX B. DEVELOPMENT TOOLS ............................................................................................... 27

★

5

★

1. DIFFERENCES BETWEEN µPD17P218 AND µPD17215/17216/17217/17218

The µPD17P218 is a model of the µPD17218 provided with a one-time PROM as the program memory, to which

the user can write data, instead of an internal mask ROM.

µ

Table 1-1 shows the differences among the

PD17P218, µPD17215, 17216, 17217, and 17218.

These five products have different memory capacities and mask options but the same CPU function and internal

µ

hardware. Therefore, the 17217, or 17218. Note that part of the electrical specifications of the

voltage detection voltage are different from those of the

PD17P218 can be used to evaluate the program of a system using the µPD17215, 17216,

µ

PD17P218 such as supply current and low-

µ

PD17215, 17216, 17217, and 17218.

For the detail of the CPU functions and internal hardware, refer to the Data Sheet of the

and 17218.

Table 1-1 Differences between µPD17P218 and 17215/17216/17217/17218

µ

PD17P218

µ

PD17215, 17216, 17217,

Item

Program Memory

Data Memory 223 × 4 bits 111 x 4 bits 223 x 4 bits

Pull-Up Resistor of RESET Pin Provided Any (mask option)

Low-Voltage Detector Circuit

VPP Pin, Operation Mode Select Pin

Instruction Execution Time 4 µs (4 MHz ceramic oscillator: in high-speed mode)

Operation When P0C, P0D Are Standby

Operating Voltage Range 2.2 to 5.5 V (at 4 MHz, in high-speed mode)

Package

Product Name

Note

µ

PD17P218

One-time PROM Mask ROM

16 K bytes (8192 × 16) 4 K bytes (2048 × 16) 8 K bytes (4096 × 16) 12 K bytes (6144 × 16) 16 K bytes (8192 × 16)

(0000H-1FFFH) (0000H-07FFH) (0000H-0FFFH) (0000H-17FFH) (0000H-1FFFH)

Provided Any (mask option)

Provided Not provided

µ

PD17215

2 µs (8 MHz ceramic oscillator: in high-speed mode)

16 µs (1 MHz ceramic oscillator: in high-speed mode)

Retain output level immediately before standby mode

28-pin plastic SOP (375 mil) 28-pin plastic shrink DIP (400 mil)

µ

PD17216

µ

PD17217

µ

PD17218

Note: Although the circuit configuration of the low-voltage detector circuit is identical, its electrical

specifications differ depending on the product.

6

µ

PD17P218

2. PIN FUNCTIONS

2.1 IN NORMAL MODE

Pin No. Symbol Function Output Format On Reset

15 P0A0 16 P0A1 17 P0A2 18 P0A3 19 P0B0 20 P0B1 21 P0B2 22 P0B3 23 P0C0 24 P0C1 25 P0C2 26 P0C3 27 P0D0 28 P0D1

1 P0D2 2 P0D3

4 P0E0 5 P0E1 6 P0E2 7 P0E3

4-bit CMOS input port with pull-up resistor. Can be used for key return input of key matrix. This port can release standby mode when at least one of pins goes low.

4-bit N-ch open-drain output port. Can be used for key source output of key matrix. This port retains output level immediately before standby mode is set when standby mode is set, and outputs low level on reset.

4-bit I/O port which can be set in input or output mode in bit units. In output mode, this port serves as high-current CMOS output port. In input mode, it serves as CMOS input port to which pull-up resistor can be connected by program in bit units. On reset, this port is set as input port.

— Input

N-ch open-drain Low-level output

CMOS push-pull Input

8 REM CMOS push-pull Low-level output

13 RESET — Input

9VDD ——

12 GND ——

3 INT — Input

14 WDOUT N-ch open-drain

11 XIN — (Oscillation stops) 10 XOUT

Infrared remote controller transmission output pin. Outputs low level on reset.

System reset input pin. By inputting low level to this pin, CPU can be reset. While low level is input to this pin, oscillation circuit stops oscillating. RESET pin of µPD17P218 is provided with pull-up resistor.

Positive power supply pin

Ground

External interrupt request input

Output for detection of hang-up or voltage drop. Outputs low level when watchdog timer overflows, when stack overflows/underflows, or when low voltage is detected. Connect this pin to RESET pin.

Connect ceramic oscillator for system clock oscillation across these pins.

High-impedance or

low-level output

7

µ

PD17P218

2.2 IN PROM PROGRAMMING MODE

Pin No. Symbol Function Output Format On Reset

Power supply for PROM programming.

3VPP ——

Apply 12.5 V to this pin as the program voltage when writing/verifying program memory.

9VDD ——

11 CLK —— 12 GND —— 19 MD0

|| — Input 22 MD3 23 D4

|| 26 D7 27 D0 CMOS push-pull Input 28 D1

1D2 2D3

Positive power supply. Apply 6 V to this pin when writing/ verifying program memory.

Inputs clock for PROM programming.

Ground

Input pins used to select operation mode when PROM is programmed.

Input/output 8-bit data for PROM programming.

Remarks: Pins other than above are not used in the PROM programming mode. For the processing of the

unused pins, refer to PIN CONFIGURATION (2) PROM programming mode.

2.3 PIN I/O CIRCUITS

µ

This section shows the I/O circuits of the

PD17P218 pins in simplified schematic diagrams.

8

(1) P0A

0-P0A3, P0B0/MD0-P0B3/MD3

V DD

Input buffer

µ

PD17P218

(2) P0C

0/D4-P0C3/D7, P0D0/D0-P0D3/D3

Data

(3) P0E0-P0E3

Output

latch

Input buffer

N-ch

V DD

Data

Output disable

Pull-up

resistor

Output

latch

Multiplexer

P-ch

VDD

P-ch

N-ch

Input buffer

9