NEC UPD17P207GF-003-3B9, UPD17P207GF-002-3B9, UPD17P207GF-001-3B9 Datasheet
DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD17P207
4-BIT SINGLE-CHIP MICROCONTROLLER WITH LCD CONTROLLER/DRIVER
AND A/D CONVERTER FOR INFRARED REMOTE CONTROL TRANSMITTER
DESCRIPTION
µ
PD17P207 is a variation of µPD17207 and is equipped with a one-time PROM instead of an internal mask
ROM.
µ
PD17P207 is suitable for evaluating program when developing a µPD17201A and 17207 systems because
program can be written by the user.
µ
When reading this document, also refer to the
FEATURES
• 17K architecture:
General-purpose register format
• Pin-compatible with µPD17201A, 17207
except PROM programming functiom
ORDERING INFORMATION
PD17201A, 17207 documents.
• Internal one-time PROM: 4096 × 16 bits
• Supply voltage:
2.5 to 5.5 V (at f
2.4 to 5.5 V (at f
2.0 to 5.5 V (at fXT = 32.768 kHz, TA = –20 to +75°C)
X = 4 MHz, TA = –20 to +75°C)
X = 4 MHz, TA = –20 to +60°C)
Part Number Package
µ
PD17P207GF-001-3B9 80-pin plastic QFP (14 × 20 mm)
µ
PD17P207GF-002-3B9 80-pin plastic QFP (14 × 20 mm)
µ
PD17P207GF-003-3B9 80-pin plastic QFP (14 × 20 mm)
The features of each product is shown in the following table:
µ
When using
subclock oscillator circuit.
Pull-up resistor of RESET pin
Main clock oscillator circuit
Subclock oscillator circuit
µ
PD17P207 is different from µPD17201A, 17207 in some of the electrical characteristics, such as
supply voltage, the operating ambient temperature, and supply current. Therefore, use µPD17P207
only for the system evaluation.
PD17P207-001, be sure to connect the resonator to the main clock oscllator circuit and
µ
Item
µ
PD17P207-001
Provided
µ
PD17P207-002
Not provided
Provided
Not provided
µ
PD17P207-003
Not provided
Provided
PD17201A, 17207
On request
(mask option)
Document No. U11777EJ3V0DS00 (3rd edition)
Previous No. IC-2707A
Date Published November 1996 P
Printed in Japan
The information in this document is subject to change without notice.
The mark shows major revised points.
©
1993
PIN CONFIGURATION (TOP VIEW)
(1) Ordinary operation mode
3
2
/COM
/COM
34
35
LCD33LCD
LCD
COM1COM0CAPL
LCD2VLCD1VLCDCVLCD0
CAPH
V
OUT
XT
XTINWDOUT
REG
V
RESET
µ
PD17P207
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
1
2
3
4
5
6
7
8
9
µ
PD17P207GF-3B9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
X
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
OUT
X
IN
V
DD
REM
P1A
2
/SI
1
/SO
P1A
P1A
0
/SCK
P0D
3
P0D
2
P0D1/TMOUT
P0D
O
/LED
P0C
3
P0C
2
P0C
1
P0C
0
P0B
3
P0B
2
P0B
1
P0B
0
P0A
3
P0A
2
P0A
1
P0A
0
INT
8
LCD
LCD7LCD6LCD5LCD4LCD3LCD2LCD1GND
LCD0V
ADC
0
ADC
3
ADC1ADC2ADC
ADC
GND
2
(2) PROM programming mode
µ
PD17P207
(OPEN)
(OPEN)
(L)
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
µ
PD17P207GF-3B9
(OPEN)
(L)
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
(OPEN)
CLK
DD
V
(OPEN)
(L)
7
D
6
D
5
D
4
D
3
MD
2
MD
1
MD
0
MD
3
D
2
D
1
D
0
D
V
PP
(OPEN)
GND
DD
V
(OPEN)
(L)
ADC
GND
Caution: Those enclosed in parentheses indicate the processing of the pins not used in PROM programming
mode.
L : Ground these pins through a resistor (470 Ω).
Open : Do not connect anything to these pins.
3
Pin Name
0-ADC3 : A/D converter input
ADC
CAPH, CAPL : Booster capacitor connection
CLK : PROM clock input
0-COM3 : LCD common signal output
COM
D0-D7 : PROM data I/O
GND, GNDADC : Ground
INT : External interrupt request signal input
0-LCD35 : LCD segment signal output
LCD
LED : Remote controller transfer display output
0-MD3 : PROM mode selection input
MD
P0A0-P0A3 : I/O port
P0B0-P0B3 : I/O port
0-P0C3 : I/O port
P0C
P0D0-P0D3 : I/O port
REM : Remote controller transfer output
RESET : Reset signal input
SCK : Serial clock I/O
SI : Serial data input
SO : Serial data output
TMOUT : Timer output
ADC : A/D converter power supply
V
DD : Power supply
V
VLCD0-VLCD2 : LCD drive voltage output
VLCDC : LCD drive reference voltage adjustment
PP : PROM writing power supply
V
VREG : Voltage regulator output
WDOUT : Overrun detection output
IN, XOUT : Main clock oscillator circuit
X
XTIN, XTOUT : Subclock oscillator circuit
µ
PD17P207
4
BLOCK DIAGRAM
P1A0SCK
1
/SO
P1A
2
/SI
P1A
P0A
0
(D0)
P0A1 (D1)
P0A
2
(D2)
P0A
3
(D3)
P1A
Serial
Interface
P0A
RF
RAM
336×4 bits
SYSTEM REG.
ALU
Power
Supply
Circuit
LCD
Controller
µ
PD17P207
V
REG
V
DD
CAPH
CAPL
LCD0
V
V
LCD1
V
LCD2
V
LCDC
GMD
LCD
0
LCD
1
LCD
2
LCD
3
LCD
4
LCD
33
COM3/LCD
COM2/LCD
COM
1
COM
0
34
35
P0B
P0B
P0B
P0B
P0D0/LED
P0D
0
(MD0)
1
(MD1)
2
(MD2)
3
(MD3)
P0C
0
P0C
1
P0C
2
3
P0C
1
/TMOUT
P0D
P0D
REM
(D4)
(D5)
(D6)
(D7)
P0B
Instruction
Decoder
Interrupt
Controller
One Time PROM
×
16 bits
P0C
2
3
P0D
4096
A/D
Converter
Program Counter
Stack 5×12 bits
INT (V )
pp
V
ADC
ADC
0
ADC
1
ADC
2
ADC
3
GND
ADC
RESET
WDOUT
Carrier
Generator
Timer/
Counter
Watch Timer Divider
CPU Clock Clock Stop
Main clock
IN
X (CLK)
X
OUT
CPU Clock
XT
Subclock
XT
IN
OUT
Remark Inside the parenthesis indicates pin names in the PROM programming mode.
5
µ
PD17P207
CONTENTS
1. PIN FUNCTIONS ................................................................................................................................. 7
1.1 ORDINARY OPERATION MODE .............................................................................................................. 7
1.2 PROM PROGRAMMING MODE ................................................................................................................ 9
1.3 EQUIVALENT CIRCUITS OF PINS ......................................................................................................... 10
1.4 PROCESSING OF UNUSED PINS .......................................................................................................... 11
1.5 NOTES ON USING RESET AND INT PINS (ONLY IN ORDINARY OPERATION MODE) ................... 12
2. ONE-TIME PROM (PROGRAM MEMORY) WRITING, READING, AND VERIFICATION ...............13
2.1 OPERATION MODE FOR WRITING, READING, AND VERIFICATION OF PROGRAM MEMORY ..... 13
2.2 PROGRAM MEMORY WRITE PROCEDURE ......................................................................................... 14
2.3 PROGRAM MEMORY READ PROCEDURE........................................................................................... 15
3. DEFFERENCES BETWEEN µPD17P207 AND µPD17201A/17207................................................. 16
4. ELECTRICAL CHARACTERISTICS ................................................................................................. 17
5. PACKAGE DRAWINGS .....................................................................................................................25
6. RECOMMENDED SOLDERING CONDITIONS ................................................................................ 26
APPENDIX A. MICROCONTROLLER FAMILY FOR HIGH-FUNCTION REMOTE CONTROLLER
WITH LCD ........................................................................................................................27
APPENDIX B. DEVELOPMENT TOOLS ................................................................................................ 28
6
µ
PD17P207
1. PIN FUNCTIONS
1.1 ORDINARY OPERATION MODE
Pin No. Symbol Function Output Type On Reset
76 COM0
77 COM1
78 LCD35/COM2
79 LCD34/COM3 CMOS,
80 LCD33 push-pull
1 LCD32
||
32 LCD1
34 LCD0
33 GND ––
35 VADC ––
36 ADC0
|| ––
39 ADC3
40 GNDADC ––
41 INT
42 P0A0 CMOS,
|| push-pull Input
45 P0A3
Common/segment signal outputs of the LCD driver. These common
and segment signal outputs are selected by LCDMD3 to LCDMD0
of the register file.
• COM0 to COM3
· Common signal outputs of the LCD driver
• LCD35 to LCD0
· Segment signal outputs of the LCD driver
Device ground
Positive power supply of the A/D converter (VADC should be equal to
VDD.)
Analog inputs of the A/D converter (8-bit resolution)
Ground of the A/D converter
External interrupt request signal (Input).
The interrupt request is generated at the rising edge of this signal.
4-bit I/O port (enabling setting of inputs or outputs in 4-bit units)
(Grouped I/O).
Each of these pins has a pull-up resistor.
–
– Input
46 P0B0 N-channel,
|| open-drain Input
49 P0B3
50 P0C0 N-channel,
|| open-drain Input
53 P0C3
54 P0D0/LED
55 P0D1/TMOUT
56 P0D2 push-pull
57 P0D3
4-bit I/O port (enabling setting of inputs or outputs in 4-bit units)
(Grouped I/O).
4-bit I/O port (enabling setting of inputs or outputs in 4-bit units)
(Grouped I/O).
Port 0D/LED output or 8-bit timer output.
P0D0 and LED outputs are switched by NRZEN of the register file.
P0D1 and 8-bit timer outputs are switched by TMOE of the register
file.
• P0D0 to P0D3
· 4-bit I/O port
· Enabling setting of inputs or outputs of each bit (Bitwise I/O)
• LED
· Outputs NRZ signal in synchronization with infrared remote
controller signal (REM)
· Outputs high level while remote controller carrier is output from
REM pin
• TMOUT
· Output of the 8-bit timer
CMOS, Input
(to be cont’d)
7
µ
PD17P207
(cont’d)
Pin No. Symbol Function Output Type On Reset
Port 1A or serial interface.
Port 1A and serial interface are switched by SIOEN of the
register file.
58 P1A0/SCK • P1A0 to P1A2
· 3-bit I/O port CMOS, Input
59 P1A1/SO · Enabling setting of inputs or outputs of 3 bits push-pull
(Grouped I/O)
60 P1A2/SI • SCK, SO, SI
· SCK: Serial clock I/O
· SO: Serial data output
· SI: Serial data input
61 REM Signal output to an infrared remote controller. CMOS, Low-level
Active-high output push-pull output
62 VDD Positive power supply. – –
63 XIN These pins are connected to a 4-MHz ceramic or crystal
64 XOUT resonator for main clock oscillation.
System reset input
65 RESET System is reset when low level is input to this pin. – Input
While this pin is low, oscillation of main clock is stopped.
Only µPD17P207-001 has internal pull-up resistor.
Output of the voltage regulator for the subclock oscillation
66 VREG circuit. – –
Connect external 0.1-µF capacitor to this pin.
Output for detection of a program overrun. N-channel, High-
67 WDOUT Outputs low level when the watchdog timer overflows or the open drain impedance
stack overflows/underflows. Use this pin after connecting to
the RESET pin.
68 XTIN These pins are connected to a 32.768-kHz crystal oscillator
– (Oscillates.)
69 XTOUT for subclock oscillation.
71 VLCDC Input to regulate the reference voltage to drive LCD. – –
70 VLCD0 Reference voltage outputs to drive LCD.
72 VLCD1 •VLCD0: Reference voltage output
73 VLCD2 •VLCD1: Doubler output (Two times the reference voltage) – –
•VLCD2: Tripler output (Three times the reference voltage)
(Oscillation
stops.)
74 CAPH These pins are connected to a capacitor to boost the
75 CAPL LCD drive voltage.
8
––
µ
PD17P207
1.2 PROM PROGRAMMING MODE
Pin No. Symbol Function Output Type On Reset
33 GND Ground – –
35 VDD Positive power supply – –
40 GNDADC ––
41 VPP Applies 12.5V as the program voltage when writing, reading, – –
42 D0
to to
45 D3
50 D4
to to
53 D7
46 MD0
to to Select operation mode for PROM programming. – Input
49 MD3
62 VDD Positive power supply – –
63 CLK Address update clock input – Input
Ground for A/D converter
Performs PROM programming with GNDADC = GND.
Positive power supply for PROM programming.
and verifying the program memory.
8-bit data I/O for PROM programming. Input
CMOS,
push-pull
Remark Pins other than the above are not used in the PROM programming mode. For the processing of
unused pins, refer to (2) PROM programming mode in PIN CONFIGURATION.
9
1.3 EQUIVALENT CIRCUITS OF PINS
The followings are equivalent circuits (partially simplified) of the respective pins of the µPD17P207.
(1) P0A (4) P0D, P1A
µ
PD17P207
DD
P-ch
N-ch
V
DD
data
output
disable
data
output
disable
V
Output
latch
Selector
Input buffer
(2) P0B (5) RESET
data
output
disable
Output
latch
N-ch
Output
latch
Selector
Input buffer
Input buffer
V
DD
V
DD
P-ch
N-ch
Pull-up
resistor
Note
Input buffer
(3) P0C (6) INT
data
output
disable
Output
latch
N-ch
Selector
Input buffer
Schmitt trigger input with hysteresis
characteristics
Note Only µPD17P207-001 has the internal
pull-up resistor.
Input buffer
Schmitt trigger input with hysteresis
characteristics
10
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