The Navman Jupiter 32 module is a complete GPS receiver designed for surface mount
assembly integration. The Jupiter 32 provides a simple, cost effective GPS solution for
application designers. Application integration will vary primarily with respect to antenna system
design and EMI protective circuitry.
The Jupiter 32 is the successor to the established Jupiter 30, being electrically compatible and
having a very small form factor. The provides an easy migration path for existing users requiring
very small packaging, low cost, high volume, greater sensitivity, lower power consumption and a
faster x.
Basic operation requires a power supply, GPS antenna system interface, relevant EMI
protection, and the design and layout of a custom PCB. This document outlines the following
design considerations and provides recommended solutions:
Hardware application information
This section introduces the system interface and provides the following physical specications:
a. electrical connections (SMT pad interface)
b. mounting (PCB pad layout dimensions)
c. manufacturing recommendations
d. application circuit interface
It also discusses fundamental considerations when designing for RF, and presents the antenna
system design overview. This covers the following topics:
a. PCB layout
b. antenna system design choices
A sample solution is presented and discussed. Due to the nature and complexity of GPS signals,
it is recommended that application integrators adhere to the design considerations and criteria
described in this document.
Software application information
This section provides answers to some common questions that might not have been covered in
the above topics.
2.0 Hardware application information
The Jupiter 32 module provide 34 Land Grid Array (LGA) pads for electrical connections. The
sections that follow introduce the physical and relative functional specications for application
integration.
Note: The electrical connections can carry very low level GPS signals at 1.57542 GHz. The
layout must be designed appropriately with consideration of the frequencies involved.
The round hole on the front label side of the chip locates pad A1. The pads are designated
A-F and 1-7. Details of the pad layout and numbering are shown in Figure 2-1.
Pad NoPad NamesTypeDescription
A1RF_INIRF Input 50 ohm
A2GNDPRF signal ground return
A3GNDPground
A4VANTPactive antenna power input
A5GPIO15I/Oreserved
A6GPIO14I/Oreserved
A7RF_ONOoutput to indicate whether the RF section is
enabled (active high)
B1GNDPRF signal ground return
B3VDD_BBPbaseband power supply input for external
regulator build option - DO NOT CONNECT
B4GPIO4I/Oreserved
B5GPIO13I/Oreserved
B6VDD_RTCPRTC power supply input for external regulator
build option - DO NOT CONNECT
B7GPIO1I/Oreserved
C1GNDPground
C2TCXO_INITCXO input for external TCXO build option
- DO NOT CONNECT
C4BOOTIactive high to download ash rmware
C5LNA _ENOexternal antenna enable, active high
D2FACTORY USE ONLYreserved
D4N_GPS_FIXOactive low when 2D or 3D x data
available
D5RXAICMOS level asynchronous input for UART A
D7TXAOCMOS level asynchronous output for UART A
E1GNDPground
E2GNDPgroundE4GPIO2I/Oreserved
E5N_RESETImaster reset, active low
E6RXBICMOS level asynchronous input for UART B
E71PPSO1 pulse per second output 1µs wide
F1PWRIN P3.0 - 3.6 V main power supply input
F2VBATT P1.9 - 3.6 V backup battery input
F3VCC_RFPRF power supply output for external regulator
option. Connect as per application circuit.
- Figure 2-2
F4WAKEUPIPush-to-Fix wake-up, active high
F5N_WAKEUPOlow output indicates baseband is powered up
- DO NOT CONNECT
F6TXBOCMOS level asynchronous output for UART B
F7ECLKIexternal clock input, not used
The schematic in Figure 2-2 (next page) represents a very basic application circuit, with simple
interfaces to the module. It is subject to variations depending on application requirements.
2.2.1 Power for receiver and active antenna
The receiver power connection requires a clean 3.3 VDC. Noise on this line may affect the
performance of the GPS receiver.
When an active antenna is used, the DC power is fed to it through the antenna coax. This
requires the user to apply the antenna DC voltage to pad A4 of the module.
A 2.85 V 30 mA supply is made available on pad F3 if the chosen antenna can accept that
voltage. This supply is under the command of the TricklePower energy control.
The source impedance of the power supply must be kept sufciently low. The capacitance of
the power supply and PCB track width determine the overall source impedance. If a passive
antenna is used, the supply must be able to provide a minimum of 100mA continuously with
minimal ripple as measured at the power input pin. This ripple requirement must be adhered
to for a larger current ow when an active antenna is used. In-rush current for some active
antennas have been measured as high as 70mA and may cause a dip in voltage or ripple.
Therefore, a low source impedance is important since the power to the Jupiter 32 must be
able to accommodate instantaneous currents in excess of 200mA.
2.2.2 Grounding
Separate analogue and digital grounds are not used. However, the antenna signal ground
uses a particular layout for optimum results. See Figure 2-3 (next page) and Section 2.3.5
for ground plane recommendations and for design considerations involving the antenna input
The schematic in Figure 2-2 illustrates a suggested method of decoupling that may be
followed. Table 2-2 suggests decoupling values for all signals relative to the function required.
This level of decoupling may not be required in a particular application, in which case
these capacitors could be omitted. As shown in Figure 2-2, only the signal lines used in the
application require decoupling.
All capacitors are highly recommended if the module will experience substantial
electromagnetic interference (EMI). All low value capacitors should be as close as possible to
the module pad with a short connection to the ground plane (see Figure 2-4). Any data lines
that have not been properly shielded are susceptible to data corruption.
Figure 2-4: Decoupling Capacitor Placement
2.2.4 Serial RS232 data level shifter
To connect the module to a PC COM port, the serial data signals must be level shifted to
RS232 levels. This has not been shown in the reference design, but many single chip RS232
level shifters are available, such as MAX3232.
Note: It is highly recommended to provide test points on the serial data lines and ‘BOOT’
signal (pad C4), even if the application circuit does not use these signals. This will allow the
user to connect to these signals if a rmware upload or new conguration is required. These
test points can take the form of an untted ‘through-hole’ connector. Refer to Figure 2-2.
2.3 PCB design recommendations
The modules are surface mounted devices, hence the layout of the application PCB plays an
integral part in the overall performance of the nished system.
It is not difcult to design such a PCB, despite the presence of high frequency, low level radio
signals. The following recommendations have been offered to allow the designer to create a
design that will meet the requirements of this product.
Figure 2-1 shows the copper pad dimensions and layout.
2.3.1 Choice of PCB stack up
In general, a two layer PCB substrate can be used, with all the RF signals on one side. Multilayer boards can also be used. The design recommendations here only address the microstrip
style of RF connection. Stripline designs can also be accommodated, however, long lengths
of stripline can cause excessive signal loss and vias in the signal track should be avoided.
2.3.2 Ground plane design
A complete ground plane should be used under the PCB with signal tracks on the same
layer as the module. The ground return for any signal should ideally have a clear path back
to its source and should not mix with other signal’s ground return paths. For this reason, RF
signal ground, underneath the microstrip antenna connection, should not be shared with any
digital signal or power supply return paths. Pads A2 and B1 are the RF signal ground return