MSI MS-7298 Schematic 1.0

5

4

3

2

1

MSI

MS-7298

D D

C C

B B

CPU:

Ver:0A

AMD 940 Athlon 64/Athlon 64 FX

System Chipset:

NVIDIA C51G
NVIDIA MCP51G/MCP51

On Board Chipset:

LPC Super I/O -- W83627EHG/ DHG

LAN -- RTL8201CL/VSC8601
AC97 Codec --ALC655/ALC658
BIOS --LPC FLASH ROM 4M

Main Memory:

DDR * 2(Max 2GB)

Expansion Slots:

PCI-E X1 *1

PCI-E X 16 *1

PCI 2.2 Slot * 3

PWM:

Controller--RT8800 3 Phase

Title Page

Cover Sheet 1
Block Diagram
AMD AM2 940
System Memory
DDR Terminations

2
3,4,5
6

7
C51G 8-10
MCP51G 11-14
PCI Slot 1,2,3
PCI-E X16 , X1 Slot
LPC -W83627EHG / FDD / BIOS
LAN RTL8201CL

AC97 ACL658

USB connectors

MS-6 ACPI Controller & MS-11
PWM - RT8800

IDE & FAN
ATX Connector / Front Panel

KB/MS/LPT/COM/TPM/EMI
VGA

MANUAL PARTS
GPIO SPEC

POWER OK MAP
POWER MAP

RESET MAP
History

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

A A

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

Cover Sheet

MS-7298-0A

1

Last Revision Date:

Friday, May 19, 2006

Sheet

Rev

0A

132

of

5

4

3

2

1

BLOCK DIAGRAM

D D

POWER

SUPPLY

CONNECTOR

PEX X16, PEX X1

VREG

PCI EXPRESS

SOCKET 940

K9

NFORCE

CRUSH 51

HT 16X16 1GHZ

128-BIT 400/533MHZ

DDR SDRAM CONN 0

DDR SDRAM CONN 2

DDR SDRAM CONN 1

DDR SDRAM CONN3

VGA CONN

468 BGA

C C

PRIMARY IDE

SECONDARY IDE

X4 - SATA CONN

B B

FLOPPY CONN

PS2/KBRD CONN

PARALLEL CONN

SERIAL CONN

SERIAL HDR

ATA 133

INTEGRATED SATA 1/2

SIO

LPC SUPER I/O
47M997

LPC BUS 33MHZ

LPC HDR

4MB FLASH

NFORCE
MCP 51

508 BGA

HT 8X8 1GHZ

AZAILIA/AC97

X8 USB2

PCI 33MHZ

Realtek 8201CL

Realtek ALC 883 (Azalia, 7.1Channel)

BACK PANEL CONN

USB2 PORTS 0-1
DOUBLE STACK

USB2 PORTS 2-3
X2/GBIT LAN

FRONT PANEL HDR

USB2 PORTS 4-5

USB2 PORTS 6-7

1394-VT6307

PCI SLOT 1

PCI SLOT 2

PCI Extender

A A

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

Block Diagram

MS-7298-0A

Last Revision Date:
Sheet

1

Friday, May 19, 2006

2

Rev

0A

32

of

5

4

3

2

1

VDDA_25 VDDA25

L1 80L3_100_0805

2 1

CPU1A

L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)

L0_CTLIN_H(1)
L0_CTLIN_L(1)
L0_CTLIN_H(0)
L0_CTLIN_L(0)

L0_CADIN_H(15)
L0_CADIN_L(15)
L0_CADIN_H(14)
L0_CADIN_L(14)
L0_CADIN_H(13)
L0_CADIN_L(13)
L0_CADIN_H(12)
L0_CADIN_L(12)
L0_CADIN_H(11)
L0_CADIN_L(11)
L0_CADIN_H(10)
L0_CADIN_L(10)
L0_CADIN_H(9)
L0_CADIN_L(9)
L0_CADIN_H(8)
L0_CADIN_L(8)

L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
L0_CADIN_H(1)
L0_CADIN_L(1)
L0_CADIN_H(0)
L0_CADIN_L(0)

HYPERTRANSPORT

L0_CLKOUT_H(1)

L0_CLKOUT_L(1)

L0_CLKOUT_H(0)

L0_CLKOUT_L(0)

L0_CTLOUT_H(1)

L0_CTLOUT_L(1)

L0_CTLOUT_H(0)

L0_CTLOUT_L(0)

L0_CADOUT_H(15)

L0_CADOUT_L(15)

L0_CADOUT_H(14)

L0_CADOUT_L(14)

L0_CADOUT_H(13)

L0_CADOUT_L(13)

L0_CADOUT_H(12)

L0_CADOUT_L(12)

L0_CADOUT_H(11)

L0_CADOUT_L(11)

L0_CADOUT_H(10)

L0_CADOUT_L(10)

L0_CADOUT_H(9)

L0_CADOUT_L(9)

L0_CADOUT_H(8)

L0_CADOUT_L(8)

L0_CADOUT_H(7)

L0_CADOUT_L(7)

L0_CADOUT_H(6)

L0_CADOUT_L(6)

L0_CADOUT_H(5)

L0_CADOUT_L(5)

L0_CADOUT_H(4)

L0_CADOUT_L(4)

L0_CADOUT_H(3)

L0_CADOUT_L(3)

L0_CADOUT_H(2)

L0_CADOUT_L(2)

L0_CADOUT_H(1)

L0_CADOUT_L(1)

L0_CADOUT_H(0)

L0_CADOUT_L(0)

AD5
AD4
AD1
AC1

Y6
W6
W2
W3

Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4

Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1

HT_CLKOUT_H1 8
HT_CLKOUT_L1 8
HT_CLKOUT_H0 8
HT_CLKOUT_L0 8

HT_CTLOUT_H0 8
HT_CTLOUT_L0 8

HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8

HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0

TP15
TP14

CPU_CLK8

CPU_CLK#8

C66 C3900P50X

R68

_169R1%-1

C65 C3900P50X

C38

X_C1000P50X0402

CPU_SIC17

VCC_DDR

R104

39.2R1%

R103

39.2R1%

CPU_M_VREF

CPU_STRAP_HI_E11
CPU_STRAP_LO_F11

R56 300R
R53 300R

TP3

TP4

SM_THERMDC17,23
SM_THERMDA17,23

D D

VCC1_2HT

C C

HT_CLKIN_H18
HT_CLKIN_L18
HT_CLKIN_H08
HT_CLKIN_L08

R107 51R1%0402-LF
R106 51R1%0402-LF

HT_CTLIN_H08
HT_CTLIN_L08

HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8

HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0

N6

P6
N3
N2

V4

V5
U1

V1
U6

V6

T4

T5
R6

T6

P4

P5
M4
M5

L6
M6

K4

K5

J6

K6
U3

U2
R1

T1
R3
R2
N1

P1

L1
M1

L3

L2

J1

K1

J3
J2

CPU_SID17

C4.7U16Y1206

VCC_DDR

TP26
TP27
TP28
TP30

TP24

COREFB+22

COREFB-22

TP8
TP10
TP11
TP7
TP17

C57

C0.22U16X

LDT_RST_L

TP13

TP2

TP1

VDDA25

C73

C69

C3300P50X

CPUCLKIN
CPUCLKIN#

CPU_PWRGD_L
HT_STOP_L

CPU_PRESENT_L

CPU_SIC

R94 300R1%
R102 300R1%

CPU_SID

CPU_TDI

CPU_TRST_L

CPU_TCK

CPU_TMS

CPU_DBREQ_L

COREFB+

COREFB-

CPU_VTT_SENSE

CPU_TEST25_H

CPU_TEST25_L

C10
D10

AK6

AL10
AJ10

AH10

AH11

AJ11

AH9

AG9
AG8

AH7

A8
B8

C9
D8
C7

AL3

AL6

AL9

A5

G2
G1

E12

F12

A10
B10
F10

E9

AJ7

F6

D6

E7
F8

C5

E5

AJ5

AJ6

CPU1D

MISC

VDDA1
VDDA2

CLKIN_H
CLKIN_L

PWROK
LDTSTOP_L
RESET_L

CPU_PRESENT_L

THERMTRIP_L

SIC
SID

TDI
TRST_L
TCK
TMS

DBREQ_L
VDD_FB_H

VDD_FB_L
VTT_SENSE

M_VREF
M_ZN
M_ZP

TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9

TEST17
TEST16
TEST15
TEST14
TEST12

TEST7
TEST6
TEST5
TEST4
TEST3
TEST2

VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)

PROCHOT_L

TDO

DBRDY

VDDIO_FB_H

VDDIO_FB_L

PSI_L

HTREF1
HTREF0

TEST29_H

TEST29_L

TEST24
TEST23
TEST22
TEST21
TEST20

TEST28_H

TEST28_L

TEST27
TEST26
TEST10

TEST8

D2
D1
C1
E3
E2
E1

AK7
AL7

AK10

B6
AK11

VDDIO_FB_L

AL11
F1

V8
V7

C11
D11

AK8
AH8
AJ9
AL8
AJ8

J10
H9
AK9
AK5
G7
D4

VID4
VID3
VID2
VID1
VID0

CPU_THRIP_L

CPU_TDO

CPU_DBRDY
VDDIO_FB_H

R563 0R0402

CPU_PSI_L

R101 300R

TP9

R95 300R

TP25

TP29

TP12

R61 80.6R1%

VCC_DDR

VCC_DDR

R19
300R

R554 X_0R0402

VDDIO_FB_H 21

C1000P50X0402

TP20
TP18
TP19

TP16

C163

VCC_DDR

R96
300R

VCC_DDR

C164
C1000P50X0402

R99 44.2R1%
R100 44.2R1%

VID[0..4] 22

VCC1_2HT

B B

HT_CADIN_H[15..0]8

HT_CADIN_L[15..0]8

HT_CADOUT_H[15..0]8

HT_CADOUT_L[15..0]8

CPU_PRESENT_L
CPU_TEST25_H

CPU_TEST25_L

VCC_DDR

A A

_15R1%0805-1

HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]

R109 1KR
R65 510R

R67 510R

R62
_15R1%0805-1

R63

C0.1U16Y0402

5

CPU_M_VREF

C75

VCC_DDR

C70
C1000P50X0402

TP31

AMD RECOMMAND

VCC1_2HT

C165

C4.7U10Y0805

X_C4.7U10Y0805

C213

X_C4.7U10Y0805

4

VCC3

R585
X_300R

Q60
X_N-2N7002_SOT23

C166

C0.22U16X

VDDA25

C183

X_C0.22U16X

LDT_RST_LHDT_LDT_RST#

C221

C219

X_C10P25N0402/0.25

X_C10P25N0402/0.25

C188

VCC_DDR

52

V

HT_STOP#8

HT_STOP#

1 6

G

U30A
NC7WZ07_SC70-6

HT_STOP_L

VCC_DDR

52

LDT_RST8

LDT_RST

V

3 4

G

LDT_RST_L

U30B
NC7WZ07_SC70-6

VCC_DDR

52

CPU_PWRGD8

CPU_PWRGD

V

1 6

G

CPU_PWRGD_L

U31A
NC7WZ07_SC70-6

VCC_DDR

52

V

CPU_THRIP_L

3

3 4

G

U31B
NC7WZ07_SC70-6

CPU_THRIP#

CPU_THRIP# 11

2

HT Bus Level shift

VDDA25

VCC_DDR

LDT_RST_L
CPU_PWRGD_L
CPU_THRIP_L
HT_STOP_L

X_8P4R-0R

CPU_THRIP#

Micro Star Restricted Secret

Title

ATHLON64 HT I/F CTRL & DEBUG

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

RN8

1
3
5
7

RN48

1
3
5
7

RN2

1

2

3

4

5

6

7

8

R112 X_1KR

for NV APNOT suggestion

MS-7298-0A

1

LDT_RST

2

CPU_PWRGD

4

CPU_THRIP#

6

HT_STOP#

8

8P4R-1KR

HT_STOP_L

2

CPU_THRIP_L

4

CPU_PWRGD_L

6

LDT_RST_L

8

8P4R-300R

LDT_RST
CPU_PWRGD
CPU_THRIP#
HT_STOP#

Last Revision Date:

Friday, May 19, 2006

Sheet

332

VCC3

Rev

0A

of

5

4

3

2

1

MEM_MA_DQS_L[7..0]6
MEM_MA_DQS_H[7..0]6
MEM_MA_DM[7..0]6

MEM_MB_DQS_L[7..0]6
MEM_MB_DQS_H[7..0]6
MEM_MB_DM[7..0]6

D D

CPU1B

MEM_MA0_CLK_H26,7
MEM_MA0_CLK_L26,7
MEM_MA0_CLK_H16,7
MEM_MA0_CLK_L16,7
MEM_MA0_CLK_H06,7
MEM_MA0_CLK_L06,7

MEM_MA0_CS_L16,7
MEM_MA0_CS_L06,7

MEM_MA0_ODT06,7

MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0

MEM_MA0_CS_L1
MEM_MA0_CS_L0

MEM_MA0_ODT0

AG21
AG20

G19
H19
U27
U26

AC25
AA24

AC28
AE20

AE19

G20
G21
V27
W27

AD27
AA25

AC27

C C

MEM_MA_CAS_L6,7
MEM_MA_WE_L6,7
MEM_MA_RAS_L6,7

MEM_MA_BANK26,7
MEM_MA_BANK16,7
MEM_MA_BANK06,7

MEM_MA_CKE17
MEM_MA_CKE06,7

MEM_MA_ADD[15..0]6,7

B B

MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L

MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0

MEM_MA_CKE1
MEM_MA_CKE0

MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0

MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0

MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0

AB25
AB27
AA26

N25
Y27

AA27

M25
M27

N24

AC26

N26
P25
Y25
N27
R24
P27
R25
R26
R27

U25
W24

AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28

D29
C29
C25
D25
E19

G15

AF15
AF19
AJ25
AH29

B29
E24
E18
H15

L27

T25
T27

F19
F15

MEMORY INTERFACE A

MA0_CLK_H(2)
MA0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)

MA0_CS_L(1)
MA0_CS_L(0)

MA0_ODT(0)
MA1_CLK_H(2)

MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)

MA1_CS_L(1)
MA1_CS_L(0)

MA1_ODT(0)

MA_CAS_L
MA_WE_L
MA_RAS_L

MA_BANK(2)
MA_BANK(1)
MA_BANK(0)

MA_CKE(1)
MA_CKE(0)

MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)

MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)

MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)

MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)

MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)

MA_DQS_H(8)

MA_DQS_L(8)

MA_DM(8)

MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)

AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26

MEM_MA_DATA18

C26

MEM_MA_DATA17

G23

MEM_MA_DATA16

F23

MEM_MA_DATA15

E22

MEM_MA_DATA14

E21

MEM_MA_DATA13

F17

MEM_MA_DATA12

G17

MEM_MA_DATA11

G22

MEM_MA_DATA10

F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14

J28
J27

J25
K25

J26
G28
G27
L24
K27
H29
H27

MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19

MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0

MEM_MA_DATA[63..0] 6

MEM_MB0_CLK_H26,7
MEM_MB0_CLK_L26,7
MEM_MB0_CLK_H16,7
MEM_MB0_CLK_L16,7
MEM_MB0_CLK_H06,7
MEM_MB0_CLK_L06,7

MEM_MB0_CS_L16,7
MEM_MB0_CS_L06,7

MEM_MB0_ODT06,7

MEM_MB_CAS_L6,7
MEM_MB_WE_L6,7
MEM_MB_RAS_L6,7

MEM_MB_BANK26,7
MEM_MB_BANK16,7
MEM_MB_BANK06,7

MEM_MB_CKE17
MEM_MB_CKE06,7

MEM_MB_ADD[15..0]6,7

MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0

MEM_MB0_CS_L1
MEM_MB0_CS_L0

MEM_MB0_ODT0

MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L

MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0

MEM_MB_CKE1
MEM_MB_CKE0

MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0

MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0

MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0

AJ19

AK19

AE30
AC31

AD29
AL19

AL18

W29
W28

AE29
AB31

AD31

AC29
AC30
AB29

AA31
AA28

M31
M29

AE31

AA29

AA30
AK13

AJ13

AK17

AJ17
AK23
AL23
AL28
AL29

AJ14
AH17

AJ23
AK29

A18
A19
U31
U30

C19
D19

N31

N28
N29

N30
P29

P31
R29
R28
R31
R30
T31
T29
U29
U28

D31
C31
C24
C23
D17
C17
C14
C13

C30
A23
B17
B13

MB0_CLK_H(2)
MB0_CLK_L(2)
MB0_CLK_H(1)
MB0_CLK_L(1)
MB0_CLK_H(0)
MB0_CLK_L(0)

MB0_CS_L(1)
MB0_CS_L(0)

MB0_ODT(0)
MB1_CLK_H(2)

MB1_CLK_L(2)
MB1_CLK_H(1)
MB1_CLK_L(1)
MB1_CLK_H(0)
MB1_CLK_L(0)

MB1_CS_L(1)
MB1_CS_L(0)

MB1_ODT(0)

MB_CAS_L
MB_WE_L
MB_RAS_L

MB_BANK(2)
MB_BANK(1)
MB_BANK(0)

MB_CKE(1)
MB_CKE(0)

MB_ADD(15)
MB_ADD(14)
MB_ADD(13)
MB_ADD(12)
MB_ADD(11)
MB_ADD(10)
MB_ADD(9)
MB_ADD(8)
MB_ADD(7)
MB_ADD(6)
MB_ADD(5)
MB_ADD(4)
MB_ADD(3)
MB_ADD(2)
MB_ADD(1)
MB_ADD(0)

MB_DQS_H(7)
MB_DQS_L(7)
MB_DQS_H(6)
MB_DQS_L(6)
MB_DQS_H(5)
MB_DQS_L(5)
MB_DQS_H(4)
MB_DQS_L(4)
MB_DQS_H(3)
MB_DQS_L(3)
MB_DQS_H(2)
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)

MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)

CPU1C

MEMORY INTERFACE B

MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)

MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)

MB_DQS_H(8)

MB_DQS_L(8)

MB_DM(8)

MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)

AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13

J31
J30

J29
K29

K31
G30
G29
L29
L28
H31
G31

MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20

MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10

MEM_MB_DATA9

MEM_MB_DATA8

MEM_MB_DATA7

MEM_MB_DATA6

MEM_MB_DATA5

MEM_MB_DATA4

MEM_MB_DATA3

MEM_MB_DATA2

MEM_MB_DATA1

MEM_MB_DATA0

MEM_MB_DATA[63..0] 6

A A

Micro Star Restricted Secret

Title

ATHLON64 DDR MEMORY I/F

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

MS-7298-0A

Last Revision Date:
Sheet

1

Friday, May 19, 2006

432

Rev

0A

of

5

4

3

2

1

VCCP

CPU1F

VDD1

A4

VDD1

A6

VDD2

AA8

VDD3

D D

C C

B B

AA10
AA12
AA14
AA16
AA18

AB7
AB9

AB11

AC4
AC5
AC8

AC10

AD2
AD3
AD7
AD9

AE10

AF7
AF9
AG4
AG5
AG7
AH2
AH3

E10

G10
G12

H11
H23

K11
K13
K15
K17
K19
K21
K23

Y17
Y19

VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27

B3

VDD28

B5

VDD29

B7

VDD30

C2

VDD31

C4

VDD32

C6

VDD33

C8

VDD34

D3

VDD35

D5

VDD36

D7

VDD37

D9

VDD38

E4

VDD39

E6

VDD40

E8

VDD41
VDD42

F5

VDD43

F7

VDD44

F9

VDD45

F11

VDD46

G6

VDD47

G8

VDD48
VDD49
VDD50

H7

VDD51
VDD52
VDD53

J8

VDD54

J12

VDD55

J14

VDD56

J16

VDD57

J18

VDD58

J20

VDD59

J22

VDD60

J24

VDD61

K7

VDD62

K9

VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70

L4

VDD71

L5

VDD72

L8

VDD73

L10

VDD74

L12

VDD75
VDD150
VDD151

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74

VSS240
VSS241

A3
A7
A9
A11
AA4
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE9
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
Y14
Y16

VTT_DDR

VCCP

M11
M13
M15
M17
M19

N10
N12
N14
N16
N18

P11
P13
P15
P17
P19

R10
R12
R14
R16
R18
R20

U10
U12
U14
U16
U18
U20

V11
V13
V15
V17
V19
V21

W10
W12
W14
W16
W18
W20

Y11
Y13
Y15
Y21

VCC_DDR

VCCP

C564
C0.22U16X

VCC1_2HT

VTT_DDR

C575
C0.22U16X

AB24
AB26
AB28
AB30
AC24
AD26
AD28
AD30
AF30

M24
M26
M28
M30
P24
P26
P28
P30

V25
V26
V28
V30
Y24
Y26
Y28
Y29

CPU1I

VLDT_A1
VLDT_A2
VLDT_A3
VLDT_A4

VTT1
VTT2
VTT3
VTT4

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29

VDDIO

VLDT_B1
VLDT_B2
VLDT_B3
VLDT_B4

VTT5
VTT6
VTT7
VTT8
VTT9

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28

AJ4
AJ3
AJ2
AJ1

D12
C12
B12
A12

T24
T26
T28
T30

H6
H5
H2
H1

AK12
AJ12
AH12
AG12
AL12

K24
K26
K28
K30
L7
L9
L11
L13
L15
L17
L19
L21
L23
M8
M10
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15

VLDT_RUN_B

VTT_DDR

C94
C4.7U16Y1206

GND 3,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27

VCC1_2HT

C784
C180P50N0402

C782
C180P50N0402

VCCP

C777
C180P50N

VCC_DDR

C781

C789
C180P50N0402

C180P50N0402

VCC_DDR

C780

C787

C788

C778
C180P50N0402

C180P50N0402

C180P50N0402

C180P50N0402

VTT_DDR

C785

C783

C786

C779
C180P50N0402

C571
C0.22U16X

0603

C547
C0.01U25X0402

0603

C548

X_C10P25N0402/0.25

C22U6.3X1206

C558

C180P50N0402

C60

X_10U/1206

C180P50N0402

C180P50N0402

AMD RECOMMAND
for EMI containment.

C561

X_10U/1206

X_10U/1206

C90

C563

X_10U/1206

10U/1206

C136

CPU1G

L14
L16
L18

T11
T13
T15
T17
T19
T21

VDD2

VDD1
VDD2
VDD3

M2

VDD4

M3

VDD5

M7

VDD6

M9

VDD7
VDD8
VDD9
VDD10
VDD11
VDD12

N8

VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

P7

VDD19

P9

VDD20
VDD21
VDD22
VDD23
VDD24
VDD25

R4

VDD26

R5

VDD27

R8

VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34

T2

VDD35

T3

VDD36

T7

VDD37

T9

VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44

U8

VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51

V9

VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58

W4

VDD59

W5

VDD60

W8

VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67

Y2

VDD68

Y3

VDD69

Y7

VDD70

Y9

VDD71
VDD72
VDD73
VDD74
VDD75

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75

AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H22
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18

VCCP

AA20
AA22
AB13
AB15
AB17
AB19
AB21
AB23
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE12
AF11

M21
M23
N20
N22
P21
P23
R22

U22
V23
W22
Y23

CPU1H

VDD3

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

L20

VDD19

L22

VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27

T23

VDD28
VDD29
VDD30
VDD31
VDD32

5

GND

6

GND

7

GND

8

GND

1

GND

2

GND

3

GND

4

GND

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22

VCC_DDR

C42

C0.22U16X

C0.22U16X

A A

C68

C4.7U10Y0805

C34

C36

X_C4.7U10Y0805

C50

X_C10P50N0402

X_C10P50N0402

C39

C74

X_C1000P50X0402

X_C1000P50X0402

C53

VTT_DDR

C189

C0.22U16X

C0.22U16X

C192

C4.7U10Y0805

5

C201

X_C4.7U10Y0805

C203

X_C10P50N0402

C194

C169

X_C1000P50X0402

X_C10P50N0402

C160

C187

X_C1000P50X0402

4

C551

C0.01U16X

VCC_DDR

C562

X_C22U6.3X1206

C0.22U16X

10U/1206

C559

C0.22U16X

C567

C4.7U10Y0805

C224

C4.7U10Y0805

C102

C4.7U10Y0805

C259

C4.7U10Y0805

C87

C0.22U16X

C76

C555

C0.22U16X

C179

C97

C0.22U16X

3

VCCP

C613

C0.22U16X

X_C10P25N0402/0.25

C557

X_10U/1206

C269

C556

X_10U/1206

C560

X_10U/1206

C552

X_10U/1206

2

C554

10U/1206

C553

10U/1206

C570

10U/1206

C550

10U/1206

Micro Star Restricted Secret

Title

ATHLON64 PWR & GND

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

MS-7298-0A

Last Revision Date:
Sheet

1

C596

C549

X_10U/1206

C0.01U16X

C0.22U16X

Friday, May 19, 2006

of

532

C612

Rev

0A

5

MEM_MA_DQS_H[7..0]4
MEM_MA_DQS_L[7..0]4

D D

MEM_MA_ADD[15..0]4,7

MEM_MA_DM[7..0]4

C C

B B

MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7

MEM_MA_RAS_L4,7
MEM_MA_CAS_L4,7

MEM_MA_WE_L4,7

MEM_MA0_CS_L04,7
MEM_MA0_CS_L14,7
MEM_MA_CKE04,7

MEM_MA0_CLK_H04,7
MEM_MA0_CLK_H14,7
MEM_MA0_CLK_H24,7
MEM_MA0_CLK_L04,7
MEM_MA0_CLK_L14,7
MEM_MA0_CLK_L24,7

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15

MEM_MA_BANK04,7
MEM_MA_BANK14,7
MEM_MA_BANK24,7

MEM_MA_DQS_H0
MEM_MA_DQS_H1
MEM_MA_DQS_H2
MEM_MA_DQS_H3
MEM_MA_DQS_H4
MEM_MA_DQS_H5
MEM_MA_DQS_H6
MEM_MA_DQS_H7

MEM_MA_DQS_L0
MEM_MA_DQS_L1
MEM_MA_DQS_L2
MEM_MA_DQS_L3
MEM_MA_DQS_L4
MEM_MA_DQS_L5
MEM_MA_DQS_L6
MEM_MA_DQS_L7

MEM_MA_RAS_L
MEM_MA_CAS_L

MEM_MA_WE_L

MEM_MA0_CS_L0
MEM_MA0_CS_L1
MEM_MA_CKE0

MEM_MA0_CLK_H0
MEM_MA0_CLK_H1
MEM_MA0_CLK_H2
MEM_MA0_CLK_L0
MEM_MA0_CLK_L1
MEM_MA0_CLK_L2

VCC3

MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2

VCC_DDR

170

175

181

191

194

78

172

178

184

187

189

197

VDD

VDD53VDD

VDD59VDD64VDD

VDD67VDD

VDD69VDD

VDD

238

VDDSPD

188

A0

183

A1

63

A2

182

A3

61

A4

60

A5

180

A6

58

A7

179

A8

177

A9

70

A10

57

A11

176

A12

196

A13

174

A14

173

A15

71

BA0

190

BA1

54

BA2

125

DM0

134

DM1

146

DM2

155

DM3

202

DM4

211

DM5

223

DM6

232

DM7

164

DM8

126

NC(DQS9#)

135

NC(DQS10#)

147

NC(DQS11#)

156

NC(DQS12#)

203

NC(DQS13#)

212

NC(DQS14#)

224

NC(DQS15#)

233

NC(DQS16#)

165

NC(DQS17#)

7

DQS0

16

DQS1

28

DQS2

37

DQS3

84

DQS4

93

DQS5

105

DQS6

114

DQS7

46

DQS8

6

DQS0#

15

DQS1#

27

DQS2#

36

DQS3#

83

DQS4#

92

DQS5#

104

DQS6#

113

DQS7#

45

DQS8#

42

CB0

43

CB1

48

CB2

49

CB3

161

CB4

162

CB5

167

CB6

168

CB7

192

RAS#

74

CAS#

73

WE#

193

S0#

76

S1#

52

CKE0

171

CKE1

185

CK0

137

CK1

220

CK2

186

CK0#

138

CK1#

221

CK2#

VSS

VSS

VSS

231

234

237

VSS

VSS

VSS

VSS

VSS

213

216

219

222

225

228

DIMM 1

ADDR=1010000B

VDDQ

VDDQ51VDDQ

VDDQ56VDDQ

VDDQ62VDDQ

VDDQ72VDDQ

VDDQ75VDDQ

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

207

210

148

151

154

157

160

163

166

169

198

201

204

4

2

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

145

112

115

118

121

124

127

130

133

136

139

142

DIMM1

VSS85VSS82VSS79VSS66VSS65VSS50VSS47VSS44VSS41VSS38VSS35VSS32VSS29VSS26VSS23VSS20VSS17VSS14VSS11VSS8VSS5VSS

MEM_MA_DATA0

3

DQ0

MEM_MA_DATA1

4

DQ1

MEM_MA_DATA2

9

DQ2

MEM_MA_DATA3

10

DQ3

MEM_MA_DATA4

122

DQ4

MEM_MA_DATA5

123

DQ5

MEM_MA_DATA6

128

DQ6

MEM_MA_DATA7

129

DQ7

MEM_MA_DATA8

12

DQ8

MEM_MA_DATA9

13

DQ9

MEM_MA_DATA10

21

DQ10

MEM_MA_DATA11

22

DQ11

MEM_MA_DATA12

131

DQ12

MEM_MA_DATA13

132

DQ13

MEM_MA_DATA14

140

DQ14

MEM_MA_DATA15

141

DQ15

MEM_MA_DATA16

24

DQ16

MEM_MA_DATA17

25

DQ17

MEM_MA_DATA18

30

DQ18

MEM_MA_DATA19

31

DQ19

MEM_MA_DATA20

143

DQ20

MEM_MA_DATA21

144

DQ21

MEM_MA_DATA22

149

DQ22

MEM_MA_DATA23

150

DQ23

MEM_MA_DATA24

33

DQ24

MEM_MA_DATA25

34

DQ25

MEM_MA_DATA26

39

DQ26

MEM_MA_DATA27

40

DQ27

MEM_MA_DATA28

152

DQ28

MEM_MA_DATA29

153

DQ29

MEM_MA_DATA30

158

DQ30

MEM_MA_DATA31

159

DQ31

MEM_MA_DATA32

80

DQ32

MEM_MA_DATA33

81

DQ33

MEM_MA_DATA34

86

DQ34

MEM_MA_DATA35

87

DQ35

MEM_MA_DATA36

199

DQ36

MEM_MA_DATA37

200

DQ37

MEM_MA_DATA38

205

DQ38

MEM_MA_DATA39

206

DQ39

MEM_MA_DATA40

89

DQ40

MEM_MA_DATA41

90

DQ41

MEM_MA_DATA42

95

DQ42

MEM_MA_DATA43

96

DQ43

MEM_MA_DATA44

208

DQ44

MEM_MA_DATA45

209

DQ45

MEM_MA_DATA46

214

DQ46

MEM_MA_DATA47

215

DQ47

MEM_MA_DATA48

98

DQ48

MEM_MA_DATA49

99

DQ49

MEM_MA_DATA50

107

DQ50

MEM_MA_DATA51

108

DQ51

MEM_MA_DATA52

217

DQ52

MEM_MA_DATA53

218

DQ53

MEM_MA_DATA54

226

DQ54

MEM_MA_DATA55

227

DQ55

MEM_MA_DATA56

110

DQ56

MEM_MA_DATA57

111

DQ57

MEM_MA_DATA58

116

DQ58

MEM_MA_DATA59

117

DQ59

MEM_MA_DATA60

229

DQ60

MEM_MA_DATA61

230

DQ61

MEM_MA_DATA62

235

DQ62

MEM_MA_DATA63

236

DQ63

SMB_MEMCLK

120

SCL

SMB_MEMDATA

119

SDA

239

SA0

240

SA1

101

SA2

102

NC(TEST)

55

NC(Err_Out#)

68

NC(Par_In)

19

NC

MEM_MA0_ODT0

195

ODT0

77

ODT1

18

RESET#

VDDR_VREF

1

VREF

VSS88VSS91VSS94VSS97VSS

VSS

VSS

VSS

VSS

DDRII_DIMM_GREEN

100

103

106

109

R192 33R
R187 33R

MEM_MA0_ODT0 4,7

MEM_MA_DATA[63..0] 4

SMB_MEM_CLK 12
SMB_MEM_DATA 12

VDDR_VREF

C52
C0.1U16Y0402

MEM_MB_DM[7..0]4

3

MEM_MB_DQS_H[7..0]4
MEM_MB_DQS_L[7..0]4

MEM_MB_ADD[15..0]4,7

MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7

MEM_MB_RAS_L4,7
MEM_MB_CAS_L4,7

MEM_MB_WE_L4,7

MEM_MB0_CS_L04,7
MEM_MB0_CS_L14,7
MEM_MB_CKE04,7

MEM_MB0_CLK_H04,7
MEM_MB0_CLK_H14,7
MEM_MB0_CLK_H24,7
MEM_MB0_CLK_L04,7
MEM_MB0_CLK_L14,7
MEM_MB0_CLK_L24,7

MEM_MB_BANK04,7
MEM_MB_BANK14,7
MEM_MB_BANK24,7

MEM_MB_DQS_H0
MEM_MB_DQS_H1
MEM_MB_DQS_H2
MEM_MB_DQS_H3
MEM_MB_DQS_H4
MEM_MB_DQS_H5
MEM_MB_DQS_H6
MEM_MB_DQS_H7

MEM_MB_DQS_L0
MEM_MB_DQS_L1
MEM_MB_DQS_L2
MEM_MB_DQS_L3
MEM_MB_DQS_L4
MEM_MB_DQS_L5
MEM_MB_DQS_L6
MEM_MB_DQS_L7

MEM_MB_WE_L

MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15

MEM_MB_RAS_L
MEM_MB_CAS_L

MEM_MB0_CS_L0
MEM_MB0_CS_L1
MEM_MB_CKE0

MEM_MB0_CLK_H0
MEM_MB0_CLK_H1
MEM_MB0_CLK_H2
MEM_MB0_CLK_L0
MEM_MB0_CLK_L1
MEM_MB0_CLK_L2

VCC3

MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2

VCC_DDR

78

172

178

184

187

189

197

VDD

VDD53VDD

VDD59VDD64VDD

VDD67VDD

VDD69VDD

VDD

238

VDDSPD

188

A0

183

A1

63

A2

182

A3

61

A4

60

A5

180

A6

58

A7

179

A8

177

A9

70

A10

57

A11

176

A12

196

A13

174

A14

173

A15

71

BA0

190

BA1

54

BA2

125

DM0

134

DM1

146

DM2

155

DM3

202

DM4

211

DM5

223

DM6

232

DM7

164

DM8

126

NC(DQS9#)

135

NC(DQS10#)

147

NC(DQS11#)

156

NC(DQS12#)

203

NC(DQS13#)

212

NC(DQS14#)

224

NC(DQS15#)

233

NC(DQS16#)

165

NC(DQS17#)

7

DQS0

16

DQS1

28

DQS2

37

DQS3

84

DQS4

93

DQS5

105

DQS6

114

DQS7

46

DQS8

6

DQS0#

15

DQS1#

27

DQS2#

36

DQS3#

83

DQS4#

92

DQS5#

104

DQS6#

113

DQS7#

45

DQS8#

42

CB0

43

CB1

48

CB2

49

CB3

161

CB4

162

CB5

167

CB6

168

CB7

192

RAS#

74

CAS#

73

WE#

193

S0#

76

S1#

52

CKE0

171

CKE1

185

CK0

137

CK1

220

CK2

186

CK0#

138

CK1#

221

CK2#

VDDQ75VDDQ

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

207

210

213

216

219

222

225

228

231

234

237

181

191

194

VDDQ62VDDQ

VDDQ72VDDQ

VSS

VSS

VSS

VSS

VSS

163

166

169

198

201

204

ADDR=1010001B

175

VDDQ56VDDQ

VSS

VSS

160

170

VDDQ

VDDQ51VDDQ

VSS

VSS

VSS

151

154

157

DIMM 2

2

2

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

145

148

112

115

118

121

124

127

130

133

136

139

142

DIMM2

have swap MEM_MB_DATA6 MEM_MB_DATA1

VSS85VSS82VSS79VSS66VSS65VSS50VSS47VSS44VSS41VSS38VSS35VSS32VSS29VSS26VSS23VSS20VSS17VSS14VSS11VSS8VSS5VSS

MEM_MB_DATA0

3

DQ0

MEM_MB_DATA6

4

DQ1

MEM_MB_DATA2

9

DQ2

MEM_MB_DATA3

10

DQ3

MEM_MB_DATA4

122

DQ4

MEM_MB_DATA5

123

DQ5

MEM_MB_DATA1

128

DQ6

MEM_MB_DATA7

129

DQ7

MEM_MB_DATA8

12

DQ8

MEM_MB_DATA9

13

DQ9

MEM_MB_DATA10

21

DQ10

MEM_MB_DATA11

22

DQ11

MEM_MB_DATA12

131

DQ12

MEM_MB_DATA13

132

DQ13

MEM_MB_DATA14

140

DQ14

MEM_MB_DATA15

141

DQ15

MEM_MB_DATA16

24

DQ16

MEM_MB_DATA17

25

DQ17

MEM_MB_DATA18

30

DQ18

MEM_MB_DATA19

31

DQ19

MEM_MB_DATA20

143

DQ20

MEM_MB_DATA21

144

DQ21

MEM_MB_DATA22

149

DQ22

MEM_MB_DATA23

150

DQ23

MEM_MB_DATA24

33

DQ24

MEM_MB_DATA25

34

DQ25

MEM_MB_DATA26

39

DQ26

MEM_MB_DATA27

40

DQ27

MEM_MB_DATA28

152

DQ28

MEM_MB_DATA29

153

DQ29

MEM_MB_DATA30

158

DQ30

MEM_MB_DATA31

159

DQ31

MEM_MB_DATA32

80

DQ32

MEM_MB_DATA33

81

DQ33

MEM_MB_DATA34

86

DQ34

MEM_MB_DATA35

87

DQ35

MEM_MB_DATA36

199

DQ36

MEM_MB_DATA37

200

DQ37

MEM_MB_DATA38

205

DQ38

MEM_MB_DATA39

206

DQ39

MEM_MB_DATA40

89

DQ40

MEM_MB_DATA41

90

DQ41

MEM_MB_DATA42

95

DQ42

MEM_MB_DATA43

96

DQ43

MEM_MB_DATA44

208

DQ44

MEM_MB_DATA45

209

DQ45

MEM_MB_DATA46

214

DQ46

MEM_MB_DATA47

215

DQ47

MEM_MB_DATA48

98

DQ48

MEM_MB_DATA49

99

DQ49

MEM_MB_DATA50

107

DQ50

MEM_MB_DATA51

108

DQ51

MEM_MB_DATA52

217

DQ52

MEM_MB_DATA53

218

DQ53

MEM_MB_DATA54

226

DQ54

MEM_MB_DATA55

227

DQ55

MEM_MB_DATA56

110

DQ56

MEM_MB_DATA57

111

DQ57

MEM_MB_DATA58

116

DQ58

MEM_MB_DATA59

117

DQ59

MEM_MB_DATA60

229

DQ60

MEM_MB_DATA61

230

DQ61

MEM_MB_DATA62

235

DQ62

MEM_MB_DATA63

236

DQ63

SMB_MEMCLK

120

SCL

SMB_MEMDATA

119

SDA

239

SA0

240

SA1

101

SA2

102

NC(TEST)

55

NC(Err_Out#)

68

NC(Par_In)

19

NC

MEM_MB0_ODT0

195

ODT0

77

ODT1

18

RESET#

VDDR_VREF

1

VREF

VSS88VSS91VSS94VSS97VSS

VSS

VSS

VSS

VSS

DDRII_DIMM_ORANGE

100

103

106

109

MEM_MB_DATA[63..0] 4

VCC3

MEM_MB0_ODT0 4,7

VDDR_VREF

1

3VDUAL

SMB_MEM_CLK

3

3VDUAL

SMB_MEM_DATA

3

VCC_DDR VDDR_VREF

R55

C43
C0.1U16Y0402

56.2R1%

VDDR_VREF

C59

R66

56.2R1%
C0.1U16Y0402

C63
C0.1U16Y0402

2

D18
X_1PS226_SOT23

1

2

D17
X_1PS226_SOT23

1

C56
C1000P50X0402

A A

Micro Star Restricted Secret

Title

FIRST LOGICAL DDR DIMM

Document Number

5

4

3

2

MS-7298-0A

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

1

Last Revision Date:
Sheet

Friday, May 19, 2006

632

of

Rev

0A

5

4

3

2

1

C95

C0.1U16Y0402

X_C0.1U16Y0402

C262

C0.1U16Y0402

C0.1U16Y0402

C207

C22P16Y0402

X_C0.1U16Y0402

VCC_DDRVCC_DDR

C121

C0.1U16Y0402

C123

C0.1U16Y0402

VCCP

C217

C112

C125

C0.1U16Y0402

VCC_DDR

C30

C131

C0.1U16Y0402

VCC_DDR

C621 C0.1U25Y

C212

C214

C22P16Y0402

X_C0.1U16Y0402

C22P16Y0402

C216

MEM_MA_ADD[15..0]4,6

MEM_MB_ADD154,6

D D

MEM_MB_ADD144,6
MEM_MB_BANK24,6
MEM_MA_ADD94,6
MEM_MA_ADD114,6
MEM_MB_ADD124,6
MEM_MA_ADD74,6
MEM_MA_ADD84,6
MEM_MB_ADD74,6
MEM_MB_ADD84,6
MEM_MB_ADD64,6
MEM_MB_ADD54,6
MEM_MB_ADD14,6
MEM_MB_ADD24,6
MEM_MA_ADD14,6
MEM_MA_ADD24,6

MEM_MB_ADD104,6
MEM_MB_BANK04,6
MEM_MB_RAS_L4,6
MEM_MB0_CS_L04,6

MEM_MA_BANK04,6
MEM_MB_BANK14,6
MEM_MA_RAS_L4,6
MEM_MA0_CS_L04,6

MEM_MA_ADD134,6
MEM_MA0_CS_L14,6

C C

MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_BANK2
MEM_MA_ADD9
MEM_MA_ADD11
MEM_MB_ADD12
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MA_ADD1
MEM_MA_ADD2

MEM_MB_ADD10
MEM_MB_BANK0
MEM_MB_RAS_L
MEM_MB0_CS_L0

MEM_MA_BANK0
MEM_MB_BANK1
MEM_MA_RAS_L
MEM_MA0_CS_L0

MEM_MA_ADD13

MEM_MA0_CS_L1

RN15 8P4R-47R0402

1

2

3

4

5

6

7

RN16 8P4R-47R0402

RN18 8P4R-47R0402

RN20 8P4R-47R0402

RN24 8P4R-47R0402

RN22 8P4R-47R0402

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

R108 47R0402
R113 47R0402

VTT_DDR

MEM_MA0_CLK_H24,6

MEM_MA0_CLK_L24,6

MEM_MA0_CLK_H14,6

MEM_MA0_CLK_L14,6

MEM_MA0_CLK_H04,6

MEM_MA0_CLK_L04,6

MEM_MB0_CLK_H24,6

MEM_MB0_CLK_L24,6

MEM_MB0_CLK_H14,6

MEM_MB0_CLK_L14,6

MEM_MB0_CLK_H04,6

MEM_MB0_CLK_L04,6

MEM_MA0_CLK_H2

MEM_MA0_CLK_L2

MEM_MA0_CLK_H1

MEM_MA0_CLK_L1

MEM_MA0_CLK_H0

MEM_MA0_CLK_L0

MEM_MB0_CLK_H2

MEM_MB0_CLK_L2

MEM_MB0_CLK_H1

MEM_MB0_CLK_L1

MEM_MB0_CLK_H0

MEM_MB0_CLK_L0

C185
C1.5P50N0402

C72
C1.5P50N0402

C124

C1.5P50N0402

C176
C1.5P50N0402

C71
C1.5P50N0402

C122
C1.5P50N0402

MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8

MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3 MEM_MB_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0

MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L

MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0

C565 C22P50N0402
C566 C22P50N0402
C590 C22P50N0402
C568 C22P50N0402
C573 C22P50N0402
C587 C22P50N0402
C572 C22P50N0402
C577 C22P50N0402
C576 C22P50N0402
C578 C22P50N0402
C580 C22P50N0402
C583 C22P50N0402
C579 C22P50N0402
C585 C22P50N0402
C581 C22P50N0402
C588 C22P50N0402

C589 C22P50N0402
C586 C22P50N0402
C584 C22P50N0402

C569 C22P50N0402
C591 C22P50N0402
C582 C22P50N0402

Decoupling Between Processor and DIMMs

VTT_DDR

C199

X_C0.1U16Y0402

X_C0.1U16Y0402

C193

C0.1U16Y0402

C173

C0.1U16Y0402

C156

Layout: Spread out on VTT pour

C181

X_C0.1U16Y0402

C0.1U16Y0402

C111

C190

X_C0.1U16Y0402

X_C0.1U16Y0402

C150

MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7MEM_MA_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4

MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0

MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L

MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0

C130

X_C0.1U16Y0402

C0.1U16Y0402

C109 C22P50N0402
C110 C22P50N0402
C171 C22P50N0402
C116 C22P50N0402
C118 C22P50N0402
C161 C22P50N0402
C119 C22P50N0402
C132 C22P50N0402
C128 C22P50N0402
C133 C22P50N0402
C141 C22P50N0402
C148 C22P50N0402
C140 C22P50N0402
C152 C22P50N0402
C145 C22P50N0402
C162 C22P50N0402

C167 C22P50N0402
C158 C22P50N0402
C151 C22P50N0402

C115 C22P50N0402
C172 C22P50N0402
C147 C22P50N0402

C202

C137

C0.1U16Y0402

X_C0.1U16Y0402

C159

VTT_DDR

C28

C0.1U16Y0402

C86

C0.1U16Y0402

C77

C0.1U16Y0402

C0.1U16Y0402

VTT_DDR

X_C10P50N0402

VCC_DDR

X_C10P50N0402

C241

C0.1U16Y0402

C227

C223

X_C10P50N0402

C58

C242

X_C10P50N0402

X_C10P50N0402

VCC_DDR

X_C0.1U16Y0402

C250

C0.1U16Y0402

For EMI

X_C10P50N0402

C200

C218

X_C0.1U16Y0402

C105

C103

C0.1U16Y0402

MEM_MB_ADD[15..0]4,6

MEM_MB_CKE14
MEM_MA_BANK24,6

MEM_MA_ADD124,6

B B

A A

MEM_MB_CKE04,6
MEM_MB_ADD94,6
MEM_MB_ADD114,6
MEM_MA_ADD64,6
MEM_MA_ADD54,6
MEM_MA_ADD44,6
MEM_MA_ADD34,6
MEM_MB_ADD44,6
MEM_MB_ADD34,6
MEM_MA_ADD04,6
MEM_MA_BANK14,6
MEM_MB_ADD04,6
MEM_MA_ADD104,6

MEM_MB_WE_L4,6
MEM_MB_CAS_L4,6
MEM_MA_WE_L4,6
MEM_MA_CAS_L4,6

MEM_MA_CKE04,6
MEM_MA_ADD154,6
MEM_MA_ADD144,6

MEM_MA0_ODT04,6
MEM_MB0_ODT04,6
MEM_MB_ADD134,6
MEM_MB0_CS_L14,6
MEM_MA_CKE14

MEM_MB_CKE1

MEM_MA_BANK2
MEM_MA_ADD12
MEM_MB_CKE0
MEM_MB_ADD9
MEM_MB_ADD11
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MA_ADD0
MEM_MA_BANK1
MEM_MB_ADD0
MEM_MA_ADD10

MEM_MB_WE_L
MEM_MB_CAS_L
MEM_MA_WE_L
MEM_MA_CAS_L

MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14

MEM_MA0_ODT0
MEM_MB0_ODT0
MEM_MB_ADD13
MEM_MB0_CS_L1
MEM_MA_CKE1

R117 47R0402
RN14 8P4R-47R0402

1
3
5
7

RN17 8P4R-47R0402

1
3
5
7

RN19 8P4R-47R0402

1
3
5
7

RN21 8P4R-47R0402

1
3
5
7

RN26 8P4R-47R0402

1
3
5
7

RN13 8P4R-47R0402

1
3
5
7

RN27 8P4R-47R0402

1
3
5
7

R144 47R0402

VTT_DDR

2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8

2
4
6
8

2
4
6
8

2
4
6
8

C0.1U16Y0402

C0.1U16Y0402

C29

C231

C0.1U16Y0402

C256

X_C10P50N0402

C209

X_C0.1U16Y0402

C225

C226

X_C0.1U16Y0402

X_C0.1U16Y0402

C108

C0.1U16Y0402

C26

X_C10P50N0402

C230

X_C0.1U16Y0402

C222

C0.1U16Y0402

C22

C232

C254

Micro Star Restricted Secret

Title

DDR Terminatior

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

MS-7298-0A

Last Revision Date:
Sheet

1

Friday, May 19, 2006

732

Rev

0A

of

5

4

3

2

1

U13F

HT_CADOUT_H[15..0]3

D D

HT_CADOUT_L[15..0]3

C C

HT_CADOUT_H[15..0]

HT_CADOUT_L[15..0]

HT_CLKOUT_H03

HT_CLKOUT_L03

HT_CLKOUT_H13

HT_CLKOUT_L13

HT_CTLOUT_H03
HT_CTLOUT_L03

HT_CADOUT_H0
HT_CADOUT_H1
HT_CADOUT_H2
HT_CADOUT_H3
HT_CADOUT_H4
HT_CADOUT_H5
HT_CADOUT_H6
HT_CADOUT_H7
HT_CADOUT_H8
HT_CADOUT_H9
HT_CADOUT_H10
HT_CADOUT_H11
HT_CADOUT_H12
HT_CADOUT_H13
HT_CADOUT_H14
HT_CADOUT_H15

HT_CADOUT_L0
HT_CADOUT_L1
HT_CADOUT_L2
HT_CADOUT_L3
HT_CADOUT_L4
HT_CADOUT_L5
HT_CADOUT_L6
HT_CADOUT_L7
HT_CADOUT_L8
HT_CADOUT_L9
HT_CADOUT_L10
HT_CADOUT_L11
HT_CADOUT_L12
HT_CADOUT_L13
HT_CADOUT_L14
HT_CADOUT_L15

HT_CTLOUT_H0
HT_CTLOUT_L0

Y23

W24

V24
U22
R24
P24
P22
N22
Y21
V21

W21

T21
R18
P16
N20
M17

Y22

W23

V23
U21
R23
P23
P21
N21

Y20
W20
W22

U20

R19

P17

N19

N18

T23

T22

R21

R20

M23

M22

HT_CPU_RXD0_P
HT_CPU_RXD1_P
HT_CPU_RXD2_P
HT_CPU_RXD3_P
HT_CPU_RXD4_P
HT_CPU_RXD5_P
HT_CPU_RXD6_P
HT_CPU_RXD7_P
HT_CPU_RXD8_P
HT_CPU_RXD9_P
HT_CPU_RXD10_P
HT_CPU_RXD11_P
HT_CPU_RXD12_P
HT_CPU_RXD13_P
HT_CPU_RXD14_P
HT_CPU_RXD15_P

HT_CPU_RXD0_N
HT_CPU_RXD1_N
HT_CPU_RXD2_N
HT_CPU_RXD3_N
HT_CPU_RXD4_N
HT_CPU_RXD5_N
HT_CPU_RXD6_N
HT_CPU_RXD7_N
HT_CPU_RXD8_N
HT_CPU_RXD9_N
HT_CPU_RXD10_N
HT_CPU_RXD11_N
HT_CPU_RXD12_N
HT_CPU_RXD13_N
HT_CPU_RXD14_N
HT_CPU_RXD15_N

HT_CPU_RX_CLK0_P
HT_CPU_RX_CLK0_N
HT_CPU_RX_CLK1_P
HT_CPU_RX_CLK1_N

HT_CPU_RXCTL_P
HT_CPU_RXCTL_N

VCC1_2HT

?

B B

1P2VPLL_PWR9,10

1P2VPLL_PWR

R150 150R1%

FB19 X_0R

CP23
X_COPPER

PLACE ON BACK SIDE

C598

C1U16Y

R147 150R1%

1P2VPLL_FILT

C600

C0.1U16Y0402

W19

Y19

N16

T13

HT_CPU_CAL_1P2V
HT_CPU_CAL_GND

+1.2V_PLLHTCPU

+1.2V_PLLHTMCP

?

NVIDIA-C51-G-A1

C51

SEC 1 OF 6

HT_CPU_TXD0_P
HT_CPU_TXD1_P
HT_CPU_TXD2_P
HT_CPU_TXD3_P
HT_CPU_TXD4_P
HT_CPU_TXD5_P
HT_CPU_TXD6_P
HT_CPU_TXD7_P
HT_CPU_TXD8_P

HT_CPU_TXD9_P
HT_CPU_TXD10_P
HT_CPU_TXD11_P
HT_CPU_TXD12_P
HT_CPU_TXD13_P
HT_CPU_TXD14_P
HT_CPU_TXD15_P

HT_CPU_TXD0_N

HT_CPU_TXD1_N

HT_CPU_TXD2_N

HT_CPU_TXD3_N

HT_CPU_TXD4_N

HT_CPU_TXD5_N

HT_CPU_TXD6_N

HT_CPU_TXD7_N

HT_CPU_TXD8_N

HT_CPU_TXD9_N

HT_CPU_TXD10_N
HT_CPU_TXD11_N
HT_CPU_TXD12_N
HT_CPU_TXD13_N
HT_CPU_TXD14_N
HT_CPU_TXD15_N

HT_CPU_TX_CLK0_P

HT_CPU_TX_CLK0_N

HT_CPU_TX_CLK1_P

HT_CPU_TX_CLK1_N

HT_CPU_TXCTL_P
HT_CPU_TXCTL_N

CLKOUT_PRI_200MHZ_P

CLKOUT_PRI_200MHZ_N
CLKOUT_SEC_200MHZ_P
CLKOUT_SEC_200MHZ_N

HT_CPU_REQ*

HT_CPU_STOP*
HT_CPU_RESET*
HT_CPU_PWRGD

+2.5V_PLLHTCPU

VCC2_5

C23
D23
E22
F23
H22
J21
K21
K23
D21
F19
F21
G20
J19
L17
L20
L18

C24
D24
E23
F24
H23
J22
K22
K24
D22
E20
E21
G19
J18
K17
K19
L19

G23
G24
G22
G21

L23
L24

B24
B23
A22
B21

F18
G18
D20
E19

L16

HT_CADIN_H0
HT_CADIN_H1
HT_CADIN_H2
HT_CADIN_H3
HT_CADIN_H4
HT_CADIN_H5
HT_CADIN_H6
HT_CADIN_H7
HT_CADIN_H8
HT_CADIN_H9
HT_CADIN_H10
HT_CADIN_H11
HT_CADIN_H12
HT_CADIN_H13
HT_CADIN_H14
HT_CADIN_H15

HT_CADIN_L0
HT_CADIN_L1
HT_CADIN_L2
HT_CADIN_L3
HT_CADIN_L4
HT_CADIN_L5
HT_CADIN_L6
HT_CADIN_L7
HT_CADIN_L8
HT_CADIN_L9
HT_CADIN_L10
HT_CADIN_L11
HT_CADIN_L12
HT_CADIN_L13
HT_CADIN_L14
HT_CADIN_L15

HT_CLKIN_H0
HT_CLKIN_L0
HT_CLKIN_H1
HT_CLKIN_L1

HT_CTLIN_H0
HT_CTLIN_L0

2P5V_PLL

C244

HT_CADIN_H[15..0]

HT_CADIN_L[15..0]

HT_STOP#
LDT_RST
CPU_PWRGD

FB20 X_0R

C595

CP24
X_COPPER

HT_CADIN_H[15..0] 3

HT_CADIN_L[15..0] 3

HT_CLKIN_H0 3
HT_CLKIN_L0 3
HT_CLKIN_H1 3
HT_CLKIN_L1 3

HT_CTLIN_H0 3
HT_CTLIN_L0 3

CPU_CLK 3
CPU_CLK# 3

2P5V_PLL

HT_STOP# 3

LDT_RST 3
CPU_PWRGD 3

C599

C597

C1U16Y

C0.1U16Y0402

HTMCP_UP[7..0]11

2P5V_PLL 9

HTMCP_UP[7..0]

HTMCP_UP#[7..0]11

HTMCP_UP#[7..0]

HTMCP_UPCLK011

HTMCP_UPCLK0#11

HTMCP_UPCNTL11

HTMCP_UPCNTL#11

HTMCP_REQ#11

HTMCP_STOP#11

HTMCP_RST#11

HTMCP_PWRGD11

MCPOUT_25MHZ11

MCPOUT_200MHZ11

MCPOUT_200MHZ#11

HTMCP_UP0
HTMCP_UP1
HTMCP_UP2
HTMCP_UP3
HTMCP_UP4
HTMCP_UP5
HTMCP_UP6
HTMCP_UP7

HTMCP_UPCLK0
HTMCP_UPCLK0#

HTMCP_UPCNTL
HTMCP_UPCNTL#

HTMCP_REQ#
HTMCP_STOP#
HTMCP_RST#
HTMCP_PWRGD

MCPOUT_25MHZ

MCPOUT_200MHZ
MCPOUT_200MHZ#

HTMCP_UP#0
HTMCP_UP#1
HTMCP_UP#2
HTMCP_UP#3
HTMCP_UP#4
HTMCP_UP#5
HTMCP_UP#6
HTMCP_UP#7

AD10
AD11
AC12
AC13

AA11

AC10
AC11
AB12
AB13

AD14
AC14

AD6
AC7
AA8
AA9

AA6

W7

Y10
V11

W12

AC6
AB7
AB8
AB9

AA7

W9

W10

Y12

W11

V13

AD9
AC9
U10

T10

AB5
AA5
AC5
AD5

AC4

W5

Y8
V9

Y6
Y7

Y5

U13A

?

HT_MCP_RXD0_P
HT_MCP_RXD1_P
HT_MCP_RXD2_P
HT_MCP_RXD3_P
HT_MCP_RXD4_P
HT_MCP_RXD5_P
HT_MCP_RXD6_P
HT_MCP_RXD7_P
HT_MCP_RXD8_P
HT_MCP_RXD9_P
HT_MCP_RXD10_P
HT_MCP_RXD11_P
HT_MCP_RXD12_P
HT_MCP_RXD13_P
HT_MCP_RXD14_P
HT_MCP_RXD15_P

HT_MCP_RXD0_N
HT_MCP_RXD1_N
HT_MCP_RXD2_N
HT_MCP_RXD3_N
HT_MCP_RXD4_N
HT_MCP_RXD5_N
HT_MCP_RXD6_N
HT_MCP_RXD7_N
HT_MCP_RXD8_N
HT_MCP_RXD9_N
HT_MCP_RXD10_N
HT_MCP_RXD11_N
HT_MCP_RXD12_N
HT_MCP_RXD13_N
HT_MCP_RXD14_N
HT_MCP_RXD15_N

HT_MCP_RX_CLK0_P
HT_MCP_RX_CLK0_N
HT_MCP_RX_CLK1_P
HT_MCP_RX_CLK1_N

HT_MCP_RXCTL_P
HT_MCP_RXCTL_N

HT_MCP_REQ*
HT_MCP_STOP*
HT_MCP_RESET*
HT_MCP_PWRGD

CLKIN_25MHZ

CLKIN_200MHZ_P
CLKIN_200MHZ_N

?

C51

SEC 2 OF 6

SCLKIN_MCLKOUT_200MHZ_P

SCLKIN_MCLKOUT_200MHZ_N

HT_MCP_TXD0_P
HT_MCP_TXD1_P
HT_MCP_TXD2_P
HT_MCP_TXD3_P
HT_MCP_TXD4_P
HT_MCP_TXD5_P
HT_MCP_TXD6_P
HT_MCP_TXD7_P
HT_MCP_TXD8_P

HT_MCP_TXD9_P
HT_MCP_TXD10_P
HT_MCP_TXD11_P
HT_MCP_TXD12_P
HT_MCP_TXD13_P
HT_MCP_TXD14_P
HT_MCP_TXD15_P

HT_MCP_TXD0_N

HT_MCP_TXD1_N

HT_MCP_TXD2_N

HT_MCP_TXD3_N

HT_MCP_TXD4_N

HT_MCP_TXD5_N

HT_MCP_TXD6_N

HT_MCP_TXD7_N

HT_MCP_TXD8_N

HT_MCP_TXD9_N

HT_MCP_TXD10_N
HT_MCP_TXD11_N
HT_MCP_TXD12_N
HT_MCP_TXD13_N
HT_MCP_TXD14_N
HT_MCP_TXD15_N

HT_MCP_TX_CLK0_P

HT_MCP_TX_CLK0_N

HT_MCP_TX_CLK1_P

HT_MCP_TX_CLK1_N

HT_MCP_TXCTL_P
HT_MCP_TXCTL_N

CLKOUT_CTERM

HT_MCP_CAL_1P2V
HT_MCP_CAL_GND

HTMCP_DWN0

AC24

HTMCP_DWN1

AD23

HTMCP_DWN2

AC22

HTMCP_DWN3

AC20

HTMCP_DWN4

AB18

HTMCP_DWN5

AA17

HTMCP_DWN6

AB16

HTMCP_DWN7

AC16
AB21
AB20
AB19
W18
W15
AA15
Y14
W13

HTMCP_DWN#0

AC23

HTMCP_DWN#1

AD22

HTMCP_DWN#2

AC21

HTMCP_DWN#3

AD20

HTMCP_DWN#4

AC18

HTMCP_DWN#5

AB17

HTMCP_DWN#6

AB15

HTMCP_DWN#7

AD16
AB22
AA20
AA19
V17
V15
Y15
W14
Y13

AC19
AD19
Y17
W17

HTMCP_DWNCNTL

AC15

HTMCP_DWNCNTL#

AD15

R155 2.37K/1

B22
A20

B20

R148 150R1%

AB23

R149 150R1%

AB24

HTMCP_DWNCLK0
HTMCP_DWNCLK0#

2.37K Ohm

HTMCP_DWN[7..0]

HTMCP_DWN#[7..0]

VCC1_2

HTMCP_DWN[7..0] 11

HTMCP_DWN#[7..0] 11

HTMCP_DWNCLK0 11

HTMCP_DWNCLK0# 11

HTMCP_DWNCNTL 11
HTMCP_DWNCNTL# 11

A A

5

4

X_C4.7U10Y0805

X_C0.1U16Y0402

PLACE ON BACK SIDE

Micro Star Restricted Secret

Title

Document Number

3

2

C51PV-1/ HT CPU & MCP

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

MS-7298-0A

1

Last Revision Date:

Friday, May 19, 2006

Sheet

Rev

0A

of

832

5

U13B

?

J8

PED_RX016
PED_RX116
PED_RX216
PED_RX316
PED_RX416
PED_RX516
PED_RX616
PED_RX716

PC0_PRSNT#16

PE1_RX16
PE1_RX*16

PED_RX816
PED_RX916
PED_RX1016
PED_RX1116
PED_RX1216
PED_RX1316
PED_RX1416
PED_RX1516

PED_RX0*16
PED_RX1*16
PED_RX2*16
PED_RX3*16
PED_RX4*16
PED_RX5*16
PED_RX6*16
PED_RX7*16
PED_RX8*16
PED_RX9*16
PED_RX10*16
PED_RX11*16
PED_RX12*16
PED_RX13*16
PED_RX14*16
PED_RX15*16

R229 10KR0402

VCC3

PE1_RX*

D D

C C

PC1_PRSNT#16

R230 10KR0402

VCC3

R231 10KR0402

VCC3

1P2VPLL_PWR

1P2VPLL_PWR8,10

B B

FB21 X_0R
CP10

X_COPPER

PLACE ON BACK SIDE

C603

C0.1U16Y0402

J6

K9

L6

L7
M9
N8
N6
R6
P3
R8
U6
T8
U7
V4
Y3

J7

J5

J9

L5

L8
M8
N7
N5
R5
P4
R7
U5
T9
U8
V3

AA3

D1

G6
H6

E2

J4

K3
E3

D3
E4

AC3

AB3

T11

PE0_RX0_P
PE0_RX1_P
PE0_RX2_P
PE0_RX3_P
PE0_RX4_P
PE0_RX5_P
PE0_RX6_P
PE0_RX7_P
PE0_RX8_P
PE0_RX9_P
PE0_RX10_P
PE0_RX11_P
PE0_RX12_P
PE0_RX13_P
PE0_RX14_P
PE0_RX15_P

PE0_RX0_N
PE0_RX1_N
PE0_RX2_N
PE0_RX3_N
PE0_RX4_N
PE0_RX5_N
PE0_RX6_N
PE0_RX7_N
PE0_RX8_N
PE0_RX9_N
PE0_RX10_N
PE0_RX11_N
PE0_RX12_N
PE0_RX13_N
PE0_RX14_N
PE0_RX15_N

PE0_PRSNT*

PE1_RX_P
PE1_RX_N

PE1_PRSNT*

PE2_RX_P
PE2_RX_N

PE2_PRSNT*

PE1_CLKREQ*/CLK
PE2_CLKREQ*/DATA

PE_REFCLKIN_P
PE_REFCLKIN_N

+1.2V_PLLPE

?

SEC 3 OF 6

C51

PE_CTERM_GND

PE0_TX0_P
PE0_TX1_P
PE0_TX2_P
PE0_TX3_P
PE0_TX4_P
PE0_TX5_P
PE0_TX6_P
PE0_TX7_P
PE0_TX8_P

PE0_TX9_P
PE0_TX10_P
PE0_TX11_P
PE0_TX12_P
PE0_TX13_P
PE0_TX14_P
PE0_TX15_P

PE0_TX0_N

PE0_TX1_N

PE0_TX2_N

PE0_TX3_N

PE0_TX4_N

PE0_TX5_N

PE0_TX6_N

PE0_TX7_N

PE0_TX8_N

PE0_TX9_N
PE0_TX10_N
PE0_TX11_N
PE0_TX12_N
PE0_TX13_N
PE0_TX14_N
PE0_TX15_N

PE0_REFCLK_P
PE0_REFCLK_N

PE1_TX_P

PE1_TX_N

PE1_REFCLK_P
PE1_REFCLK_N

PE2_TX_P

PE2_TX_N

PE2_REFCLK_P
PE2_REFCLK_N

PE_TSTCLK_P

PE_TSTCLK_N

PE_RST*

4

L1
L3
L4
M4
P1
R1
R3
R4
U4
V1
W1
W3
AA1
AB1
AC1
AD2

L2
M2
M3
N3
P2
R2
T2
T3
U3
V2
W2
Y2
AA2
AB2
AC2
AD3

K1
K2

G4
G5

G2
G3

H4
J3

H2
H3

F1
F2

G1

D2

PE1_TXPE1_RX
PE1_TX*

PE1_CLK
PE1_CLK*

R232 X_100R

PE_RST*

PE_COMP

PED_TX0 16
PED_TX1 16
PED_TX2 16
PED_TX3 16
PED_TX4 16
PED_TX5 16
PED_TX6 16
PED_TX7 16
PED_TX8 16
PED_TX9 16
PED_TX10 16
PED_TX11 16
PED_TX12 16
PED_TX13 16
PED_TX14 16
PED_TX15 16

PED_TX0* 16
PED_TX1* 16
PED_TX2* 16
PED_TX3* 16
PED_TX4* 16
PED_TX5* 16
PED_TX6* 16
PED_TX7* 16
PED_TX8* 16
PED_TX9* 16
PED_TX10* 16
PED_TX11* 16
PED_TX12* 16
PED_TX13* 16
PED_TX14* 16
PED_TX15* 16

PE0_CLK
PE0_CLK*

PE1_TX 16
PE1_TX* 16

PE1_CLK 16
PE1_CLK* 16

PE_RST* 16

R228 2.37KR1%

PE0_CLK 16
PE0_CLK* 16

DAC_RED26
DAC_GREEN26
DAC_BLUE26

VCC3

DAC_HSYNC

C114
C10P50N

C117

C10P50N

FB9 X_0R0805

CP17
X_COPPER

DAC_VSYNC

C138

X_C10P50N

3

C120

C10P50N

PLACE NEAR C51

C266

X_C4.7U10Y0805

C139

X_C10P50N

R206
150R1%

1P2VPLL_PWR8,10

R200
150R1%

R211

150R1%

3P3V_DAC

C267
C0.1U16Y0402

1P2VPLL_PWR

10 mil7.5 mil

DAC_HSYNC26

DAC_VSYNC26

R212 124R1%
C279 C0.01U16X0402

2P5V_PLL8

C327

C0.1U16Y0402

DAC_HSYNC
DAC_VSYNC

3P3V_DAC

2P5V_PLL

C326
C0.1U16Y0402

2

U13C

?

A5

DAC_RED

B6

DAC_GREEN

A6

DAC_BLUE

B7

DAC_HSYNC

C7

DAC_VSYNC

D8

DAC_RSET

D9

DAC_VREF

C8

DAC_IDUMP

A9

+3.3V_DAC

H13

+2.5V_PLLGPU

C9

XTAL_IN

B9

XTAL_OUT

R9

+1.2V_PLLGPU

P9

+1.2V_PLLCORE

H16

+1.2V_PLLIFP

?

C51

SEC 4 OF 6

IFPA_TXC_P

IFPA_TXC_N

IFPA_TXD0_P
IFPA_TXD1_P
IFPA_TXD2_P
IFPA_TXD3_P

IFPA_TXD0_N
IFPA_TXD1_N
IFPA_TXD2_N
IFPA_TXD3_N

IFPB_TXC_P

IFPB_TXC_N

IFPB_TXD4_P
IFPB_TXD5_P
IFPB_TXD6_P
IFPB_TXD7_P

IFPB_TXD4_N
IFPB_TXD5_N
IFPB_TXD6_N
IFPB_TXD7_N

IFPAB_PROBE

IFPAB_RSET

+2.5V_PLLIFP

+2.5V_PLLCORE

PKG_TEST

TEST_MODE_EN

JTAG_TCK

JTAG_TDI
JTAG_TDO
JTAG_TMS

JTAG_TRST*

C14
B13

A15
D15
A14
F14

B15
C15
B14
E14

A10
B10

B11
E13
D13
B12

A11
F13
C13
C12

A16
F15

E16
H12

D17
C17

C18
B19
C19
B18
A19

2P5V_PLL
2P5V_PLL

R177 1KR0402

JTAG_TCK
JTAG_TDI

JTAG_TMS
JTAG_TRST*

1

3.3V FOR TMDS

2P5V_PLL 8

R172 10KR0402
R169 10KR0402

R163 10KR0402
R168 10KR0402

VCC2_5

A A

Micro Star Restricted Secret

Title

Document Number

5

4

3

2

C51PV-2 / PCI-E & DAC

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

MS-7298-0A

1

Last Revision Date:

Friday, May 19, 2006

Sheet

Rev

0A

932

of

A

B

C

D

E

C51 DECOUPLING

PLACE ON BACK SIDE

VCC1_2

4 4

VCC1_2

3 3

VCC1_2HT

VCC3

2 2

G11

AB11
AA18

W16

E10
F10
F11

H11

T15
U13
U11

U16
U15

K16
M16
R16
M21

T16
U17
C21
H17

D18
C10

U13E

C51

B5

+1.2V_CORE

C6

+1.2V_CORE

D7

+1.2V_CORE

E8

+1.2V_CORE

E9

+1.2V_CORE
+1.2V_CORE
+1.2V_CORE
+1.2V_CORE
+1.2V_CORE
+1.2V_CORE

J11

+1.2V_CORE

J12

+1.2V_CORE

J13

+1.2V_CORE

J14

+1.2V_CORE

+1.2V_HTMCP
+1.2V_HTMCP
+1.2V_HTMCP

Y9

+1.2V_HTMCP
+1.2V_HTMCP
+1.2V_HTMCP
+1.2V_HTMCP
+1.2V_HTMCP
+1.2V_HTMCP

B4

+1.2V_PED

C5

+1.2V_PED

D6

+1.2V_PED

E7

+1.2V_PED

+1.2V_HT
+1.2V_HT
+1.2V_HT
+1.2V_HT

J20

+1.2V_HT
+1.2V_HT
+1.2V_HT
+1.2V_HT
+1.2V_HT

+3.3V
+3.3V

?

SEC 5 OF 6

+1.2V_PEA
+1.2V_PEA
+1.2V_PEA
+1.2V_PEA
+1.2V_PEA
+1.2V_PEA
+1.2V_PEA
+1.2V_PEA

+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL

+2.5V_CORE
+2.5V_CORE

+2.5V_IFPA
+2.5V_IFPB

FB11

X_30L3_15_0805

A3
B3
C4
D5
E6
F7
F8
F9

A2
B2
C2
C3
D4
E5
F6
G7
G8
G9
H10
J10

C16
B16

G15
H15

FB12

X_30L3_15_0805

VCC2_5

3P3_IFPA_L

CP5
X_COPPER

1P2VPEA_PWR

VCC1_2

C0.1U25Y

CP7
X_COPPER

1P2VPLL_PWR

C594

C228

4.7u/10V/8

1P2VPLL_PWR 8,9

FB31 X_0R

CP25
X_COPPER

X_C10U10Y0805

VCC3

3.3V FOR TMDS

VCC1_2

C608

C1U16Y

VCC1_2

C288

X_C10U10Y0805

1P2VPLL_PWR

C328

C4.7U10Y0805

C4.7U10Y0805

C308

C10U10Y0805

X_C4.7U10Y0805

VCC1_2HT

C592

C0.1U25Y

PLACE ON BACK SIDE
CENTER OF C51

C606

C609

C1U16Y

X_C0.1U25Y

C278

C264

X_C0.1U16Y0402

C329

C602

C0.1U25Y

1P2VPEA_PWR

*

C309

X_C0.1U16Y0402

C593

C0.1U25Y

C0.1U16Y0402

C283

X_C0.1U25Y

C271

X_C0.1U16Y0402

X_C0.1U16Y0402

C607

C0.1U25Y

*

C335

C324

1u/6.3V

C0.1U16Y0402

C251

C245

C0.1U16Y0402

C0.1U16Y0402

C610

C0.1U25Y

C287

C0.1U16Y0402

C611

C0.1U25Y

C323

C0.1U16Y0402

C211

X_C0.1U16Y0402

C605

C0.1U25Y

C260

X_C0.1U16Y0402

C604

C0.1U25Y

X_C0.1U16Y0402

C322

C0.1U16Y0402

*

C220

X_C0.1U16Y0402

**

C282

C281

X_C0.1U16Y0402

*

*

C331

C330

X_C0.1U16Y0402

C298

C325

C0.1U16Y0402

*

C178

C177

X_C0.1U16Y0402

X_C0.1U16Y0402

*

C182

X_C0.1U16Y0402

VCC1_2

C10

C0.1U25Y

C0.1U16Y0402

**

C215

MCPHT CORE BALLS

C11

C0.1U25Y

VCC3

C383

B1

E11

L12

P14

N14

M14

P13

N13

M13

P12

N12

M12

P11

N11

M11

L11

AA24

AA23

A23

AA22

V22

R22

L22

F22

AB6

C22

H21

Y16

G13

U12

AB14

R17

C20

T14

V19

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

V8

PE_GNDF4PE_GNDV6PE_GNDK8PE_GNDH8PE_GNDW8PE_GNDW6PE_GNDT6PE_GNDP6PE_GNDM6PE_GNDK6PE_GND

C51

SEC 6 OF 6

?

U13D

1 1

GNDC1GND

AA21

GND

AA13

GND

GND

GND

GND

GND

E12

C11

U14

AA4

AB4

A

GND

GND

GND

GND

GND

GND

GND

F12

E15

E18

Y18

U18

D11

AB10

GND

GND

GND

GND

GND

GND

GND

J17

F16

E17

Y11

N17

U19

G17

GND

GND

GND

GND

GND

GND

GND

J16

L21

T12

F17

T17

H19

D19

GND

GND

GND

GND

GND

GND

GND

J15

L13

L14

T19

P19

H14

M19

B

?

PE_GNDU9PE_GNDY4PE_GNDW4PE_GNDT4PE_GNDN4PE_GNDK4PE_GNDN9PE_GNDP8PE_GNDL9PE_GNDF3PE_GND

H9

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

C

D

http://www.msi.com.tw

C51PV-3/PWR/GND

MS-7298-0A

Last Revision Date:
Sheet

E

Friday, May 19, 2006

10 32

Rev

0A

of