MSI MS-6768 Schematics
8
7
6
5
4
3
2
1
Cover Sheet
Block Diagram
CLOCK GEN
D D
AMD CPU Sockets 462
Via VT8378 KM400 North Bridge
1
2
3
4 - 5
6 - 8
MS-6768 Ver : 0A
VIA KM400 + VT8237
Chipset
DDR SLOT
DDR TERMINATOR
9
10
CPU:
AGP SLOT
Via VT8237 South Bridge 12 - 14
PCI SLOT 1,2&3 15
C C
LAN
IDE CONNECTOR
11
16
17
AMD Athlon XP / Athlon / Duron Socket 462
System Chipset:
VIA VT8378 (KM400 ) + VT8237
On Board Chipset:
USB & KB/MS CONNECTOR
18
LPC Super I/O -- W83697HF
AC'97 CODEC
FLASH ROM & FAN CONNECTOR
19
20
Lan : Via PHY VT6103
I1394A VT6307
LPC I/O(W83697HF)
PARALLEL & SERIAL CONN.
B B
MS-5 ACPI CONTROLLER, REGULATORS
FRONT PANEL, Thermal Trip & VGA Connector
VRM 9.0
I1394A (VT6307) CONTROLLER / CONNECTOR
DECOUPLING CAPACITORS
HISTORY
21
22
23
24
25
26
27
28
Expansion Slots:
AGP 3.0 Slot * 1
DDR Slot * 2
PCI 2.2 Slot * 3
29
A A
MICRO-STAR INT'L CO.,LTD.
Title
Size Document Number Rev
Custom
8
7
6
5
4
3
Date: Sheet
COVER PAGE
MS-6768
2
0A
128Thursday, March 06, 2003
of
1
8
7
6
5
4
3
2
1
System Block Diagram
+ 12V
- 12V
D D
SOCKET-462
Host Bus
(100/133MHz)
ATX CONN
+ 5V
- 5V
3.3V
VCC5SBY
(100/133MHz)
CPU
FAN
SYS
FAN
8X/4X/2X (66MHz)
I1394A
PS/2IDE 1
MII
FAN CONTROL
Via VT8378
V-Link
8x/4x/2x
(66MHz)
Via VT8237
LPC
Bus
2 DDR DIMM MODUAL
AC'97 Link(14.318MHz)
USB2.0
USB 0
USB 1
VOLTAGE MONITOR
TEMPERATURE MONITOR
USB 2
USB 3
AC'97
AUDIO CODEC
ALC650
USB 4
USB 5
AGP Connector
C C
PCI SLOT 3
B B
PCI SLOT 2 PCI SLOT 1
IDE 2
PCI (33MHz)
ULTRA DMA 33/66/100/133
KEYBOARD
/MOUSE
LAN PHY
VCC5SBY
VCC3
VCC5SBY
VCC5
VCC3SBY VCCM
VCC25SBY
DDR_VTT
VCC2_5
VDDQ
VCCA_PLL
5VDUAL
KBUVCC
LPC Super I/O
FLASH
ROM
GPIO
SERIAL PARALLEL FLOPPY
VCORE
A A
MICRO-STAR INT'L CO.,LTD.
Title
Size Document Number Rev
Custom
8
7
6
5
4
3
Date: Sheet
System Block Diagram
MS-6768
2
0A
228Thursday, March 06, 2003
of
1
8
7
6
5
4
3
2
1
Main Clock Generator
D D
VCC3
CP20
X_COPPER
L47
X_80-0805
EC39
10u/16V ECSMD
L49 X_80-0805
VCC3
CB105
C C
B B
REF1
X_0.1u
CB101
0.1u
1
2
VCC2_5
VCC3
53
NC7SZ08P5X-SOT23_5
CB112
CB971uCB111
CP21
X_COPPER
L46
X_80-0805
CP19
X_COPPER
SMBCLK{9,13,23}
SMBDAT{9,13,23}
FP_RST#{23,24,25}
R217 22R
4
U12
CB110
1u
1u
CB108
0.1u
VADDR25
CB98
1u
CB103
1u
0.1u
CB107
1u
VCC2_5
CB100
1u
R236 X_0R
R231 475R1%
GCLK14
GCLK14 {8}
U13
5
VDDAGP
16
VDDPCI
22
VDD48M
51
VDDCPU
55
VDDREF
2
GND2
9
GND9
13
GND13
19
GND48M
33
GND33
39
GND39
47
GNDI
54
GND54
23
AVDD
24
AGND
50
VDDI
34
VDD3.3/2.5-34
40
VDD3.3/2.5-40
27
SCLK
28
SDATA
25 1
IREF REF0/FS0
XIN
3
Y1
14M-32pf-HC49S-D
C242
22p
CPUCLK_PPT
CPUCLK_PPC
CPUCLKST
CPUCLKSC
DDRT0
DDRC0
DDRT1
DDRC1
DDRT2
DDRC2
DDRT3
DDRC3
DDRT4
DDRC4
DDRT5
DDRC5
BUFFER_IN
FBOUT
AGP0/MODE
AGP1/SEL_CPU
AGP2/PCI_STOP#
PCICLK_F/FS1
PCICLK0/SEL_SD_DDR#
PCICLK1/MULTSEL0
PCICLK2
PCICLK3
PCICLK4
PCICLK5/CPU_STP#
48M/FS3RESET/PD#
24_48M/FS2
VTT_PWRGD#/REF1
XOUT
CY28341-2 A
4
C221
22p
48
49
53
52
44
43
42
41
38
37
36
35
32
31
30
29
45
46
6
SELCPU
7
8
FS1
10
SELDDR#
11
MULTSEL0
12
14
15
17
18
FS3
2026
FS2
21
FS0
REF1
56
VCC3
FS1_S{12}
FS3_S{12}
RN68
10R-8P4R
RN69
10R-8P4R
RN70
10R-8P4R
RN71
10R-8P4R
MULTSEL0
SELCPU
SELDDR#
R251 4.7K
R273 10K
R286 10K
7 8
5 6
3 4
1 2
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R201 22R
R252 22R
R269 22R
R255 22R
RN79 22R-8P4R
1 2
3 4
5 6
7 8
R258 22R
R254 22R
R260 22R
R270 22R
R250 22R
R262 33R
R265 33R
R204 X_62R
R206 X_261R1%
CPUCLK1
CPUCLK-1
CPUCLK-0
CPUCLK0
DDRCLK0
DDRCLK-0
DDRCLK1
DDRCLK-1
DDRCLK2
DDRCLK-2
DDRCLK3
DDRCLK-3
DDRCLK4
DDRCLK-4
DDRCLK5
DDRCLK-5
DCLKO
AGPCLK0MODE
VLCLK
AGPCLK1
PCICLK3
SIOPCLK
PCICLK2
PCICLK1
1394_PCLK
PCLKSB
USBCLK
SIO48M
APICSB
SBCLK14
AC97CLK
APICCPU
R245 X_4.7K
R253 4.7K
R256 4.7K
FS0
FS1
FS3
FS2
CPUCLK1 {6}
CPUCLK-1 {6}
CPUCLK-0 {4}
CPUCLK0 {4}
DDRCLK0 {9}
DDRCLK-0 {9}
DDRCLK1 {9}
DDRCLK-1 {9}
DDRCLK2 {9}
DDRCLK-2 {9}
DDRCLK3 {9}
DDRCLK-3 {9}
DDRCLK4 {9}
DDRCLK-4 {9}
DDRCLK5 {9}
DDRCLK-5 {9}
DCLKO {7}
DCLKI {7}
AGPCLK0 {8}
VLCLK {14}
AGPCLK1 {11}
PCICLK3 {15}
SIOPCLK {21}
PCICLK2 {15}
PCICLK1 {15}
1394_PCLK {26}
PCLKSB {14}
USBCLK {12}
SIO48M {21}
APICSB {14}
SBCLK14 {13}
AC97CLK {19}
APICCPU {4}
R257 X_2.7K
R259 X_4.7K
R261 4.7K
By-Pass Capacitors Place
near to the Clock Outputs
AGPCLK0
VLCLK
AGPCLK1
PCICLK3
SIOPCLK
PCICLK2
PCICLK1
1394_PCLK
PCLKSB
APICCPU
APICSB
SBCLK14
USBCLK
SIO48M
AC97CLK
DCLKO
By-Pass Capacitors Place
near to the Clock Outputs
DDRCLK0
DDRCLK-0
DDRCLK1
DDRCLK-1
DDRCLK2
DDRCLK-2
DDRCLK3
DDRCLK-3
DDRCLK4
DDRCLK-4
DDRCLK5
DDRCLK-5
CPUCLK0
CPUCLK-0
CPUCLK-1
CPUCLK1
10pC250
10pC262
10pC251
CN16 10p-8P4C
1 2
3 4
5 6
7 8
X_10pC253
X_10pC254
X_10pC213
X_10pC247
X_10pC248
X_10pC255
X_10pC252
X_10pC259
R193 4.7K
R202 4.7K
CN13 10p-8P4C
1 2
3 4
5 6
7 8
CN14 10p-8P4C
1 2
3 4
5 6
7 8
CN15 10p-8P4C
1 2
3 4
5 6
7 8
CN12 10p-8P4C
1 2
3 4
5 6
7 8
VCC2_5
R215 X_22R
VCC2_5
A A
8
REF1
53
1
2
NC7SZ08P5X-SOT23_5
7
U11
4
R209 22R
APICCPU
6
FREQ FS3 FS2 FS1 FS0
100MHz
133MHz
166MHz 1
5
0
0
01
0
1
00
1
1
1
MICRO-STAR INT'L CO.,LTD.
Title
Size Document Number Rev
Custom
4
3
Date: Sheet
2
CLOCK GEN
MS-6768
0A
328Wednesday, March 12, 2003
of
1
8
SDATA#[0:63]{6}
D D
C C
B B
A A
DICLK#[0:3]{6}
DIVAL#{6}
DOCLK#[0:3]{6}
AIN#[2:14]{6}
AICLK#{6}
CFWDRST{6}
CONNECT{6}
PROCRDY{6}
8
SDATA#0
SDATA#1
SDATA#2
SDATA#3
SDATA#4
SDATA#5
SDATA#6
SDATA#7
SDATA#8
SDATA#9
SDATA#10
SDATA#11
SDATA#12
SDATA#13
SDATA#14
SDATA#15
SDATA#16
SDATA#17
SDATA#18
SDATA#19
SDATA#20
SDATA#21
SDATA#22
SDATA#23
SDATA#24
SDATA#25
SDATA#26
SDATA#27
SDATA#28
SDATA#29
SDATA#30
SDATA#31
SDATA#32
SDATA#33
SDATA#34
SDATA#35
SDATA#36
SDATA#37
SDATA#38
SDATA#39
SDATA#40
SDATA#41
SDATA#42
SDATA#43
SDATA#44
SDATA#45
SDATA#46
SDATA#47
SDATA#48
SDATA#49
SDATA#50
SDATA#51
SDATA#52
SDATA#53
SDATA#54
SDATA#55
SDATA#56
SDATA#57
SDATA#58
SDATA#59
SDATA#60
SDATA#61
SDATA#62
SDATA#63
DICLK#0
DICLK#2
DICLK#3
DIVAL#
DOCLK#0
DOCLK#1
DOCLK#2
DOCLK#3
DOVAL#
AIN#2
AIN#3
AIN#4
AIN#5
AIN#6
AIN#7
AIN#8
AIN#9
AIN#10
AIN#11
AIN#12
AIN#13
AIN#14
AICLK#
CFWDRST
CONNECT
PROCRDY
FILVAL#
AIN#0
AIN#1
AA35
W37
W35
AA33
AE37
AC33
AC37
AA37
AC35
W33
AN33
AE35
AL31
AJ29
AL29
AG33
AJ37
AL35
AE33
AJ35
AG37
AL33
AN37
AL37
AG35
AN29
AN35
AN31
AJ33
AJ21
AL23
AN23
AJ31
Y35
U35
U33
S37
S33
Y37
S35
Q37
Q35
N37
J33
G33
G37
E37
G35
Q33
N33
L33
N35
L37
J37
A37
E35
E31
E29
A27
A25
E21
C23
C27
A23
A35
C35
C33
C31
A29
C29
E23
C25
E17
E13
E11
C15
A13
C21
A21
E19
C19
C17
A11
A17
A15
J35
E27
E15
C37
A33
C11
E9
C9
A9
7
SDATA0
SDATA1
SDATA2
SDATA3
SDATA4
SDATA5
SDATA6
SDATA7
SDATA8
SDATA9
SDATA10
SDATA11
SDATA12
SDATA13
SDATA14
SDATA15
SDATA16
SDATA17
SDATA18
SDATA19
SDATA20
SDATA21
SDATA22
SDATA23
SDATA24
SDATA25
SDATA26
SDATA27
SDATA28
SDATA29
SDATA30
SDATA31
SDATA32
SDATA33
SDATA34
SDATA35
SDATA36
SDATA37
SDATA38
SDATA39
SDATA40
SDATA41
SDATA42
SDATA43
SDATA44
SDATA45
SDATA46
SDATA47
SDATA48
SDATA49
SDATA50
SDATA51
SDATA52
SDATA53
SDATA54
SDATA55
SDATA56
SDATA57
SDATA58
SDATA59
SDATA60
SDATA61
SDATA62
SDATA63
SDATAINCLK0
SDATAINCLK1
SDATAINCLK2
SDATAINCLK3
SDATAINVAL
SDATAOUTCLK0
SDATAOUTCLK1
SDATAOUTCLK2
SDATAOUTCLK3
SDTATOUTVAL
SADDIN0
SADDIN1
SADDIN2
SADDIN3
SADDIN4
SADDIN5
SADDIN6
SADDIN7
SADDIN8
SADDIN9
SADDIN10
SADDIN11
SADDIN12
SADDIN13
SADDIN14
SADDINCLK
CLKFWDRST
CONNECT
PROCRDY
SFILLVAL
7
Socket 462
6
CPU1A
A20M
FERR
INIT
INTR
IGNNE
NMI
RESET
SMI
STPCLK
PWROK
PICCLK
PICD0/BYPASSCLK
PICD1/BYPASSCLK
COREFB-
COREFB+
CLKIN
CLKIN
RSTCLK
RSTCLK
K7CLKOUT
K7CLKOUT
ANALOG
SYSVREFMODE
VREF_SYS
PLLBYPASS
PLLBYPASSCLK
PLLBYPASSCLK
PLLMON1
PLLMON2
PLLTEST
SCANCLK1
SCANCLK2
SCANINTEVAL
SCANSHIFTEN
DBRDY
DBREQ
FLUSH
TCK
TDO
TMS
TRST
VID0
VID1
VID2
VID3
VID4
FID0
FID1
FID2
FID3
SCHECK0
SCHECK1
SCHECK2
SCHECK3
SCHECK4
SCHECK5
SCHECK6
SCHECK7
SADDOUT0
SADDOUT1
SADDOUT2
SADDOUT3
SADDOUT4
SADDOUT5
SADDOUT6
SADDOUT7
SADDOUT8
SADDOUT9
SADDOUT10
SADDOUT11
SADDOUT12
SADDOUT13
SADDOUT14
SADDOUTCLK
6
5
AE1
FERR
AG1
AJ3
AL1
AJ1
AN3
AG3
AN5
STPCLK#
AC1
PWRGD_CPU
AE3
N1
APICD0
N3
APICD1
N5
COREFB-
AG13
COREFB+
AG11
CPUCLK_R
AN17
CPUCLK#_R
AL17
AN19
AL19
CLKOUT
AL21
CLKOUT#
AN21
AJ13
VREFMODE
AA5
VREF_SYS
W5
ZN
AC5
ZN
ZP
TDI
AE5
AJ25
AN15
AL15
AN13
AL13
AC3
S1
S5
S3
Q5
AA1
AA3
AL3
Q1
U1
U5
Q3
U3
L1
L3
L5
L7
J7
W1
W3
Y1
Y3
U37
Y33
L35
E33
E25
A31
C13
A19
J1
J3
C7
A7
E5
A5
E7
C1
C5
C3
G1
E1
A3
G5
G3
E3
ZP
PLLBP#
PLLMON1
PLLMON2
PLLTEST#
SCANCLK1
SCANCLK2
SINTVAL
SSHIFTEN
DBREQ#
FLUSH#
TCK
TDI
TMS
TRST#
VID0
VID1
VID2
VID3
VID4
FID0
FID1
FID2
FID3
AOUT#2
AOUT#3
AOUT#4
AOUT#5
AOUT#6
AOUT#7
AOUT#8
AOUT#9
AOUT#10
AOUT#11
AOUT#12
AOUT#13
AOUT#14
X_180pC23
A20M# {14}
CPUINIT# {14}
INTR {14}
IGNNE# {14}
NMI_SB {14}
CPURST# {23}
SMI# {14}
STPCLK# {14}
PWRGD_CPU {23}
APICCPU {3}
APICD0 {14}
APICD1 {14}
COREFB- {25}
COREFB+ {25}
VCORE
R65
100R1%
R62
100R1%
VID0 {25}
VID1 {25}
VID2 {25}
VID3 {25}
VID4 {25}
FID0 {14}
FID1 {14}
FID2 {14}
FID3 {14}
AOUT#[2:14] {6}
AOCLK# {6}
5
R61
100R1%
R63
100R1%
4
FERR
Place Near
socket-A
CPUCLK_R
CPUCLK#_R
39PC14
4
VCORE
R26
680R
R25 1K
60.4R1%
FID3
FID2
FID1
FID0
CPUINIT#
IGNNE#
CPURST#
A20M#
SMI#
NMI_SB
INTR
STPCLK#
FLUSH#
PLLMON1
PLLMON2
AIN#0
AIN#1
PLLBP#
CPURST#
COREFB+
COREFB-
DOVAL#
FILVAL#
CPURST#
APICD0
APICD1
B
NPN-3904LT1-SOT23
R68
R70
301R1%
680PC50
680PC55
RN9 680R-8P4R
RN13 680R-8P4R
R44 680R
R57 56R
R51 56R
RN27 680R-8P4R
R33 X_270R
RESERVE
C30
4.7u-1206/16Y
R83 270R
R89 270R
R36 330R
R35 330R
VCC3
R9
510R
C
Q2
E
VCORE
R71
60.4R1%
RN8
1 2
3 4
5 6
7 8
330R-8P4R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R52 10K
R60 10K
180pC15
3
VCC2_5
VCORE
VCC2_5
3
FERR# {14}
C59
0.01u50X
CPUCLK0 {3}
CPUCLK-0 {3}
C10
0.1u
VCORE
2
TRST#
PLLTEST#
DBREQ#
TCK
TMS
TDI
SSHIFTEN
SINTVAL
SCANCLK2
SCANCLK1
R23 510R
R32 510R
RN3
1 2
3 4
5 6
7 8
510R-8P4R
RN6
1 2
3 4
5 6
7 8
270R-8P4R
VCORE
0.5 * VCORE
VREF_SYS
CB4
CB5
39p
0.1u
VCORE
R30
VREFMODE
VREFMODE=Low=No voltage scaling
ZN
ZPDICLK#1
match the transmission line
Push-pull compensation circuit
CLKOUT
CLKOUT#
* Trace lengths of CLKOUT
and -CLKOUT are between
2" and 3"
X_1K
R28
270R
R34 40.2R1%
R39 56.2R1%
40.2
RN21 100R-8P4R
for
internal
VREFSYS
VCORE
78
56
34
12
VCORE
R19
100R1%
R14
100R1%
1
60.4
60.4
VCORE
MICRO-STAR INT'L CO.,LTD.
Title
Size Document Number Rev
Custom
Date: Sheet
2
Socket 462 - 1
MS-6768
428Wednesday, March 12, 2003
of
1
0A
8
7
6
5
4
3
2
1
0~100 mA, 2.25~2.75V
VCORE
VCCA_PLL
C86
33P
XX1
XX2
YY24
YY23
YY22
YY21
YY20
YY19
YY18
YY17
YY16
YY15
YY14
YY13
YY12
VCCA_PLL
C76
10u-0805
C65
X_10u-0805
H12
H16
H20
H24M8P30R8T30V8X30Z8AB30
D D
VCC_CORE1
VCC_CORE2
VCC_CORE3
VCC_CORE4
VCC_CORE5
VCC_SRAM1
VCC_SRAM2
VCC_SRAM3
VCC_SRAM4
VCC_SRAM5
VCC_SRAM6
VCC_SRAM7
VCC_SRAM8
VCC_SRAM9
VCC_SRAM11
VCC_SRAM13
VCC_SRAM14
VCC_SRAM16
VCC_SRAM17
VCC_SRAM19
VCC_SRAM20
VCC_SRAM21
VCC_SRAM22
VCC_SRAM23
VCC_SRAM24
VCC_SRAM25
VCC_SRAM26
VCC_SRAM27
VCC_SRAM28
VCC_SRAM29
VCC_SRAM30
VCC_SRAM31
KEY4
KEY6
KEY8
KEY10
KEY12
KEY14
KEY16
KEY18
VSS1
VSS2
VSS3
VSS4
H14
H18
H22
H26
VCC_CORE6
VSS5
VSS6
M30P8R30T8V30X8Z30
AD30
AD8
AF10
AF28
AF30
AF32
AF6
AF8
AH30
AH8
AJ9
AK8
AL9
AM8
F30
F8
H10
H28
H30
H32
H6
H8
K30
K8
C C
AL7
AN7
G25
G17
AG7
AG15
AG29
AJ7
G9
N7
Y7
VCC_CORE7
VSS7
VCC_CORE8
VSS8
VCC_CORE9
VSS9
AF14
AF18
AF22
AF26
AM34
AK36
AK34
AK30
AK26
AK22
AK18
AK14
AK10
AL5
AH26
AM30
AH22
AH18
AH14
AH10
AH4
AH2
AF36
AF34
AD6
AM26
AD4
AD2
AB36
AB34
AB32Z6Z4Z2X36
X34
AM22
X32V6V4V2T36
T34
T32R6R4R2AM18
P36
P34
P32M4M6M2K36
K34
K32H4H2
AM14
F36
F34
F32
F28
F24
F20
F16
F12
D32
D28
AM10
D24
D20
D16
D12D8D4D2B36
B32
AM2
B28
B24
B20
B16
B12B8B4
AJ5
AC7
AJ23
CPU1B
L21 600-0805
VCC_A
AA31
AC31
AE31
AG23
AG25
AG31
AG5
AJ11
AJ15
AJ17
AJ19
AJ27
AL11
AN11
AN9
G11
G13
G27
G29
G31
J31
J5
L31
N31
Q31
S31
S7
U31
U7
W31
W7
Y31
Y5
AG19
G21
AG21
G19
AN27
AL27
AN25
AL25
VSS_Z
Socket 462
VCCA25
C41
X_1000p
Socket 462
AO1
GND
AO2
GND
AO3
GND
AO4
GND
YY1
GND
YY2
GND
YY3
GND
YY4
GND
YY5
GND
YY6
GND
YY7
GND
YY8
GND
YY9
GND
YY10 YY11
GND GND
C83
0.1u16X
CPUTD {21,24}
CPUTD_GND {24}
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCC_Z
VCC_CORE10
VCC_CORE11
VCC_CORE12
VCC_CORE13
VCC_CORE14
VCC_CORE15
VCC_CORE16
VCC_CORE17
VCC_CORE18
VCC_CORE19
VCC_CORE20
VCC_CORE21
VCC_CORE22
VCC_CORE23
VCC_CORE24
VCC_CORE25
VCC_CORE26
VCC_CORE27
VCC_CORE28
VCC_CORE29
VCC_CORE30
VCC_CORE31
VCC_CORE32
VCC_CORE33
VCC_CORE34
VCC_CORE35
VCC_CORE36
VCC_CORE37
VCC_CORE38
VCC_CORE39
VCC_CORE40
VCC_CORE41
VCC_CORE42
VCC_CORE43
VCC_CORE44
VCC_CORE45
VCC_CORE46
VCC_CORE47
VCC_CORE48
VCC_CORE49
VCC_CORE50
VCC_CORE51
VCC_CORE52
VCC_CORE53
VCC_CORE54
VCC_CORE55
VCC_CORE56
VCC_CORE57
VCC_CORE58
VCC_CORE59
VCC_CORE60
VCC_CORE61
VCC_CORE62
VCC_CORE63
VCC_CORE64
VCC_CORE65
VCC_CORE66
VCC_CORE67
VCC_CORE68
VCC_CORE69
VCC_CORE70
VCC_CORE71
VCC_CORE72
VCC_CORE73
VCC_CORE74
VCC_CORE75
VCC_CORE76
VCC_CORE77
VCC_CORE78
VCC_CORE79
VCC_CORE80
VCC_CORE81
VCC_CORE82
VCC_CORE83
VCC_CORE84
VCC_CORE85
VCC_CORE86
VCC_CORE87
VCC_CORE88
VCC_CORE89
VCC_CORE90
VCC_CORE91
VCC_CORE92
VCC_CORE93
VCC_CORE94
VCC_CORE95
VCC_CORE96
VCC_CORE97
VCC_CORE98
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
AB8
AF12
AF16
AF20
AF24
AM36
AK32
AK28
AK24
AK20
AK16
AK12
AK4
AK2
AH36
AM32
AH34
AH32
AH28
AH24
AH20
AH16
AH12
AF4
AF2
AD36
AD34
AD32
AB6
AB4
AB2
Z36
Z34
Z32X6AM28X4X2
V36
V34
V32T6T4T2R36
R34
AM24
R32P6P4P2M36
M34
M32K6K4K2AM20
H36
H34
F26
F22
F18
F14
F10F6F4F2AM16
D36
D34
D30
D26
D22
D18
D14
D10D6B34
AM12
B30
B26
B22
B18
B14
B10B6B2
NC1
VCC_CORE99
VCC_CORE100
VCC_CORE101
NC2
NC3
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
NC25
NC27
NC28
NC29
NC30
NC31
NC32
NC33
NC34
NC35
NC36
NC37
NC42
NC43
NC44
NC45
BP0_CUT
BP1_CUT
BP2_CUT
BP3_CUT
VSS101
VSS102
VSS103
VSS104
AM4
AK6
AM6
AE7
CPU1C
B B
VCORE
VCORE
C43
4.7u-0805
C42
4.7u-0805
C72
4.7u-0805
C100
4.7u-0805
C58
4.7u-0805
C96
4.7u-0805
C82
4.7u-0805
Near M8/P8
C57
4.7u-0805
VCORE
C37
39p
C93
39p
C48
39p
C103
39p
C79
39p
C97
39p
C99
39p
C68
39p
C40
39p
C26
C20
C108
C109
C84
C52
39p
39p
39p
39p
39p
39p
For VCORE output cap Alone VCORE edge
C124
C73
C11
39p
39p
39p
C102
C36
C67
C85
C35
C101
C66
C94
0.22u
0.22u
0.22u
0.22u
0.22u
0.22u
0.22u
VCORE
C91
C49
C47
0.01u50X
A A
0.01u50X
0.01u50X
C63
0.01u50X
VCORE VCORE
C369
X_39p(S/S)
0.22u
C34
0.22u
C364
X_39p(S/S)
C366
X_39p(S/S)
C71
0.22u
C367
X_39p(S/S)
C98
0.22u
C365
X_39p(S/S)
C92
0.22u
C363
X_39p(S/S)
C38
0.22u
C104
0.22u
C51
0.22u
C45
0.22u
C69
0.22u
C90
10u-1206
C39
0.22u
C44
10u-1206
C78
0.22u
C89
10u-1206
C53
0.22u
C33
22u-1206_X7R_6.3V
C95
0.22u
C62
0.22u
VCORE
CB51
X_0.1u
CB22
X_0.1u
CB31
X_0.1u
Solder Side
MICRO-STAR INT'L CO.,LTD.
Title
Size Document Number Rev
Custom
8
7
6
5
4
3
Date: Sheet
2
Socket 462 - 2
MS-6768
0A
528Wednesday, March 12, 2003
of
1
8
7
6
5
4
3
2
1
HOST BUS
M21
D D
C C
B B
AIN#[2:14]{4}
AOUT#[2:14]{4}
AOCLK#{4}
DOCLK#[0:3]{4}
DIVAL#{4}
CFWDRST{4}
CONNECT{4}
PROCRDY{4}
CPUCLK1{3}
CPUCLK-1{3}
TESTIN1{25}
AICLK#A
TESTIN1
S2KCOMP
S2KVREF
TESTIN0
VCC2_5
AIN#2
AIN#3
AIN#4
AIN#5
AIN#6
AIN#7
AIN#8
AIN#9
AIN#10
AIN#11
AIN#12
AIN#13
AIN#14
AOUT#2
AOUT#3
AOUT#4
AOUT#5
AOUT#6
AOUT#7
AOUT#8
AOUT#9
AOUT#10
AOUT#11
AOUT#12
AOUT#13
AOUT#14
-DICLK_0
-DICLK_1
-DICLK_2
-DICLK_3
DOCLK#0
DOCLK#1
DOCLK#2
DOCLK#3
CPUCLK1
CPUCLK-1
E17
C16
A14
D17
A15
E16
B14
C15
E15
A16
D15
A13
C13
B15
N26
P22
N24
P26
N25
P24
R22
R23
R26
R24
R25
A19
A24
G23
C19
B24
E13
D14
C14
E14
G21
E10
N21
U26
V26
V25
U24
V24
V23
U22
V22
T22
T24
T23
L24
F23
L22
F22
L21
F17
F12
T26
T25
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
AIN9
AIN10
AIN11
AIN12
AIN13
AIN14
AINCLK
AOUT2
AOUT3
AOUT4
AOUT5
AOUT6
AOUT7
AOUT8
AOUT9
AOUT10
AOUT11
AOUT12
AOUT13
AOUT14
AOUTCLK
DICLK0
DICLK1
DICLK2
DICLK3
DOCLK0
DOCLK1
DOCLK2
DOCLK3
DINVAL
CFWDRST
CONNECT
PROCRDY
HCLK
HCLK
TESTIN1
S2KCOMP
S2KVREF0
S2KVREF1
TESTIN0
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS2K
K21
B13
VDS2K
VSS
D13
VSS
J14
J13
J15
VTT
VTT
VTT
VSS
VSS
VSS
VSS
F14
T21
B16
D16
VCORE VCC2_5VCC2_5
J18
J17
L18
R18
K18
P18
N18
M18
J16
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
HOST BUS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B19
D19
B22
D22
B25
E23
E25
H23
H25
L23
L25
F10
F15
F19
VDD
VDD
VDD
VSS
VSS
VSS
P23
P25
U23
F20
U25
VDD
VSS
AVDD1
P21
G22
R21
V21
W21
NB1A
SDATA#0
B17
VDD
VDD
VDD
VDD
AGND1
F21
AVDD1
KM400
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D20
B20
C20
A20
C21
E19
B21
B18
E18
A17
C18
A18
D18
C17
E20
A21
D21
C22
A26
C25
C23
D24
B26
E21
A23
B23
A22
D23
A25
C26
C24
E26
F26
G25
G26
J26
H26
G24
H24
E22
E24
D25
D26
F25
F24
J25
H22
L26
M26
M25
M23
M24
K23
N22
M22
J24
K22
K25
K26
J23
N23
J22
K24
C11
D11
E11
A12
B12
C12
D12
E12
W22
SDATA#1
SDATA#2
SDATA#3
SDATA#4
SDATA#5
SDATA#6
SDATA#7
SDATA#8
SDATA#9
SDATA#10
SDATA#11
SDATA#12
SDATA#13
SDATA#14
SDATA#15
SDATA#16
SDATA#17
SDATA#18
SDATA#19
SDATA#20
SDATA#21
SDATA#22
SDATA#23
SDATA#24
SDATA#25
SDATA#26
SDATA#27
SDATA#28
SDATA#29
SDATA#30
SDATA#31
SDATA#32
SDATA#33
SDATA#34
SDATA#35
SDATA#36
SDATA#37
SDATA#38
SDATA#39
SDATA#40
SDATA#41
SDATA#42
SDATA#43
SDATA#44
SDATA#45
SDATA#46
SDATA#47
SDATA#48
SDATA#49
SDATA#50
SDATA#51
SDATA#52
SDATA#53
SDATA#54
SDATA#55
SDATA#56
SDATA#57
SDATA#58
SDATA#59
SDATA#60
SDATA#61
SDATA#62
SDATA#63
VCC2_5
SDATA#[0:63] {4}
POWER/GROUND FOR
INTERNAL CPU CLOCK LOGIC
AVDD1
X_COPPER(S/S)
CB136
0.1u(S/S)
CP35
VCC2_5
FB10
X_300(S/S)
CB130
0.01u50X(S/S)
Solder
Place The Center Between CPU & NB
DICLK#[0:3]{4}
VCORE
VCC2_5
CB151
0.1u(S/S)
DICLK#0
DICLK#1
DICLK#2 -DICLK_2
DICLK#3 -DICLK_3
AICLK#A
CB140
0.1u(S/S)
CB149
0.1u(S/S)
L28 10nH
L26 10nH
L25 10nH
L23 10nH
L33 10nH
Solder Side
CB148
CB139
0.1u(S/S)
0.1u(S/S)
CB135
CB138
0.1u(S/S)
0.1u(S/S)
5PC128
5PC125
5PC126
5PC115
5PC130
CB141
0.1u(S/S)
CB152
0.1u(S/S)
S2KCOMP
VCC2_5
CB79
0.1u
L31 10nH
L30 10nH
L29 10nH
L24 10nH
L27 10nH
CB146
0.1u(S/S)
CB134
0.1u(S/S)
CB104
0.1u
CB144
0.1u(S/S)
CB147
0.1u(S/S)
R102 300R1%
CB80
0.1u
CB86
X_0.1u
-DICLK_0
-DICLK_1
AICLK# {4}
CB143
0.1u(S/S)
CB137
0.1u(S/S)
CB63
0.1u
CB64
0.1u
NB1_X
A A
Heat Sink-High/Black
TESTIN0
TESTIN1
R128
X_1K
R132
X_1K
R129 1K
R133 1K
VCC3
S2KVREF
CB132
0.01u50X(S/S)
CB133
0.01u50X(S/S)
Solder
8
7
6
5
4
VCORE
R99
100R1%
R373
100R1%(S/S)
CB32
0.01u50X
3
MICRO-STAR INT'L CO.,LTD.
Title
Size Document Number Rev
Custom
Date: Sheet
2
KM400 - 1
MS-6768
628Wednesday, March 12, 2003
of
1
0A
8
MEMORY
D D
RMA[14:0]{9,10}
CKE0{9,10}
CKE1{9,10}
CKE2{9,10}
C C
B B
A A
CKE3{9,10}
RCS-0{9,10}
RCS-1{9,10}
RCS-2{9,10}
RCS-3{9,10}
RSRAS#{9,10}
RSCAS#{9,10}
RSWE#{9,10}
VCCM
RMA0
AC11
CB65
0.1u
AB12
AC12
AB14
AB16
AB17
AB15
AC18
AE17
AC17
AB10
AC9
AF17
AB18
AB19
AC21
AD24
AB22
AC24
AB20
AF24
AD6
AC5
AC6
AB6
AB7
AD5
AB11
AD7
AB9
Y26
AD25
AD22
AF19
AE15
AF12
AB8
AF4
Y24
AD26
AF22
AD19
AF15
AE12
AC8
AD4
AA10
AA18
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
CS0
CS1
CS2
CS3
CS4
CS5
SRASA
SCASA
SWEA
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
MVREF1
MVREF0
RMA1
RMA2
RMA3
RMA4
RMA5
RMA6
RMA7
RMA8
RMA9
RMA10
RMA11
RMA12
RMA13
RMA14
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
-DQS_0
-DQS_1
-DQS_2
-DQS_3
-DQS_4
-DQS_5
-DQS_6
-DQS_7
MVREF0
CB67
0.1u
8
7
VCCM
AA7V9V10
V11
V12
V13
V14
V15
V16
V17
V18
T18
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
MEMORY
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AC3
AE2
AC4
AE4
AC7
AE7
AC10
AE10
AC13
AE13
Y23
AC16
AE16
Y25
7
U18
AC19
VCC3
VSS
6
AVDD2
VSS
AA22Y21
VSS
VSS
AC25
AE25
6
AVDD2AGND2
NB1B
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DCLKO
DCLKIN
VSS
KM400
AA13
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
W23
W24
AA25
AB26
W26
W25
AA26
AA24
AB25
AB24
AF25
AE24
AB23
AC26
AE26
AF26
AD23
AE23
AD21
AF21
AC23
AF23
AE21
AB21
AC20
AF20
AF18
AD18
AD20
AE20
AE18
AD17
AF16
AC15
AC14
AE14
AD16
AD15
AD14
AF14
AF13
AD12
AD11
AF11
AD13
AB13
AE11
AD10
AF10
AE9
AE8
AF7
AF9
AD9
AF8
AD8
AE6
AF5
AE3
AF1
AF6
AE5
AF3
AF2
Y22
AA23
AA15
AA21
VCC3
VCC3
VSS
VSS
AE19
AC22
AE22
5
MD_0
MD_1
MD_2
MD_3
MD_4
MD_5
MD_6
MD_7
MD_8
MD_9
MD_10
MD_11
MD_12
MD_13
MD_14
MD_15
MD_16
MD_17
MD_18
MD_19
MD_20
MD_21
MD_22
MD_23
MD_24
MD_25
MD_26
MD_27
MD_28
MD_29
MD_30
MD_31
MD_32
MD_33
MD_34
MD_35
MD_36
MD_37
MD_38
MD_39
MD_40
MD_41
MD_42
MD_43
MD_44
MD_45
MD_46
MD_47
MD_48
MD_49
MD_50
MD_51
MD_52
MD_53
MD_54
MD_55
MD_56
MD_57
MD_58
MD_59
MD_60
MD_61
MD_62
MD_63
R104 22R
C131 10p
DCLKO
C201 10p
DCLKI
5
DCLKO {3}
DCLKI {3}
CB142
0.1u(S/S)
VCCM
CB145
0.1u(S/S)
Solder Side
4
POWER FOR DRAM CLCOK
DESKEW CIRCUIT
AVDD2
X_COPPER(S/S)
CB129
0.1u(S/S)
CP36
VCC2_5
CB131
1u(S/S)
FB9
X_300(S/S)
Solder
SSTL_2 RECEIVER VREF FOR DDR
VCC2_5
MVREF0
CB52
1000p
RMA0
RMA1
RMA2
RMA3
RMA4
RMA5
RMA6
RMA7
RMA8
RMA9
RMA10
RMA11
RMA12
RMA13
RMA14
RSRAS#
RSCAS#
RSWE#
CB53
0.1u
C380 X_33p(S/S)
C379 X_33p(S/S)
C378 X_33p(S/S)
C377 X_33p(S/S)
C376 X_33p(S/S)
C374 X_33p(S/S)
C375 X_33p(S/S)
C372 X_33p(S/S)
C373 X_33p(S/S)
C371 X_33p(S/S)
C381 X_33p(S/S)
C383 X_33p(S/S)
C382 X_33p(S/S)
C370 X_33p(S/S)
C368 X_33p(S/S)
C384 X_33p(S/S)
C386 X_33p(S/S)
C385 X_33p(S/S)
Solder
place between at 1.5" ~ 2" away from NB
CB156
0.1u(S/S)
4
CB150
0.1u(S/S)
CB155
0.1u(S/S)
CB153
0.1u(S/S)
R100
200R1%
R101
200R1%
3
CB154
0.1u(S/S)
3
2
Place these damping resistors close to DIMM1
MD_0
MD_4
MD_5
MD_1
MD_2
MD_6
MD_7
MD_3
MD_8
MD_9
MD_12
MD_13
MD_10
MD_15
MD_14
MD_11
MD_20
MD_16
MD_17
MD_21
MD_18
MD_19
MD_22
MD_23
MD_28
MD_24
MD_25
MD_29
MD_26
MD_30
MD_27
MD_31
MD_42
MD_43
MD_46
MD_47
MD_40
MD_44
MD_45
MD_41
MD_36
MD_32
MD_33
MD_37
MD_34
MD_38
MD_39
MD_35
MD_48
MD_49
MD_52
MD_53
MD_54
MD_50
MD_55
MD_51
MD_60
MD_56
MD_61
MD_57
MD_62
MD_58
MD_63
MD_59
-DQS_0
-DQS_1
-DQS_2
-DQS_3
-DQS_4
-DQS_5
-DQS_6
-DQS_7
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R55
R75
R84
R95
R112
R131
R148
R163
R58
R76
R87
R97
R116
R136
R144
R160
RN14
22R-8P4R
RN17
22R-8P4R
RN18
22R-8P4R
RN25
22R-8P4R
RN29
22R-8P4R
RN31
22R-8P4R
RN36
22R-8P4R
RN39
22R-8P4R
RN52
22R-8P4R
RN49
22R-8P4R
RN44
22R-8P4R
RN47
22R-8P4R
RN54
22R-8P4R
RN59
22R-8P4R
RN61
22R-8P4R
RN64
22R-8P4R
10R
10R
10R
10R
10R
10R
10R
10R
22R
22R
22R
22R
22R
22R
22R
22R
RMD0
RMD4
RMD5
RMD1
RMD2
RMD6
RMD7
RMD3
RMD8
RMD9
RMD12
RMD13
RMD10
RMD15
RMD14
RMD11
RMD20
RMD16
RMD17
RMD21
RMD18
RMD19
RMD22
RMD23
RMD28
RMD24
RMD25
RMD29
RMD26
RMD30
RMD27
RMD31
RMD42
RMD43
RMD46
RMD47
RMD40
RMD44
RMD45
RMD41
RMD36
RMD32
RMD33
RMD37
RMD34
RMD38
RMD39
RMD35
RMD48
RMD49
RMD52
RMD53
RMD54
RMD50
RMD55
RMD51
RMD60
RMD56
RMD61
RMD57
RMD62
RMD58
RMD63
RMD59
RDQS0
RDQS1
RDQS2
RDQS3
RDQS4
RDQS5
RDQS6
RDQS7
RDQM0
RDQM1
RDQM2
RDQM3
RDQM4
RDQM5
RDQM6
RDQM7
RMD[63:0] {9,10}
RDQS[7:0] {9,10}
RDQM[7:0] {9,10}
MICRO-STAR INT'L CO.,LTD.
Title
Size Document Number Rev
Custom
Date: Sheet
2
KM400 - 2
MS-6768
1
0A
728Wednesday, March 12, 2003
of
1
8
AGP,VLINK
D D
AAD[31:0]{11}
C C
ADSTB#0{11}
ADSTB#1{11}
SBA[7:0]{11}
B B
AFRAME#{11}
ATRDY#{11}
ADEVSEL#{11}
DBIH_PIPE{11}
AGPCLK0{3}
AVREFGC{11}
A A
8
AAD0
AAD1
AAD2
AAD3
AAD4
AAD5
AAD6
AAD7
AAD8
AAD9
AAD10
AAD11
AAD12
AAD13
AAD14
AAD15
AAD16
AAD17
AAD18
AAD19
AAD20
AAD21
AAD22
AAD23
AAD24
AAD25
AAD26
AAD27
AAD28
AAD29
AAD30
AAD31
ACBE#0{11}
ACBE#1{11}
ACBE#2{11}
ACBE#3{11}
ADSTB0{11}
ADSTB1{11}
SBSTB{11}
SBSTB#{11}
AIRDY#{11}
ASTOP#{11}
APAR{11}
AGNT#{11}
AREQ#{11}
ST0{11}
ST1{11}
ST2{11}
DBIL{11}
WBF#{11}
RBF#{11}
AGPCLK0
AGPNCOMP
AVREFGC
AGP8X#{11}
ASERR{11}
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
W2
W1
V3
W3
V1
U2
U1
U3
T4
T5
R3
P2
R1
P1
P3
N3
N2
M1
M3
M5
L1
L4
L2
L3
J1
H5
J3
H4
H1
H3
H2
G4
T1
P4
N1
K3
T3
T2
K2
K1
D2
D3
E3
D1
G3
F1
G1
G2
E1
E2
N5
P5
R5
U5
N4
U4
E4
F5
G5
F3
J5
J4
K5
L5
K4
V5
C1
M6
H6
G6
R4
7
J6N6P6R6T6U6K9L9M9N9P9
VCC1
VCC1
VCC1
VCC1
GD0/FPD10
GD1/FPD11
GD2/FPDVICLK
GD3/FPD09
GD4/FPD08
GD5/FPD07
GD6/FPD06
GD7/FPD05
GD8/FPDVIDET
GD9/FPDVIHS
GD10/FPD01
GD11/FPD23
GD12/FPD00
GD13/FPD22
GD14/FPD21
GD15/FPD20
GD16/FPD18
GD17/FPD17
GD18/FPD16
GD19/FPDE
GD20/FPD14
GD21/FPCLK
GD22/FPD13
GD23/FPD15
GD24/DVP1D09
GD25
GD26/DVP1D10
GD27
GD28/DVP1D07
GD29/DVP1D06
GD30/DVP1D08
GD31/DVP1D04
GCBE0/FPD03
GCBE1/SB_DA
GCBE2/FPD19
GCBE3/DVP1D11
ADSTB0F/FPD04
ADSTB0S/FPD02
ADSTB1F/FPD12
ADSTB1S/FPDET
SBA0/DVP1VS
SBA1/DVP1DE
SBA2/DVP1D00
SBA3/DVP1HS
SBA4/DVP1D05
SBA5/DVP1D03
SBA6/DVP1CLK
SBA7/DVP1CLK_N
SBSTBF/DVP1D01
SBSTBS/DVP1D02
GFRAME/FPHS
GIRDY/SB_CK
GTRDY
GSTOP/FPDVICLK_N
GDEVSEL/FPVS
GPAR/FPDVIVS
GGNT/DVI_DDCDA
GREQ/DVI_DDCCK
ST0
ST1/DVP1DET
ST2
DBIL
DBIH/PIPE
WBF/FPCLK_N
RBF
GCLK
AGPCOMP
AGPVREF0
AGPVREF1
AGP8XDET
GSERR/FPDVIDE
VSS
VSS
VSS
VSS
VSS
VSS
F2J2M2R2V2F4M4V4J9
7
VCC1
VSS
VCC1
VSS
VCC1
VSS
6
VCC2_5VDDQ
AA6
Y6T9U9
VCC1
VCC1
VCC1
VCC1
VCC1
B1C2R9
VCCQQ
VCC2
VCC2
VCC2
VCC2
AA8
VDD
K6L6V6W6AA11
AA9
VDD
AGP I/F VLINK I/ F
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQQ
AA3
L11
L12
L13
AA5
VSS
L14
L15
L16
M11
M12
M13
M14
6
AA12
AA19
AA20F8F9
F16
F18
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CRT I/F
TFT FLAT PANEL / EXTERNAL
TV ENCODER I/F
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M15
M16
N11
N12
N13
N14
N15
N16
P11
P12
P13
H21
P14
VDD
VSS
5
VCC25SBY
VSS
J10
R15
5
J11
VCC5
VSS
R16
C162 0.1u
J12
AD3
VCC5
VCC5
VSUS25
TVD00/DVP0D00
TVD01/DVP0D01
TVD02/DVP0D02
TVD03/DVP0D03
TVD04/DVP0D04
TVD05/DVP0D05
TVD06/DVP0D06
TVD07/DVP0D07
TVD08/DVP0D08
TVD09/DVP0D09
TVD10/DVP0D10
TVD11/DVP0D11
TVCLK/DVP0DCLK
TVCLKIN/DVP0DET
VSS
VSS
VSS
VSS
VSS
T11
T12
T13
T14
C4
C3
B4
A4
NB1C
VCCDAC
VCCRGB
PLLVDD1
PLLVDD2
UPCMD
UPSTB
UPSTB
DNCMD
DNSTB
DNSTB
LCOMPP
LVREF
INTA
RSET
HSYNC
VSYNC
SPCLK2
SPD2
TVVS/DVP0VS
TVHS/DVP0HS
TVDE/DVP0DE
DISPCLKO
DISPCLKI
GPO0
GPOUT
SPCLK1
SPD1
PWROK
RESET
SUSSTAT
BISTIN
GNDDAC
GNDRGB
PLLGND1
PLLGND2
VSS
VSS
VSS
VSS
VSS
T15
T16
U21
F11
C10
FB1
300L300m_350
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VD7
VBE
XIN
AR
AG
AB
VSS
KM400
F13
VCC3
J21
AA16
AA17
AA14
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
P15
P16
R11
R12
R13
R14
W4
W5
AA4
Y1
AC2
Y2
AB4
AC1
Y3
Y4
AA1
AA2
AB3
AB1
AB2
AB5
Y5
E6
F6
A3
A2
B3
B5
B6
A6
C6
D6
D9
C9
B9
A9
E9
E8
B8
A8
C8
C7
B7
A7
B11
B10
D8
A10
A11
C5
D5
D10
E7
F7
D7
AD1
AE1
AD2
A5
B2
A1
E5
D4
4
C155
C157
0.1u
0.1u
LCOMPP
LVREF_NB
RSET
R134 4.7K
R137 4.7K
R138 4.7K
BISTIN
GND_RGB
4
C389
0.1u(S/S)
Solder Side
VLAD0 {14}
VLAD1 {14}
VLAD2 {14}
VLAD3 {14}
VLAD4 {14}
VLAD5 {14}
VLAD6 {14}
VLAD7 {14}
-VBE {14}
UPCMD {14}
UPSTB+ {14}
UPSTB- {14}
DNCMD {14}
DNSTB+ {14}
DNSTB- {14}
GCLK14 {3}
INTA# {11,12,15}
RED {24}
GREEN {24}
BLUE {24}
R140 147R1%
HSYNC {24}
VSYNC {24}
SPCLK2 {24}
SPD2 {24}
PWRGD_NB {13}
PCIRST1# {21,23}
SUSST# {13}
R141 1K
CP14 X_COPPER
FB2 X_80-0805
DVP0D8 {11}
VCC2_5
C154
4.7u-0805
3
AGP
1. AGPVREF (PROVIDED BY AGP 4X
CARD OR BY SYSTEM FOR
OTHERS)
AVREFGC
2. AGPNCOMP : AGP N-CHANNEL
COMPENSATION
AGPNCOMP
2
CB92
1u
R151 60.4R1%
1
VDDQ
3. AGP POWER : VCCAGP
VDDQ
C163
1u-0805
VDDQ
0.1u(S/S)
C215
1u-0805
C388
C387
0.1u(S/S)
C164
0.1u
C190
0.1u
CB88
X_0.1u
CB77
0.1u
C165
0.1u
Solder Side
VLINK
1. VLINK REFERENCE VOLTAGE - 0.625V
LVREF_NB
CLOSE TO PIN Y5
CB83
0.01u50X
CB84
X_0.1u
VCC2_5
R157
3KR1%
R156
1KR1%
2. VLINK P-CHANNEL COMPENSATION
LCOMPP
R154 360R1%
CLOSE TO PIN AB5
MICRO-STAR INT'L CO.,LTD.
Title
Size Document Number Rev
Custom
3
Date: Sheet
2
KM400 - 3
MS-6768
0A
828Wednesday, March 12, 2003
of
1
8
7
6
5
4
3
2
1
MEMORY
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
VDDID
VSS
VDDQ
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
SCL
SDA
SA0
SA1
SA2
VSS
15223054627796
VDDQ
WP
VSS
3111826344250586674818993
DIMM1
VDDQ
RMD0
2
RMD1
4
RMD2
6
RMD3
8
RMD4
94
RMD5
95
RMD6
98
RMD7
99
RMD8
12
RMD9
13
RMD10
19
RMD11
20
RMD12
105
RMD13
106
RMD14
109
RMD15
110
RMD16
23
RMD17
24
RMD18
28
RMD19
31
RMD20
114
RMD21
117
RMD22
121
RMD23
123
RMD24
33
RMD25
35
RMD26
39
RMD27
40
RMD28
126
RMD29
127
RMD30
131
RMD31
133
RMD32
53
RMD33
55
RMD34
57
RMD35
60
RMD36
146
RMD37
147
RMD38
150
RMD39
151
RMD40
61
RMD41
64
RMD42
68
RMD43
69
RMD44
153
RMD45
155
RMD46
161
RMD47
162
RMD48
72
RMD49
73
RMD50
79
RMD51
80
RMD52
165
RMD53
166
RMD54
170
RMD55
171
RMD56
83
RMD57
84
RMD58
87
RMD59
88
RMD60
174
RMD61
175
RMD62
178
RMD63
179
DDRVREF DDRVREF
1
82
90
92
SMBDAT SMBDAT
91
181
182
183
VSS
DDR DIMM
RMD[63:0] {7,10}
RCS-2{7,10}
RCS-3{7,10}
CKE2{7,10}
CKE3{7,10}
DDRCLK3{3}
DDRCLK1{3}
DDRCLK5{3}
DDRCLK-3{3}
DDRCLK-1{3}
DDRCLK-5{3}
104
112
128
136
143
156
164
172
180738467085108
VDD
VDD
VDD
VDD
VDD
VDD
D D
RMA[14:0]{7,10}
RDQM[7:0]{7,10}
C C
RDQS[7:0]{7,10}
VCCM
R40
1KR1%
R45
1KR1%
PUT NEAR DIMM 30mils
B B
Trace/45mils Space
A A
CB8
X_0.01u
DDRVREF
CB10
0.01u50X
RSRAS#{7,10}
RSCAS#{7,10}
DDRCLK2{3}
DDRCLK0{3}
DDRCLK4{3}
DDRCLK-2{3}
DDRCLK-0{3}
DDRCLK-4{3}
CB6
0.01u50X
RSRAS# RSRAS# RMD59
RSCAS# RSCAS# RMD60
RSWE# RSWE# RMD61
RSWE#{7,10}
RCS-0{7,10}
RCS-1{7,10}
CKE0 WP CKE2
CKE0{7,10}
CKE1 SMBCLK CKE3 SMBCLK
CKE1{7,10}
120
VDD
148
VDD
168
VDD
184
VCC3 VCC3
RMA0 RMD4
RMA1 RMD5
RMA2 RMD6
RMA3 RMD7
RMA4 RMD8
RMA5 RMD9
RMA6 RMD10
RMA7 RMD11
RMA8 RMD12
RMA9 RMD13
RMA10 RMD14
RMA13 RMD15
RMA14 RMD16
RMA11 RMA11 RMD19
RMA12 RMA12 RMD20
RDQM0 RMD23
RDQM1 RMD24
RDQM2 RMD25
RDQM3 RMD26
RDQM4 RMD27
RDQM5 RMD28
RDQM6 RMD29
RDQM7 RMD30
RDQS0
RDQS1
RDQS2
RDQS3
RDQS4
RDQS5
RDQS6
RDQS7
48
43
41
130
37
32
125
29
122
27
141
118
115
167
59
52
113
97
107
119
129
149
159
169
177
140
14
25
36
56
67
78
86
47
44
45
49
51
134
135
142
144
10
101
102
173
103
154
65
63
157
158
71
163
21
111
137
16
76
138
17
75
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
5
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
9
NC
NC(RESET#)
NC
NC
NC
NC(FETEN)
RAS#
CAS#
WE#
S0#
S1#
NC(S2#)
NC(S3#)
CKE0
CKE1
CK0
CK1
CK2
CK0#
CK1#
CK2#
VSS
VSS
152
160
176
VSS
VDDQ
VDDQ
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
100
116
124
132
139
145
VDDQ
VDDQ
VDDQ
addr =
1010000b
VSS
VSS
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VCCMVCCM
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
VDDID
VSS
VDDQ
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
SCL
SDA
SA0
SA1
SA2
VSS
15223054627796
VDDQ
WP
VSS
3111826344250586674818993
DIMM2
VDDQ
2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
1
82
90
92
91
181
182
183
VSS
DDR DIMM
RMD0
RMD1
RMD2
RMD3
RMD17
RMD18
RMD21
RMD22
RMD31
RMD32
RMD33
RMD34
RMD35
RMD36
RMD37
RMD38
RMD39
RMD40
RMD41
RMD42
RMD43
RMD44
RMD45
RMD46
RMD47
RMD48
RMD49
RMD50
RMD51
RMD52
RMD53
RMD54
RMD55
RMD56
RMD57
RMD58
RMD62
WP
104
112
128
136
143
156
164
172
180738467085108
VDD
VDD
VDD
VDD
VDD
VDD
120
VDD
148
VDD
168
VDD
184
RMA0
RMA1
RMA2
RMA3
RMA4
RMA5
RMA6
RMA7
RMA8
RMA9
RMA10
RMA13
RMA14
RDQM0
RDQM1
RDQM2
RDQM3
RDQM4
RDQM5
RDQM6
RDQM7
RDQS0
RDQS1
RDQS2
RDQS3
RDQS4
RDQS5
RDQS6
RDQS7
RCS-2 RMD63
RCS-3
48
43
41
130
37
32
125
29
122
27
141
118
115
167
59
52
113
97
107
119
129
149
159
169
177
140
5
14
25
36
56
67
78
86
47
44
45
49
51
134
135
142
144
9
10
101
102
173
103
154
65
63
157
158
71
163
21
111
137
16
76
138
17
75
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC
NC(RESET#)
NC
NC
NC
NC(FETEN)
RAS#
CAS#
WE#
S0#
S1#
NC(S2#)
NC(S3#)
CKE0
CKE1
CK0
CK1
CK2
CK0#
CK1#
CK2#
VSS
VSS
VSS
152
160
176
VDDQ
VDDQ
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
100
116
124
132
139
145
VDDQ
VDDQ
VDDQ
addr =
1010001b
VSS
VSS
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
R165 4.7K
SMBCLK {3,13,23}
SMBDAT {3,13,23}
VCC3
DIMM
DECOUPLING
VCCM
CB71 0.1u
CB62 0.1u
CB78 0.1u
CB56 0.1u
CB18 0.1u
CB9 0.1u
CB48 0.1u
CB23 0.1u
CB45 0.1u
CB43 0.1u
VCC3
MICRO-STAR INT'L CO.,LTD.
Title
Size Document Number Rev
Custom
8
7
6
5
4
3
Date: Sheet
2
DDR1 & DDR2
MS-6768
0A
928Wednesday, March 12, 2003
of
1
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