5
4
3
2
1
MS-6752 Micro ATX
Title Page
Cover Sheet 1
*INTEL mPGA 478B Processor
D D
*INTEL Springdale GMCH / ICH5 Chipset
Block Diagram
2
3 GPIO SPEC
(DDR 333 / AGP 8X) / (integrated serial ATA)
*RealTek RT8101L 10/100M LAN
4,5 Intel mPGA478B
Clock Synthesizer 6
*Winbond 83627HF LPC I/O
*Audio codec 6 channel support
*USB 2.0 support x6 (integrated into ICH4)
C C
Intel Springdale 7,8,9
ICH4
System Memory
AGP SLOT 14
VGA Connector
PCI Slot
Audio Codec / 6 Channel connector
FWH / CNR
Rear / Front USB Port
/ATA 66/100 Connectors
/ DDR Terminations
10,11
12,13
15
16
17
18
19
20 W627THF LPC I/O FDD
B B
KB/MS/LPT/COM Port/FAN
VRM 10 HIP6556
MS-5 ACPI Controller
ORCAD Config. MODEL Config. ERP Number Function
MS6752GE STD
MS6752GE Option:L
MS6752GV STD
MS6752GV Option:L
MS6752G STD
A A
MS6752G Option:L
MS6752GL STD
MS6752GL Option:L
5
cfg6714GE-STD
cfg6714GE-LAN GE STD+LAN
cfg6714GV-STD
cfg6714GV-LAN
cfg6714G-STD
cfg6714G-LAN
cfg6714GL-STD
cfg6714GL-LAN
GE STD
GV STD
GV STD+LAN
G STD
G STD+LAN
GL STD
GL STD+LAN
4
Option
STD
L
GV
GVL
GB
GBL
GL
GLL
601-6714-010
601-6714-020
601-6714-030
601-6714-040
601-6714-07S
601-6714-08S
601-6714-05S
601-6714-06S
3
ATX connector / Front Panel
RT8101L 10/100M LAN 25
HISTORY
MSI
Title
Size Document Number Rev
2
Date: Sheet
21
22
23
24
26
MICRO-STAR
VGA CONNECTOR
MS-6752
1
0A
12 7 Monday, December 16, 2002
of
5
4
3
2
1
Block Diagram
Intel mPGA478B
D D
FSB 533/667
A
G
AGP 8X /Fast Write
P
C C
Intel 82547EI
Gigabit LAN
CSA
Springdale
2 channel DDR 333
D
D
I
I
M
M
M
M
2
1
D
D
I
I
M
M
M
M
3
4
Hub Link
6 PCI Slots
Serial ATA
B B
Front x3
SATA Con x2
IDE Con x1
1394
Controller
SATA/IDE
Controller
PCI-33
ICH5
Dual ATA 33/66/100
LPC BUS
I
I
D
D
E
E
1
2
USB 2.0
SUPER I/O FWH
AC97
Codec
AC-LINK
A A
Rear x4 Front x4
5
4
Dual USB 1.1 OHCI
/2.0 EHCI 8 Ports
3
MSI
Title
Size Document Number Rev
2
Date: Sheet
MICRO-STAR
Block Diagram
MS-6752
1
0A
of
22 7 Tuesday, November 26, 2002
5
4
3
2
1
GPIO FUNCTION
ICH5
D D
C C
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22 GPO22
GPIO 23
PREQ#B
I
PREQ#B
I
PIRQ#E
I
I
PIRQ#F
I
PIRQ#G
I
PIRQ#H
GPI6
I
GPI7
I
CSA_PME#
I
OC4#
I
OC5#
I
SIO_SMI#
I
EXTSMI#
I
SIO_PME#
I
I OC#6
OC#7
I
PGNT#A
O
O
PGNT#B
O GPO18
BIOS_WP#
O
O
GPO20
O GPO21
OD
O
GPO23
GPIO 24 I/O GPIO24
Function Type GPIO Pin
GPIO 25 I/O
GPIO 27
GPIO 28
*
GPIO 32
B B
GPIO 33
GPIO 34
GPIO 40 PREQ#4
GPIO 41
GPIO 48
GPIO 49
LAN_DISABLE#
I/O
GPIO27
I/O GPIO28
I/O
GPIO32
I/O
GPIO33
I/O
GPIO34
I
GPI41
I
O PGNT#4
CPUPWRGD
OD
FWH
Function
GPI 0 PD_DET
GPI 1
*
GPI 3
*
A A
Type GPIO Pin
I
I
SD_DET
I
Pull down through 1K ohms (unused) GPI 2
Pull down through 1K ohms (unused)
I
Pull down through 1K ohms (unused) GPI 4
I
5
Power well
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
RESUME
RESUME
RESUME
RESUME
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
default output
default output
default output
default output
default output
default output
default output
4
DDR DIMM Config.
DEVICE
DIMM 1 MCLK_A0/MCLK_A0#
DIMM 2
1010000B
1010001B
CLOCK ADDRESS
MCLK_A1/MCLK_A1#
MCLK_A2/MCLK_A2#
MCLK_B0/MCLK_B0#
MCLK_B1/MCLK_B1#
MCLK_B2/MCLK_B2#
PCI RESET DEVICE
Signals
PCIRST#_ICH5 AGP,FWH,MS-5
PCIRST#1
HD_RST#
Target
Springdale,LAN, Super I/O,SATA,
1394,MS-1
PCI slot 1-6 PCIRST#2
Primary, Scondary IDE
PCI
DEVICES
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
PCI SLOT 4
PCI SLOT 5
SERIAL ATA INT#E AD25
1394 INT#F AD26
MS-1
INT#
INT#A
INT#B
INT#C
INT#D
INT#B
INT#C
INT#D
INT#A
INT#C
INT#D
INT#A
INT#B
INT#D
INT#A
INT#B
INT#C
INT#B
INT#C
INT#D
INT#A
INT#A
INT#B PCI SLOT 6
INT#C
INT#D
3
IDSEL
AD16
AD17
AD18
AD19
AD20
AD21
REQ#/GNT#
PREQ#1
PGNT#1
PREQ#2
PGNT#2
PREQ#3
PGNT#3
PREQ#4
PGNT#4
PREQ#5
PGNT#5
PCI6REQ#
PCI6GNT#
SATA_GNT#
SATA_REQ#
1394_GNT#
1394_REQ#
PREQ#0
PGNT#0
CLOCK
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
SATA_PCLK
1394_PCLK
2
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR
GPIO Spec.
MS-6752
1
32 7 Tuesday, November 26, 2002
of
0A
5
4
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CPU SIGNAL BLOCK
HA#[3..31] 7
D D
VID1
HA#22
HA#23
A23#
D38#
N26
M26
HD#38
HD#37
HA#21
A22#
D37#
N23
HD#36
HA#20
A21#
D36#
M24
HD#35
HA#19
A20#
D35#
P21
HD#34
HA#18
A19#
D34#
N22
HD#33
HA#17
A18#
D33#
HD#32
HA#25
HA#27
HA#30
HA#26
HA#29
A30#
D45#
T25
T26
HD#45
HD#44
HA#28
A29#
D44#
R24
HD#43
A28#
D43#
R25
HD#42
A27#
D42#
P24
HD#41
A26#
D41#
R21
HD#40
HA#24
A25#
D40#
N25
HD#39
A24#
D39#
HA#31
CPU1A
HDBI#[0..3] 7
FERR# 10
STPCLK# 10
HINIT# 10,18
HDBSY# 7
HDRDY# 7
HTRDY# 7
HADS# 7
C C
B B
A A
HLOCK# 7
HBNR# 7
HIT# 7
HITM# 7
HBPRI# 7
HDEFER# 7
CPU_TMPA 20
VTIN_GND 20
THRMTRIP# 10
PROCHOT# 7,11
IGNNE# 10
SMI# 10
A20M# 10
SLP# 10
BOOT 22
BSEL0 6
BSEL1 6
CPU_GD 11
CPURST# 7
HD#[0..63] 7
HDBI#0
HDBI#1
HDBI#2
HDBI#3
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
PROCHOT#
BOOT
CPU_GD
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
E21
DBI0#
G25
DBI1#
P26
DBI2#
V21
DBI3#
AC3
IERR#
V6
MCERR#
B6
FERR#
Y4
STPCLK#
AA3
BINIT#
W5
INIT#
AB2
RSP#
H5
DBSY#
H2
DRDY#
J6
TRDY#
G1
ADS#
G4
LOCK#
G2
BNR#
F3
HIT#
E3
HITM#
D2
BPRI#
E2
DEFER#
C1
TDI
D5
TDO
F7
TMS
E6
TRST#
D4
TCK
B3
THERMDA
C4
THERMDC
A2
THERMTRIP#
AF26
GND/SKTOCC#
C3
PROCHOT#
B2
IGNNE#
B5
SMI#
C6
A20M#
AB26
SLP#
A22
RESERVED0
A7
RESERVED1
AE21
RESERVED2
AF24
RESERVED3
AF25
RESERVED4
AD1
BOOTSELECT
AE26
OPTIMIZED/COMPAT#
AD6
BSEL0
AD5
BSEL1
AB23
PWRGOOD
AB25
RESET#
AA24
D63#
AA22
D62#
AA25
D61#
Y21
D60#
Y24
D59#
Y23
D58#
W25
D57#
Y26
D56#
W26
D55#
V24
D54#
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
V22
U21
V25
U23
U24
U26
T23
T22
HD#50
HD#52
HD#53
HD#51
HD#49
HD#48
HD#47
HD#46
M23
HA#16
A17#
D32#
H25
HD#31
HA#15
A16#
D31#
K23
HD#30
HA#14
A15#
D30#
J24
HD#29
HA#13
A14#
D29#
L22
HD#28
HA#12
A13#
D28#
M21
HD#27
HA#11
A12#
D27#
H24
HD#26
HA#10
A11#
D26#
HD#25
G26
HA#9
A10#
D25#
L21
HD#24
HA#8
A9#
D24#
D26
HD#23
HA#7
A8#
D23#
F26
HD#22
HA#6
A7#
D22#
E25
HD#21
HA#5
A6#
D21#
F24
HD#20
HA#4
A5#
D20#
F23
HD#19
HA#3
A4#
D19#
G23
HD#18
A3#
D18#
E24
HD#17
D17#
H22
HD#16
AE25A5A4
DBR#
D16#
D15#
D25
J21
HD#15
HD#14
D14#
D23
HD#13
VCC_SENSE
D13#
C26
HD#12
VSS_SENSE
D12#
H21
HD#11
AD26
D11#
G22
HD#10
ITP_CLK1
D10#
HD#9
VID2
VID4
VID3
VID5
AC26
AE1
AE2
AE3
AE4
AD2
AD3
VID4#
VID3#
VID2#
VID5#
ITP_CLK0
VIDPWRGD
D9#
D8#
D7#
D6#
D5#
D4#
D3#
B25
C24
C23
B24
D22
C21
A25
A23
HD#6
HD#4
HD#3
HD#5
HD#7
HD#8
HD#2
CPUVID_GD 22
VID0
AE5
VID1#
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D2#
D1#
D0#
PGA-S478-GD10-F02
B22
B21
{Priority}
HD#1
HD#0
VCC_SENSE 22
VSS_SENSE 22
VID[0..5] 22
AA21
AA6
F20
F6
BPM#5
AB4
BPM#4
AA5
BPM#3
Y6
BPM#2
AC4
BPM#1
AB5
BPM#0
AC6
HREQ#4
H3
HREQ#3
J3
HREQ#2
J4
HREQ#1
K5
HREQ#0
J1
TESTHI12
AD25
TESTHI11
A6
TESTHI10
Y3
TESTHI9
W4
TESTHI8
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
HRS#2
F4
HRS#1
G5
HRS#0
F1
V5
AC1
HBR#0
H6
COMP1
P1
COMP0
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
C61 220p_X7R
TESTHI2
TESTHI1
TESTHI0
{VOLTAGE}
R102 62
R71 62
R28 62
R29 62
R30 62
R100 62
R27 62
R104 62
CPU_CLK# 6
CPU_CLK 6
HBR#0 7
R55 61.9RST
R101 61.9RST
HADSTB#1 7
HADSTB#0 7
HDSTBP#3 7
HDSTBP#2 7
HDSTBP#1 7
HDSTBP#0 7
HDSTBN#3 7
HDSTBN#2 7
HDSTBN#1 7
HDSTBN#0 7
NMI 10
INTR 10
GTLREF 7
HREQ#[0..4] 7
VCCP
HRS#[0..2] 7
VIDPWRGD DC Specifications
VIL
VIH
It must rout to the enable pin of PWM and CK-409.
VIDGD to Vccp delay time is from 1ms to 10ms.
VIDGD rising time is 150ns.
Min Max Typ
0.9
0.3
CPU GTL REFERNCE VOLTAGE BLOCK
VTT
VCCP
R86
R161
200RST
R89
169RST
200RST
GTLREF
{VOLTAGE}
0.63*Vccp
C62
C64 0.1u_X7R
104P
CPU ITP BLOCK
ITP_TDI
ITP_TRST#
ITP_TMS
ITP_TDO
ITP_TCK
CPU STRAPPING RESISTORS
BPM#4
BPM#5
BPM#2
BPM#3
BPM#1
BPM#0
R68 150
R25 680
R26 39
R23 75
R24 27
R39 62
R22 62
R38 62
R21 62
R46 62
R47 62
VCCP
VCCP
VCCP
MSI
ALL COMPONENTS CLOSE TO CPU
PROCHOT#
CPU_GD
HBR#0
CPURST#
5
4
3
R69 62
R138 300
R65 220
R133 62
VCCP
2
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR
Intel mPGA478B - Signals
MS-6752
42 7 Friday, December 20, 2002
1
0A
of
5
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1
E20E8F11
VCC
VCC
VSS
VSS
C22
105P
Near processor
F13
F15
VCC
VCC
VSS
VSS
G21G6G24
G3H1H23
1.2V 150mA
C23
104P
F17
F19
F9
VCC
VCC
VCC
VSS
VSS
VSS
VCC
VSS
H26H4J2
VSS
AF4
VCC-VID
VSS
AF3
VSS
J22
AD20
VCC-VIDPRG
VSS
VSS
J25J5K21
AE23
VCCA
VSSA
VCC-IOPLL
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
PGA-S478-GD10-F02
{Priority}
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
It support DC current if 100mA.
CPU_IOPLL
C70
105P
C74
C72
X_22u/1206
105P
VSSA
The ESL is less than 5nH, and the ESR is less than 0.3ohm.
L5 10uH-1206-100mA
L4 10uH-1206-100mA
DC voltage drop should
be less than 70mV.
C73
10U/1206
VCCP
VCC_VID 22,23
VCC_VID
CPU VOLTAGE BLOCK
VID Voltage is from 1.14V to 1.32V.
D D
VCCP
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
C15
VCC
VSS
C17C2C19
VCC
VSS
VCC
VSS
VCC
VSS
AF19
VCC
VCC
VCC
VSS
VSS
VSS
C22
C25C5C7C9D12
CPU1B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
D10
VSS
A11
VSS
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
C C
B B
AA19
AA23
AA26
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AC11
AC13
AC15
AC17
AC19
AC22
AC25
AA4
AA7
AA9
AB3
AB6
AB8
AC2
AC5
AC7
AC9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
VSS
AD12
VSS
AD14
VSS
AD16
VSS
AD18
VSS
AD21
VSS
AD23
AD4
VSS
AD8
VSS
VSS
AE11
VSS
AE13
AE15
VSS
VSS
AE17
VSS
AE19
VSS
AE22
AE24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B23
B20
B26B4B8
C11
C13
It is derived from 3.3V.
It should be able to source 150mA.
It drives the power logic of BSEL[1:0] and VID[5:0].
VID to VIDGD delay time is from 1ms to 10ms.
VID to VIDGD deassertion time is 1ms for max.
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
C10
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D14
D16
D18
D20
D21D3D24D6D8E1E11
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E13
E15
E17
E19
E23
E7E9F10
E4
E26
VSS
F12
F14
F16
F18F2F22
F25F5F8
CPU DECOUPLING CAPACITORS
C55
10U/1206
C58
10U/1206
C59
10U/1206
C40
10U/1206
C42
A A
5
10U/1206
C44
10U/1206
Place these caps within socket cavity Place these caps within north side of processor
C56
10U/1206
C57
10U/1206
C39
10U/1206
C41
10U/1206
C43
10U/1206
C60
10U/1206
VCCP
C27
10U/1206
C36
10U/1206
C54
10U/1206
C48
10U/1206
C30
10U/1206
C63
10U/1206
4
VCCP VCCP VCCP VCCP
C29
10U/1206
C34
10U/1206
C66
10U/1206
C49
X_10U/1206
C38
10U/1206
C67
10U/1206
C37
X_10U/1206
C47
10U/1206
C32
X_10U/1206
C53
10U/1206
C51
10U/1206
C68
10U/1206
MSI
Title
Size Document Number Rev
3
2
Date: Sheet
MICRO-STAR
Intel mPGA478B - Power
MS-6752
1
52 7 Friday, December 20, 2002
0A
of
5
4
3
2
1
Clock Synthesizer
FSE FSD FSC FSB CPU
*Trace less 0.5"
CP5 X
VCC3
D D
C C
C145
104P
Use 2 VIA hole on BEAD both side
VCC3
Use 2 VIA hole on BEAD both side
X_80-0805-3A
FB13
+
10U/16V/S
CP4 X
FB12 X_80-0805-3A
EC24
SMBDATA_ISO 12,13,18,20,23
SMBCLK_ISO 12,13,18,20,23
VCC3V
C130
104P
C131
104P
C135
104P
104P
C166
104P
C165
104P
C168
104P
C140
C138
103P
104P
SMBDATA_ISO CG_PWRGD# VCC3V
SMBCLK_ISO
U13
41 39
CPU_VDD CPU0#
44
CPU_GND
35
SRC_VDD
38
SRC_GND
28
3V66_VDD
10
PCI_VDD1
11
PCI_GND1
16
PCI_VDD2
17
PCI_GND2
25
48_VDD
3
REF_VDD
6
REF_GND
* 150k Pull-up
47
VDD
** 150k Pull-down
46
GND
33
SDATA
32
SCLK
Cypress CY28404
CRITICAL
CPU0
CPU1
CPU1#
SRC
SRC#
3V66_0
3V66_1
3V66_2/MODE*
3V66_3/VCH 3V66_GND
*FS_C/PCI_F0
*FS_D/PCI_F1
*FS_E/PCI_F2
PCI0
PCI1
PCI2
PCI3
PCI4
PCI5
*SEL24_48#/24_48
DOT48
USB48 48_GND
**FS_A/REF_1
**FS_B/REF_0
REF2
XOUT
VTT_PWRGD#
RST#/PWR_DN#
IREF
XIN
MCHCLK
40
MCHCLK#
CPUCLK
43
CPUCLK#
42
SATA100
37
SATA100#
36
MCH66
31
ICH66
30
3V66MODE
27
AGPCLK
26 29
LANPCLK
7
ICHPCLK
8
FWHPCLK
9
SIOPCLK
12
PCICLK0 PCI_CLK0
13
PCICLK1
14
PCICLK2
15
18
19
SIO48
21
DOT48
22
USB48
23 24
SEL0
1
SEL1
2
48
4
5
34
20
R181 475
45
Iref = 2.32mA
Y1 14.318M
R183 33
R184 33
R187 33
R182 33
R179 33
R180 33
R189 33
R221 33
R222 33
R209 33 C141
R223 33
RN53
7 8
33
5 6
3 4
1 2
R211 33
R200 33
R212 33
R231 33
R232 33
R210 X_1K
22P C147
22P C144
FP_RST# 24
MCH_CLK
MCH_CLK#
CPU_CLK
CPU_CLK#
LAN_PCLK
ICH_PCLK
FWH_PCLK
SIO_PCLK
PCI_CLK1
PCI_CLK2
VCC3
Q26
2N3904S
MCH_CLK 7
MCH_CLK# 7
CPU_CLK 4
CPU_CLK# 4
MCH_66 9
ICH_66 11
AGP_CLK 14
LAN_PCLK 25
ICH_PCLK 10
FWH_PCLK 18
SIO_PCLK 20
PCI_CLK0 16
PCI_CLK1 16
PCI_CLK2 16
SIO_48 20
DOT_48 9
USB_48 11
AC97_14 17
ICH_14 11
R186 10K
R172 220
3990.8
3987.76
3990.34
3990.42
7535.82
7507.47
3213.6
2030.04
7589.89
9180.55
14197.12
7086.44
7046.41
7021.34
14388.62
2198.28
6072.88
3146.4
5914.64
1 110 1 200
1 111 1 166.7
R213 10K
LANPCLK
FSC
ICHPCLK
R214 10K
FWHPCLK
R226 10K
SIO48
R215 10K
R178 10K
3V66MODE
SMBCLK_ISO
SMBDATA_ISO
VCC3V
SEL0 SEL1
R218 10K
BSEL0 4
2.49KST
VCCP
FSD
FSE
BSEL0_SPG 7
R201 4.7K
R198 4.7K
R219
1K
R228
2KST
R234
FSA
VCC3
R220
1K
R229
2KST
R235
2.49KST
100 00 1 11
133.3 01 1 11
VCC3
R227 10K
BSEL1 4
BSEL1_SPG 7
CPU_CLK
CPU_CLK#
MCH_CLK
MCH_CLK#
SATA100
SATA100#
MCH66
ICH66
AGPCLK
USB48
SIO48
DOT48
EMC HF filter capacitors, located clos e t o P LL
R177 49.9RST
R174 49.9RST
R175 49.9RST
R176 49.9RST
R188 49.9RST
R185 49.9RST
X_10P C133
X_10P C134
X_10P C136
X_10P C163
X_10P C167
X_10P C152
VCC3 VCC3 VCC3
BC12
BC13
104P
104P
EMI
LAN_PCLK
ICH_PCLK
FWH_PCLK
SIO_PCLK
PCI_CLK0
PCI_CLK1
PCI_CLK2
CN10
7 8
5 6
3 4
1 2
X_8P4C-10P
CN9
7 8
5 6
3 4
1 2
X_8P4C-10P
BC14
104P
B B
HD_RST# 23
PDD[0..7] 11
PD_DREQ 11
PD_IOW# 11
PD_IOR# 11
PD_IORDY 11
PD_DACK# 11
IRQ14 10
PD_A1 11
PD_A0 11 PD_A2 11
PD_CS#1 11
PD_LED 24
A A
PRIMARY IDE BLOCK
HDRST#P
R150
8.2K
R380
4.7K
5
R113 33
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
IDE1
YJ220-CB-1
1
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
R158
4.7K
VCC3 VCC3
SECONDARY IDE BLOCK
IDE2
2
PDD8
PDD9
PDD10
PDD11
PDD12
12
PDD13
PDD14 PDD1
16 15
PDD15 PDD0
22
24
26
28
30
32
34
36
38
40 39
C108
X_4700p
R136
15K
PDD[8..15] 11
PD_CS#3 11
4
SDD[0..7] 11
HD_RST#
R115 33
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0
SD_DREQ 11
SD_IOW# 11
SD_IOR# 11
SD_IORDY 11
SD_DACK# 11
IRQ15 10 PD_DET 18
SD_A1 11
SD_A0 11 SD_A2 11
SD_CS#1 11
SD_LED 24
R120
4.7K
VCC3 VCC3
3
HDRST#S
R123
8.2K
YJ220-CW-1
1
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
R130
4.7K
2
SDD8
SDD9
SDD10
SDD11
SDD12
12
SDD13
SDD14
16 15
SDD15
22
24
26
28
30
32
34
36
38
40 39
C102
X_4700p
R141
15K
SDD[8..15] 11
SD_DET 18
SD_CS#3 11
2
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR
Clock Synthesizer
MS-6752
1
62 7 Friday, December 20, 2002
of
0A
5
VCCA_FSB
VCC_AGP
C97 104P
A31
B4
J6J7J8J9K6K7K8K9L6L7L9
VCC
VCCA_FSB
VCCA_FSB
VSS
VSS
VSS
VSS
VSS
C12
C14
C16
C18
C10
C8
VCC
VSS
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
C20
C22
C24
C26
AE14
D26
D30
L23
E29
B32
K23
C30
C31
J25
B31
E30
B33
J24
F25
D34
C32
F28
C34
J27
G27
F29
E28
H27
K24
E32
F31
G30
J26
G26
B30
D28
B24
B26
B28
E25
F27
B29
J23
L22
C29
J21
K21
E23
L21
D24
E27
G24
G22
C27
B27
B7
C7
E8
AK4
AJ8
L20
L13
L12
E24
C25
F23
U11A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
BREQ0#
BPRI#
BNR#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
DBSY#
DRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
CPURST#
RSTIN#
ICH_SYNC#
PROCHOT#
BSEL0
BSEL1
HDRCOMP
HDSWING
HDVREF
HA#[3..31] 4
D D
HADSTB#0 4
HADSTB#1 4
C C
HBR#0 4
HBPRI# 4
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HBNR# 4
HLOCK# 4
HADS# 4
HREQ#[0..4] 4
HITM# 4
HDEFER# 4
HTRDY# 4
HDBSY# 4
HDRDY# 4
HRS#[0..2] 4
MCH_CLK 6
MCH_CLK# 6
B B
CPURST# 4
PCIRST#1 20,23,25
PROCHOT# 4,11
BSEL0_SPG 6
BSEL1_SPG 6
R124 20RST
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HIT# 4
HRS#0
HRS#1
HRS#2
MS5_POK
ICH_SYNC#
HRCOMP
HSWING
GTLREF 4
220p_X7R
C96
VCC
VCC
VCC
VSS
VSS
VSS
C28D1D11
D9
VCC
VSS
4
N11N9P10
P11
R11
T16
T17
T18
T19
U16
U17
U20
V16
V18
V20
W16
N10
M10
M11M8M9
L10
L11
VCC
VCC
VCC
VCC
VCC
VSS
VSS
D13
D15
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D17
D19
D21
D23
D25
D27
D29
D31
D33
T20
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D35
F3F5F8
E3
F1
E1
F10
W19
W20
Y16
Y17
Y18
Y19
Y20
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F18
F20
F22
F14
F16
F12
VSS
VSS
VSS
VSS
G31
G35
H5
F24
F26
G28
3
A3
A33
A35B2B25
B34C1C23
C35
E26
M31
AF13
AF23
AJ12
AN1
AP2
R25
NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
VSS
VSS
VSS
VSS
VSS
VSS
H12
H14
H16H2H20
H18
H8
H9
VSS
NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H22
H24
H26
H30
H33
J10
J12
J14
J16
J18
J20
VSS
AR3
J22
VSS
AR33
VSS
J28
AR35
VSS
J32
VSS
J35
A7A9A11
VSS
VSS
VSS
VSS
K11
K12
2
VTT
D5D6D7E6E7
F7
A13
A16
A20
A23
A25
A27
A29
A32
C4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K14
K16
K18
K33
K20
K22
K25
K27
K29
L24
L25
A4A5A6B5B6C5C6
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VSS
VSS
VSS
VSS
VSS
VSS
M3M6M26
VSS
M27
M28
M30
M33N1N4
VSS
VSS
VSS
L26
L35
L31
A15
VTT
VTT
VTT
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
VSS
VSS
Intel Springdale-N
{Priority}
VTT_FSB1
VTT_FSB2
A21
HD0#
HD1#
HD2#
HD3#
VTT_FSB
VTT_FSB
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
DINV_0#
DINV_1#
DINV_2#
DINV_3#
C107 0.47u
C100 0.47u
B23
E22
B21
D20
B22
D22
B20
C21
E18
E20
B16
D16
B18
B17
E16
D18
G20
F17
E19
F19
J17
L18
G16
G18
F21
F15
E15
E21
J19
G14
E17
K17
J15
L16
J13
F13
F11
E13
K15
G12
G10
L15
E11
K13
J11
H10
G8
E9
B13
E14
B14
B12
B15
D14
C13
B11
D10
C11
E10
B10
C9
B9
D8
B8
C17
L17
L14
C15
B19
C19
L19
K19
G9
F9
D12
E12
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HDBI#0
HDBI#1
HDBI#2
HDBI#3
HD#[0..63] 4
HDBI#[0..3] 4
HDSTBP#0 4
HDSTBN#0 4
HDSTBP#1 4
HDSTBN#1 4
HDSTBP#2 4
HDSTBN#2 4
HDSTBP#3 4
HDSTBN#3 4
1
VCC3
ICH_SYNC# MS5_POK ICH_PWROK
VCCP
A A
HSWING
C115
X_0.01u_X7R
C118
0.01u_X7R
{VOLTAGE}
1/4*Vccp
5
R157
301RST
R154
100RST
I=30mA
C121
0.1u_X7R
+
0.82uH-30mA
EC21
10U/16V/S
L10
R167
FSB VCCA_FSB
VCC_AGP
0
00
1
111
MS5_POK 23
4
3
1 0
0
ICH_SYNC#
MS5_POK
0
0
0
VCC3
R285 X_220
R284
X_220
Q40 X_2N3904S
Q41 X_2N3904S
R272 0
R270
X_1K
ICH_PWROK 11
MSI
Title
Size Document Number Rev
2
Date: Sheet
MICRO-STAR
Intel Springdale - CPU
MS-6752
1
72 7 Friday, December 20, 2002
0A
of
5
MDQ_A[0..63] 12
MDQ_A4
MDQ_A9
MDQ_A3
MDQ_A6
MDQ_A2
AM12
AN13
AM10
SDQ_A2
SDQ_A3
VCC_DDR
VCC_DDR
AA35
R35
AR21
MDQ_A7
MDQ_A5
AL10
AL12
SDQ_A4
SDQ_A5
SDQ_A6
VCC_DDR
VCC_DDR
VCC_DDR
AR15
AL6
MDQ_A8
AP13
AP14
AM14
SDQ_A7
SDQ_A8
SDQ_A9
VCC_DDR
VCC_DDR
VCC_DDR
AM1
AM2
AL7
MDQ_A11
MDQ_A10
AL18
AP19
SDQ_A10
SDQ_A11
VCC_DDR
VCC_DDR
AN8
AP3
MDQ_A1
MDQ_A0
AP10
U11B
D D
MCS_A#0 12
MCS_A#1 12
MRAS_A# 12
MCAS_A# 12
MWE_A# 12
MA_A[0..12] 12
C C
MBA_A0 12
MBA_A1 12
MDQM_A[0..7] 12
MDQS_A[0..7] 12
MCLK_A0 12
MCLK_A#0 12
MCLK_A1 12
MCLK_A#1 12
MCLK_A2 12
B B
MCLK_A#2 12
103P C170
103P C157
103P C161
104P C85
C89 105P
AA34
SCS_A0#
Y31
SCS_A1#
Y32
SCS_A2#
W34
SCS_A3#
AC33
SRAS_A#
Y34
SCAS_A#
AB34
SWE_A#
MA_A0
AJ34
AL33
AK29
AN31
AL30
AL26
AL28
AN25
AP26
AP24
AJ33
AN23
AN21
AL34
AM34
AP32
AP31
AM26
AE33
AH34
AP12
AP16
AM24
AP30
AF31
W33
M34
AN11
AP15
AP23
AM30
AF34
M32
AK32
AK31
AP17
AN17
AK33
AK34
AM16
AL16
AK9
AN9
H32
V34
H31
N33
N34
P31
P32
AL9
E34
SMAA_A0
SMAA_A1
SMAA_A2
SMAA_A3
SMAA_A4
SMAA_A5
SMAA_A6
SMAA_A7
SMAA_A8
SMAA_A9
SMAA_A10
SMAA_A11
SMAA_A12
SMAB_A1
SMAB_A2
SMAB_A3
SMAB_A4
SMAB_A5
SBA_A0
SBA_A1
SDM_A0
SDM_A1
SDM_A2
SDM_A3
SDM_A4
SDM_A5
SDM_A6
SDM_A7
SDQS_A0
SDQS_A1
SDQS_A2
SDQS_A3
SDQS_A4
SDQS_A5
SDQS_A6
SDQS_A7
SMDCLK_A0
SMDCLK_A0#
SMDCLK_A1
SMDCLK_A1#
SMDCLK_A2
SMDCLK_A2#
SMDCLK_A3
SMDCLK_A3#
SMDCLK_A4
SMDCLK_A4#
SMDCLK_A5
SMDCLK_A5#
SMXRCOMP
SMXCOMPVOH
SMXCOMPVOL
SMVREF_A
MA_A1
MA_A2
MA_A3
MA_A4
MA_A5
MA_A6
MA_A7
MA_A8
MA_A9
MA_A10
MA_A11 MA_B12
MA_A12
MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7
MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7
XRCOMP
XCOMPH
XCOMPL
XVREF
AP11
SDQ_A0
SDQ_A1
VCC_DDR
E35
C93 474P
C92 224P
C137 224P
A A
C143 104P
5
VCC_DDR_C2
VCC_DDR_C3
C154 X_105P
R217 42.2RST
XRCOMP
R216 42.2RST
R139 42.2RST
YRCOMP VCC_DDR_C3
R128 42.2RST
VCC_DDR
AA35AA33
VCC_DDR
MDQ_B[0..63] 13
values still need verification
MDQ_A12
MDQ_A13
MDQ_A14
AL14
AN15
AP18
SDQ_A12
SDQ_A13
VCC_DDR
VCC_DDR
AP4
AP5
AP6
MDQ_A15
MDQ_A17
MDQ_A16
AM18
AP22
AM22
SDQ_A14
SDQ_A15
SDQ_A16
VCC_DDR
VCC_DDR
VCC_DDR
AR4
AR5
AP7
4
MDQ_A18
MDQ_A20
MDQ_A19
AL24
AN27
AP21
SDQ_A17
SDQ_A18
SDQ_A19
VCC_DDR
VCC_DDR
VCC_DDR
AR7
AR31
4
MDQ_A23
MDQ_A22
MDQ_A21
AL22
AP25
SDQ_A20
SDQ_A21
SDQ_A22
SDQ_B0
SDQ_B1
AJ10
AE15
MDQ_B1
MDQ_B2
MDQ_B0
MDQ_A25
MDQ_A24
AP27
AP28
AP29
SDQ_A23
SDQ_A24
SDQ_B2
SDQ_B3
AL11
AE16
AL8
MDQ_B4
MDQ_B3
XCOMPH
MDQ_A27
MDQ_A26
AP33
AM33
SDQ_A25
SDQ_A26
SDQ_A27
SDQ_B4
SDQ_B5
SDQ_B6
AF12
AK11
MDQ_B5
MDQ_B6
MDQ_A28
MDQ_A31
MDQ_A30
MDQ_A29
MDQ_A32
AM28
AN29
AM31
AN34
AH32
SDQ_A28
SDQ_A29
SDQ_A30
SDQ_A31
SDQ_A32
SDQ_B7
SDQ_B8
SDQ_B9
SDQ_B10
SDQ_B11
AG12
AE17
AL13
AK17
AL17
MDQ_B9
MDQ_B8
MDQ_B7
MDQ_B11
MDQ_B10
C171 X_105P
R207 30.1KST
R206 10KST
C182 105P
R203 10KST
R202 30.1KST
MDQ_A33
MDQ_A34
AG34
AF32
SDQ_A33
SDQ_B12
AK13
AJ14
MDQ_B12
MDQ_B13
MDQ_A35
MDQ_A36
AD32
AH31
SDQ_A34
SDQ_A35
SDQ_A36
SDQ_B13
SDQ_B14
SDQ_B15
AJ16
AJ18
MDQ_B14
MDQ_B15
MDQ_A38
MDQ_A37
AG33
AE34
SDQ_A37
SDQ_A38
SDQ_B16
SDQ_B17
AE19
AE20
MDQ_B17
MDQ_B16
MDQ_A40
MDQ_A39
AD34
AC34
SDQ_A39
SDQ_A40
SDQ_B18
SDQ_B19
AG23
AK23
MDQ_B19
MDQ_B18
VCC_DDR
VCC_DDR
MDQ_A42
MDQ_A41
AB31
V32
SDQ_A41
SDQ_A42
SDQ_B20
SDQ_B21
AL19
AK21
MDQ_B21
MDQ_B20
MDQ_A44
MDQ_A43
V31
AD31
SDQ_A43
SDQ_B22
AJ24
AE22
MDQ_B22
MDQ_B23
MDQ_A45
MDQ_A46
MDQ_A47
AB32
U34
SDQ_A44
SDQ_A45
SDQ_A46
SDQ_B23
SDQ_B24
SDQ_B25
AK25
AH26
MDQ_B26
MDQ_B25
MDQ_B24
MDQ_A48
MDQ_A49
U33
T34
SDQ_A47
SDQ_A48
SDQ_B26
SDQ_B27
AG27
AF27
MDQ_B27
MDQ_B28
MDQ_A51
MDQ_A50
T32
K34
K32
SDQ_A49
SDQ_A50
SDQ_B28
SDQ_B29
AJ26
AJ27
AD25
MDQ_B29
MDQ_B30
YCOMPH
MDQ_A53
MDQ_A52
T31
P34
SDQ_A51
SDQ_A52
SDQ_A53
SDQ_B30
SDQ_B31
SDQ_B32
AF28
AE30
MDQ_B32
MDQ_B31
R33
R34
3
MDQ_A54
MDQ_A55
L34
L33
SDQ_A54
SDQ_A55
SDQ_B33
SDQ_B34
AC27
AC30
MDQ_B33
MDQ_B34
3
MDQ_A58
MDQ_A56
MDQ_A57
MDQ_A59
J33
H34
E33
F33
SDQ_A56
SDQ_A57
SDQ_A58
SDQ_B35
SDQ_B36
SDQ_B37
Y29
AE31
AB29
AA26
MDQ_B36
MDQ_B38
MDQ_B37
MDQ_B35
R114 30.1KST
R118 10KST
R122 10KST
R121 30.1KST
MDQ_A61
MDQ_A60
K31
J34
SDQ_A59
SDQ_A60
SDQ_A61
SDQ_B38
SDQ_B39
SDQ_B40
AA27
AA30
MDQ_B39
MDQ_B40
MDQ_A62
MDQ_A63
G34
F34
SDQ_A62
SDQ_A63
SDQ_B41
SDQ_B42
W30
U27
MDQ_B42
MDQ_B41
MCKE_A0
AL20
SCKE_A0
SDQ_B43
SDQ_B44
T25
AA31
MDQ_B43
MDQ_B44
MCKE_A1
AN19
AM20
AP20
SCKE_A1
SCKE_A2
SDQ_B45
SDQ_B46
V29
U25
R27
MDQ_B47
MDQ_B45
MDQ_B46
VCC_DDR_C2 YCOMPL XCOMPL
AB25
SCKE_A3
VCCA_DDR
SDQ_B47
SDQ_B48
SDQ_B49
P29
R30
MDQ_B49
MDQ_B48
R35
AC26
AC25
AL35
VCCA_DDR
VCCA_DDR
VCCA_DDR
SDQ_B50
SDQ_B51
SDQ_B52
K28
L30
R31
MDQ_B52
MDQ_B50
MDQ_B51
MCKE_A0 12
MCKE_A1 12
VCCA_DDR
AN4
AM3
AN5
VCC_DDR
VCC_DDR
VCC_DDR
SDQ_B53
SDQ_B54
SDQ_B55
SDQ_B56
R26
P25
L32
K30
MDQ_B56
MDQ_B53
MDQ_B55
MDQ_B54
104P C120
AM5
AM6
VCC_DDR
VCC_DDR
SDQ_B57
SDQ_B58
H29
F32
MDQ_B58
MDQ_B57
VCC_DDR
AM7
AM8
AN2
AN6
VCC_DDR
VCC_DDR
VCC_DDR
SDQ_B59
SDQ_B60
SDQ_B61
G33
N25
M25
J29
MDQ_B59
MDQ_B60
MDQ_B61
MDQ_B62
VCCA_DDR
C126
104P
AN7
N32
VCC_DDR
VCC_DDR
SDQ_B62
SDQ_B63
G32
AK19
MDQ_B63
MCKE_B0
P3P6P8
N35
VSS
VSS
VSS
SCMDCLK_B0#
SCMDCLK_B1#
SCMDCLK_B2#
SCMDCLK_B3#
SCMDCLK_B4#
SCMDCLK_B5#
SMYCOMPVOH
SMYCOMPVOL
SCKE_B0
SCKE_B1
SCKE_B2
AF19
AG19
AE18
MCKE_B1
+
2
SCS_B0#
VSS
VSS
SCS_B1#
SCS_B2#
SCS_B3#
SRAS_B#
SCAS_B#
SWE_B#
SMAA_B0
SMAA_B1
SMAA_B2
SMAA_B3
SMAA_B4
SMAA_B5
SMAA_B6
SMAA_B7
SMAA_B8
SMAA_B9
SMAA_B10
SMAA_B11
SMAA_B12
SMAB_B1
SMAB_B2
SMAB_B3
SMAB_B4
SMAB_B5
SBA_B0
SBA_B1
SDM_B0
SDM_B1
SDM_B2
SDM_B3
SDM_B4
SDM_B5
SDM_B6
SDM_B7
SDQS_B0
SDQS_B1
SDQS_B2
SDQS_B3
SDQS_B4
SDQS_B5
SDQS_B6
SDQS_B7
SCMDCLK_B0
SCMDCLK_B1
SCMDCLK_B2
SCMDCLK_B3
SCMDCLK_B4
SCMDCLK_B5
SMYRCOMP
SMVREF_B
SCKE_B3
Intel Springdale-N
{Priority}
MCKE_B1 13
MCKE_B0 13
L14
1uH-1206-1A
{Prority}
EC23
10U/16V/S
2
Its current is 5.1A.
U26
T29
V25
W25
W26
W31
W27
MA_B0
AG31
MA_B1
AJ31
MA_B2
AD27
MA_B3
AE24
MA_B4
AK27
MA_B5
AG25
MA_B6
AL25
MA_B7
AF21
MA_B8
AL23
MA_B9
AJ22
MA_B10
AF29
MA_B11
AL21
AJ20
AE27
AD26
AL29
AL27
AE23
Y25
AA25
MDQM_B0
AG11
MDQM_B1
AG15
MDQM_B2
AE21
MDQM_B3
AJ28
MDQM_B4
AC31
MDQM_B5
U31
MDQM_B6
M29
MDQM_B7
J31
MDQS_B0
AF15
MDQS_B1
AG13
MDQS_B2
AG21
MDQS_B3
AH27
MDQS_B4
AD29
MDQS_B5
U30
MDQS_B6
L27
MDQS_B7
J30
AG29
AG30
AF17
AG17
N27
N26
AJ30
AH29
AK15
AL15
N31
N30
YRCOMP
AA33
YCOMPH
R34
YCOMPL
R33
AP9
YVREF
VCC_AGP
1
MCS_B#0 13
MCS_B#1 13
MRAS_B# 13
MCAS_B# 13
MWE_B# 13
MA_B[0..12] 13
MBA_B0 13
MBA_B1 13
MDQM_B[0..7] 13
MDQS_B[0..7] 13
MCLK_B0 13
MCLK_B#0 13
MCLK_B1 13
MCLK_B#1 13
MCLK_B2 13
MCLK_B#2 13
103P C101
103P C99
103P C94
104P C150
C180 X_105P
R225 150RST
R224 150RST
VCC_DDR
C179 105P
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR
Intel Springdale - Memory
MS-6752
1
82 7 Friday, December 20, 2002
of
0A
5
P26
P27
P28
P30
P33R1R4
VSS
VSS
VSS
VSS
AE13
AE25
VSS
VSS
VSS
VSS
AE26
VSS
VSS
AE32
VSS
VSS
AE35
AF3
R32T1T3
VSS
VSS
AF6
VSS
VSS
VSS
AD30
AD33
800mV
350mV
VSS
VSS
AD28
P9
VSS
VSS
VSS
VSS
VSS
AE1
AE10
AE11
AE12
AE4
GAD[0..31] 14
D D
VCC_AGP
VCC_AGP
GC_BE#[0..3] 14
ST[0..2] 14
SBA[0..7] 14
R191 43.2RST
R265
226RST
R266
113RST
AD_STB0 14
AD_STB#0 14
AD_STB1 14
AD_STB#1 14
GREQ# 14
GGNT# 14
RBF# 14
WBF# 14
GFRAME# 14
GIRDY# 14
GTRDY# 14
GDEVSEL# 14
GSTOP# 14
GPAR 14
SB_STB 14
SB_STB# 14
PIPE# 14
DBI_LO 14
103P C224
GSWING 14
103P C164
AGP_REF 14
C C
B B
A A
GAD0
GAD1
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC_BE#0
GC_BE#1
GC_BE#2
GC_BE#3
ST0
ST1
ST2
RBF#
WBF#
MCH_66 6
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
GRCOMP
GSWING
H_SWING=(0.8*VCC_AGP)+-2%
R242
147RST
H_SWING=(0.233*VCC_AGP)+-2%
5
U11C
AE6
GAD0/DVOB_HSYNC
AC11
GAD1/DVOB_VSYNC
AD5
GAD2/DVOB_D1
AE5
GAD3/DVOB_D0
AA10
GAD4/DVOB_D3
AC9
GAD5/DVOB_D2
AB11
GAD6/DVOB_D5
AB7
GAD7/DVOB_D4
AA9
GAD8/DVOB_D6
AA6
GAD9/DVOB_D9
AA5
GAD10/DVOB_D8
W10
GAD11/DVOB_D11
AA11
GAD12/DVOB_D10
W6
GAD13/DVOBC_CLKINT
W9
GAD14/DVOB_FLDSTL
V7
GAD15/MDDC_DATA
AA2
GAD16/DVOC_VSYNC
Y4
GAD17/DVOC_HSYNC
Y2
GAD18/DVOC_BLANK#
W2
GAD19/DVOC_D0
Y5
GAD20/DVOC_D1
V2
GAD21/DVOC_D2
W3
GAD22/DVOC_D3
U3
GAD23/DVOC_D4
T2
GAD24/DVOC_D7
T4
GAD25/DVOC_D6
T5
GAD26/DVOC_D9
R2
GAD27/DVOC_D8
P2
GAD28/DVOC_D11
P5
GAD29/DVOC_D10
P4
GAD30/DVOBC_INTR#
M2
GAD31/DVOC_FLDSTL
Y7
GCBE0/DVOB_D7
W5
GCBE1/DVOB_BLANK#
AA3
GCBE2
U2
GCBE3/DVOC_D5
AC6
GADSTBF0/DVOB_CLK
AC5
GADSTBS0/DVOB_CLK#
V4
GADSTBF1/DVOC_CLK
V5
GADSTBS1/DVOC_CLK#
N6
GREQ
M7
GGNT
N3
GST0
N5
GST1
N2
GST2
R10
GRBF
R9
GWBF
U6
GFRAME/MDVI_DATA
V11
GIRDY/MI2CCLK
AB5
GTRDY/MDVI_CLK
AB4
GDEVSEL/MI2CDATA
W11
GSTOP/MDDC_CLK
AB2
GPAR/ADD_DETECT
H4
GCLKIN
R6
GSBA0#/ADD_ID0
P7
GSBA1#/ADD_ID1
R3
GSBA2#/ADD_ID2
R5
GSBA3#/ADD_ID3
U9
GSBA4#/ADD_ID4
U10
GSBA5#/ADD_ID5
U5
GSBA6#/ADD_ID6
T7
GSBA7#/ADD_ID7
U11
GSBSTBF
T11
GSBSTBS
M4
DBI_HI
M5
DBI_LO
AC2
GRCOMP/DVOBC_RCOMP
AC3
GVSWING
AD2
GVREF
HL_SWING
C222
104P
HL_VREF
C223
104P
4
T6T8T9
T10
T26
T27
T28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF14
VSS
AF16
AF18
AF20
AF22
AF24
VSS
AF25
VSS
VSS
AF11
AF9
T30
AF30
VSS
VSS
T33
AF33
VSS
VSS
T35
VSS
VSS
AG4
AG8
VSS
VSS
VSS
VSS
AG14
U32V3V8V9V10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG16
AG18
AG20
AG22
V6
U4
U18
U19
VSS
VSS
AG24
VSS
VSS
AG26
VSS
VSS
AG28
V17
VSS
VSS
AG32
V19
VSS
VSS
AG35
V26
AH3
V27
VSS
VSS
AH6
V28
V30W4W17
VSS
VSS
VSS
VSS
AH12
AH10
VSS
VSS
V33
VSS
VSS
AH14
VSS
VSS
AH16
VSS
VSS
AH18
W18
VSS
VSS
AH20
Y3
W32Y6Y8Y9Y26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ1
AH22
AH24
AH30
AH33
Springdale Decoupling Capacitors
VCCP
4
VCCP
C76
104P
C77
104P
Close CPU side of GMCH Close AG1 and Y1 of GMCH Close E35, R35, AA35, AL35, AR31, AR21 and AR15 of GMCH
C81
105P/0805
C84
105P/0805
All caps trace length is less than 100mils.
C146
104P
C177
X_104P
3
C142 104P
Y28
Y30
Y33
Y35
Y27
AA1
AA4
AA32
AB10
AB26
AC1
AC4
AC32
VSS
VSS
AB28
VSS
VSS
AL32
AB30
VSS
VSS
AM9
AB33
VSS
VSS
AM11
VSS
VSS
AM13
VSS
VSS
AM15
VSS
VSS
AM17
AC35
VSS
VSS
AM19
AD3
VSS
VSS
AM21
AD6
AD8
VSS
VSS
AM23
AM25
C153
X_104P
C21
104P
VSS
VSS
AD9
VSS
VSS
AM27
AD10
AM29
AB27
AB3
AB6
AB8
VSS
VSS
VSS
VSS
AK12
AK14
C162
X_104P
C80
104P
AK16
VSS
VSS
AK18
VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_AGP
VSS
VSS
VSS
VSS
AK20
VSS
VSS
AK22
AB9
VSS
VSS
AK24
VSS
VSS
AK26
VSS
VSS
AK28
AL1
C155
104P
C88
104P
Y10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK3
AJ4
AJ9
AJ32
AJ35
AK8
AK10
3
VCC_AGP
L1L5Y1J1J2J3K2K3K4K5J4J5L4L2L3
VSS
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM35
AN10
AN12
AN14
AN16
AN18
AN20
C190
104P
C123
104P
C148 104P
VCC_AGP
VCC_AGP
VCC_AGP
VSS
VSS
VSS
AN22
AN24
AN26
VCC_AGP
VCC_AGP
VCC_AGP
VSS
VSS
VSS
AN28
AN30
AN32
VTT
2
VCC_AGP
VCC_AGP
VCC_AGP
VSS
VSS
VSS
AR9
AR11
AR13
C113
104P
C119
104P
2
AG1
Y11
VCC_AGP
VCCA_AGP
VCCA_AGP
HI_STRF
HI_STRS
HI_RCOMP
HI_SWING
HI_VREF
CISTRF
CISTRS
CI_RCOMP
CI_SWING
CI_VREF
DREFCLK
DDCA_CLK
DDCA_DATA
VSYNC
HSYNC
GREEN
GREEN#
REFSET
VCC_DAC
VCC_DAC
VCCA_DPLL
VCCA_DAC
VSSA_DAC
EXTTS#
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
VSS
VSS
VSS
VSS
AR23
AR16
AR20
AF5
HI0
AG3
HI1
AK2
HI2
AG5
HI3
AK5
HI4
AL3
HI5
AL2
HI6
AL4
HI7
AJ2
HI8
AH2
HI9
AJ3
HI10
AH5
AH4
AD4
AE3
AE2
AK7
CI0
AH7
CI1
AD11
CI2
AF7
CI3
AD7
CI4
AC10
CI5
AF8
CI6
AG7
CI7
AE9
CI8
AH9
CI9
AG6
CI10
AJ6
AJ5
AG2
AF2
AF4
G4
F2
H3
E2
G3
H7
BLUE
G6
BLUE#
H6
G5
F4
RED
E4
RED#
D2
G1
G2
B3
C2
D3
AP8
AG9
AG10
AN35
AP34
AR1
AR25
VSS
AR27
VSS
AR29
VSS
AR32
VSS
Intel Springdale-N
{Priority}
1
VCC_AGP
C128
104P
HL0
HL1 GAD2
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
HL_COMP
HL_SWING
HL_VREF
CI_RCOMP
CI_SWING
CI_VREF
GSET
VCCA_DPLL
VCCA_DAC
C124
0.01u
Title
Size Document Number Rev
Date: Sheet
HL[0..10] 10
HI_RCOMP Calculation
R=[(1.5V-08V)/0.8V]*60ohm=52.5ohm
HL_STRF 10
HL_STRS 10
R199 52.3RST
103P C217
103P C218
R245 52.3RST
DOT_48 6
3VDDCCL 15
3VDDCDA 15
CRT_VSYNC 15
CRT_HSYNC 15
CRT_B 15
CRT_G 15
CRT_R 15
R170 137
I=35mA ESR is 0.1mohm to GMCH
VCC_AGP
C284
0.01u
C122
0.1u
VCC_AGP
103P C221
103P C160
VCC3
+
EC20
100u
R257 226
R246 113
VCC_AGP
L13 100n
EC22
470u
+
MSI
Intel Springdale - AGP & LAN
1.7V/60mA
L12
DPLL VCCA_DPLL
100nH
CI_SWING
R243
147
CI_VREF
MICRO-STAR
MS-6752
1
R190
R153
VCC_DAC
0
VCC_AGP
1
800mV
350mV
92 7 Friday, December 20, 2002
0A
of