MSI MS-6555 Schematics

Cover Sheet Block Diagram Clock ICS950218AF & ATA100 IDE CONNECTORS mPGA478-B INTEL CPU Sockets INTEL 845E GMCH -- North Bridge INTEL ICH4 -- South Bridge
MS-6555E
Version 00A
INTEL (R) 845E Chipset Willamette/Northwood 478pin mPGA-B Processor Schematics
CPU:
Willamette/Northwood mPGA-478B Processor
LPC I/O -- W83627HF AC'97 Codec / Audio Jack / Front Audio Connector Audio Amplifier & CD Panel Play DDR DIMM1&2 and DDR Terminator Resistor AGP Slot PCI SLOT 1 & 2 & 3 Floppy, KB/MS, Com/Printer Ports USB Connectors Front Panel , ATX Connectors & 1.5V Regulators FWH VRM 9.0 Regulator (CPU Power) SMBUS Isolation & FAN Real Tek 8100BL LAN Controller W83302D(MS5) ACPI Controller VGA Connector
ISA Bridge & ISA SLOT
11
12
13
14-15
16
17
18
19
20
21
22
23
24
25
26 27-28
System Brookdale-E Chipset:
INTEL 845E + INTEL ICH4
On Board Chipset:
BIOS -- FWH AC'97 Codec -- ALC201A LPC Super I/O -- W83627HF Clock Generation -- ICS950218AF LAN -- RealTek 8100BL ISA -- Winbond 83628 + 83629
Expansion Slots:
AGP2.0 SLOT * 1 PCI2.2 SLOT * 3 ISA SLOT * 1
Last Schematic Update Date:
Monday, September 09, 2002
Title Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
Micro Star Restricted Secret
COVER SHEET
MS-6555E
Last Revision Date: Sheet
1 31
of
Rev
0A
VCC12 Power Supply CONN
AGP 4X (1.5V) VGA CONN
IDE CONN 1&2
USB Port 0:1 USB Front Panel
USB Port 2:3 USB Front Panel
USB Port 4:5 USB Rear Panel
(100/133MHz)
VRM 9.2 Clock
4X (66MHz) AGP
ATA33/ATA66/ATA100
(48MHz)
LPC Bus
Winbond LPC I/O W83627HF
Willamette/Northwood Socket (mPGA478-B)
Scalable Bus
MCH: Memory
Controller HUB
HUB Interface
ICH4: I/O
Controller HUB
(33MHz)
FWH: Firmware HUB
Brookdale -G Chipset
(100/133MHz)
(200/266 MHz)
(14.318MHz)
PCI (33MHz)
PCI (33MHz)
AC Link
Generator
DDR DIMM1,2
PCI Slots 1:3
LAN Controller
AC '97 Audio
Codec
MIC In
Line In
Line Out
CD-ROM (Option)
Hardware Monitor
PS2 Mouse & Keyboard
Parallel (1) Serial (2)
Floppy Disk Drive
Model option table
Model type Function BOM Config ERP BOM No.
MS6555E(B) Cfg6555EB-00A-L 601-6555-XXXLegend Bussiness(845E)
Title Document Number
Micro Star Restricted Secret
BLOCK DIAGRAM
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
MS-6555E
Last Revision Date:
Sheet
Rev
Monday, September 09, 2002
2 31
of
0A
VCC3
* Put GND copper under Clock Gen. connect to every GND pin * 40 mils Trace on Layer 4 with GND copper around * put close to every power pin
it
Trace Width 7mils.
*
Same Group spacing 15mils
*
Different Group spacing 30mils
*
Differentical mode spacing 7mils on itself
*
VCC3
CT7
+
100u_16V
FB1 80_0805 R2 27.4_1%
CB1
CB273
0.1u
4.7u-0805
filtering from 10K~1M
CP7 X_COPPER
VCC3
FB2 X_0_0805
CB7
CB275
0.1u
4.7u-0805
for good filtering from 10K~1M
R30 1K
VCC3
R35
VCCP VCC3V
220
CLOCK GENERATOR BLOCK
CB2
0.1u
CB3
0.1u
CB4
0.1u
CB5
0.1u
CB6
0.1u
C24
0.01u
C26
0.01u
C27
0.01u
U1
39
CPU_VDD
36
CPU_GND
46
MREF_VDD
43
MREF_GND
29
3V66_GND
9
PCI_VDD
5
PCI_GND
18
PCI_VDD
13
PCI_GND
24
48_VDD
21
48_GND
2
REF_VDD
47
REF_GND
34
CORE_VDD
33
CORE_GND
26
SCLK
25
SDATA
19
VTT_GD#
ICS-ICS950218-SSOP48
CPUCLK0
CPUCLK0#
CPUCLK1
CPUCLK1#
CPUCLK2
CPUCLK2#
3V66_03V66_VDD 3V66_1 3V66_2
3V66_48/SEL66_48#
FS2/PCI_F0 FS3/PCI_F1
SEL48_24#/PCI_F2
FS4/PCI0
FS0/48MHz
FS1/24_48MHz
MUL0/REF0 MUL1/REF1
RESET#
PWR_DN#
PCI1 PCI2 PCI3 PCI4 PCI5 PCI6
IREF
41 40
38 37
45 44
3132 30 28 27
6 7 8
10 11 12 14 15 16 17
22 23
48 1
3
X1
4
X2
35 20
42
VCC3V CPUCLK#
CB274
0.1u
VDDA3V
SMBCLK_ISO(11,14,23,25)
SMBDATA_ISO(11,14,23,25)
CE
Q1
B
2N3904S
*Trace < 0.5"
RN84 33
1 2 3 4 5 6 7 8
7 8 5 6 3 4 1 2
RN2 33
1 2
CPUCLK CPUCLK#
MCHCLK
MCH_66 ICH_66
AGPCLK
PCICLK0
PCICLK1 PCICLK2 LAN_PCLK SIO_PCLK FWH_PCLKRFWH_PCLK ICH_PCLK
ICH_48
Iref = 2.32mA
CPU0 CPU0#
R4 27.4_1%
CPU1
R10 27.4_1%
CPU1# MCHCLK#
R12 27.4_1%
RMCH_66 RICH_66 RAGPCLK SEL48_2
R589 47
FS2
R15 33
FS3
R144 I_33
SEL48_1 FS4
RPCICLK1
R16 33
RPCICLK2
R17 33
RLAN_PCLK RSIO_PCLK
RICH_PCLK
FS0
R26 33
FS1
REF_14 ICH_14
R25 33 R20 I_33
X1
C23 22P1 2
X1 14M-32pf-HC49S-D
X2
C25 22P
32pF
R28 475_1%
PWR_DN#
R590 33
CPUCLK (4) CPUCLK# (4)
MCHCLK (6) MCHCLK# (6)
MCH_66 (6) ICH_66 (10)
AGPCLK (16) SIO_48 (11)
PCICLK0 (17) ISA_PCLK (27)
PCICLK1 (17) PCICLK2 (17) LAN_PCLK (24) SIO_PCLK (11) FWH_PCLK (21) ICH_PCLK (9)
ICH_48 (10)
ICH_14 (10) ISA_14 (28)
8102+205=8307 8096+229=8325
4146+213=4359
8136+141=8277
Shut Source Termination Resistors
CPUCLK
R1 49.9_1% R3 49.9_1%
MCHCLK
R5 49.9_1%
MCHCLK#
R7 49.9_1%
Trace less 0.2"
49.9ohm for 50ohm M/B impedance
CLOCK STRAPPING RESISTORS
RN75
8.2K
1 2 3 4 5 6 7 8
R740 10K
VCC3V
BSEL0 (4)
CPU (MHz) 100 MHz 133 MHz
VCC3
VCC3V
R18 1.5K
FS1
R22 8.2K
FS4 FS3 FS2 FS1 FS0
1 1 1 0 1 1 1 1 1 1
SMBCLK_ISO SMBDATA_ISO
SEL48_2
REF_14
MULTSEL0=0 -> 6X Iref MULTSEL0=1 -> 7X Iref
FS4 SEL48_1 FS3 FS2
FS0
R29 2.7K R32 2.7K
R741 10K
R742 10K
Pull-Down Capacitors
PCICLK0 PCICLK1 PCICLK2
CN11 X_8P4C-10P
LAN_PCLK SIO_PCLK FWH_PCLK ICH_PCLK
SIO_48 ICH_48
ICH_14
VCC5
used only for EMI issue
Trace less 0.2"
VCC_AGP
R904
1.5K
R905 1K
CE
R906
Q85 2N3904S
B
R907
1.5K
1.5K
X_10pC13 X_10pC14 X_10pC15
1
2
3
4
5
6
7
8
X_10pC376 10pC20
X_10pC16
X_0.1uC110
ST1 (7,16)
BSEL0 (4)
PRIMARY IDE BLOCK SECONDARY IDE BLOCK
IDE1
HD_RST#1
+12V
PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0
PDD[0..7](10)
PD_DREQ(10)
PD_IOW#(10)
PD_IOR#(10) PD_IORDY(10) PD_DACK#(10)
IRQ14(9)
PD_A1(10)
PD_CS#1(10) PD_CS#3 (10)
PD_LED(20)
Modify
HD_RST#(25)
HD_RST#1R
R43 33
C29
R47
220p
4.7K
R157 L2_10K
HD_RST# HD_RST#1 HD_RST#2
Q26 L2_2N7002
R216 S_0
CN-BH-D2x20-1:21-BL-ZBT-S1
1 3 4 5 6 7 8 91110
13 14 17 18
19 21 23 25 27 29 31 33 35 37
R48 10K
G
DS
2
12 1615
22 24 26 28 30 32 34 36 38 4039
C30 X_4700p
RST_GATE
PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
R743
15K
ATA100 IDE CONNECTORS
PDD[8..15] (10)
* Trace Width : 5mils * Trace Spacing : 7mils * Length(longest)-Length(shortest)<0.5" * Trace Length less than 6"
PD_DET (21) PD_A2 (10)PD_A0(10)
R158 L2_120KST
1 2
G
Q27 L2_2N7002
R217 S_0
DS
Only for CD-Play in S5 state function (Legend)
SDD[0..7](10)
SD_DREQ(10)
SD_IOW#(10)
SD_IOR#(10) SD_IORDY(10) SD_DACK#(10)
IRQ15(9) SD_A1(10) SD_A0(10)
SD_CS#1(10) SD_CS#3 (10)
SD_LED(20)
HD_RST#2
SDD7 SDD6 SDD5 SDD4 SDD3 SDD2 SDD1 SDD0
R49
4.7K
IDE2
R50 10K
VCC3VCC5 VCC5VCC3
13 14 17 18
19 21 23 25 27 29 31 33 35 37
D2x20-1:21-WH-SBT
1 3 4 5 6 7 8 91110
R44 33
C31 220p
HD_RST#2R
Title Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
2
SDD8 SDD9 SDD10 SDD11 SDD12
12
SDD13 SDD14
1615
SDD15
22 24 26 28 30 32 34 36 38 4039
C32 X_4700p
R744
15K
SDD[8..15] (10)
SD_DET (21) SD_A2 (10)
Micro Star Restricted Secret
Clock & IDE Conn.
MS-6555E
Last Revision Date:
Monday, September 09, 2002
Sheet
3 31
of
Rev
0A
HINV#[0..3]
HD#[0..63](6)
CPU GTL REFERNCE VOLTAGE BLOCKCPU SIGNAL BLOCK
HA#[3..31](6)
VID[0..4] (11,22)
HA#30
HA#29
HA#27
HA#24
HA#25
HA#23
HA#22
HA#26
HA#31
HA#28
DBI0# DBI1# DBI2# DBI3#
IERR# MCERR# FERR# STPCLK# BINIT# INIT# RSP#
DBSY# DRDY# TRDY#
ADS# LOCK# BNR# HIT# HITM# BPRI# DEFER#
TDI TDO TMS TRST# TCK THERMDA THERMDC THERMTRIP# GND/SKTOCC# PROCHOT# IGNNE# SMI# A20M# SLP#
RESERVED0 RESERVED1 RESERVED2 RESERVED3 RESERVED4 RESERVED5 RESERVED6
BSEL0 BSEL1
PWRGOOD RESET# D63#
D62# D61# D60# D59# D58# D57# D56# D55# D54#
D53#
V22
U21
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
V25
U23
U24
U26
T23
T22
T25
T26
R24
R25
P24
R21
N25
N26
M26
CPU1A
HINV#0 HINV#1 HINV#2 HINV#3
FERR#(9)
STPCLK#(9)
HINIT#(9)
HDBSY#(6)
HDRDY#(6)
HTRDY#(6)
HADS#(6)
HLOCK#(6)
HBNR#(6)
HITM#(6)
HBPRI#(6)
HDEFER#(6)
TRMTRIP #(9)
PROCHOT#(10)
IGNNE#(9)
HSMI#(9) A20M#(9)
SLP#(9)
BSEL0(3)
CPU_GD(10)
CPURST#(6)
HINIT#
HIT#(6)
ITP_TDI ITP_TD O ITP_TM S ITP_TRST# ITP_TCK THERMDA THERMDC TRMTRIP# SKTOCC#
CPU_GD CPURST# HD#63
HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54
AF26
AB26
AE21 AF24 AF25
AB23 AB25 AA24
AA22 AA25
W25 W26
E21
G25
P26 V21
AC3
V6 B6 Y4
AA3
W5
AB2
H5 H2
J6
G1 G4 G2
F3 E3 D2 E2
C1 D5 F7 E6 D4 B3 C4 A2
C3 B2 B5 C6
A22
A7 AD2 AD3
AD6 AD5
Y21 Y24 Y23
Y26 V24
HA#21
A22#
D37#
N23
HA#20
A21#
D36#
M24
HA#19
A20#
D35#
P21
HA#18
A19#
D34#
N22
HA#17
A18#
D33#
M23
HA#16
A17#
D32#
H25
HA#15
A16#
D31#
K23
HA#14
A15#
D30#
J24
HA#13
A14#
D29#
L22
HA#12
A13#
D28#
M21
HA#11
A12#
D27#
H24
HA#10
A11#
D26#
G26
HA#9
A10#
D25#
L21
HA#8
A9#
D24#
D26
HA#7
A8#
D23#
F26
HA#6
A7#
D22#
E25
HA#5
A6#
D21#
F24
HA#4
A5#
D20#
F23
HA#3
A4#
D19#
G23
A3#
D18#
E24
AE25A5A4
D17#
D16#
H22
D25
DBR#
VCC_SENSE
D15#
D14#
D13#
J21
D23
C26
AD26
AC26
ITP_CLK1
ITP_CLK0
VSS_SENSE
D12#
D11#
D10#
D9#
D8#
H21
G22
B25
C24
C23
D7#
VID4
AE1
B24
VID3
AE2
VID4#
VID3#
D6#
D5#
D22
VID2
AE3
C21
VID1
AE4
VID2#
D4#
A25
VID1#
D3#
VID0
AE5
VID0#
GTLREF3 GTLREF2 GTLREF1 GTLREF0
BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#
REQ4# REQ3# REQ2# REQ1# REQ0#
TESTHI12 TESTHI11 TESTHI10
TESTHI9
TESTHI8 ITPCLKOUT1 ITPCLKOUT0
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1# BCLK0#
RS2# RS1# RS0#
AP1# AP0# BR0#
COMP1 COMP0
DP3# DP2# DP1# DP0#
ADSTB1# ADSTB0# DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#
LINT1/NMI
LINT0/INTR
D2#
D1#
D0#
A23
B22
B21
AA21 AA6 F20 F6
AB4 AA5 Y6 AC4 AB5 AC6
H3 J3 J4 K5 J1
AD25 A6 Y3 W4 U6 AB22 AA20 AC23 AC24 AC20 AC21 AA2 AD24
AF23 AF22
F4 G5 F1
V5 AC1 H6
P1 L24
L25 K26 K25 J26
R5 L5 W23 P23 J23 F21 W22 R22 K22 E22
E5 D1
SOCKET478
GTLREF1
BPM#5 BPM#4 BPM#3 BPM#2
HREQ#4 HREQ#3 HREQ#2 HREQ#1 HREQ#0
RN53 561 2
R592 1K
HRS#2 HRS#1 HRS#0
R64 51.1_1% R65 51.1_1%
3 4 5 6 7 8
VCCP
CPUCLK# (3) CPUCLK (3)
HBR#0 (6)
* Short trace
HADSTB#1 (6) HADSTB#0 (6) HDSTBP#3 (6) HDSTBP#2 (6) HDSTBP#1 (6) HDSTBP#0 (6) HDSTBN#3 (6) HDSTBN#2 (6) HDSTBN#1 (6) HDSTBN#0 (6)
NMI (9) INTR (9)
HREQ#[0..4] (6)
VCCP
HRS#[0..2] (6)
GTLREF1
2/3*Vccp
Every pin put one 220pF cap near it. Trace Width 7mils, Space 10mils. Keep the voltage divider within
1.5" of the GETREF pin.
CPU ITP BLOCK
ITP_TD I ITP_TRST#
ITP_TMS
R74 39
ITP_TD O
R76 75_1%
ITP_TC K
R77 27.4_1%
SKTOCC#
R512 X_10K
C34 220p
R79 150 R83 680
C35 1u-0805
VCCP
R54
49.9_1%
R55 100_1%
VCCP
VCCP
VCC3
HD#3
HD#7
HD#6
HD#5
HD#1
HD#0
HD#4
HD#2
HD#9
HD#47
HD#48
HD#53
HD#51
HD#50
HD#49
HD#52
HD#46
HD#45
HD#39
HD#40
HD#41
HD#38
HD#37
HD#42
HD#43
HD#44
HD#36
HD#35
HD#29
HD#27
HD#21
HD#15
HD#31
HD#28
HD#26
HD#25
HD#34
HD#33
HD#32
HD#24
HD#30
HD#17
HD#16
HD#19
HD#23
HD#22
HD#20
HD#18
HD#8
HD#14
HD#11
HD#13
HD#12
HD#10
ALL COMPONENTS CLOSE TO CPU
CPU_TMPA(11)
VTIN_GND(11)
R403 0 R404 0
THERMDA THERMDC
TEMP
1 2 3
L2_D1x3-BK
BPM#2 BPM#3 BPM#5 BPM#4
RN54 561 2
3 4 5 6 7 8
CPU STRAPPING RESISTORS
ALL COMPONENTS CLOSE TO CPU
PROCHOT#
VCCP
CPU_GD HBR#0 CPURST# HINIT#
R78 X_62 R80 300 R81 150 R84 49.9_1% R86 X_300
Title Document Number
VCCP
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
Micro Star Restricted Secret
mPGA478-B Intel CPU Socket Part 1
MS-6555E
Last Revision Date:
Monday, September 09, 2002
Sheet
4 31
of
Rev
0A
AA11 AA13 AA15 AA17 AA19 AA23 AA26
AB10 AB12 AB14 AB16 AB18 AB20 AB21 AB24
AC11 AC13 AC15 AC17 AC19
AC22 AC25
AA1
AA4 AA7 AA9
AB3 AB6 AB8
AC2
AC5 AC7 AC9 AD1
XX1 XX2 XX3 XX4 XX5 XX6 XX7 XX8
D10 A11 A13 A15 A17 A19 A21 A24 A26
A3 A9
X3 X4
CPU1B
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS HEATSINK3 HEATSINK4 HS1 HS2 HS3 HS4 HS5 HS6 HS7 HS8
VCCP
AD10
VSS
A10
VCC
VSS
AD12
A12
VCC
VSS
AD14
A14
VCC
VSS
AD16
A16
VCC
VSS
AD18
A18
AD21
A20A8AA10
VCC
VCC
VCC
VSS
VSS
VSS
AD4
AD23
AD8
AA12
VCC
VSS
AE11
AA14
VCC
VSS
AE13
VCC
VSS
AA16
VCC
VSS
AE15
AA18
VCC
VSS
AE17
AA8
VCC
VSS
AE19
AB11
VCC
VSS
AE22
AB13
VCC
VSS
AE24
AB15
VCC
VSS
AE26
AB17
VCC
VSS
AE7
AB19
VCC
VSS
AE9
AB7
AF1
AB9
VCC
VSS
AF10
VCC
VSS
AC10
VCC
VSS
AF12
AC12
VCC
VSS
AF14
AC14
VCC
VSS
AF16
AC16
VCC
VSS
AF18
AC18
VCC
VSS
AF20
AC8
AF6
AD11
VCC
VSS
AF8
VCC
VSS
AD13
VCC
VSS
B10
AD15
VCC
VSS
B12
AD17
VCC
VSS
B14
AD19
VCC
VSS
B16
AD7
B18
AD9
VCC
VSS
B20
VCC
VSS
AE10
VCC
VSS
B23
AE12
AE14
VCC
VSS
B26B4B8
AE16
VCC
VSS
VCC
VSS
AE18
VCC
VSS
C11
AE20
VCC
VSS
C13
AE6
C15
AE8
VCC
VSS
C17C2C19
AF11
VCC
VSS
CPU VOLTAGE BLOCK
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C22
C25C5C7C9D12
D14
D16
D18
B13
B15
B17
B19B7B9
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
D20
D21D3D24D6D8E1E11
VCC
VSS
C10
VCC
VSS
C12
VCC
VSS
VCC
VSS
C14
E13
C16
VCC
VSS
E15
C18
VCC
VSS
E17
C20C8D11
VCC
VCC
VSS
VSS
E19
E23
VCC
VSS
E26
D13
VCC
VSS
E4
D15
VCC
VCC
VSS
VSS
E7E9F10
D17
VCC
VSS
D19D7D9
VCC
VSS
F12
VCC
VSS
F14
E10
VCC
VSS
F16
E12
VCC
VCC
VSS
VSS
F18F2F22
E14
E16
VCC
VSS
E18
VCC
VCC
VSS
VSS
F25F5F8
E20E8F11
VCC
VCC
VSS
VSS
F13
VCC
VSS
G21G6G24
F15
F17
F19
VCC
VCC
VCC
VSS
VSS
VSS
G3H1H23
F9
VCC
VSS
VCC
VSS
H26H4J2
XX25
VSS
XX26
HS25
VSS
XX27
HS26
VSS
J22
XX28
XX29
HS27
HS28
VSS
VSS
J25J5K21
XX30
HS29
VSS
XX31
HS30
VSS
XX32
HS31
XX9
HS32
HS9
XX10
AF4
VCC-VID
HS10
HS11
XX11
XX12
AE23
AF3
VCC-IOPLL
VCC-VIDPRG
HS12
HS13
HS14
HS15
XX13
XX14
XX15
AD20
VCCA
HEATSINK1 HEATSINK2
HS16
XX16
VSSA
HS17 HS18 HS19 HS20 HS21 HS22 HS23 HS24
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VCC_VID (25)
VCCA
AD22
Y5 Y25 Y22 Y2 W6 W3 W24 W21 V4 V26 V23 V1 U5 U25 U22 U2 T6 T3 T24 T21 R4 R26 R23 R1 P5 P25 P22 P2 N6 N3 N24 N21 M5 M25 M22 M2 L4 L26 L23 L1 K6 K3 K24 X1 X2 XX17 XX18 XX19 XX20 XX21 XX22 XX23 XX24
VCC_IOPLL
C39 22u-1206
VSSA
SOCKET478
L23 4.7u-10%-0805 L24 4.7u-10%-0805
C40 22u-1206
VCCP
VCCP VCCPVCCP
Place 1206 size cap north side of processor
CBA12 10u-1206 CBA19 10u-1206 CBA26 10u-1206 CBA33 10u-1206 CBA40 10u-1206 CBA47 10u-1206 CBA53 10u-1206
CPU DECOUPLING CAPACITORS
CB14 10u-1206 CB15 10u-1206 CB29 10u-1206 CB28 10u-1206 CB22 10u-1206
PLACE CAPS WITHIN CPU CAVITY
CB21 10u-1206 CB36 10u-1206 CB35 10u-1206 CB50 10u-1206 CB49 10u-1206
VCCP
Place these caps on south side of processor
CB39 10u-0805 CB46 10u-0805 CB60 10u-0805 CB57 1u-0805
CB52 1u-0805
CB58 1u-0805
Keep the 22uF cap within 0.6" of the CPU pin.
Trace Width 12mils, Space 10mils.
Title
Micro Star Restricted Secret
mPGA478-B Intel CPU Socket Part 2
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
MS-6555E
Last Revision Date: Sheet
Rev
0A
Monday, September 09, 2002
5 31
of
HA#[3..31](4)
* Length must be matched within +/-0.1"of the Strobe Signals
HREQ#[0..4](4)
HRS#[0..2](4)
HADSTB#0(4) HADSTB#1(4)
HDSTBN#0(4) HDSTBP#0(4) HDSTBN#1(4) HDSTBP#1(4) HDSTBN#2(4) HDSTBP#2(4) HDSTBN#3(4) HDSTBP#3(4)
HINV#[0..3](4)
HL[0..5](9)
MEM_STR
C250
X_100P
VCC_AGP
VTT1 VTT2
VTT_GND1 VTT_GND2
AA22 AA26 AB21 AC29 AD21 AD23 AE26 AF23
AG29
AJ25
AD12 AD14 AD16 AD19 AD22
AE18 AE20 AE29
AF11 AF13 AF15 AF17 AF19 AF21 AF25
AG18 AG20 AG22
AH19 AH21 AH23
AJ11 AJ13 AJ15 AJ17 AJ27
W22 W29
AG1
Uk2C
R22
VCC1_5
R29 U22 U26
N14 N16 P13 P15 P17 R14 R16 T15 U14 U16 T13 T17
A5
A9 A13 A17 A21 A25
C1 C29
D7 D11 D15 D19 D23 D25
F6 F10 F14 F18 F22
G1 G4
G29
H8 H10 H12 H14 H16 H18 H20 H22 H24
J5 J7
K6 K22 K24 K26
L23
U13 U17
AE1 AE4
AF5 AF7 AF9
AJ3 AJ5 AJ7 AJ9
VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5
VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
82845E-E1
POWER
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
A3 A7 A11 A15 A19 A23 A27 D5 D9 D13 D17 D21 E1 E4 E26 E29 F8 F12 F16 F20 F24 G26 H9 H11 H13 H15 H17 H19 H21 J1 J4 J6 J22 J26 J29 K5 K7 K27 L1 L4 L6 L8 L22 L24 L26 M23 N1 N4 N8 N13 N15 N17 N22 N29 P6 P8 P14 P16 R1 R4 R13 R15 R17 R26 T6 T8 T14 T16 T22 U1 U4 U15 U29 V6 V8 V22 W1 W4 W8 W26 Y6 Y22 AA1 AA4 AA8 AA29 AB6 AB9 AB10 AB12 AB13 AB14 AB15 AB16 AB19 AB22 AC1 AC4 AC18 AC20 AC21 AC23 AC26 AD6 AD8 AD10
Title Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
MCH REFERENCE BLOCK
VTT1
VTT_GND1
VTT2
VTT_GND2
CBA98 104P
CBA99 104P
Trace/Space=5/10mils
HSWNG
Place 1 Cap. as Close as possible to every pin of MCH Trace width use 15 mils and 15mils space
HVREF
Ck3
Ck8
103P
103P
Place 1 Cap. as Close as possible to every pin of MCH
Trace width use 15 mils and 15mils space
HUB_MREF
Place 0.01uF Cap. as Close as possible to MCH Trace width use 15 mils and 15mils space
LA11 4.7u-10%-0805
C129 106P/1206
LA10 4.7u-10%-0805
C128
106P/1206
<1.5"
Ck4
Ck6 104P
Ck7 103P
Ck14 103P
Ck2
103P
103P
Ck9
Ck5 Ck11
103P
103P
Ck17
Ck16
104P
104P
VCCP
VCCP
VCC1_8
Rk4 301RST
Rk5 150RST
Rk13
49.9RST
Rk12 100RST
Rk17 150RST
Rk14 150RST
VCC_AGP
VCC_AGP
0.9V
MCH Trace Decoupling Capacitors
VCC1_8
CB138 104P
MCH & ICH4
Micro Star Restricted Secret
Brookdale-G GMCH Part 1 (Power,Host ,VGA & HUB)
MS-6555E
Last Revision Date:
Monday, September 09, 2002
Sheet
6 31
104P
Rev
0A
of
24.9RST
AE11 AD11 AC15 AC16
AD15
AC13
AB18 AB20 AC19 AD18 AD20 AE19 AE21 AF18
AF20 AG19 AG21 AG23
AJ19 AJ21 AJ23
AG4
AD4 AD3 AE6 AE7
AD5 AH9
AC2
P25 P24 N27
P23 M26 M25
N25
N24
AA9 AB8
T4 T5 T3 U3 R3 P7 R2 P4 R6 P5 P3 N2 N7 N3
K4 M4 M3
L3 L5
K3
J2
M5
J3
L2 H4 N5
G2 M6
L7 V7
W3
Y7
W5
V3 U6 T7 R7 U5 U2
Y5 Y3 Y4
U7
W2 W7 W6
V5 V4
R5 N6
J8 K8
M8
U8
Uk2A
HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#
BR0# BNR# BPRI# HLOCK#
ADS# HREQ0# HREQ1# HREQ2# HREQ3# HREQ4#
HIT# HITM# DEFER#
HTRDY# RS0# RS1# RS2#
DBSY# DRDY#
HAD_STB0# HAD_STB1#
HD_STBN0# HD_STBP0# HD_STBN1# HD_STBP1# HD_STBN2# HD_STBP2# HD_STBN3# HD_STBP3#
DBI0# DBI1# DBI2# DBI3#
BCLK BCLK#
H_RCOMP0 H_RCOMP1
HI0 HI1 HI2 HI3 HI4 HI5
HI_STB HI_STB#
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT
82845E-E1
HOST
HUB LINK
POWER
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8#
HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
RSTIN#
CPURST#
H_VREF0 H_VREF1 H_VREF2 H_VREF3 H_VREF4
H_SWNG0 H_SWNG1
HI_REF
HL_RCOMP
VCC1_8 VCC1_8 VCC1_8 VCC1_8 VCC1_8
RSVD RSVD RSVD RSVD RSVD RSVD RSVD
RSVD RSVD7 RSVD8 RSVD9
66IN
HI10
HD#0
AA2
HD#1
AB5
HD#2
AA5
HD#3
AB3
HD#4
AB4
HD#5
AC5
HD#6
AA3
HD#7
AA6
HD#8
AE3
HD#9
AB7
HD#10
AD7
HD#11
AC7
HD#12
AC6
HD#13
AC3
HD#14
AC8
HD#15
AE2
HD#16
AG5
HD#17
AG2
HD#18
AE8
HD#19
AF6
HD#20
AH2
HD#21
AF3
HD#22
AG3
HD#23
AE5
HD#24
AH7
HD#25
AH3
HD#26
AF4
HD#27
AG8
HD#28
AG7
HD#29
AG6
HD#30
AF8
HD#31
AH5
HD#32
AC11
HD#33
AC12
HD#34
AE9
HD#35
AC9
HD#36
AE10
HD#37
AD9
HD#38
AG9
HD#39
AC10
HD#40
AE12
HD#41
AF10
HD#42
AG11
HD#43
AG10
HD#44
AH11
HD#45
AG12
HD#46
AE13
HD#47
AF12
HD#48
AG13
HD#49
AH13
HD#50
AC14
HD#51
AF14
HD#52
AG14
HD#53
AE14
HD#54
AG15
HD#55
AG16
HD#56
AG17
HD#57
AH15
HD#58
AC17
HD#59
AF16
HD#60
AE15
HD#61
AH17
HD#62
AD17
HD#63
AE16 P22
J27 AE17
HVREF
M7 R8 Y8 AB11 AB17
HSWNG
AA7 AD13
HL6
L28
HI6 HI7 HI8 HI9
NC0 NC1
L27 M27 N28 M24
P26 P27 L25
L29 M22 N23 N26 G9 G10 H6 J25 J23 G16 G17 H7 H27 K23 K25
AD26 AD27
HL7 HL8 HL9 HL10
HUB_MREF
Rk18 40.2RST
VCC1_8
HD#[0..63] (4)
MCH_66 (3) PCIRST#1 (11,21,24,25,27) CPURST# (4)
PCIRST#1
HL[6..10] (9)
VCC1_8
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HBR#0(4)
HBNR#(4)
HBPRI#(4)
HLOCK#(4)
HADS#(4)
HIT#(4)
HITM#(4)
HDEFER#(4)
HTRDY#(4)
HDBSY#(4)
HDRDY#(4)
MCHCLK(3)
MCHCLK#(3)
HL_STB(9)
HL_STB#(9)
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
HRS#0 HRS#1 HRS#2
HINV#0 HINV#1 HINV#2 HINV#3
Rk9 24.9RST Rk3
HL0 HL1 HL2 HL3 HL4 HL5
VCCP
1" trace
AA28 AB25 AB27 AA27 AB26
AB23 AA24 AA25 AB24 AC25 AC24 AC22 AD24
AA23
G28
F27 C28 E28 H25
G27
F25 B28 E27 C27 B25 C25 B27 D27 D26 E25 D24 E23 C22 E21 C24 B23 D22 B21 C21 D20 C19 D18 C20 E19 C18 E17 E13 C12 B11 C10 B13 C13 C11 D10 E10
C9 D8 E8
E11
B9 B7 C7 C6 D6 D4 B3 E6 B5 C4 E5 C3 D3 F4 F3 B2 C2 E2
G5 G3
H3
R27 R28 T25 R25 T26 T27 U27 U28 V26 V27 T23 U23 T24 U24 U25 V24 Y27 Y26
Y23
V25 V23 Y25
Uk2B
SDQ0 SDQ1 SDQ2 SDQ3 SDQ4 SDQ5 SDQ6 SDQ7 SDQ8 SDQ9 SDQ10 SDQ11 SDQ12 SDQ13 SDQ14 SDQ15 SDQ16 SDQ17 SDQ18 SDQ19 SDQ20 SDQ21 SDQ22 SDQ23 SDQ24 SDQ25 SDQ26 SDQ27 SDQ28 SDQ29 SDQ30 SDQ31 SDQ32 SDQ33 SDQ34 SDQ35 SDQ36 SDQ37 SDQ38 SDQ39 SDQ40 SDQ41 SDQ42 SDQ43 SDQ44 SDQ45 SDQ46 SDQ47 SDQ48 SDQ49 SDQ50 SDQ51 SDQ52 SDQ53 SDQ54 SDQ55 SDQ56 SDQ57 SDQ58 SDQ59 SDQ60 SDQ61 SDQ62 SDQ63
RCVENIN# RCVENOUT#
G_AD0 G_AD1 G_AD2 G_AD3 G_AD4 G_AD5 G_AD6 G_AD7 G_AD8 G_AD9 G_AD10 G_AD11 G_AD12 G_AD13 G_AD14 G_AD15 G_AD16 G_AD17 G_AD18 G_AD19 G_AD20 G_AD21 G_AD22 G_AD23 G_AD24 G_AD25 G_AD26 G_AD27 G_AD28 G_AD29 G_AD30 G_AD31
G_C/BE0# G_C/BE1# G_C/BE2# G_C/BE3#
82845E-E1
DDR
AGP
Tri-Stated during RSTIN# assertion
SMA0 SMA1 SMA2 SMA3 SMA4 SMA5 SMA6 SMA7 SMA8
SMA9 SMA10 SMA11 SMA12
SCS#0 SCS#1 SCS#2 SCS#3
SCB0 SCB1 SCB2 SCB3 SCB4 SCB5 SCB6 SCB7
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7 SDQS8
SCK0
SCK#0
SCK1
SCK#1
SCK2
SCK#2
SCK3
SCK#3
SCK4
SCK#4
SCK5
SCK#5
SCKE0 SCKE1 SCKE2 SCKE3
SRAS# SCAS#
SWE#
SBS0 SBS1
SM_RCOMP
SD_REF0 SD_REF1
G_FRAME#
G_IRDY#
G_TRDY#
G_DEVSEL#
G_STOP#
G_PAR
G_REQ# G_GNT#
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
SB_STB
SB_STB#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
PIPE#
RBF#
WBF#
AGPREF
G_RCOMP
TESTIN#
ST0 ST1 ST2
MD[0..63](15)
1" Trace
GAD[0..31](16)
GC_BE#[0..3](16)
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GC_BE#0 GC_BE#1 GC_BE#2 GC_BE#3
E12 F17 E16 G18 G19 E18 F19 G21 G20 F21 F13 E20 G22
E9 F7 F9 E7
C16 D16 B15 C14 B17 C17 C15 D14
F26 C26 C23 B19 D12 C8 C5 E3 E15
E14 F15 J24 G25 G6 G7 G15 G14 E24 G24 H5 F5
G23 E22 H23 F23
F11 G8 G11
G12 G13
J28 J9
J21 Y24
W27 W24 W28 W23 W25
AG24 AH25
AH28 AH27 AG28 AG27 AE28 AE27 AE24 AE25
AF27 AF26
AG25 AF24 AG26
R24 R23 AC27 AC28
AF22 AE22 AE23
AA21 AD25 H26
DDRMA0 DDRMA1 DDRMA2 DDRMA3 DDRMA4 DDRMA5 DDRMA6 DDRMA7 DDRMA8 DDRMA9 DDRMA10 DDRMA11 DDRMA12
CS#0 CS#1 CS#2 CS#3
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7 SDQS8
DCLK0 DCLK#0 DCLK1 DCLK#1 DCLK2 DCLK#2 DCLK3 DCLK#3 DCLK4 DCLK#4 DCLK5 DCLK#5
DDRCKE0 DDRCKE1 DDRCKE2 DDRCKE3
RASA# CASA# WEA#
BS0 BS1
MRCOMP DDR_VREF
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
ST0 ST1 ST2
CBz5 X_0.1u
5020
Rk8 40.2RST Rk22 X_1K
CS#0 (14,15) CS#1 (14,15) CS#2 (14,15) CS#3 (14,15)
CB0 (15) CB1 (15) CB2 (15) CB3 (15) CB4 (15) CB5 (15) CB6 (15) CB7 (15)
DCLK0 (14) DCLK#0 (14) DCLK1 (14) DCLK#1 (14) DCLK2 (14) DCLK#2 (14) DCLK3 (14) DCLK#3 (14) DCLK4 (14) DCLK#4 (14) DCLK5 (14) DCLK#5 (14)
DDRCKE0 (14,15) DDRCKE1 (14,15) DDRCKE2 (14,15) DDRCKE3 (14,15)
RASA# (14,15) CASA# (14,15) WEA# (14,15)
BS0 (14,15) BS1 (14,15)
GFRAME# (16) GIRDY# (16) GTRDY# (16) GDEVSEL# (16) GSTOP# (16) GPAR (16)
GREQ# (16) GGNT# (16)
SBA0 (16) SBA1 (16) SBA2 (16) SBA3 (16) SBA4 (16) SBA5 (16) SBA6 (16) SBA7 (16)
SB_STB (16) SB_STB# (16)
ST[0..2] (3,16)
GAD_STB0 (16) GAD_STB#0 (16) GAD_STB1 (16) GAD_STB#1 (16)
PIPE# (16) RBF# (16) WBF# (16)
AGPREF (16) VCC1_8
DDRMA[0..12] (15)
SDQS[0..8] (15)
MCH MEMORY CLOCK RC CIRCUITS
DDR_VTT
MRCOMP
Rk19 30
Ck19 X_104P
CBk15 104P
MCH DECOUPLING CAPACITOR
VCCP
CBk3 104P
CBk4 103P
Ck10 103P
VCCP
CBz2 X_0.1u
VCC_AGP MEM_STR
CBz3 X_0.1u CBz6 X_0.1u CBz1 X_0.1u CBz7 X_0.1u CBz4 X_0.1u
Solder Side
VCC1_8 MEM_STR
CBk14 104P CBk12 104P
5020
5020 5020
5020 5020
5020
AGPREF
Title
CBz9 X_0.1u CBz8 X_0.1u
Micro Star Restricted Secret
Brookdale-G GMCH Part 2 (DDR & AGP)
104PCk12
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
MCH REFERENCE VOLTAGE
DDR_VREF
DDR_VREF
VCC_AGP
5020 5020
MS-6555E
Cz1 X_0.1u
5020
CBk7 104P CBk11 104P CBk9 104P
Last Revision Date:
Monday, September 09, 2002
Sheet
7 31
Ck20 104P
of
CBk30 104P CBk24 104P CBk29 104P CBk28 104P CBk25 104P CBk27 104P CBk26 104P C19 104P
Rev
0A
GMCH DECOUPLING CAPACITOR
Place decoupling cap close to GMCH AGP Interface < 0.1"
Place decoupling cap close to GMCH Core Logic Interface <
0.1"
Place decoupling cap close to GMCH Hub-Link Interface<
0.1"
Place decoupling cap close to GMCH CPU Interface < 250mil in the Vtt corridor
Place Bulk cap for Core Logic, AGP & Hub Link Interface
Place Bulk cap between GMCH & DIMM slot
Place decoupling cap close to GMCH Memory Interface < 0.1", with 18 mil trach width
Place decoupling cap close to GMCH DAC Interface< 0.1"
Title Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
Micro Star Restricted Secret
Brookdale-G GMCH Part 3 (GN D)
MS-6555E
Last Revision Date: Sheet
Rev
0A
Monday, September 09, 2002
8 31
of
ICH4 PCI / HUB LINK / CPU / LAN / INTERRUPT SIGNALS
ICH4 SMI# SIGNAL
AC8B2H18H6J1
VCC3_3
VCC3_3
VCC3_3
GND12
GND13
GND14
AB7
AC1
VCC3_3
GND15
AC10
AC14
VCC3_3
VCC3_3
VCC3_3
GND16
GND17
GND18
AC18
AC23
VCC3
J18K6M10
VCC3_3
VCC3_3
GND19
GND20
AC5
B12
P12P6U1
VCC3_3
GND21
B16
B18
VCC3_3
VCC3_3
VCC3_3
GND22
GND23
GND24
B20
B22B9C15
V10
V16
VCC3_3
GND25
V18
VCC3_3
VCC3_3
GND26
GND27
GND28
C17
C19
VCC1_5SB
E20
F14
E13
E12
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
GND29
GND30
GND31
C21
C23C6D1
G18R6T6
U6
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
GND32
GND33
GND34
GND35
GND36
D12
D15
D17
D19
E11
F10
VCCSUS3_3
GND37
GND38
D21
D23D4D8
F15
F16
F17
F18
K14V7V8
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
GPIO1/REQB#/REQ5#
GPIO17/GNTB#/GNT5#
GND43
GND39
GND40
GND41
GND42
E14
D22
E10
E16
V9
CPUSLP#
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
STPCLK#
A20GATE
THRMTRIP#
HL_STB# HLCOMP
HI_SWING
APICCLK
LAN_CLK
LAN_RSTSYNC
LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2
GND44
GND45
GND46
GND47
E17
E18
E19
U5A
A20M#
FERR#
IGNNE#
INIT#
INTR
NMI
SMI#
RCIN#
NC
HI0 HI1 HI2 HI3 HI4 HI5 HI6 HI7 HI8
HI9 HI10 HI11
HI_STB
HIREF
PIRQA# PIRQB# PIRQC# PIRQD#
IRQ14 IRQ15
APICD0 APICD1
SERIRQ
REQ0# REQ1# REQ2# REQ3# REQ4#
GNT0# GNT1# GNT2# GNT3# GNT4#
INT-FW82801DB
AB23 U21 AA21 W21 V22 AB22 V21 W23 V23 U22 Y22 U23 W20
L19 L20 M19 M21 P19 R19 T20 R20 P23 L22 N22 K21 P21 N20 R23 R22 M23
D5 C2 B4 A3
AC13 AA19 J19 H19 K20 J22
B1 A2 B3 C7 B6 A6
C1 E6 A7 B7 D6 C5
C11 B11 A10 A9 A11 B10 C10 A12
FERR#
HL11
SMI# KB_RST#
A20GATE# TRMTRIP # HL0
HL1 HL2 HL3 HL4 HL5 HL6 HL7 HL8 HL9 HL10
R521 62
IHCOMP
HUB_IREF
APICCLK APIC_D0 APIC_D1 SERIRQ
PREQ#0 PREQ#1 PREQ#2 PREQ#3 PREQ#4
PGNT#0 PGNT#1 PGNT#2 PGNT#3
R187 33
This resistor less than 0.5" from ICH use 15 mils trace
R130
40.2_1%
FINIT# (21) A20M# (4)
SLP# (4) FERR# (4) IGNNE# (4) HINIT# (4) INTR (4) NMI (4)
STPCLK# (4) KB_RST# (11) A20GATE# (11)
TRMTRIP # (4)
HL[0..10] (6)
HL_STB (6) HL_STB# (6)
INTA# (16,17) INTB# (16,17) INTC# (17) INTD# (17)
IRQ14 (3) IRQ15 (3)
SERIRQ (11,28)
PREQ#[0..4] (17,24)
PGNT#0 (17) PGNT#1 (17) PGNT#2 (17) PGNT#3 (24)
SMI#
R122 33
100pC78
HSMI# (4)
ICH4 STRAPPING RESISTORS
FERR# TRMTRIP #
SERIRQ
KB_RST# A20GATE# PREQ#A
PREQ#B
APIC_D0 APIC_D1 APICCLK
R123 62 R124 62
R125 8.2K R126 10K R127 10K R131 10K
R745 10K
R128 10K R129 10K
VCCP
VCC3
ICH4 REFERENCE VOLTAGE
VCC_AGP
R135
HUB_IREF
100_1%
R137
C82
150_1%
0.1u
VCC_AGP VCC3_SB
K12
K18
K22
P10
T18
U19
VCC1_5
VCC1_5
VCC1_5
GND3
GND4
GND5
A20
A22A4AA12
VCC1_5
VCC1_5
VCC1_5
GND6
GND7
GND8
AA16
V14A5AC17
VCC1_5
VCC1_5
GND9
GND10
GND11
AA22
AA3
AA9
AB20
AD[0..31](17,24,27)
C_BE#[0..3](17,24,27)
DEVSEL#(17,24,27)
FRAME#(17,24,27)
IRDY#(17,24,27)
TRDY#(17,24,27)
STOP#(17,24,27)
PAR(17,24,27)
PLOCK#(17)
SERR#(17,24,27) PERR#(17,24)
PME#(16,17,24)
PREQ#A(28)
PGNT#A(28)
ICH_PCLK(3)
PCIRST#(16,25)
LAN_EN(10)
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C_BE#0 C_BE#1 C_BE#2 C_BE#3
PREQ#A PREQ#B PGNT#A
H5
J3 H3 K1
G5
J4 H4
J5 K2
G2
L1
G4
L2 H2
L3 F5 F4 N1 E5 N2 E3 N3 E4
M5
E2 P1 E1 P2 D3 R1 D2 P4
J2 K4
M4
N4
M3
F1
L5 F2 F3
G1 M2
K5
L4
W2
B5 E8
P5 U5 Y5
D10 D11
A8
C12
K10
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE0# C/BE1# C/BE2# C/BE3#
DEVSEL# FRAME# IRDY# TRDY# STOP# PAR PLOCK# SERR# PERR# PME#
GPIO0/REQA# GPIO16/GNTA#
PCICLK PCIRST# LAN_RST# EE_CS
EE_DIN EE_DOUT EE_SHCLK
GND1
GND2
A1
A16
A18
Pin A4
VCC3
Pin A1 Pin T1
CB103
0.1u
0.1u
Pin H1
ICH4 DECOUPLING CAPACITORS
Pin AC10
Pin AC18
CB104
0.1u
0.1u
CB106 X_0.1u
CB107
0.1u
Place one 0.1u close to ICH4 <100 mil
Pin L23 Pin A16 Pin AC1Pin K22 Pin C22 Pin C23 Pin T22
VCC_AGP VCC_AGP VCC_AGP
CB96 X_0.1u
CB98
0.1uCB105
CB99 X_0.1uCB102
C83 X_0.01u
FOR Hub Interface FOR PLLFOR Core Logic
VCC1_5SB
CB100 X_0.1u
CB101 X_0.1u
C201
0.1u
Place Cap. as Close as possible to ICH4 < 0.25" Trace width use 12 mils and 10mils space
Title
Micro Star Restricted Secret
ICH4 Part 1 (Power,HUB,PCI & CPU I/F)
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
MS-6555E
Last Revision Date: Sheet
Rev
0A
Monday, September 09, 2002
9 31
of
SLP_S3#(11,25) SLP_S4#(25) SLP_S5#(25)
PWR_GD(25)
CPU_GD(4)
VRM_GD(22)
PWRBTN#(11)
RSMRST#(13)
SUSCLK(11)
SMBALERT#(20)
SMBDATA(17,23)
SMBCLK(17,23)
AC_RST#(12) AC_SYNC(12) AC_BCLK(12)
AC_SDOUT(12)
AC_SDIN0 AC_SDIN1 AC_SDIN2(12)
SIO_PME#(11)
LAD0/FWH0(11,21) LAD1/FWH1(11,21) LAD2/FWH2(11,21) LAD3/FWH3(11,21)
LFRAME#/FWH4(11,21)
USBP0+(19)
USBP0-(19)
USBP1+(19)
USBP1-(19)
USBP2+(19)
USBP2-(19)
USBP3+(19)
USBP3-(19)
USBP4+(19)
USBP4-(19)
USBP5+(19)
Place < 0.5"
USBP5-(19)
OC#1_2(19)
OC#3(19)
RING#(18)
ICH_66(3) ICH_14(3) ICH_48(3)
SPKR(20)
GPO21(27,28) GPO22(21)
LDRQ#(11)
Place Cap close to Pin E7
THRM#
PWR_GD
RING#
RSMRST#
SYS_RST# BATLOW#
INTRUDER# RTCRST# VBIAS
RTCX1 RTCX2
R149 22
AC_SDIN0 AC_SDIN1 AC_SDIN2
GPI12
R176 22.6 1%
C177
0.1u
Near ICH4
VCC3
USBBIAS
C185
0.1u
R138 1K
VCC5
D4 SM5817S
V1 Y4
Y2 AA2 AB6 Y23 V19 AA1
Y1 AA6
AB3 AA4
Y3 AB2
R2 AA5 AC3 AB1
W6 W7
Y6 AB4 AC4 AC7 AC6 V20
T21
J23
F19 C13
C9
B8
D9 D13 A13 B13 H23
V5
W3
T3 Y20
J21
W1 W4
T2
R4
T4
U2
T5
U3
U4 C20
D20 A21 B21 C18 D18 A19 B19 C16 D16 A17 B17 A23 B23 B15 C14 A15 B14 A14 D14
V5REF
THRM# SLP_S3# SLP_S4# SLP_S5# PWROK CPUPWRGD VRMPWRGD PWRBTN# RI#
RSMRST# SUSSTAT# SUSCLK SYS_RESET# BATLOW#/TP0 AGPBUSY#/GPIO6 GPIO11/SMBALERT# SMLINK0 SMLINK1 INTRUDER# RTCRST# VBIAS SMBDATA SMBCLK RTCX1 RTCX2 NC
CLK66 CLK14 CLK48
AC_RST# AC_SYNC AC_BITCLK AC_SDOUT AC_SDIN0 AC_SDIN1 AC_SDIN2 SPKR GPIO12 GPIO13 C3_STAT#/GPIO21 CPUPERF#/GPIO22 SSMUXSEL/GPIO23 GPIO27 GPIO28
LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 LFRAME#/FWH4 LDRQ0# LDRQ1#
USBP0+ USBP0­USBP1+ USBP1­USBP2+ USBP2­USBP3+ USBP3­USBP4+ USBP4­USBP5+ USBP5­USBRBIAS USBRBIAS# OC0# OC1# OC2# OC3# OC4# OC5#
GND48
GND49
E21
E22F8G19
VCC5_SB RTC_VCC
VCC_AGP
C22
V5REF_SUS
GND52
GND53
GND54
GND55
VCCPLL
GND56
GND57
GND58
K11
K13
AB5
VCCRTC
GND59
K19
E15E7V6
V5REF1
V5REF2
GND50
GND51
G21G3G6H1J6
CB110 1u
VCC1_8
L23
M14
VCC_HI
GND60
GND61
K23K3L10
VCC3_SB
VCC1_5SB
P18
T22F6F7E9F9
VCC_HI
VCC_HI
VCC_HI
VCCLAN1_5/VCCSUS1_5
VCCLAN1_5/VCCSUS1_5
GND62
GND63
GND64
GND65
GND66
GND67
L11
L12
L13
L14
L21M1M11
VCCP
AA23
P14
Y19
Y7
U18
GND102
VCPU_IO0
VCPU_IO1
VCPU_IO2
VCCLAN3_3/VCCSUS3_3
VCCLAN3_3/VCCSUS3_3
GND68
GND69
GND70
GND71
GND72
GND73
GND74
GND75
GND76
M12
M13
M20
M22
N10
N11
N12
N13
GND99
GND100
GND101
GND77
GND78
GND79
N14
N19
GND98
GND80
N21
N23N5P11
V15
V17V3W22W5W8
GND96
GND97
GND81
GND82
GND95
GND83
T19
T23
U20
GND90
GND91
GND92
GND93
GND94
GPIO2/PIRQE# GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
STP_PCI#/GPIO18
SLP_S1#/GPIO19
STP_CPU#/GPIO20
CLKRUN#/GPIO24
GND84
GND85
GND86
GND87
GND88
P13
P20
P22P3R18
R21R5T1
U5B
PDCS1# SDCS1#
GND89
PDCS3# SDCS3#
PDA0 PDA1 PDA2 SDA0 SDA1 SDA2
PDDREQ
SDDREQ PDDACK# SDDACK#
PDIOR#
SDIOR# PDIOW# SDIOW#
PIORDY
SIORDY
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8
PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
GPIO7 GPIO8
GPIO25 GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO43
INT-FW82801DB
Y13 AB21 AB14 AC22
AA13 AB13 W13 AA20 AC20 AC21
AA11 AB18 Y12 AB19 AC12 Y18 W12 AA18 AB12 AC19
AB11 AC11 Y10 AA10 AA7 AB8 Y8 AA8 AB9 Y9 AC9 W9 AB10 W10 W11 Y11
W17 AB17 W16 AC16 W15 AB15 W14 AA14 Y14 AC15 AA15 Y15 AB16 Y16 AA17 Y17
C8 D7 C3 C4 R3 V4 Y21 W18 W19 AC2 V2 J20 G22 F20 G20 F21 H20 F23 H22 G23 H21 F22 E23
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
GPO19 GPO20
GPI7
PD_CS#1 (3) SD_CS#1 (3) PD_CS#3 (3) SD_CS#3 (3)
PD_A0 (3) PD_A1 (3) PD_A2 (3) SD_A0 (3) SD_A1 (3) SD_A2 (3)
PD_DREQ (3) SD_DREQ (3) PD_DACK# (3) SD_DACK# (3) PD_IOR# (3) SD_IOR# (3) PD_IOW# (3) SD_IOW# (3) PD_IORDY (3) SD_IORDY (3)
PDD[0..15] (3)
2 1
SDD[0..15] (3)
INTE# (17) INTF# (17,24) INTG# (17) INTH# (17)
LAN_WAKE# (18) GPO19 (23)
GPO20 (23)
VCC5_SBVCC3_SB
* Put a GND Plane under X'TAL
R140
R139
1K
X_0
VBAT
R219
0
BAT54A-S-SOT23
R867 X_20M
R868 X_5.6M
R141 3K
D6
3
INTRUDER#
PD_IORDY SD_IORDY
THRM# GPI7
GPO19 GPO20 SPKR
AC_SDOUT
SPKR HIGH LOW
AC_SDOUT HIGH LOW
* Please put this block close ICH2
D5 1N4148-S-LL34
R220
0
R523 22K1 2
3
BAT
R150
R146
1K
1
C84
BAT_R
0.047u
BAT1
0
2
ICH4 STRAPPING RESISTORS
R525 330K
R151 4.7K R153 4.7K
R155 8.2K R13 4.7K
R196 4.7K R195 4.7K R169 X_1K R602 X_8.2K
No Reboot mode Reboot mode
FSB Safe mode FSB Auto mode
*
*
RTC_VCC
The RC delay time should be in 15~28ms.
CB271 X_0.1u
C85 18p
RTC_VCC
VCC3
SMBDATA SMBCLK BATLOW#
RING#
LAN_EN(9)
GPI12 SIO_PME#
PWR_GD AC_SDIN1 AC_SDIN2
RTC BLOCK
CLR_CMOS 2 - 3 1 - 2 Clear CMOS
J_RTCRST#
RTCRST#
C374 1u
R147
10M
R148 10M
X2
1 2
32K-12.5pf-CSA-309-D
+-30PPM 12.5pF
R152 2.7K R154 2.7K R156 4.7K
R166 8.2K R168 10K
R177 10K R178 10K
R180 X_10K R181 X_10K R182 X_10K
Normal
CLR_CMOS
3 2 1
D1x3-BK
VBIAS
RTCX1
RTCX2
C86 18p
*
VCC3_SB
PROCHOT BLOCK SYSTEM RESET
VCCP
THRM#
R183 X_4.7K
PROCHOT#(4)
CE
X_NPN-3904LT1-S-SOT23
B
Q3
R528 8.2K
VCC3_SB
FP_RST#(20,25)
R145 22
SYS_RST#
ICH4 DECOUPLING CAPACITOR
VCC3_SB
CB111
0.1u
Pin A22 Pin AC5 Pin AA23
CB112
0.1u
VCCP
CB113
0.1u
Place one 0.1u close to ICH4 <100 mil
CB109
0.1u
VCC5_SB
V5REF
CB108
0.1u
Pin A16 Pin E7
Title
Micro Star Restricted Secret
ICH4 Part 2 (RTC,GPIO,LPC,USB,IDE)
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw
MS-6555E
Last Revision Date:
Sheet
Rev
Monday, September 09, 2002
10 31
of
0A
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