MSI MS-6513 Schematics

8
7
6
5
4
3
2
1
Cover Sheet
Block Diagram
1
2
MS-6513
Version 100 1/9/2002 Update
INTEL (R) Brookdale Chipset
Power Delivery Map
D D
GPIO Spec.
mPGA478-B INTEL CPU Sockets
INTEL Brookdale MCH -- North Bridge
INTEL ICH2 -- South Bridge
LPC I/O W83627HF
PCI Audio-CMI8738MX
C C
Audio Connter
3
4
5
6 - 7
8 - 9
10-11
12
13
14
Willamette/Northwood 478pin mPGA-B Processor Schematics
CPU:
Willamette/Northwood mPGA-478B Processor
System Brookdale Chipset:
INTEL MCH (North Bridge) +
Audio Amp TL072 & GAME
DDR DIMMM1,2
DDR Damping
DDR Termination
15
16
17
18
INTEL ICH2 (South Bridge)
On Board Chipset:
BIOS -- FWH
LPC Super I/O -- W83627HF
FWH -- BIOS
AGP 4X SLOT (1.5V)
B B
PCI SLOT 1 & 2 & 3
Front Panel & Connectors
USB & FAN Connectors
19
20
21
22
23
Expansion Slots:
Clock Generation -- ICS950213AF
PCI SOUND -- C-MEDIA CMI8738MX
AGP2.0 SLOT * 1 PCI2.2 SLOT * 3
ACPI Controller
L6719B CPU Power ( PWM )-VRM9.0
IO Connectors
Realtek RTL8100(L) LAN
A A
MANUAL
JUMPER SETTING
LAYOUT GUIDE
8
7
6
24
25
26
27
Title
Micro-Star
Document Number
Last Revision Date:
5
4
3
Wednesday, January 09, 2002
2
MS-6513
Cover Sheet
Sheet of
Rev
100
135
1
8
D D
AGP 4X(1.5V) AGP CONN
7
Power Supply CONN
AGP 4X (1.5V)
6
VRM
9.0
4X (66MHz) AGP
(593PINS/FCBGA)
5
(478PINS)
Willamette/Northwood Socket (mPGA478-B)
(400MHz)
Scalable Bus
MCH: Memory
Controller HUB
4
(100MHz)
3
2
1
CK408 Clock
(100MHz)
Scalable Bus/2
(200/266MHz)
DDR DIMM 1:2
( 66MHz X 4 )
C C
Heceta Hardware Monitor
IDE CONN 1&2
USB Port 0:3
SM Bus
(360PINS/EBGA)
(48MHz)
LPC Bus AC Link
Controller HUB
FWH: Firmware HUB
PCI LAN / Realtek RTL8100L
B B
PS2 Mouse & Keyboard
SIO
Parallel (1) Serial (2)
Floppy Disk Drive CONN
HUB Interface
ICH2: I/O
(33MHz)
(33MHz)
(14.318MHz)
PCI (33MHz)
PCI Audio / C-MEDIA CMI8738
AC '97 Audio
Codec
Audio In
Line In
CD-ROM
PCI Slots 1:3
Telephone In
MIC In
AMP
SPDIF IN/OUT
Line Out
A A
Title
Micro-Star
Document Number
Last Revision Date:
8
7
6
5
4
3
Sunday, December 30, 2001
2
MS-6513
Block Diagram
Sheet of
Rev
100
235
1
8
7
6
5
4
3
2
1
Power Delivery Map
D D
ATX 12V POWER Supply
3.3V 5V 5VSB1A12V
VRM9.2
Processor Core
Processor Vtt
Power Translator ACPI IC
1.5V VREG
MCH Core 1.5V
MCH Vtt
MCH AGP
C C
OP
1.8V VREG
MCH HUB Interface 1.8V
MCH Memory DDR 2.5V
3.3V DUAL
3.3V VREG
FET
DDR System Memory 2.5V
ICH2 Core 1.8V
ICH2 I/O 3.3V
ICH2 Resume 3.3V
1.8V VREG
5V TO 3.3V RESISTOR
B B
ICH2 Resume I/O 1.8V
ICH2 RTC 3.3V
ICH2 5V
FWH 3.3V
LPC Super I/O 3.3V
CLOCK GEN 3.3V
HARDWARE AUDIO 3.3V
PCI LAN 3.3V/2.5V
5VDual For USB and K/B
CPU PMCH ICH2 CY28324 AD1885 FWH -SST W83627HF HIP6301 HIP6602A HIP6601A
DIMM AGP PCI USB USB HUB FAN TTL AMPLIFIER OTHER
NOTE1 --- MCH VCC_AGP
NOTE2 --- DIMM S0 STATE --- 2.0A * 3 = 6.0A ---> VCC3 S1/S3 STATE --- 200mA * 3 = 600mA ---> VCC3_SB VCC3_SB --> 600mA*3.3V/5V=396mA --> VCC5_SB
NOTE3 --- ICH2
1.8V
1.8V_LAN 36mA VCC1_8SB VCC3 VCC3+562ET VCC3_SB
VCC3_SB VCC1_8SB VCC5_SB
VCCP VCC_AGP
69.0A NOTE40
2.4A NOTE1 0 0 0 0 0
0 0 0 0 000 0 0 0 0 0 0 00000 0
= VCC1_5 (1.5A) VCC_AGP (0.37A)+
S0Power S3/S4/S5
300mA
45mA 410mA 230mA 25mA
= = = VCC3_SB VCC1_8SB+
POWER CONSUMPTION
VCC1_8
VCC3_DIMM VCC3 VCC5
0
0
0.2A NOTE3 NOTE3 NOTE3
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0SC1547
0
0
0 0
0
0
0
0
0
0
0
0 00
S1 100mA 28mA 30mA 5mA 210mA
0.6mA
0
2.0A 0 0 0 0 0 0 0 0 0 0 0
NOTE2
0
6.0A 1.0A8.0A 2.0A
0 0 0 0 0
N/A N/A 7mA N/A N/A N/A
0 0
0 0
0 0
0 0 0
0 0 0
VCC5_SB
0 0
0 0
0 0 0 0 0
0
0 0 0 0 0 0 0
NOTE2
?
0 0 0 0
+12V
-12V
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
0
0 0
0
0 0
0
0
0
0
0
0
0
0
A A
Title
Micro-Star
Document Number
Last Revision Date:
8
7
6
5
4
3
Sunday, December 30, 2001
2
MS-6513
Power Delivery Map
Sheet of
Rev
335
1
5
4
3
2
1
General Purpose I/O Spec.
D D
ICH2
FunctionTypeGPIO Pin
GPIO 0
GPIO 1
GPIO 2~4
GPIO 5
GPIO 6
C C
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14~15
GPIO 16
GPIO 17
B B
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22
GPIO 23
GPIO 24
GPIO 25
GPIO 26
A A
GPIO 27
GPIO 28
GPIO 29~31
5
I
I
I
I
I
I
I
I
I
I
I
I
I
O
O
O
O
O Non
O
O
OD
O
O
O
I/O
I/O
I/O
Non Connect
Non Connect
Not Implemented
Non Connect
AC97 Enabled/Disabled
None
LAN Wake Up
AC'97 Serial Data In
Non Connect
Non Connect
External SMI
LPC PME
Not Implemented
Non Connect
Non Connect
Not Implemented
Not Implemented
Not Implemented
Non
BIOS Locked/Unlocked
Non
Non
Non
Non
Non
Not Implemented
IDSEL
AD16
AD17
FWH
GPIO Pin Type Function
GPI 0
GPI 1
GPI 2
GPI 3
I
ATA IDE 1 Detect
I
ATA IDE 2 Detect
I
Reserved
Reserved
I
DEVICE
PCI Slot 1
ICH INT Pin
INTA# INTB# INTC# INTD#
PCI Slot 2 INTB#
INTC# INTD# INTA#
PCI Slot 3
INTC#
AD18 INTD# INTA# INTB#
PCI Audio
INTD#/INTE#
AD23 INTA# INTB# INTC#
PCI Lan INTC#/INTF#
AD22 INTD# INTA# INTB#
Title
Micro-Star
Document Number
Last Revision Date:
4
3
2
Sunday, December 30, 2001
MS-6513
GPIO Spec.
Sheet of
1
Rev
100
435
8
for good filtering from 10K~1M
CP8 X_COPPER
VCC3
D D
VCC3
*Put GND copper under Clock Gen. connect to every GND pin * 40 mils Trace on Layer 4 with GND copper around it * put close to every power pin
C C
Trace Width 7mils.
*
Same Group spacing 15mils
*
Different Group spacing 30mils
*
Different mode spacing 7mils on itself
*
VCC3
VCCP
FB18
X_0/0805 CB145 104P
for good filtering from 10K~1M
CP9 X_COPPER
FB20 X_0/0805
CB166 104P
VTT_GD#
R323
10K
R304 220
Rubycon
Rubycon
Q36 2N3904S
+
CT34
X_ELS10U/16V-B
+
CT36
X_ELS10U/16V-B
VCC3_C
SMBCLK11,12,16,24
SMBDATA11,12,16,24
CB144 105P
R228 X_0
CB178 105P
7
VCC3V
VCC3_C
SMBCLK SMBDATA
R318 X_1K
6
5
4
3
*Trace less 0.5"
CLOCK GENERATOR BLOCK Shut Source Termination Resistors
CB154 104P
CB151 104P
CB153 104P
CB183 104P
CB177 104P
CB164 104P
CB165 104P
CB152 104P
VTT_GD#
U18
39
CPU_VDD
36
CPU_GND
46
MREF_VDD
43
MREF_GND
29
3V66_GND
9
PCI_VDD
5
PCI_GND
18
PCI_VDD
13
PCI_GND
24
48_VDD
21
48_GND
2
REF_VDD
47
REF_GND
34
CORE_VDD
33
CORE_GND
26
SCLK
25
SDATA
19
VTT_GD#
ICS950213AF
CPU0
CPU0#
CPU1
CPU1#
3VMREF/CPU_STP# 3VMREF#/PCI_STP#
3V66_03V66_VDD 3V66_1 3V66_2 3V66_3
FS2/PCI_F0 FS3/PCI_F1
MODE/PCI_F2
FS4/PCI0
PCI1 PCI2 PCI3 PCI4 PCI5 PCI6
FS0/48MHz
FS1/24_48MHz
MUL0/REF0 MUL1/REF1
IREF
RST#
PWR_DN#
41 40
38 37
45 44
3132 30 28 27
6 7 8
10 11 12 14 15 16 17
22 23
48 1
3
X1
4
X2
35
20 42
R246 33 R247 33
R239 47 R240 47
C_STP P_STP
1 2
RN17
3 4
8P4R-33
5 6
FS2 FS3 MODE
FS4
FS0 FS1
MUL0 MUL1
X1 14.318MHZ/32PF
7 8
8P4R-33 R308 33 R449 47
7 8
RN24
5 6
8P4R-33
3 4 1 2
R307 33 R281 33
R251 33 R314 33
R227 475RST
R306 X_0
R245 4.7K
RN25
7 8 5 6 3 4 1 2
18PC171
18PC166
CPUCLK CPUCLK#
MCHCLK MCHCLK#
MCH_66 ICH_66 AGPCLK
ICH_PCLK FWH_PCLK SIO_PCLK
PCICLK4 PCICLK5 PCICLK0 PCICLK1 PCICLK2 PCICLK3
ICH_48 SIO_48
ICH_14 AUDIO_14
FP_RST#CRST# VCC3V
CPUCLK 6 CPUCLK# 6
MCHCLK 8 MCHCLK# 8
MCH_66 8 ICH_66 11 AGPCLK 20
ICH_PCLK 10 FWH_PCLK 19 SIO_PCLK 12
PCICLK4 13 PCICLK5 21 PCICLK0 21 PCICLK1 21 PCICLK2 21 PCICLK3 27
ICH_48 11 SIO_48 12
ICH_14 11 AUDIO_14 13
FP_RST# 22,24
VCC3V
CPUCLK CPUCLK# MCHCLK MCHCLK#
Trace less 0.2"
49.9ohm for 50ohm M/B impedance
CLOCK STRAPPING RESISTORS
MUL0=0 MUL0=1
Ioh=6*Iref Voh=0.71V
R233 49.9RST R234 49.9RST R229 49.9RST R230 49.9RST
FS4 FS3
FS1
FS0
FS2
MODE
MUL0
MUL1
CRST# VCC3V
SMBCLK SMBDATA
C_STP P_STP
R324 10K R334 10K
R282 X_10K R283 10K
R321 10K R322 X_10K
R326 10P R325 10K
R336 X_10K
R241 X_10K R231 10K
R316 10K R315 X_10K
R305 10K
R255 1K R254 1K
R242 X_1K R235 X_1K
VCC3V VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3
VCC3V
2
1
Pull-Down Capacitors
CN16
MCH_66 ICH_66 AGPCLK
SIO_PCLK FWH_PCLK ICH_PCLK
PCICLK0 PCICLK1 PCICLK2 PCICLK3
PCICLK4
PCICLK5
AUDIO_14
ICH_48 SIO_48
ICH_14
used only for EMI issue
Trace less 0.2"
8P4C-10P
1 3 5 7
CN18
8P4C-10P
8 6 4 2
CN17
8P4C-10P
7 5 3 1
X_10PC177
X_10PC179
10PC175 10PC169
10PC164
2 4 6 8
7 5 3 1
8 6 4 2
10PC176
R481
X
Q56 X_2N3904S
HD_RST#24
PDD[0..7]11
HD_RST# HD_RST#
PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0
PD_DREQ11
PD_IOW#11
PD_IOR#11 PD_IORDY11 PD_DACK#11
IRQ1410 PD_A111 PD_A011
PD_CS#111
PD_LED22
R189 33
R191 8.2K
PRIMARY IDE BLOCK SECONDARY IDE BLOCK
R190 4.7K
R188 33
C79 47P
7
IDE1
YJ220-CB-1
1 3 4 5 6 7 8 91110
13 14
17 18 19 21 23 25 27 29 31 33 35 37
R119 10K
VCC3
2
12
1615
22 24 26
R129 470
28 30 32 34 36 38 4039
C76 X_473P
6
ATA100 IDE CONNECTORS
PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
VCC3
CB171 104P
PDD[8..15] 11
PD_DET 19 PD_A2 11 PD_CS#3 11
CB184 104P
CB146 104P
CB170 104P
5
R186 4.7K
SDD2
R101 33
R187 33
C81 47P
3
SD_LED22
IRQ1510 SD_A111 SD_A011
SDD7 SDD6 SDD5 SDD4 SDD3
SDD1 SDD0
R103 8.2K
SDD[0..7]11
SD_DREQ11
SD_IOW#11
SD_IOR#11 SD_IORDY11 SD_DACK#11
SD_CS#111
VCC5VCC5
4
IDE2
YJ220-CW-1
1 3 4 5 6 7 8 91110
13 14
17 18 19 21 23 25 27 29 31 33 35 37
R120 10K
VCC3
2
12
1615
22 24 26 28 30 32 34 36 38 4039
SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
R128 470
C77 X_473P
Micro-Star
Document Number
Last Revision Date:
Tuesday, January 08, 2002
2
SDD[8..15] 11
SD_DET 19 SD_A2 11 SD_CS#3 11
Title
MS-6513
Clock CY28323/4 & ATA100 IDE
Sheet of
535
1
Rev
100
+12V
R480 X
11/21
B B
modify
A A
8
8
7
6
5
4
3
2
1
CPU GTL REFERNCE VOLTAGE BLOCKCPU SIGNAL BLOCK
C58
105P
C13
X_105P
VCCP
VCCP
R81
49.9RST
R79 100RST
R32 X_49.9RST
R34 X_100RST
VCCP
VCCP
HA#[3..31]8
C49 220P
C36 220P
R17 39
R10 75
R15 27
R445 300
2/3*Vccp
C48 220P
2/3*Vccp
C35 220P
VID[0..4] 12,25
HA#8
HA#22
HA#25
HA#23
HA#26
HA#27
HA#24
HA#28
HA#30
HA#29
D D
U7A
HDBI#[0..3]8
STPCLK#10
HDBSY#8
HDRDY#8
HTRDY#8
HLOCK#8
C C
B B
HDEFER#8
Trace : 10 mil width 10mil space
CPU_TMPA12
VTIN_GND12
PROCHOT#11
CPURST#8
HD#[0..63]8
CPU_GD11
HDBI#0 HDBI#1 HDBI#2 HDBI#3
FERR#10
HINIT#
HINIT#10,19
HADS#8
HBNR#8
HIT#8
HITM#8
HBPRI#8
ITP_TDI ITP_TDO ITP_TMS ITP_TRST# ITP_TCK
THERMTRIP#
IGNNE#10
HSMI#10 A20M#10
SLP#10
CPU_GD
CPURST#
HD#63 HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54
R78
E21
DBI0#
G25
DBI1#
P26
DBI2#
V21
DBI3#
AC3
IERR#
V6
MCERR#
B6
FERR#
Y4
STPCLK#
AA3
BINIT#
W5
INIT#
AB2
RSP#
H5
DBSY#
H2
DRDY#
J6
TRDY#
G1
ADS#
G4
LOCK#
G2
BNR#
F3
HIT#
E3
HITM#
D2
BPRI#
E2
DEFER#
C1
TDI
D5
TDO
F7
TMS
E6
TRST#
D4
TCK
B3
THERMDA
C4
THERMDC
A2
THERMTRIP#
AF26
GND/SKTOCC#
C3
PROCHOT#
B2
IGNNE#
B5
SMI#
C6
A20M#
AB26
SLP#
A22
RESERVED0
A7
RESERVED1
AD2
X_0
AD3
AE21
AF24 AF25
AD6 AD5
AB23
AB25
AA24 AA22 AA25
W25
W26
Y21 Y24 Y23
Y26
V24
RESERVED2 RESERVED3 RESERVED4 RESERVED5 RESERVED6
BSEL0 BSEL1
PWRGOOD
RESET#
D63# D62# D61# D60# D59# D58# D57# D56# D55# D54#
V22
D53#
U21
HA#31
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
V25
U23
U24
U26
T23
T22
T25
T26
R24
R25
P24
R21
N25
A24#
D39#
N26
A23#
D38#
M26
HA#21
A22#
D37#
N23
A21#
D36#
HA#20
HA#19
A20#
D35#
M24
P21
HA#18
A19#
D34#
N22
HA#17
A18#
D33#
M23
A17#
D32#
HA#15
HA#16
A16#
D31#
H25
K23
HA#14
A15#
D30#
J24
A14#
D29#
HA#13
HA#12
A13#
D28#
L22
M21
A12#
D27#
HA#10
HA#11
A11#
D26#
H24
G26
A10#
D25#
HA#9
A9#
D24#
L21
D26
A8#
D23#
HA#7
A7#
D22#
F26
HA#6
A6#
D21#
E25
HA#5
A5#
D20#
F24
HA#4
F23
A4#
D19#
HA#3
A3#
D18#
G23
E24
D17#
H22
AE25A5A4
AD26
DBR#
VSS_SENSE
VCC_SENSE
Differential Host Data Strobes
D16#
D15#
D14#
D13#
D12#
D11#
D25
J21
D23
C26
H21
G22
AC26
ITP_CLK1
ITP_CLK0
D10#
D9#
D8#
B25
C24
C23
D7#
VID4
AE1
B24
VID3
AE2
VID4#
D6#
D22
VID2
AE3
VID3#
D5#
C21
VID1
AE4
VID2#
D4#
A25
VID0
AE5
VID1#
VID0#
TESTHI12 TESTHI11 TESTHI10
LINT1/NMI
LINT0/INTR
D3#
D2#
A23
B22
GTLREF3 GTLREF2 GTLREF1 GTLREF0
BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#
REQ4# REQ3# REQ2# REQ1# REQ0#
TESTHI9 TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0
BCLK1# BCLK0#
RS2# RS1# RS0#
AP1# AP0# BR0#
COMP1 COMP0
DP3# DP2# DP1# DP0#
ADSTB1# ADSTB0# DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#
D1#
D0#
B21
AA21 AA6 F20 F6
AB4 AA5 Y6 AC4 AB5 AC6
H3 J3 J4 K5 J1
AD25 A6 Y3 W4 U6 AB22 AA20 AC23 AC24 AC20 AC21 AA2 AD24
AF23 AF22
F4 G5 F1
V5 AC1 H6
P1 L24
L25 K26 K25 J26
R5 L5 W23 P23 J23 F21 W22 R22 K22 E22
E5 D1
SOCKET478
GTLREF1 GTLREF2
BPM#5 BPM#4
BPM#1 BPM#0
HREQ#4 HREQ#3 HREQ#2 HREQ#1 HREQ#0
R77 49.9RST
R46 49.9RST
R82 49.9RST
R45 49.9RST
HRS#2 HRS#1 HRS#0
R47 49.9RST R80 49.9RST
HREQ#[0..4] 8
VCCP
CPUCLK# 5 CPUCLK 5
HRS#[0..2] 8
HBR#0 8
* Short trace
HADSTB#1 8 HADSTB#0 8 HDSTBP#3 8 HDSTBP#2 8 HDSTBP#1 8 HDSTBP#0 8 HDSTBN#3 8 HDSTBN#2 8 HDSTBN#1 8 HDSTBN#0 8
NMI 10 INTR 10
GTLREF1
GTLREF2
Every pin put one 220pF cap near it.
Trace Width 15mils, Space 15mils.
Keep the voltage dividers within 1.5 inches of the
first GTLREF Pin
ITP_TMS
ITP_TDO
ITP_TCK
HINIT#
HD#5
HD#4
HD#3
HD#2
HD#0
HD#1
R27 62 R76 300 R64 49.9RST R83 49.9RSTR16 680 R66 X_62
Title
Micro-Star
Document Number
Last Revision Date:
4
3
Friday, January 04, 2002
2
MS-6513
INTEL mPGA478-B CPU1
Sheet of
Rev
100
635
1
HD#8
HD#7
HD#9
HD#53
HD#48
HD#47
HD#51
HD#50
HD#49
HD#52
A A
HD#46
HD#45
HD#44
HD#43
HD#41
HD#42
HD#39
HD#40
HD#37
HD#38
HD#35
HD#36
HD#34
HD#33
HD#32
HD#31
HD#29
HD#30
HD#28
HD#27
HD#26
HD#25
HD#23
HD#24
HD#22
HD#21
HD#19
HD#20
HD#18
HD#17
HD#16
HD#15
HD#14
HD#13
HD#12
CPU STRAPPING RESISTORS
BPM#0
BPM#4 BPM#5
8
R41 49.9RST R42 49.9RST R44 49.9RST R43 49.9RST
VCCP
7
ITP_TDI
ITP_TRST# CPURST#
R26 150
6
VCCP VCCP
5
HD#6
HD#10
HD#11
ALL COMPONENTS CLOSE TO CPU
PROCHOT#BPM#1 CPU_GD HBR#0
THERMTRIP#
8
7
6
5
4
3
2
1
AD22
Y5 Y25 Y22 Y2 W6 W3 W24 W21 V4 V26 V23 V1 U5 U25 U22 U2 T6 T3 T24 T21 R4 R26 R23 R1 P5 P25 P22 P2 N6 N3 N24 N21 M5 M25 M22 M2 L4 L26 L23 L1 K6 K3 K24
VCC_VID 24
C57 106P/1206
C53 106P/1206
C56 X_226P/1206
L2 4.7UH/100MA
L1 4.7UH/100MA
C52 X_226P/1206
VCCP
CPU VOLTAGE BLOCK
VCCP
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
E20E8F11
F13
F15
F17
F19
AF4
VCC
VSS
VCC
VSS
VCC
VSS
G21G6G24
VCC
VCC
VCC
VSS
VSS
VSS
G3H1H23
F9
VCC
VSS
VSS
H26H4J2
U7B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
D D
C C
D10 A11 A13 A15 A17 A19 A21 A24 A26
AA1 AA11 AA13 AA15 AA17 AA19 AA23 AA26
AA4
AA7
AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB21 AB24
AB3
AB6
AB8 AC11 AC13 AC15 AC17 AC19
AC2 AC22 AC25
AC5
AC7
AC9
AD1
VSS VSS VSS VSS VSS VSS VSS VSS VSS
A3
VSS
A9
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
AD12
AD14
AD16
AD18
AD21
AD4
AD23
AD8
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE26
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B23
B20
B26B4B8
C11
C13
C15
C17C2C19
C22
C25C5C7C9D12
D14
D16
D18
D20
D21D3D24D6D8E1E11
E13
E15
E17
E19
E23
E7E9F10
F12
E4
E26
VCC
VSS
VSS
VSS
VSS
VSS
VSS
F14
F16
F18F2F22
F25F5F8
AF3
VCC-VID
VCC-VIDPRG
VSS
VSS
VSS
AE23
VCC-IOPLL
VSS
VSS
J22
J25J5K21
AD20
VCCA
VSSA
VSS
VSS
SOCKET478
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
B B
CPU DECOUPLING CAPACITORS
VCCP VCCP VCCPVCCP
CB32 106P/1206 CB29 106P/1206 CB47 106P/1206
A A
CB38 X_106P/1206 CB55 X_106P/1206 CB61 X_106P/1206 CB41 106P/1206 CB14 106P/1206 CB35 106P/1206 CB39 106P/1206 CB44 X_106P/1206
CB49 106P/1206 CB34 106P/1206 CB27 X_106P/1206 CB54 106P/1206 CB50 X_106P/1206 CB52 106P/1206 CB58 106P/1206 CB22 106P/1206
CB21 106P/1206 CB20 106P/1206 CB17 106P/1206 CB51 106P/1206 CB42 106P/1206 CB48 106P/1206 CB45 106P/1206 CB25 106P/1206
PLACE CAPS WITHIN CPU CAVITY
8
7
6
VCCP
CB228 106P/1206 CB229 106P/1206 CB230 106P/1206
5
Title
Micro-Star
Document Number
Last Revision Date:
4
3
Friday, January 04, 2002
2
MS-6513
INTEL mPGA478-B CPU2
Sheet of
Rev
100
735
1
5
AD4 AD3
AE6
AE7 AE11 AD11 AC15 AC16
AD5 AG4 AH9
AD15
AC2
AC13
P25
P24
N27
P23
M26 M25
N25
N24
AA9
AB8 AB18 AB20 AC19 AD18 AD20 AE19 AE21
AF18
AF20 AG19 AG21 AG23
AJ19
AJ21
AJ23
M4 M3
M5
G2 M6
W3
W5
W2 W7 W6
M8
U12A
T4
HA3#
T5
HA4#
T3
HA5#
U3
HA6#
R3
HA7#
P7
HA8#
R2
HA9#
P4
HA10#
R6
HA11#
P5
HA12#
P3
HA13#
N2
HA14#
N7
HA15#
N3
HA16#
K4
HA17# HA18# HA19#
L3
HA20#
L5
HA21#
K3
HA22#
J2
HA23# HA24#
J3
HA25#
L2
HA26#
H4
HA27#
N5
HA28# HA29# HA30#
L7
HA31#
V7
BR0# BNR#
Y7
BPRI# HLOCK#
V3
ADS#
U6
HREQ0#
T7
HREQ1#
R7
HREQ2#
U5
HREQ3#
U2
HREQ4#
Y5
HIT#
Y3
HITM#
Y4
DEFER#
U7
HTRDY# RS0# RS1# RS2#
V5
DBSY#
V4
DRDY#
R5
HAD_STB0#
N6
HAD_STB1#
HD_STBN0# HD_STBP0# HD_STBN1# HD_STBP1# HD_STBN2# HD_STBP2# HD_STBN3# HD_STBP3#
DBI0# DBI1# DBI2# DBI3#
J8
BCLK
K8
BCLK#
H_RCOMP0 H_RCOMP1
HI0 HI1 HI2 HI3 HI4 HI5
HI_STB HI_STB#
VTT
U8
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT
845MCH-DDR
HOST
HUB LINK
POWER
HIT#6
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
HRS#0 HRS#1 HRS#2
HDBI#0 HDBI#1 HDBI#2 HDBI#3
R98 24.9RST R118
24.9RST
HL0 HL1 HL2 HL3 HL4 HL5
VCCP
HA#[3..31]6
D D
HBR#06
HBNR#6
HBPRI#6
HLOCK#6
HREQ#[0..4]6
C C
HRS#[0..2]6
B B
HL[0..10]10
A A
HADS#6
HITM#6
HDEFER#6
HTRDY#6
HDBSY#6
HDRDY#6
HADSTB#06 HADSTB#16
HDSTBN#06 HDSTBP#06 HDSTBN#16 HDSTBP#16 HDSTBN#26 HDSTBP#26 HDSTBN#36 HDSTBP#36
HDBI#[0..3]6
MCHCLK5
MCHCLK#5
HL[0..10]
HL_STB10
HL_STB#10
5
4
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8#
HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
66IN
RSTIN#
CPURST#
H_VREF0 H_VREF1 H_VREF2 H_VREF3 H_VREF4
H_SWNG0 H_SWNG1
HI10
HI_REF
HL_RCOMP
VCC1_8 VCC1_8 VCC1_8 VCC1_8 VCC1_8
RSVD RSVD RSVD RSVD RSVD RSVD RSVD
RSVD RSVD7 RSVD8 RSVD9
NC0 NC1
4
3
HD#0
AA2
HD#1
AB5
HD#2
AA5
HD#3
AB3
HD#4
AB4
HD#5
AC5
HD#6
AA3
HD#7
AA6
HD#8
AE3
HD#9
AB7
HD#10
AD7
HD#11
AC7
HD#12
AC6
HD#13
AC3
HD#14
AC8
HD#15
AE2
HD#16
AG5
HD#17
AG2
HD#18
AE8
HD#19
AF6
HD#20
AH2
HD#21
AF3
HD#22
AG3
HD#23
AE5
HD#24
AH7
HD#25
AH3
HD#26
AF4
HD#27
AG8
HD#28
AG7
HD#29
AG6
HD#30
AF8
HD#31
AH5
HD#32
AC11
HD#33
AC12
HD#34
AE9
HD#35
AC9
HD#36
AE10
HD#37
AD9
HD#38
AG9
HD#39
AC10
HD#40
AE12
HD#41
AF10
HD#42
AG11
HD#43
AG10
HD#44
AH11
HD#45
AG12
HD#46
AE13
HD#47
AF12
HD#48
AG13
HD#49
AH13
HD#50
AC14
HD#51
AF14
HD#52
AG14
HD#53
AE14
HD#54
AG15
HD#55
AG16
HD#56
AG17
HD#57
AH15
HD#58
AC17
HD#59
AF16
HD#60
AE15
HD#61
AH17
HD#62
AD17
HD#63
AE16
P22 J27 AE17
HVREF
M7 R8 Y8 AB11 AB17
HSWNG
AA7 AD13
HL6
L28
HI6 HI7 HI8 HI9
L27 M27 N28 M24
P26
P27
L25 L29 M22 N23 N26 G9 G10 H6 J25 J23 G16 G17 H7 H27 K23 K25
AD26 AD27
HL7 HL8 HL9 HL10
HUB_MREF
R172 40.2RST
VCC1_8
HD#[0..63] 6
MCH_66 5 PCIRST#1 12,13,19,24,27 CPURST# 6
HL[0..10]
VCC1_8
VCC_AGP
VCC_DIMM
3
VTT1 VTT2
VTT_GND1 VTT_GND2
R22 R29 U22
U26 W22 W29
AA22 AA26 AB21 AC29 AD21 AD23 AE26 AF23 AG29
AJ25
N14
N16
P13
P15
P17
R14
R16
T15
U14
U16
T13
T17
A13
A17
A21
A25
C29
D11
D15
D19
D23
D25
F10
F14
F18
F22
G29
H10
H12
H14
H16
H18
H20
H22
H24
K22
K24
K26
L23
U13
U17
AD12 AD14 AD16 AD19 AD22
AE1
AE4
AE18 AE20 AE29
AF5
AF7
AF9
AF11 AF13 AF15 AF17 AF19 AF21 AF25
AG1
AG18 AG20 AG22 AH19 AH21 AH23
AJ3
AJ5
AJ7
AJ9
AJ11 AJ13 AJ15 AJ17 AJ27
A5 A9
C1
D7
F6
G1 G4
H8
K6
U12C
VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5
VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM
J5
VCCSM
J7
VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
845MCH-DDR
POWER
X1X2X3X4X5X6X7
X1X2X3X4X5X6X7
2
A3
GND
A7
GND
A11
GND
A15
GND
A19
GND
A23
GND
A27
GND
D5
GND
D9
GND
D13
GND
D17
GND
D21
GND
E1
GND
E4
GND
E26
GND
E29
GND
F8
GND
F12
GND
F16
GND
F20
GND
F24
GND
G26
GND
H9
GND
H11
GND
H13
GND
H15
GND
H17
GND
H19
GND
H21
GND
J1
GND
J4
GND
J6
GND
J22
GND
J26
GND
J29
GND
K5
GND
K7
GND
K27
GND
L1
GND
L4
GND
L6
GND
L8
GND
L22
GND
L24
GND
L26
GND
M23
GND
N1
GND
N4
GND
N8
GND
N13
GND
N15
GND
N17
GND
N22
GND
N29
GND
P6
GND
P8
GND
P14
GND
P16
GND
R1
GND
R4
GND
R13
GND
R15
GND
R17
GND
R26
GND
T6
GND
T8
GND
T14
GND
T16
GND
T22
GND
U1
GND
U4
GND
U15
GND
U29
GND
V6
GND
V8
GND
V22
GND
W1
GND
W4
GND
W8
GND
W26
GND
Y6
GND
Y22
GND
AA1
GND
AA4
GND
AA8
GND
AA29
GND
AB6
GND
AB9
GND
AB10
GND
AB12
GND
AB13
GND
AB14
GND
AB15
GND
AB16
GND
AB19
GND
AB22
GND
AC1
GND
AC4
GND
AC18
GND
AC20
GND
AC21
GND
AC23
GND
AC26
GND
AD6
GND
AD8
GND
AD10
GND
X8
X8
2
VTT1
VTT_GND1
VTT2
VTT_GND2
MCH REFERENCE BLOCK
C99
CB107
X_226P/1206
104P
C101
CB108
106P/1206
104P
HSWNG
C68 104P
Place 1 Cap. as Close as possible to every pin of MCH Trace width use 15 mils and 15mils space
BACK
HVREF
C93 103P
Place 1 Cap. as Close as possible to every pin of MCH
Trace width use 15 mils and 15mils space
C70
X_103P
C69
X_103P
HUB_MREF
C106 X_103P
Place 0.01uF Cap. as Close as possible to MCH
Trace width use 15 mils and 15mils space
MCH Trace Decoupling Capacitors
11/21 modify to ddr chipset
Title
Micro-Star
Document Number
Last Revision Date:
Friday, January 04, 2002
1
L5 4.7UH/1206
C102 106P/1206
L4 4.7UH/1206
C98 X_226P/1206
VCCP
C90
C87
103P
X_103P
VCCP
C71
C88
103P
X_103P
VCC1_8
C107
C108
104P
X_104P
VCC1_8
MCH & ICH2
MS-6513
Brookdale MCH1
Sheet of
1
VCC_AGP
VCC_AGP
R130 301RST
R122 150RST
R100
49.9RST
R99
C72 104P
100RST
R178 150RST
R176 150RST
CB148 104P CB85 104P
Rev
100
835
5
U12B
MD[0..63]17
D D
C C
B B
A A
1" trace
GAD[0..31]20
GC_BE#[0..3]20
5
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GC_BE#0 GC_BE#1 GC_BE#2 GC_BE#3
G28
C28 E28 H25 G27
C25 B27 D27
E23
E21 C24
D22 B21
D18 C20 E19
E17
C13 C11 D10 E10
R27 R28
R25
U27 U28 V26 V27
U23
U24 U25 V24 Y27
Y26 AA28 AB25 AB27 AA27 AB26
Y23 AB23 AA24 AA25 AB24 AC25 AC24 AC22 AD24
V25
V23
Y25 AA23
F27
F25 B28 E27 C27 B25
D26 E25 D24
C22
B23
C21 D20 C19
C18
E13 C12 B11 C10 B13
E11
T25
T26 T27
T23
T24
C9 D8 E8
B9 B7 C7 C6 D6 D4 B3 E6 B5 C4 E5 C3 D3 F4 F3 B2 C2 E2
G5
G3
H3
SDQ0 SDQ1 SDQ2 SDQ3 SDQ4 SDQ5 SDQ6 SDQ7 SDQ8 SDQ9 SDQ10 SDQ11 SDQ12 SDQ13 SDQ14 SDQ15 SDQ16 SDQ17 SDQ18 SDQ19 SDQ20 SDQ21 SDQ22 SDQ23 SDQ24 SDQ25 SDQ26 SDQ27 SDQ28 SDQ29 SDQ30 SDQ31 SDQ32 SDQ33 SDQ34 SDQ35 SDQ36 SDQ37 SDQ38 SDQ39 SDQ40 SDQ41 SDQ42 SDQ43 SDQ44 SDQ45 SDQ46 SDQ47 SDQ48 SDQ49 SDQ50 SDQ51 SDQ52 SDQ53 SDQ54 SDQ55 SDQ56 SDQ57 SDQ58 SDQ59 SDQ60 SDQ61 SDQ62 SDQ63
RCVENIN# RCVENOUT#
G_AD0 G_AD1 G_AD2 G_AD3 G_AD4 G_AD5 G_AD6 G_AD7 G_AD8 G_AD9 G_AD10 G_AD11 G_AD12 G_AD13 G_AD14 G_AD15 G_AD16 G_AD17 G_AD18 G_AD19 G_AD20 G_AD21 G_AD22 G_AD23 G_AD24 G_AD25 G_AD26 G_AD27 G_AD28 G_AD29 G_AD30 G_AD31
G_C/BE0# G_C/BE1# G_C/BE2# G_C/BE3#
845MCH-DDR
AGP
Tri-Stated during RSTIN# assertion
DDR
4
SMA0 SMA1 SMA2 SMA3 SMA4 SMA5 SMA6 SMA7 SMA8
SMA9 SMA10 SMA11 SMA12
SCS#0 SCS#1 SCS#2 SCS#3
SCB0
SCB1
SCB2
SCB3
SCB4
SCB5
SCB6
SCB7
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7 SDQS8
SCK0
SCK#0
SCK1
SCK#1
SCK2
SCK#2
SCK3
SCK#3
SCK4
SCK#4
SCK5
SCK#5
SCKE0 SCKE1 SCKE2 SCKE3
SRAS# SCAS#
SWE#
SM_RCOMP
SD_REF0 SD_REF1
G_FRAME#
G_IRDY#
G_TRDY#
G_DEVSEL#
G_STOP#
G_PAR
G_REQ# G_GNT#
SB_STB
SB_STB#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
PIPE#
WBF#
AGPREF
G_RCOMP
TESTIN#
4
SBS0 SBS1
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
ST0 ST1 ST2
RBF#
E12 F17 E16 G18 G19 E18 F19 G21 G20 F21 F13 E20 G22
E9 F7 F9 E7
C16 D16 B15 C14 B17 C17 C15 D14
F26 C26 C23 B19 D12 C8 C5 E3 E15
E14 F15 J24 G25 G6 G7 G15 G14 E24 G24 H5 F5
G23 E22 H23 F23
F11 G8 G11
G12 G13
J28
J9 J21
Y24 W27 W24 W28 W23 W25
AG24 AH25
AH28 AH27 AG28 AG27 AE28 AE27 AE24 AE25
AF27 AF26
AG25 AF24 AG26
R24 R23 AC27 AC28
AF22 AE22 AE23
AA21 AD25 H26
DDRMA0 DDRMA1 DDRMA2 DDRMA3 DDRMA4 DDRMA5 DDRMA6 DDRMA7 DDRMA8 DDRMA9 DDRMA10 DDRMA11 DDRMA12
CS#0 CS#1 CS#2 CS#3
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7 SDQS8
DCLK0 DCLK#0 DCLK1 DCLK#1 DCLK2 DCLK#2 DCLK3 DCLK#3 DCLK4 DCLK#4 DCLK5 DCLK#5
DDRCKE0 DDRCKE1 DDRCKE2 DDRCKE3
RASA# CASA# WEA#
BS0 BS1
MRCOMP
DIMMREF
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
ST0 ST1 ST2
CB224 X_104P
R165 40.2RST R168 X_4.7K
DDRMA[0..12] 17
CS#[0..3] 17
CB[0..7] 17
SDQS[0..8] 17
DCLK0 16,17 DCLK#0 16,17 DCLK1 16,17 DCLK#1 16,17 DCLK2 16,17 DCLK#2 16,17 DCLK3 16,17 DCLK#3 16,17 DCLK4 16,17 DCLK#4 16,17 DCLK5 16,17 DCLK#5 16,17
DDRCKE[0..3] 16,18
RASA# 17 CASA# 17 WEA# 17
BS0 17 BS1 17
GFRAME# 20 GIRDY# 20 GTRDY# 20 GDEVSEL# 20 GSTOP# 20 GPAR 20
GREQ# 20 GGNT# 20
SBA[0..7] 20
SB_STB 20 SB_STB# 20
ST[0..2] 20
GAD_STB0 20 GAD_STB#0 20 GAD_STB1 20 GAD_STB#1 20
PIPE# 20 RBF# 20 WBF# 20
AGPREF 20
VCC1_8
3
2
1
MCH REFERENCE VOLTAGE
DDR_VTT
C329 X_104P
X_104P
DIMMREF
C95
C97
104P
MRCOMP
104P
R740
C239
33RST
DIMMREF
BACK
MCH DECOUPLING CAPACITOR
VCC1_8 VCC_DIMMVCCP VCC_AGP
C21
102P
X_104P/0805
X_104P/0805
CB117 105P CB116 104P
CB225
CB221
CB114 104P CB115 104P CB126 104P CB118 104P CB106 104P
C104 X_105P
11/21 modify to ddr chipset
Title
Micro-Star
Document Number
Last Revision Date:
Friday, January 04, 2002
104PC105
MS-6513
Brookdale MCH 2
AGPREF
Sheet of
1
CB89 104P CB76 104P CB101 104P CB86 104P CB78 104P CB84 104P CB81 104P C252 104P
Rev
100
935
CB93 105P CB98 104P CB94 104P CB97 104P CB100 103P CB96 X_106P/1206 CB90 X_106P/1206
EMI
VCC5
VCC_DIMM VCC5
X_104PC211 X_104PC208 X_104PC8
BACK
VCCP
VCC_AGP
3
CB219 X_104P
CB222 X_104P CB220 X_104P CB227 X_104P CB223 X_104P CB226 X_104P
VCC_DIMM
2
ICH2 PCI / HUB LINK / CPU / LAN / INTERRUPT SIGNALS
VCC1_8
D10D2E5
K19
L19P5V9
VCC1.8
VCC1.8
GND1
GND2
VCC1.8
VCC1.8
GND3
GND4
E14
VCC1.8
GND5
GND6
VCC3
GND7
AD[0..31]13,21,27
C_BE#[0..3]13,21,27
DEVSEL#13,21,27
FRAME#13,21,27
IRDY#13,21,27
TRDY#13,21,27
STOP#13,21,27
PLOCK#21
SERR#21,27 PERR#21,27
ICH_PCLK5
PCIRST#24
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C_BE#0 C_BE#1 C_BE#2 C_BE#3
PAR13,21,27
PME#20,21,27
REQA# GNTA#
AA4 AB4
AB3 AA5 AB5
AA6
AA8
AB8
AB9
W10
Y10
AA10
AA3 AB6
AA9
AB7
AA7
Y15
W11
AA15
Y4 W5 W4
Y5
Y3 W6 W3
Y6
Y2
Y1
V2
V1
U4 W9
U3
Y9
U2
U1
T4
T3
Y8
V3 W8
V4 W1 W2
W7
Y7
M3
L2
F4 G4
H3
H4
J1
K4
K3
J4
J3
U17A
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
CBE#0 CBE#1 CBE#2 CBE#3
DEVSEL# FRAME# IRDY# TRDY# STOP# PAR PLOCK# SERR# PERR# PME#
GPIO0/REQA# GPIO16/GNTA#
PCICLK
PCIRST#
NC12 NC13 NC14 NC15 NC16
EE_CS EE_DIN EE_DOUT EE_SHCLK
VCC1.8
VCC1.8
A1A2A10B1B2B3B9
VCC3
E15
E16
E17
E18
F18
G18
H18
J18
P18
R18R5T5U5V5V6V7V8V14
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
B10C2C3C4C9D5D6D7D8D9E6E7E8E9J9
VCC3
VCC3
GND21
GND22
VCC3
GND23
J10
VCC3
GND24
J11
J12
GND25
VCC1_8SB
V15
V16H5J5
VCCSUS1_8
VCCSUS1_8
VCCSUS1_8
GND26
GND27
GND28
J13
J14K9K10
A22
B21
GND68
VCCSUS1_8
VCCSUS1_8
GND29
GND30
GND31
GND32
K11
K12
K13
K14J2K1
B22C1D1D3E1E2E3
NC5
NC6
GND69
GND70
GND71
GPIO1/REQB#/REQ5#
GPIO17/GNTB#/GNT5#
GND33
GND58
GND59
GND60
GND61
AA1
AA2
AA21
AA22
NC8
NC9
NC10
LAN_RSTSYNC
GND62
GND63
GND64
AB1
AB2
E4
NC11
GND65
AB21
ICH2-B5
A20M#
CPUSLP#
NC17
FERR#
IGNNE#
STPCLK#
RCIN#
A20GATE
HL_STB HL_STB# HLCOMP
HUBREF
PIRQA#
PIRQB# PIRQC# PIRQD#
APICCLK
APICD0
APICD1 SERIRQ
REQ0# REQ1# REQ2# REQ3# REQ4#
GNT0# GNT1# GNT2# GNT3# GNT4#
LAN_CLK
LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2
GND67 GND66
A20M#
D11 A12
FERR#
R22 A11 C12
INIT#
C11
INTR
B11
NMI
SMI#
HL0 HL1 HL2 HL3 HL4 HL5 HL6 HL7 HL8
HL9 HL10 HL11
IRQ14 IRQ15
B12 C10 B13 C13
A4 B5 A5 B6 B7 A8 B8 A9 C8 C6 C7 C5 A6 A7 A3
B4
P1 P2 P3 N4
F21 C16 N20 P22 N19 N21
R2 R3 T1 AB10 P4 L3
M2 M1 R4 T2 R1 L4
G3 H2 G2 G1 H1 F3 F2 F1 A21 AB22
SMI#
KB_RST# A20GATE#
HL0 HL1 HL2 HL3 HL4 HL5 HL6 HL7 HL8 HL9 HL10
R221 40.2RST
HUB_IREF
APIC_D0 APIC_D1 SERIRQ
PREQ#0 PREQ#1 PREQ#2 PREQ#3 PREQ#4 PREQ#5
PGNT#0 PGNT#1 PGNT#2 PGNT#3 PGNT#4 PGNT#5
MSI PN:B01-801BA55-I06
A20M# 6 SLP# 6 FERR# 6 IGNNE# 6 HINIT# 6,19 INTR 6 NMI 6
STPCLK# 6 KB_RST# 12 A20GATE# 12
HL[0..10] 8
This resistor less than 0.5"
from ICH use 15 mils trace
HL_STB 8 HL_STB# 8
VCC1_8
INTA# 20,21 INTB# 20,21 INTC# 21,27 INTD# 21
IRQ14 5 IRQ15 5
SERIRQ 12
PREQ#[0..5] 13,21,27
PGNT#[0..5] 13,21,27
MEDION PN:B01-801BA85-IY6
ICH2 SMI# SIGNAL
SMI#
R218 33
100PC143
HSMI# 6
ICH2 STRAPPING RESISTORS
FERR#
SERIRQ
KB_RST# A20GATE#
REQA# GNTA#
APIC_D0 APIC_D1
R279 62
R256 8.2K
R219 10K R220 10K
R284 2.7K R272 X_2.7K
R270 10K R468 10K
VCCP
VCC3
VCC3
VCC5 VCC3
ICH2 REFERENCE VOLTAGE
VCC1_8
HUB_IREF
C140
C141
C142
104P
X_103P
X_104P
R223 150RST
R222 150RST
ICH2 DECOUPLING CAPACITORS
VCC3
VCC1_8SBVCC1_8
Place Cap. as Close as possible to ICH2
Trace width use 15 mils and 15mils space
CB141 103P
CB142 103P
CB167 104P
Place one 0.1U/0.01U pair in each corner and 2 on opposite sides close to ICH2 if it fit
CB134
CB140
104P
104P
Distribute near the 1.8V power pin of the ICH2
CB157
CB158
104P
104P
Distribute near the VCC1_8SB Power pin of the ICH2
Micro-Star
Title
Document Number
Last Revision Date:
Friday, January 04, 2002
MS-6513
Brookdale ICH2 PCI
Sheet of
Rev
100
10 35
ICH2 ASIC / RTC / AC'97 / GPIO / LPC / USB / IDE SIGNALS
CB181 104P
U17B
AA13
THRM#
W16
SLP_S3#
AB18
SLP_S5
R20
PWROK
A13
CPUPWRGD
B15
VRMPWRGD
W21
PWRBTN#
AA17
RI#
R21
RSMRST#
Y16
RSM_PWROK
Y17
SUSSTAT#
AA18
SUSCLK
AA16
SMBDATA
AB16
SMBCLK
AB17
GPIO11/SMBALERT#
U19
SMLINK0
V20
SMLINK1
T19
INTRUDER#
T20
RTCRST#
T21
VBIAS
U22
RTCX1
T22
RTCX2
D4
CLK66
M19
CLK14
P20
CLK48
V22
AC_RST#
P19
AC_SYNC
R19
AC_BITCLK
P21
AC_SDOUT
Y22
AC_SDIN0
W22
AC_SDIN1
N22
SPKR
W14
GPIO12
AB15
GPIO13
L1
GPIO21
B14
GPIO22
A14
GPIO23
AB14
GPIO27
AA14
GPIO28
Y12
LAD0/FWH0
W12
LAD1/FWH1
AB13
LAD2/FWH2
AB12
LAD3/FWH3
AA12
FS0
Y13
LDRQ0#
W13
LDRQ1#
AB11
LFRAME#/FWH4
W17
USBP0+
Y18
USBP0-
AB19
USBP1+
AA19
USBP1-
W18
USBP2+
Y19
USBP2-
AB20
USBP3+
AA20
USBP3-
W19
OC0#
Y20
OC1#
Y21
OC2#
W20
OC3#
RTC_VCC
CB169 103P
THRM#
PWR_GD
VRM_GD
RING# RSMRST#
SMB_ALERT SM_LNK0 SM_LNK1 INTRUDER#
RTCRST#
VBIAS
RTCX2
AC_SDOUT
SPKR22
SIO_PME#
GP23
GP2319
R327 X_10K
OC#023
OC#123
VCCP VCC5_SB
CB147 104P
VCC3_SB
CB193 104P
THRM#12 SLP_S3#12,24 SLP_S5#24
PWR_GD24
CPU_GD6 VRM_GD25
PWRBTN#12
RING#26
RSMRST#24
SUSCLK12
SMBDATA5,12,16,24
SMBCLK5,12,16,24
ICH_665
ICH_145
ICH_485
EXTSMI#22
SIO_PME#12
LAD0/FWH012,19 LAD1/FWH112,19 LAD2/FWH212,19 LAD3/FWH312,19
LDRQ#12
LFRAME#/FWH412,19
USBP0+23
USBP0-23
USBP1+23
USBP1-23
USBP2+23
USBP2-23
USBP3+23
USBP3-23
CB143 104P
Distribute near the VCC3_SB power pin of the ICH
RTC_VCC
GND34
GND35
L9
L10
U21
GND36
L11
L12
VCCRTC
GND37
GND38
L13
L14M9M10
VCC3_SB
T18
U18
VCC3SUS1
VCC3SUS2
GND39
GND40
GND41
F5G5V17
VCC3SUS4
VCC3SUS5
VCC3SUS6
GND42
GND43
GND44
M11
M12
M13
VCCP VCC5_SB
V18
VCC3SUS7
GND45
GND46
GND47
M14N9N10
D12
VCPU_IO1
GND48
GND49
N11
N12
D13
VCPU_IO2
GND50
GND51
GND52
N13
N14P9P10
V19K2M20
VCC5REF1
VCC5REF_SUS
GND53
GND54
GND55
GND56
P11
P12
P13
ICH2 DECOUPLING CAPACITOR
VCC5_SBVCC5
CB179 104P
CB180 104P
SM5817S
PDCS1# SDCS1# PDCS3# SDCS3#
VCC5REF2
PDA0 PDA1 PDA2 SDA0 SDA1 SDA2
PDDREQ
SDDREQ PDDACK# SDDACK#
PDIOR# SDIOR# PDIOW# SDIOW# PIORDY SIORDY
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8
PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
GPIO2/PIRQE#
GPIO3/PIRQF# GPIO4/PIRQG# GPIO5/PIRQH#
GPIO6 GPIO7
GPIO8 GPIO18 GPIO19 GPIO20 GPIO24 GPIO25
GND57
ICH2-B5
P14
TP0
D14
E21 C15 E19 D15
F20 F19 E22 A16 D16 B16
G22 B18 F22 B17 G19 D17 G21 C17 G20 A17
H19 H22 J19 J22 K21 L20 M21 M22 L22 L21 K22 K20 J21 J20 H21 H20
D18 B19 D19 A20 C20 C21 D22 E20 D21 C22 D20 B20 C19 A19 C18 A18
U20 N3 N2 N1 M4 Y11 AA11 Y14 A15 D14 C14 V21 W15
VCC5VCC3
R257 1K
CB161
CB156
104P
104P
PD_CS#1 5 SD_CS#1 5 PD_CS#3 5 SD_CS#3 5
PD_A0 5 PD_A1 5 PD_A2 5 SD_A0 5 SD_A1 5 SD_A2 5
PD_DREQ 5 SD_DREQ 5 PD_DACK# 5 SD_DACK# 5 PD_IOR# 5 SD_IOR# 5 PD_IOW# 5 SD_IOW# 5 PD_IORDY 5
PDD0 PDD1RTCX1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
BATLOW#
GP6 GP7
SD_IORDY 5
INTE# 13,21 INTF# 21,27 INTG# 21 INTH# 21
LAN_WAKE 26
MSI PN:B01-801BA55-I06
MEDION PN:B01-801BA85-IY6
PDD[0..15] 5
SDD[0..15] 5
VBAT
VCC5_SB
D21
SM5817S
VCCP
PD_IORDY SD_IORDY
PD_DREQ SD_DREQ
INTRUDER#
RSMRST#
SPKR
PWR_GD
THRM#
VRM_GD
SIO_PME#
RING#
RSMRST#
PWRBTN#
R331
D19
1.5K 1N4148S
R340
4.7K
R288 1K
BAT1
YBA3V
D20
SM5817S
473PC167
PROCHOT BLOCK
R211 4.7K
PROCHOT#6
R133 4.7K R224 4.7K
R97 5.6K R225 5.6K
R280 10K
R365 10K
R260 X_10K
R273 8.2K
R345 10K
R216 10K
R377 4.7K
R367 8.2K
R366 1K
R329 10K
RTC_VCC
R446 1K
R277 20M
R274
5.6M
R411 390K
C215 473P
R317 10M
C174 15P
THRM#
Q32 2N3904S
R410 1K
R293 5.6M
32.768KHZ
12.5PPM 32pF
RTC_VCC
C253 X_103P
1 2 3
X2
X_1N4148S
ICH2 STRAPPING RESISTORS
SM_LNK0 SM_LNK1 BATLOW# EXTSMI#
SMB_ALERT
VCC3_SB
SLP_S3#
GP23
GP6 GP7
AC_SDOUT
RTC_VCC
VCC3
VCC3
11/21 modify
Title
Micro-Star
Document Number
Last Revision Date:
Tuesday, January 08, 2002
Brookdale ICH2 Other
RTC BLOCK
JBAT1 Clear CMOS
Normal1 - 2
*
Clear CMOS2 - 3
JBAT1 YJ103
RTCRST#
VBIAS
RTCX1
RTCX2
C170 15P
X3
4
2 3
X_32.768Khz
RN28
8P4R-4.7K
1 2 3 4 5 6 7 8
RN32
8P4R-10K
1 2 3 4 5 6 7 8
RN31
8P4R-4.7K
1 2 3 4 5 6 7 8
R269 X_8.2K
VCC
GNDOUT
D26
MS-6513
Sheet of
1
NC
RTCX1
VCC3_SBVCC3
VCC3_SB
VCC3
VCC3
Rev
100
11 35
Hardware Monitor
LPC SUPER I/O W83627HF
U13
PCIRST#18,13,19,24,27
SIO_PCLK5
SERIRQ10
LDRQ#11
LFRAME#/FWH411,19
LAD0/FWH011,19 LAD1/FWH111,19 LAD2/FWH211,19 LAD3/FWH311,19
JYS_AX215 JYS_AX115 JYS_PB015 JYS_PB115 JYS_AX015 JYS_AX315 JYS_PB315 JYS_PB215
MID_OUT15
MID_IN15
TMP_VREF
VCC3
VCCP
THRM#11
PSON#22
SIO_485
VCC3
VCC5
VBAT
R474 47K
CPU_TMP
SYS_TMP VTIN_GND
-5VIN
-12VIN +12VIN VTIN_VCC
VID4 VID3 VID2 VID1 VID0
BEEP CHASISS
R469 510 R470 X_0 R471 X_0 R472 X_510
VID[0..4]6,25
CPU_TMPA
VTIN_GND6
CPU_CTRL23
SYS_CTRL23
SIO_PME#11
PWRBTN#11
PWRBTIN#22
VCC5_SB
CPU_FAN23
SYS_FAN23
CPUFAN23
SMBDATA5,11,16,24
SMBCLK5,11,16,24 SYSFAN23
SLP_S3#11,24
CPU_TMPA6
30
LRESET#
21
LCLK
23
SERIRQ
22
LDRQ#
29
LFRAME#
27
LAD0
26
LAD1
25
LAD2
24
LAD3
125
GPX2/P15/GP14
123
GPY1/GP15
128
GPSA1/P12/GP10
121
GPSA2/GP17
126
GPX1/P14/GP12
124
GPY2/P16/GP14
127
GPSB1/P13/GP11
122
GPSB2/GP16
120
MSO/IRQIN0
119
MSI/GP20
101
VREF
102
VTIN3
103
VTIN2
104
VTIN1
93
AGND
94
-5VIN
95
-12VIN
96
+12VIN
97
AVCC
98
+3.3VIN
99
VCOREB
100
VCOREA
106
VID4
107
VID3
108
VID2
109
VID1
110
VID0
116
FANPWM1
113
FANIO1
115
FANPWM2
112
FANIO2
111
FANIO3
105
OVT#
118
BEEP
76
CASEOPEN#
19
PME#
89
WDTO/GP24
91
SDA/GP22
92
SCL/GP21
67
PSOUT#
68
PSIN#
64
SUSLED/GP35
90
PLED/GP23
72
PWRCTL#/GP31
73
SUSCIN/GP30
18
CLKIN
61
VSB
74
VBAT
28
VCC3
12
VCC_1
48
VCC_2
77
VCC_3
114
VCC_4
W83627HF
SIO
CIRRX/GP34
RSMRST#/GP33
PWROK/GP32
DRVDEN0 DRVDEN1
INDEX#
MOA# DSB# DSA# MOB#
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#
PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7
SLCT
BUSY ACK# SLIN#
INIT#
ERR#
AFD# STB#
IRRX/GP25
IRTX/GP26
SUSCLKIN
DCDA# DSRA#
SINA RTSA# SOUTA CTSA# DTRA#
RIA#
DCDB# DSRB#
SINB RTSB# SOUTB CTSB# DTRB#
RIB#
GA20
KBRST
KBDATA
KBCLK
MSDATA
MSCLK
KBLOCK#
VSS1 VSS2 VSS3 VSS4
PE
1 2 3 4 5 6 7 8 9 10 11 13 14 15 16 17
42 41 40 39 38 37 36 35 31
PE
32
RN11 8P4R-33
33
ACK#
34
SLIN#
43
INIT#
44 45 46 47
88 69 87 75
56 50 53 51 54 49 52 57
84 79 82 80 83 78 81 85
59 60 63 62 66 65 58
70 71
20 55 86 117
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
R142 33
RTSA# SOUTA
SOUTB
LP_D0 LP_D1 LP_D2 LP_D3 LP_D4 LP_D5 LP_D6
LP_D7
7 8 5 6 3 4 1 2 7 8 5 6 3 4 1 2
DRVDEN0 26 DRVDEN1 26 INDEX# 26 MOT_A# 26 DRV_B# 26 DRV_A# 26 MOT_B# 26 DIR# 26 STEP# 26 WT_DT# 26 WT_EN# 26 TRACK0# 26 WP# 26 RDATA# 26 HEAD# 26 DSKCHG# 26
RN5 8P4R-33
RN6 8P4R-33
LP_D[0..7] 26 LP_SLCT 26 LP_PE 26 LP_BUSY 26 LP_ACK# 26 LP_SLIN# 26 LP_INIT# 26 LP_ERR# 26 LP_AFD# 26 LP_STB# 26
SUSCLK 11
DCDA# 26 DSRA# 26 SINA 26 RTSA# 26 SOUTA 26 CTSA# 26 DTRA# 26 RIA# 26
DCDB# 26 DSRB# 26 SINB 26 RTSB# 26 SOUTB 26 CTSB# 26 DTRB# 26 RIB# 26
A20GATE# 10 KB_RST# 10 KBDATA 26 KBCLK 26 MSDATA 26 MSCLK 26
RN12 8P4R-33
THERMAL RESISTOR BLOCK
VTIN_VCC
TMP_VREF
R157 X_10KST
CPU_TMP
RT1 X_R-TD-C0603
VTIN_GND
NOTE: LOCATE INSIDE SOCKET478
TMP_VREF CPU_TMPA
X_COPPER
CP20
FB13 0/0805
CB102 X_104P
R163 X_30K
11/21 modify
VCC5
VTIN_GND
R166 X_10KST
RT2 X_R-TD-C0603
NOTE: LOCATE CLOSE STATUS PANEL
CHASISS INTRUSION HEADER
VBAT
R152 2M
CHASISS
R145 X_28KST
+12V
-12V
-5V
1 2
R150 X_232KST
1 2
R160 X_120KST
1 2
VTIN_GND
FB12 0
TMP_VREF
SYS_TMP
VTIN_GND
12
R144 X_10KST
X_COPPER
CP21
12
R161 X_56KST
SPEAKER BLOCK
VCC5
BEEP
R162 X_10K
R164 X_4.7K
X_2N3904S
ALARM 22
Q28
SUPER I/O STRAPPING RESISTOR
VCC3_SB
SOUTA SOUTB RTSA# DTRA# L: PNP Default H: PNP no Default
+12VIN
-12VIN
-5VIN
12
R149 X_56KST
TMP_VREF
R214 X_10K
R169 4.7K
VCC5
R151 4.7K
VCC5
R175 X_4.7K
VCC5
L: Disable KBC H: Enable KBC L: 24MHZ H: 48MHZ L: CFAD=2E H: CFAD=4E
PWRBTN#
SOUTA
SOUTB
RTSA#
DECOUPLING CAPACITOR
VCC3 VCC5
CB133 104P CB119 102P
VBAT VCCP
CB104 103P
CB121 104P CB103 104P CB11 X_104P CB120 104P
C100 104P
VCC5_SB
CB111 104P
Title
Micro-Star
Document Number
Last Revision Date:
Friday, January 04, 2002
MS-6513
LPC I/O W83627HF
Sheet of
Rev
100
12 35
8
C-MEDIA CMI8378 PCI AUDIO
AD[0..31]
D D
C_BE#[0..3]
SPDIF OUT
J9
SPDIF-AV
J10
SPDIF-AV
C C
SPDIF IN
B B
4
1
4
1
C243 47P
47P
INTE#11,21
4
1
4
C382
1
R450 390
R451
100
C381 105P/0805
R453
10K
R360 X_4.7K R351 X_4.7K R337 4.7K
PCIRST#18,12,19,24,27
PCICLK45
PGNT#310,21 PREQ#310,21
C380 105P/0805
PCIRST#1 PCICLK4 PGNT#3 PREQ#3
AD31 AD30 AD29
7
AD[0..31] 10,21,27
C_BE#[0..3] 10,21,27
+5VR
R452
4.7K
R454
4.7K
103 104 105 106 107 108 109 110 111
SPDIF2 MDSEL
112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128
SPDIFO15
XAFERST XSCLK XHSPFS XHSPSDI XHSPSDO XAFEMCLK XBIO3 XBIO2 XBIO1 XZVCLK XSPDIFI2/ZVLRCK XMDSEL Vcore GND XINTA XINTB XPRST XCLK33 XGNT XREQ XPME VDD GND XA31 XA30 XA29
6
+5VR
R301
XGD3
4.7K
XGD2
XGD1
XGD0
CMITXD
XRXD
R440
4.7K
SPGPIO
XTXD
SPDIFI
XMBCSZ
EECS
+5VR
XEECS
XGPBIO
XMBCSZ
XSPDIFI/ZVSDI
AGND
VDD5V
+5VR
AVDD
AUXRX
XMICIN
XPCSPKIN
AUXLX
XAUXL
XAUXR
XLNR
C168 104P
DVDD
SPDIFO
101
10099989796959493929190898887868584838281807978777675747372
102
XGD7
XGD6
XGD5
DGND
XSPDIFO
XGD4
VDDM
XRING
XOFFHOOK
CMI8738-MX
XA27
GND
VDD
XA26
XA25
XA24
XCBE3
XIDSEL
VDD
GND
XA23
XA22
XA21
XA20
XA19
GND
VDD
XA18
A17
XA16
XCBE2
XFRAME
XIRDY
XTRDY
XDEVSEL
XA28
23456789101112131415161718192021222324252627282930
1
VDD
5
XLNL
XREARR
GND
XSTOP
CDLX
CDRX
CDGNDX
XCDL
XCDR
XCDG
XREARL
XA15
XA14
XPAR
XCBE1
31
32333435363738
CMIMIC_IN 15 MONO_PHONE 14 AUXRX 15 AUXLX 15 CMILINE_R 14 CMILINE_L 14 CMIREAR_R 14 CMIREAR_L 14 CDRX 14 CDLX 14 CDGNDX 14
XBASS XCENTER ADCHR ADCHL
65666768697071
XADCHL
XADCHR
XADOUTB
XADOUTC
XADOUTR
XADOUTL
XINTVREF
EXTBASS
XA13
XA12
GND
VDD
XA11
4
4 Channal need 270P CAP
C162 X_270P C161 X_270P C158 102P C156 102P
C160 105P/0805 C163 105P/0805
U19
CMI8738-MX
64 63
NC
62
AVDD
61
AVDD
60
AGND
XMOUT
XMIN
XOUT
Vcore
GND
XA0 XA1 XA2 XA3 XA4 XA5
GND
VDD
XA6 XA7
XCBE0
XA8 XA9
XA10
XIN
EXTBASS
59 58 57 56 55 54 53
AD0
52
AD1
51
AD2
50
AD3
49
AD4
48
AD5
47 46 45
AD6
44
AD7
43
C_BE#0
42
AD8
41
AD9
40
AD10
39
3
R238
LINE_ROUT 15 LINE_LOUT 14,15
X_47K
R249
X_47K
6 Channal NC 104P CAP
C148 X_104P
ELS10U/16V-B
+
C153
C149 104P C154 104P
C151 X_104P R226 X_1K C150 X_104P
Y2
X_14.318MHZ
C145
22P
C152 X_105P
AUDIO_14 5
C146
X_20P
CENTER 14 BASS 14
LINE_LOUT 14,15
2
1
OPTICAL
+12V
JSPDIF1
1
SPDIFI SPDIF2
JP2 H/W AUDIO
From M/B South Bridge GPIO CONTROL ENABLE
* MBCSZ : AUDIO CHIP SELECT
JP2
1 2 3
X_YJ103
34 56 78
SPDIF
DISABLE1 - 2 ENABLE2 - 3
*
HI : DISABLE LOW : ENABLE
DVDD
XMBCSZ
R473 0
SPDIFO
SPGPIO
C383
100P
C_BE#3
AD25
AD27
AD26
AD28
A A
8
7
AD24
R300
100
AD23
CB149
104P
6
AD23
AD21
AD22
CB168
104P
AD20
AD19
CB182
104P
AD18
AD17
C_BE#2
AD16
DVDD
CB186
104P
TRDY#
IRDY#
FRAME#
CB160
104P
DEVSEL#
PAR
STOP#
CB205
104P
5
C_BE#1
AD15
AD14
AD13
CB150
104P
AD12
AD11
CB185
104P
PAR 10,21,27 STOP# 10,21,27 DEVSEL# 10,21,27 TRDY# 10,21,27 IRDY# 10,21,27 FRAME# 10,21,27
L7 X_80S/0805
L8 X_80S/0805
CP22 X_COPPER
4 Channal Chipset use 5V
6 Channal Chipset use 3.3V
4
VCC5
VCC3
+5VR
EECS
Micro-Star
Document Number
Last Revision Date:
Friday, January 04, 2002
3
2
R297 4.7K
Internal ID Selection
Title
MS-6513
CMI8738 PCI AUDIO
Sheet of
Rev
100
13 35
1
LINE-IN JACK CENTER/BASS JACK
CMILINE_R13
CMILINE_L13
C184
C185
105P/0805
LIN_IN_L
105P/0805
R294 10K
1 2
R320
1 2
10K
C126 101P
C127 101P
J8-5
35 34 32 31 33
4-JACK
JACK_RLIN_IN_R
JACK_L
C384 101P
Support Creative Labs!
CENTER13
JACK_L
JACK_R
C125 101P
REAL JACK
CMIREAR_R13
CMIREAR_L13
C235 105P/0805
C236 105P/0805
C237
101P
C238
101P
J8-3
25 24 22 21 23
4-JACK
J11 J12
1-2
2-3
BASS13
1-2
Mode1 Center to left Channel/Subwoofer to right channel
2-3
Mode2 Center to right Channel/Subwoofer to left channel*
JACK_R
JACK_L
Connection Scheme
J8-2
20 19 17 16 18
4-JACK
J11
1 2 3
YJ103
J12
1 2 3
YJ103
AUDIO CODE REGULATORS
SPEAKER OUT JACK
FB15 301S/0603
SPEAKER_R15
SPEAKER_L15
1 2
1 2
FB14
301S/0603
12
C130
101P
12
C131
101P
J8-4
30 29 27 26 28
4-JACK
-12V
12
CB195 X_104P
FB27 X_80S/0805
CP7
X_COPPER
-12VR
+5VR
C213
1 2
105P
R475
47K
AUDIO CODE CD / AUX / MODEM IN HEADERS
CDLX 13 CDGNDX 13
CDRX
CDGNDX
CDLX
CDRX 13
C187 105P/0805
1 2
C188 105P/0805
1 2
C189 105P/0805
1 2
12
CDR1
CDGND1
R358
10K
12
R357
10K
R355
1 2
R356
1 2
R359
1 2
12
R354
10K
+12VR
X_80S/0805 FB31
CD_IN1 YJ104-B
CDR
0
CDGND
0
CDLCDL1
0
4 3 2 1
CD IN
MONO_PHONE13
LINE_LOUT13,15
MONO_PHONE
C219 X_105P/0805
1 2
C218 X_105P/0805
1 2
1
MDM_IN1
2
X_MONDEN HEADER
3 4
MODEM IN
12
CB206 104P
+12V
CP10
12
X_COPPER
105P
C232
Micro-Star
Document Number
Last Revision Date:
Friday, January 04, 2002
U24 YLT1087S-0.8A
3 2
VIN VOUT
VOUT
ADJ
SOT223
1
Title
MS-6513
AC97 CODEC AD1885
4
Sheet of
+5VR
12
R412
100RST
R402
300RST
14 35
C212
105P
Rev
100
-12VR
C210
1 2
X_105P
U25A X_YTL072S
3
C234
1 2
X_105P
2
5
6
+
-
+12VR
-12VR
+
-
+12VR
8 4
U25B X_YTL072S
8 4
1
R413
1 2
X_47K
C217
1 2
X_33P
7
R435
1 2
X_47K
C231
1 2
X_33P
LINE_ROUT13
LINE_LOUT13,14
C209
C203
LOUTR
X_105P/0805
LOUTL
X_105P/0805
R414
1 2
X_47K
R403
1 2
X_47K
R439 0
R398 0
SPEAKER OUT CIRCUIT
1 2
CMI8738 SPDIF AUTO DETECT
+
C230 220UF/10V
+
C229 220UF/10V
AUXRX13
1 2
0
1 2
0
R428
FB28
FB30
X_0
12
12
SPEAKER_R
C226
102P
SPDIFO 13
R424
X_0
SPEAKER_L
C227
102P
SPEAKER_R 14
SPEAKER_L 14
FOR MSI INTERNAL HEADER
R271 10K
+5VR
1 2
MIC_IN
R253
X_2.2K
C181 472P
R476
47K
L6 X_0/0805
CP23
R342
1 2
2.7K
CB95 102P
1 2 3 4 5 6 7 8
J8-1
4-JACK
9 10 11 12 13 14 15
MIC_IN
CB113 104P
C186
CMIMIC_IN13
POLY SWITCH
1.1A-P
VCC5
JYS_PB012 JYS_AX012
JYS_AX112 JYS_PB112
JYS_AX0
JYS_AX1 JYS_PB1
FS3
CB105 104P
R156 2.2K
R154 2.2K
1 2
105P/0805
CB99 102P
CP4
X_COPPER
L3 X_0/0805
12
X_COPPER
AUXLX AUXL
AUXLX13
11/21 modify
C221
1 2
105P/0805
R420
102P
123
4
JAUDIO1
MONDEN HEADER
GAME/MIDI CONNECTOR
R141 2.2K R196 2.2K R139 2.2K
R155 2.2K
C136 100P
AUXR
C103 100P
CP19
X_COPPER
JYS_PB3 JYS_AX2 MID_OUT JYS_AX3 JYS_PB2 MID_IN
C220
AUXRX
1 2
105P/0805
R430
102P
JYS_PB3 12 JYS_AX2 12 MID_OUT 12 JYS_AX3 12 JYS_PB2 12 MID_IN 12
AUXRX 13
JYS_AX0 JYS_AX1 JYS_AX2 JYS_AX3
JYS_PB1JYS_PB0 JYS_PB2 JYS_PB3 JYS_PB0
MID_IN MID_OUT
RN13
7 8 5 6 3 4 1 2
8P4R-1M
RN14
VCC5
8P4R-2.2K
1 2 3 4 5 6 7 8
R159 22K R205 22K
Title
Micro-Star
Document Number
Last Revision Date:
Friday, January 04, 2002
JYS_AX3 JYS_AX2 JYS_AX1 JYS_AX0
JYS_PB1 JYS_PB2 JYS_PB3 JYS_PB0
CN14
7 5 3 1
8P4C-103P
CN15
7 5 3 1
8P4C-562P
8 6 4 2
8 6 4 2
MS-6513
Audio Amp TL072 & GAME
Sheet of
15 35
Rev
100
5
4
3
2
1
VCC_DIMM
15223054627796
DDRMAA0
DCLK49,17
DCLK#49,17
DCLK39,17
DCLK#39,17
DCLK59,17
DCLK#59,17
VCC3
VCC3
+
DDRMAA1 DDRMAA2 DDRMAA3 DDRMAA4 DDRMAA5 DDRMAA6 DDRMAA7 DDRMAA8 DDRMAA9 DDRMAA10 DDRMAA11 DDRMAA12
DDRBS0 DDRBS1
DDRCS#2
DDRCS#3
DDRWEA# DDRCASA# DDRRASA#
DDRCKE2 DDRCKE3
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
SMBDATA SMBCLK
DIMMREF
CT28 1000U/6.3V-TEAPO CB79 104P CB83 104P CB56 100P CB65 105P CB74 105P CB43 100P
D D
C C
B B
VCC_DIMM VCC_DIMM
A A
48
VDDQ
A0
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
103
A13
59
BA0
52
BA1
113
BA2
157
CS0
158
CS1
71
NC/CS2
163
NC/CS3
97
DQM0
107
DQM1
119
DQM2
129
DQM3
149
DQM4
159
DQM5
169
DQM6
177
DQM7
140
DQM8
63
WE
65
CAS
154
RAS
21
CKE0
111
CKE1
16
CK0/DNU
17
CK0/DNU
137
CK1
138
CK1
76
CK2/DNU
75
CK2/DNU
5
DQS0
14
DQS1
25
DQS2
36
DQS3
56
DQS4
67
DQS5
78
DQS6
86
DQS7
47
DQS8
91
SDA
92
SCL
181
SA0
182
SA1
183
SA2
1
VREF
82
VDDID
184
VDDSPD
9
NC
10
NC
101
NC
102
NC
173
NC
167
NC/FETEN
CB109 X_104P CB80 104P CB31 X_105P CB112 105P CB57 X_100P CB75 X_100P
5
104
112
128
136
143
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
3111826344250586674818993
156
VDDQ
GND
164
VDDQ
GND
172
VDDQ
GND
VDDQ
GND
180738467085108
VDD
VDD
VDD
VDDQ
GND
GND
GND
GND
GND
100
116
124
132
139
DECOUPLING CAPACITORS
120
VDD
VDD
VDD
GND
GND
GND
145
152
160
VCC_DIMM
VCC3
DIMM2
148
168
VDD
VDD
VDD
D0 D1 D2 D3 D4 D5 D6 D7 D8
D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
WP
GND
GND
176
DIMM184
Address = A2
4
DDRMD0
2
DDRMD1
4
DDRMD2
6
DDRMD3
8
DDRMD4
94
DDRMD5
95
DDRMD6
98
DDRMD7
99
DDRMD8
12
DDRMD9
13
DDRMD10
19
DDRMD11
20
DDRMD12
105
DDRMD13
106
DDRMD14
109
DDRMD15
110
DDRMD16
23
DDRMD17
24
DDRMD18
28
DDRMD19
31
DDRMD20
114
DDRMD21
117
DDRMD22
121
DDRMD23
123
DDRMD24
33
DDRMD25
35
DDRMD26
39
DDRMD27
40
DDRMD28
126
DDRMD29
127
DDRMD30
131
DDRMD31
133
DDRMD32
53
DDRMD33
55
DDRMD34
57
DDRMD35
60
DDRMD36
146
DDRMD37
147
DDRMD38
150
DDRMD39
151
DDRMD40
61
DDRMD41
64
DDRMD42
68
DDRMD43
69
DDRMD44
153
DDRMD45
155
DDRMD46
161
DDRMD47
162
DDRMD48
72
DDRMD49
73
DDRMD50
79
DDRMD51
80
DDRMD52
165
DDRMD53
166
DDRMD54
170
DDRMD55
171
DDRMD56
83
DDRMD57
84
DDRMD58
87
DDRMD59
88
DDRMD60
174
DDRMD61
175
DDRMD62
178
DDRMD63
179
DDRCB0
44
DDRCB1
45
DDRCB2
49
DDRCB3
51
DDRCB4
134
DDRCB5
135
DDRCB6
142
DDRCB7
144
WP
90
C34 X_104P
CB82 X_104P
CB200 104P
104P
C67 CB40
104P
C165 104P CB199 104P
DDRMD[0..63] 17,18
DDRCB[0..7] 17,18
R741 X_4.7K
VCC3
VCC5
VCC5
VCC_DIMM
VCC_DIMM
R742
150
R743
150
3
DDRCKE[0..3]9,18
C240
104P
DDRMAA[0..12]17,18
DDRBS017,18 DDRBS117,18
DDRCS#[0..3]17,18
DDRWEA#17,18 DDRCASA#17,18 DDRRASA#17,18
DQS[0..8]17,18
SMBDATA5,11,12,24
SMBCLK5,11,12,24
DIMMREF
C241
104P
place near DIMM1
DCLK19,17
DCLK#19,17
DCLK09,17
DCLK#09,17
DCLK29,17
DCLK#29,17
VCC3
DDRCKE0 DDRCKE1
DIMMREF
DIMMREF
VCC_DIMM
DDRMAA0 DDRMAA1 DDRMAA2 DDRMAA3 DDRMAA4 DDRMAA5 DDRMAA6 DDRMAA7 DDRMAA8 DDRMAA9 DDRMAA10 DDRMAA11 DDRMAA12
DDRBS0 DDRBS1
DDRCS#0 DDRCS#1
DDRWEA# DDRCASA# DDRRASA#
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
SMBDATA SMBCLK
130
125
122
141 118 115 103
113
157 158
163
107 119 129 149 159 169 177 140
154
111
137 138
181 182 183
184
101 102 173 167
48 43 41
37 32
29
27
59 52
71
97
63 65
21
16 17
76 75
5 14 25 36 56 67 78 86 47
91 92
1 82
9 10
15223054627796
VDDQ
VDDQ
VDDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13
BA0 BA1 BA2
CS0 CS1 NC/CS2 NC/CS3
DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 DQM8
WE CAS RAS
CKE0 CKE1
CK0/DNU CK0/DNU CK1 CK1 CK2/DNU CK2/DNU
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
SDA SCL
SA0 SA1 SA2
VREF VDDID VDDSPD
NC NC NC NC NC NC/FETEN
3111826344250586674818993
2
VDDQ
GND
VDDQ
VDDQ
GND
GND
104
112
128
136
143
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
Micro-Star
Document Number
Last Revision Date:
Friday, January 04, 2002
156
164
172
180738467085108
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
100
116
124
132
139
145
152
11/21 modify
Title
DIMM1
120
148
168
VDD
VDD
VDD
VDD
2
D0
4
D1
6
D2
8
D3
94
D4
95
D5
98
D6
99
D7
12
D8
13
D9
19
D10
20
D11
105
D12
106
D13
109
D14
110
D15
23
D16
24
D17
28
D18
31
D19
114
D20
117
D21
121
D22
123
D23
33
D24
35
D25
39
D26
40
D27
126
D28
127
D29
131
D30
133
D31
53
D32
55
D33
57
D34
60
D35
146
D36
147
D37
150
D38
151
D39
61
D40
64
D41
68
D42
69
D43
153
D44
155
D45
161
D46
162
D47
72
D48
73
D49
79
D50
80
D51
165
D52
166
D53
170
D54
171
D55
83
D56
84
D57
87
D58
88
D59
174
D60
175
D61
178
D62
179
D63
44
CB0
45
CB1
49
CB2
51
CB3
134
CB4
135
CB5
142
CB6
144
CB7
90
WP
GND
GND
GND
160
176
DIMM184
Address = A0
MS-6513
DDR DIMM 1 & 2
DDRMD0 DDRMD1 DDRMD2 DDRMD3 DDRMD4 DDRMD5 DDRMD6 DDRMD7 DDRMD8 DDRMD9 DDRMD10 DDRMD11 DDRMD12 DDRMD13 DDRMD14 DDRMD15 DDRMD16 DDRMD17 DDRMD18 DDRMD19 DDRMD20 DDRMD21 DDRMD22 DDRMD23 DDRMD24 DDRMD25 DDRMD26 DDRMD27 DDRMD28 DDRMD29 DDRMD30 DDRMD31 DDRMD32 DDRMD33 DDRMD34 DDRMD35 DDRMD36 DDRMD37 DDRMD38 DDRMD39 DDRMD40 DDRMD41 DDRMD42 DDRMD43 DDRMD44 DDRMD45 DDRMD46 DDRMD47 DDRMD48 DDRMD49 DDRMD50 DDRMD51 DDRMD52 DDRMD53 DDRMD54 DDRMD55 DDRMD56 DDRMD57 DDRMD58 DDRMD59 DDRMD60 DDRMD61 DDRMD62 DDRMD63
DDRCB0 DDRCB1 DDRCB2 DDRCB3 DDRCB4 DDRCB5 DDRCB6 DDRCB7
WP
Sheet of
16 35
1
Rev
100
5
DDR DAMPING
4
3
2
1
DDRMD0
D D
C C
B B
A A
DDRMD4 DDRMD5 DDRMD1 DDRMD6 DDRMD3 DDRMD2 DDRMD7 DDRMD8 DDRMD9 DDRMD12 DDRMD13 DDRMD14 DDRMD15 DDRMD10 DDRMD11 DDRMD20 DDRMD16 DDRMD17 DDRMD21 DDRMD18 DDRMD22 DDRMD19 DDRMD23 DDRMD24 DDRMD28 DDRMD25 DDRMD29 DDRMD26 DDRMD30 DDRMD27 DDRMD31 DDRMD36
DDRMD37 DDRMD33 DDRMD34 DDRMD38 DDRMD39 DDRMD35 DDRMD44 DDRMD40 DDRMD45 DDRMD41 DDRMD42 DDRMD46 DDRMD43 DDRMD47 DDRMD54 DDRMD50 DDRMD55 DDRMD51 DDRMD48 DDRMD49 DDRMD52 DDRMD53 DDRMD62 DDRMD58 DDRMD63 DDRMD59 DDRMD60 DDRMD61 DDRMD56 DDRMD57
DDRMD32 MD32
DDRMAA[0..12]
DDRMD[0..63]
DDR DIMM
DDRMAA0 DDRMAA1 DDRMAA2 DDRMAA3
DDRMAA4 DDRMAA5 DDRMAA6 DDRMAA7
DDRMAA8 DDRMAA9 DDRMAA10 DDRMAA11
DDRMAA12
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
R820 10
DDRMD[0..63] 16,18
R753 X_0 R754 X_0 R755 X_0 R757 X_0
R759 X_0 R761 X_0 R762 X_0 R764 X_0
R766 X_0 R767 X_0 R768 X_0 R769 X_0
R770 X_0
DDRMAA[0..12] 16,18
5
MD0 MD4 MD5 MD1 MD6 MD3 MD2 MD7 MD8 MD9 MD12 MD13 MD14 MD15 MD10 MD11 MD20 MD16 MD17 MD21 MD18 MD22 MD19 MD23 MD24 MD28 MD25 MD29 MD26 MD30 MD27 MD31 MD36
MD37 MD33 MD34 MD38 MD39 MD35 MD44 MD40 MD45 MD41 MD42 MD46 MD43 MD47 MD54 MD50 MD55 MD51 MD48 MD49 MD52 MD53 MD62 MD58 MD63 MD59 MD60 MD61 MD56 MD57
DDRMA0 DDRMA1 DDRMA2 DDRMA3
DDRMA4 DDRMA5 DDRMA6 DDRMA7
DDRMA8 DDRMA9 DDRMA10 DDRMA11
DDRMA12
RN38
8P4R-10
RN40
8P4R-10
RN41
8P4R-10
RN42
8P4R-10
RN43
8P4R-10
RN45
8P4R-10
RN47
8P4R-10
RN48
8P4R-10
RN49
8P4R-10
RN50
8P4R-10
RN51
8P4R-10
RN52
8P4R-10
RN53
8P4R-10
RN54
8P4R-10
RN55
8P4R-10
RN56
8P4R-10
MD[0..63]
DDRMA[0..12]
CHIPSET
MD[0..63] 9
DDRMA[0..12] 9
DDRCS#0 DDRCS#2 DDRCS#1 DDRCS#3
DDRCS#[0..3]
DDR DIMM
DDRCB2 DDRCB6 DDRCB3 DDRCB7 DDRCB4 DDRCB5 DDRCB0 DDRCB1 CB1
DDRWEA#16,18
DDRCASA#16,18
DDRRASA#16,18
DDRBS016,18
DDRBS116,18
4
1 2 3 4 5 6 7 8
RN39 8P4R-0
DDRCS#[0..3] 16,18
RN44
8P4R-33
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
RN46
DDRCB[0..7]
DDR DIMM
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
DQS[0..8]
DDR DIMM
DDRWEA#
DDRCASA#
DDRRASA#
DDRBS0
DDRBS1
DDR DIMM CHIPSET
8P4R-33
R744 33 R745 33 R746 33 R747 33 R748 33 R749 33 R750 33 R751 33 R752 33
R756 0
R758 0
R760 0
R763 X_0
R765 X_0
DQS[0..8] 16,18
CS#0 CS#2 CS#1 CS#3
CB2 CB6 CB3 CB7 CB4 CB5 CB0
DDRCB[0..7] 16,18
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7 SDQS8
WEA#
CASA#
RASA#
BS0
BS1
CS#[0..3]
CHIPSET
CHIPSET
SDQS[0..8]
CS#[0..3] 9
CHIPSET
CB[0..7]
CB[0..7] 9
SDQS[0..8] 9
WEA# 9
CASA# 9
RASA# 9
BS0 9
BS1 9
Short by trace,resistors TBD
3
C254
X_10P C256
X_10P C258
X_10P C260
X_10P C262
X_10P C264
X_10P
DCLK0
DCLK1
DCLK2
DCLK3
DCLK4
DCLK5
VCC_DIMM
C242 X_104P
C244 X_104P
C246 104P
CLOSE TO DIMM
DCLK0 9,16
DCLK1 9,16
DCLK2 9,16 DCLK#2 9,16
DCLK3 9,16
DCLK4 9,16
DCLK5 9,16
C255
X_10P C257
X_10P C259
X_10P C261
X_10P C263
X_10P C265
X_10P
DCLK#0
DCLK#1
DCLK#2
DCLK#3
DCLK#4
DCLK#5
solderside
DCLK#0 9,16
DCLK#1 9,16
DCLK#3 9,16
DCLK#4 9,16
DCLK#5 9,16
11/21 modify
Title
Micro-Star
Document Number
Last Revision Date:
2
Friday, January 04, 2002
MS-6513
DDR DAMPING
Sheet of
1
Rev
100
17 35
DDR TERMINATION
5
4
3
2
1
DDR_VTT
DDRMD3 DDRMD7 DDRMD2 DDRMD6
D D
DDRMD1 DDRMD5 DDRMD4 DDRMD0 DDRMD13 DDRMD12 DDRMD9 DDRMD8 DDRMD11 DDRMD10 DDRMD15 DDRMD14 DDRMD21 DDRMD17 DDRMD16 DDRMD20 DDRMD23 DDRMD19 DDRMD22 DDRMD18 DDRMD29 DDRMD25 DDRMD28 DDRMD24 DDRMD31 DDRMD27 DDRMD30 DDRMD26 DDRMD35
C C
DDRMD39 DDRMD38 DDRMD34 DDRMD33 DDRMD37 DDRMD36 DDRMD32 DDRMD41 DDRMD45 DDRMD40 DDRMD44 DDRMD47 DDRMD43 DDRMD46 DDRMD42 DDRMD53 DDRMD49 DDRMD48 DDRMD52 DDRMD51 DDRMD55 DDRMD50 DDRMD54 DDRMD57 DDRMD56 DDRMD61 DDRMD60 DDRMD59
B B
DDRMD63 DDRMD58 DDRMD62
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
RN57 8P4R-68
RN58 8P4R-68
RN60 8P4R-68
RN61 8P4R-68
RN62 8P4R-68
RN63 8P4R-68
RN64 8P4R-68
RN65 8P4R-68
RN66 8P4R-68
RN68 8P4R-68
RN70 8P4R-68
RN71 8P4R-68
RN72 8P4R-68
RN74 8P4R-68
RN75 8P4R-68
RN76 8P4R-68
DDRBS016,17
DDRBS116,17
DQS[0..8]
16,17
DDRWEA#16,17
DDRCASA#16,17
DDRRASA#16,17
DDRCS#3 DDRCS#1 DDRCS#2 DDRCS#0
DDRCS#[0..3]
DDRCB7 DDRCB3 DDRCB6 DDRCB2
DDRCB1 DDRCB0 DDRCB5 DDRCB4
DDRCB[0..7]
DDRCKE0 DDRCKE2 DDRCKE1 DDRCKE3
DDRCKE[0..3]
DDRBS0
DDRBS1
DQS5 DQS4 DQS8 DQS3 DQS2 DQS1 DQS0 DQS7 DQS6
DDRWEA#
DDRCASA#
DDRRASA#
R771 56
R772 56
R814 47 R817 47 R773 47 R775 47 R776 47 R777 47 R778 47 R780 47 R781 47
RN80 8P4R-47
1 2 3 4 5 6 7 8
DDRCS#[0..3] 16,17
RN67 8P4R-47
1 2 3 4 5 6 7 8
RN69 8P4R-47
1 2 3 4 5 6 7 8
DDRCB[0..7] 16,17
RN73 8P4R-47
1 2 3 4 5 6 7 8
DDRCKE[0..3] 9,16
R788 68
R789 68
R790 68
DDR_VTT
DDR_VTT
C271 106P/1206
C275 104P
C279 104P
C287 104P
C291 104P
C295 104P
C299 104P
C303 104P
C307 X_104P
C311 104P
DDR_VTT DDR_VTT DDR_VTT DDR_VTT
C272 X_106P/1206
C276 X_104P
C280 X_104P
C284 X_104P
C288 104P
C292 104P
C296 104P
C300 X_104P
C304 104P
C308 104P
C312 104P
C273 106P/1206
C281 104P
C285 104P
C289 104P
C293 X_104P
C297 104P
C301 104P
C305 X_104P
C309 104P
C313 X_104P
C274 X_106P/1206
C278 104P
C282 104P
C286 X_104P
C290 104P
C294 104P
C298 104P
C302 104P
C306 104P
C310 X_104P
C314 104P
C316 106P/1206
C317 104P
C318 104P
C319 104P
C320 104P
C321 104P
C322 X_104P
C324 104P
C325 X_104P
C326 104P
DDRMD[0..63]
DDRMAA12
DDRMAA0 DDRMAA10 DDRMAA1 DDRMAA2
DDRMAA3 DDRMAA4 DDRMAA5 DDRMAA6
A A
DDRMAA7 DDRMAA8 DDRMAA9 DDRMAA11
DDRMAA[0..12]
DDRMD[0..63] 16,17
R791 56
R792 56 R793 56 R794 56 R795 56
R796 56 R797 56 R798 56 R799 56
1 2 3 4 5 6 7 8
DDRMAA[0..12] 16,17
5
DDR_VTT
RN79 8P4R-56
11/21 modify
Title
Micro-Star
Document Number
Last Revision Date:
4
3
2
Friday, January 04, 2002
MS-6513
DDR TERMINATION
Sheet of
1
Rev
100
18 35
FWH INIT Signal Voltage Translation Block
PCIRST#18,12,13,24,27
SD_DET5 PD_DET5
R421 X_4.7K
VCC3
GP2311
J7
X_YJ102
LAD0/FWH011,12 LAD1/FWH111,12 LAD2/FWH211,12
J7 BIOS Update
SHORT Locked
OPEN
Unlocked
F_GPI3 F_GPI2 SD_DET PD_DET
1 2
*
VCC3
Firware Hub (FWH)
U23
1
VPP
2
RST#
3
FGPI3
4
FGPI2
5
FGPI1
6
FGPI0
7
WP#
8
TBL#
9
ID3
10
ID2
11
ID1
12
ID0
13
FWH0
14
FWH1
15
FWH2
16 17
GND FWH3
YSKT032PLCC
VCC
CLK
FGPI4
IC(VIL)
GNDA
VCCA
GND
VCC
INIT#
FWH4
RFU RFU RFU RFU RFU
VCCP
VCC3
R362
4.7K
R466 X_1K R467 X_1K R415 10K R416 10K
R434 10K R436 10K
R361 1K
FINIT#
VCC3
VCC3
R465 X_8.2K
32 31
R363 8.2K
30
R364 8.2K
29 28 27 26 25 24 23 22 21 20 19 18
FINIT#
VCC3
R861 0
LFRAME#/FWH4 11,12
LAD3/FWH3 11,12
FWH_PCLK 5
HINIT#6,10
Q41
2N3904S
FWH RESISTORS
F_GPI3 F_GPI2
PD_DET SD_DET
11/21 modify
FWH DECOUPLING CAPACITORS
VCC3
CB190 104P
CB191 104P
CB201 X-104P
CB203 104P
Micro-Star
Title
Document Number
Last Revision Date:
Friday, January 04, 2002
MS-6513
FWH
Sheet of
19 35
Rev
100
8
7
6
5
4
3
2
1
AGP SIGNAL REFERENCE CIRCUIT
AGP UNIVERSAL 2X/4X SLOT(AGP VER:2.0 COMPLY)
D D
INTB#10,21
AGPCLK5
GREQ#9 GGNT# 9
C C
B B
A A
SB_STB9
GAD319 GAD299
GAD279 GAD259
GAD_STB19
GAD239
GAD219 GAD199
GAD179
GC_BE#29
GIRDY#9
GDEVSEL#9
GC_BE#19
GAD149 GAD129
GAD109
GAD_STB09
AGPREF9
ST29
RBF#9
SBA09
SBA29
SBA49 SBA69
GAD89
GAD79
GAD59 GAD39
GAD19
GREQ#
RBF#
SB_STB
GAD_STB1
GIRDY#
GDEVSEL#
GPERR#
GSERR#
GAD_STB0
AGPREF
VREF_GC:form the chipset to the graphics controller
VCC5 = 60mils trace / 15 mils space
AGP1
B1
-OVRCNT
VCC5
VCC3
VCC3_SB
VCC_AGP
B2 B3 B4 B5 B6 B7 B8
B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66
5V 5V USB+ GND
-INTB CLK
-REQ
3.3V ST0 ST2
-RBF GND RESERVED SBA0
3.3V SBA2 SB_STB GND SBA4 SBA6 RSVD/KEY GND/KEY AUX3V/KEY
3.3V/KEY AD31 AD29
3.3V AD27 AD25 GND AD_STB1 AD23 VDDQ AD21 AD19 GND AD17 C/-BE2 VDDQ
-IRDY AUX3V/KEY GND/KEY RSVD/KEY
3.3V/KEY
-DEVSEL VDDQ
-PERR GND
-SERR C/-BE1 VDDQ AD14 AD12 GND AD10 AD8 VDDQ AD_STB0 AD7 GND AD5 AD3 VDDQ AD1 VREF_CG
AIMM132AGP
AGP Slot Imax
VCC_AGP 8.0A VCC3 6.0A VCC12 1.0A VCC5 2.0A
-TYPEDET
RESERVED
USB-
GND
-INTA
-RST
-GNT
3.3V ST1
RESERVED
-PIPE GND
-WBF SBA1
3.3V
SBA3
-SB_STB GND
SBA5 SBA7
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
AD30 AD28
3.3V AD26 AD24
GND
-AD_STB1 C/-BE3
VDDQ
AD22 AD20
GND AD18 AD16
VDDQ
-FRAME
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-TRDY
-STOP
-PME
GND
PAR AD15
VDDQ
AD13 AD11
GND
AD9
C/-BE0
VDDQ
-AD_STB0 AD6
GND
AD4 AD2
VDDQ
AD0
VREF_GC
A1
12V
+12V
A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66
GGNT#
VCC3
PIPE#
WBF#
SB_STB#
GAD_STB#1
VCC_AGP
GFRAME#
GTRDY# GSTOP#
GPAR
GAD_STB#0
VREF_GC
VREF_GC:form the graphics controller to the chipset
INTA# 10,21 PCIRST#2 21,24
ST1 9ST09
PIPE# 9
WBF# 9 SBA1 9
SBA3 9 SB_STB# 9
SBA5 9 SBA7 9
GAD30 9 GAD28 9
GAD26 9 GAD24 9
GAD_STB#1 9 GC_BE#3 9
GAD22 9 GAD20 9
GAD18 9 GAD16 9
GFRAME# 9
GTRDY# 9 GSTOP# 9 PME# 10,21,27
GPAR 9 GAD15 9
GAD13 9 GAD11 9
GAD9 9 GC_BE#0 9
GAD_STB#0 9 GAD6 9
GAD4 9 GAD2 9
GAD0 9
VCC_AGP
+
C116 X_470p
R183 X_82
R182 X_82
C110 X_470p
GIRDY# GFRAME# GTRDY# GDEVSEL#
GSTOP# GPERR# GPAR GSERR# GREQ#
R199 6.8K
GGNT#
ST1 ST2 ST0
CT30 X_1000U/6.3V-TEAPO CB139 X_104P CB131 X_103P CB135 X_104P
R198 6.8K
X_8P4R-6.8K
RN15
8 6 4 2
RN168P4R-6.8K
8 6 4 2
R184 6.8K R194 6.8K R193 2K
INTA# INTB#
8
7
6
5
4
VCC_AGP
R201 1KST
R181 1KST
C111 X_105P
AGPREF: 10uA
AGPREF
CB122 104P
NEAR AGP SLOT
AGP TERMINATION RESISTORS
7 5 3 1
7 5 3 1
VCC_AGP
LESS 10MILS STUB TRACE LENGTH MUST BE FOLLOWING.
Place these resistors between PCI and AGP slot
PIPE# RBF# WBF#
GAD_STB0 GAD_STB1 SB_STB
GAD_STB#1 GAD_STB#0 SB_STB#
AGP SLOT DECOUPLING CAPACITORS
+12V
CB130 100P CB125 104P CB136 104P CB127 104P CB138 105P
CB132 104P
CB137 104P
Micro-Star
Document Number
Last Revision Date:
3
Friday, January 04, 2002
X_104PC115
C114 X_105P
R180 X_6.8K R179 X_6.8K R185 X_6.8K
R213 X_6.8K R192 X_6.8K R204 X_6.8K
R195 X_6.8K R212 X_6.8K R200 X_6.8K
VCC5VCC3_SB
+
2
Title
CT39 X_470U/16V CB207 104P CB196 100P
MS-6513
AGP Slot
VREF_GC
VCC_AGP
VCC_AGP
VCC3VCC_AGP
+
+
Sheet of
CT31 1000U/6.3V-TEAPO CB128 104P CB123 104P CB124 104P CB129 104P CB1 100P CT33 X_1000U/6.3V-TEAPO
Rev
100
20 35
1
8
7
6
5
4
3
2
1
PCI SLOT 1 (PCI VER: 2.2 COMPLY) PCI SLOT 2 (PCI VER: 2.2 COMPLY)
VCC3
-12V
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
PCI2
-12V TCK GND TDO +5V +5V INTB# INTD# PRSNT#1 RESERVED PRSNT#2 GND GND RESERVED GND CLK GND REQ# +5V(I/O) AD31 AD29 GND AD27 AD25 +3.3V C/BE#3 AD23 GND AD21 AD19 +3.3V AD17 C/BE#2 GND IRDY# +3.3V DEVSEL# GND LOCK# PERR# +3.3V SERR# +3.3V C/BE#1 AD14 GND AD12 AD10 GND
AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V(I/O) ACK64# +5V +5V
PCISLOT
TRST#
+12V
TMS
INTA# INTC#
RESERVED
+5V(I/O)
RESERVED
GND GND
RESERVED
RST#
+5V(I/O)
GNT#
GND
RESERVED
AD30
+3.3V
AD28 AD26
GND
AD24
IDSEL
+3.3 AD22 AD20
GND AD18 AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13 AD11
GND
C/BE#0
+3.3V
GND
+5V(I/O) REQ64#
+5V
+5V
AD9
AD6 AD4
AD2 AD0
+5V +5V
+12V
VCC3
VCC5
PTRST#
PTMS PTDI
INTB# INTD#
PCIRST#2
PME# AD30
AD28 AD26
AD24
AD22 AD20
AD18 AD16
FRAME#
TRDY#
STOP#
PAR AD15
AD13 AD11
AD9
C_BE#0
AD6 AD4
AD2 AD0
REQ#64
PREQ#5
VCC3_SB
PGNT#1 10
AD17 AD18
A1 A2 A3 A4
TDI
A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
-12V
PCI1
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
-12V TCK GND TDO +5V +5V INTB# INTD# PRSNT#1 RESERVED PRSNT#2 GND GND RESERVED GND CLK GND REQ# +5V(I/O) AD31 AD29 GND AD27 AD25 +3.3V C/BE#3 AD23 GND AD21 AD19 +3.3V AD17 C/BE#2 GND IRDY# +3.3V DEVSEL# GND LOCK# PERR# +3.3V SERR# +3.3V C/BE#1 AD14 GND AD12 AD10 GND
AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V(I/O) ACK64# +5V +5V
PCISLOT
PTCK
D D
C C
B B
VCC5 VCC5
INTB#10,20
INTD#10
VCC3
PCICLK05
PREQ#010
AD3110,13,27 AD2910,13,27
AD2710,13,27 AD2510,13,27
C_BE#310,13,27
AD2310,13,27
AD2110,13,27 AD1910,13,27
AD1710,13,27
C_BE#210,13,27
IRDY#10,13,27
DEVSEL#10,13,27
PLOCK#10
PERR#10,27
SERR#10,27
C_BE#110,13,27
AD1410,13,27
AD1210,13,27 AD1010,13,27
AD810,13,27 AD710,13,27
AD510,13,27 AD310,13,27
AD110,13,27
ACK#64
TRST#
INTA# INTC#
RESERVED
+5V(I/O)
RESERVED
RESERVED
+5V(I/O)
RESERVED
IDSEL
FRAME#
TRDY#
STOP#
SDONE
C/BE#0
+5V(I/O) REQ64#
+12V
TMS
+5V
+5V
GND GND
RST#
GNT#
GND
AD30
+3.3V
AD28 AD26
GND
AD24
+3.3 AD22 AD20
GND AD18 AD16
+3.3V
GND
GND
+3.3V
SBO#
GND
PAR
AD15
+3.3V
AD13 AD11
GND
AD9
+3.3V
AD6 AD4
GND
AD2 AD0
+5V +5V
+12V
PTRST#
A1 A2
PTMS
A3
PTDI
A4
TDI
A5
VCC5
A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
INTA# 10,20 INTC# 10,27
VCC3
VCC3_SB
PCIRST#2 20,24
PGNT#0 10
PME# 10,20,27 AD30 10,13,27
AD28 10,13,27 AD26 10,13,27
AD24 10,13,27
R267 100
AD22 10,13,27 AD20 10,13,27
AD18 10,13,27 AD16 10,13,27
FRAME# 10,13,27
TRDY# 10,13,27
STOP# 10,13,27
PAR 10,13,27 AD15 10,13,27
AD13 10,13,27 AD11 10,13,27
AD9 10,13,27
C_BE#0 10,13,27
AD6 10,13,27 AD4 10,13,27
AD2 10,13,27 AD0 10,13,27
REQ#64
AD16
PTCK
INTC# INTA#
PCICLK15
PREQ#110
AD31 AD29
AD27 AD25
C_BE#3 AD23
AD21 AD19
AD17 C_BE#2
IRDY#
DEVSEL#
PLOCK# PERR#
SERR#
C_BE#1 AD14
AD12 AD10
AD8 AD7
AD5 AD3
AD1
ACK#64
PCI SLOT 3 (PCI VER: 2.2 COMPLY)
-12V
PCI3
B1
PTCK
INTD# INTB#
R399 0
PCICLK55
PCICLK25
PREQ#210
AD31 AD29
AD27 AD25
C_BE#3 AD23
AD21 AD19
AD17 C_BE#2
IRDY#
DEVSEL#
PLOCK# PERR#
SERR#
C_BE#1 AD14
AD12 AD10
AD8 AD7
AD5 AD3
AD1
ACK#64
VCC5
VCC3
B2 B3 B4 B5 B6 B7 B8
B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
-12V TCK GND TDO +5V +5V INTB# INTD# PRSNT#1 RESERVED PRSNT#2 GND GND RESERVED GND CLK GND REQ# +5V(I/O) AD31 AD29 GND AD27 AD25 +3.3V C/BE#3 AD23 GND AD21 AD19 +3.3V AD17 C/BE#2 GND IRDY# +3.3V DEVSEL# GND LOCK# PERR# +3.3V SERR# +3.3V C/BE#1 AD14 GND AD12 AD10 GND
AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V(I/O) ACK64# +5V +5V
PCISLOT-B
TRST#
+12V TMS
+5V INTA# INTC#
+5V
RESERVED
+5V(I/O)
RESERVED
GND GND
RESERVED
RST#
+5V(I/O)
GNT#
GND
RESERVED
AD30
+3.3V
AD28 AD26
GND
AD24
IDSEL
+3.3
AD22 AD20
GND AD18 AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR AD15
+3.3V
AD13 AD11
GND
AD9
C/BE#0
+3.3V
AD6 AD4
GND
AD2
AD0 +5V(I/O) REQ64#
+5V
+5V
+12V
VCC5
R292 0
R268 0
VCC3
R347 100
PTRST#
PTMS PTDI
PCIRST#2
PME# AD30
AD28 AD26
AD24
R373 100R346 100
AD22 AD20
AD18 AD16
FRAME#
TRDY#
STOP#
PAR AD15
AD13 AD11
AD9
C_BE#0
AD6 AD4
AD2 AD0
REQ#64
INTC# INTA#
INTG#
PGNT#5
VCC3_SB
PGNT#2 10
AD19
A1 A2 A3 A4
TDI
A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
IDSEL = AD16 IDSEL = AD17
IDSEL = AD18 MASTER = PREQ2MASTER = PREQ1MASTER = PREQ0
INTA# INTB# INTC#
RN20 8P4R-2.7K
FRAME#
PREQ#0 PREQ#2 PREQ#1 PREQ#3 PREQ#5 PREQ#4
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
RN22
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9
9510
10P8R-2.7K
RN21 8P4R-2.7K
IRDY# TRDY# DEVSEL#
STOP# PLOCK# PERR# SERR#
5
10
VCC5
7
VCC5
A A
PREQ#310,13 PREQ#510 PREQ#410,27
8
PCI PULL-UP / DOWN RESISTORS
1 2 3 4 6 7 8 9
R343 4.7K R344 4.7K
R265 4.7K R266 4.7K
R264 4.7K R352 4.7K
6
RN19
5
1 2 3 4 6 7 8
10
9510
X_10P8R-2.7K
VCC5
PGNT#2 PGNT#1 PGNT#3
PGNT#310,13
PGNT#0 PGNT#4
PGNT#410,27
PGNT#5
PGNT#510
REQ#64 ACK#64
PTMS PTDI
PTCK PTRST#
RN18
INTA# INTD# INTC# INTB#
INTF#
INTF#11,27
INTE#
INTE#11,13
INTG#
INTG#11
INTH#
INTH#11
5
8P4R-8.2K
1 2 3 4 5 6 7 8
RN23
8P4R-8.2K
1 2 3 4 5 6 7 8
VCC3VCC3
VCC3
4
VCC5
+
CT37 470U/16V CB188 104P CB162 104P CB187 100P CB173 100P
PCI SLOT DECOUPLING CAPACITORS
VCC3
+
CT38 1000U/6.3V-TEAPO CB198 104P CB197 104P CB174 104P CB175 100P CB176 100P
-12V
CB189
104P
+12V VCC3_SB
Title
Micro-Star
Document Number
Last Revision Date:
3
Friday, January 04, 2002
2
CB172 104P
MS-6513
PCI Slot 1 & 2 & 3
Sheet of
C182
104P
Rev
100
21 35
1
5
4
3
2
1
3.3V
3.3V
GND
GND
GND
POK
5VSB
12V
5V
5V
X_102P
1
2
3
4
5
6
7
8
9
10
C38
X_ELS47U/16V-C
+
CT16
CB59 104P
CB30 X_33P
CB70 X_33P
CB15 104P
CB10 39P
+
CB28 104P
X_ELS10U/16V-B
VCC3
CB67 105P/0805
VCC5
CB23 33P
CT6
CB16 X_39P
VCC5_SB
+12V
VCC5
R368
4.7K
ATX CONNECTOR
PWR_OK 24
YPC20
11
CB26 33P
12
13
14
15
16
17
18
19
20
3.3V
-12V
GND
PSON
GND
GND
GND
-5V
5V
5V
POWER
VCC3
CB66
104P
CB68 33P
-12V
CB64
104P
CB62 X_33P
11/21 modify 11/21 modify
D D
PSON#12
EMI
C390 X_102P
-5V
C251 X_102P
VCC3_SB
VCC5_SB
R74 4.7K
C54
X_102P
VCC5
CB53 104P
-5V
+
CT12
X_ELS47U/16V-C
Brookdale FRONT PANEL-M
D17 1N4148S
PD_LED5
D18 1N4148S
SD_LED5
1 2 3 4 5 6 7 8
C180 470P
PWRBTIN#
PWRSW+
SUS_LED2 IDE_LED
FP_RST#
VCC5_SB
R332
1K
PLED1
HDD+
C385
104P
C C
11/21 modify
F_P1
PWSW-
PWSW+
PLED1 SLED2
HDD-
HDD+
RESET
GND
MEDION-FP
IDE_LED
VCC5
R433
330
FP_RST# 5,24
SUS_LED2 24
11/21 modify
PLED1
PLED124
SUS_LED224
SUS_LED2
1 2 3
JGL1 X_YJ103
EXTSMI#
EXTSMI#11
1 2
JGS1 X_YJ102
1 2
B B
SPEAKER
POWER BUTTON
3
PWRBTIN#
R822 10K
C183
105P
2
PWRBTIN# 12
11/21 modify
Micro-Star
Title
Document Number
Last Revision Date:
Friday, January 04, 2002
MS-6513
Front Panel & Connector
Sheet of
1
22 35
Rev
100
SPK
VCC5
BZ1
BUZZER
4
R328 220
ALARM12
R319 2.2K
SPKR11
A A
R335 220
Q37 2N3904S
5
D16 1N4148S
C178 104P
E
D
C
B
A
BACK PANEL USB CONNECTOR FOR USB PORT 0,1
C24 22P
LAN_USB1A
5 6 7 8 1 2 3 4
AMPLAN
UP
DOWN
21 22 23 24 25 26 27 28
RN27
7
USBP0+11 USBP0-11
4 4
USBP1-11 USBP1+11
NEAR CHIPSET LESS THAN 1 INCH NEAR USB CONNECTOR
8 6 4 2
8P4R-15
5 3 1
246
8
RN30 8P4R-15K
135
7
FB9 60S FB10 60S
FB7 60S FB8 60S
C23 22P
C20 22P
C27 22P
SVCC0 SBD0­SBD0+ GNDA SVCC0 SBD1­SBD1+ GNDA
FRONT PANEL USB CONNECTOR FOR USB PORT 2,3
RN26
1
3 3
USBP3+11
USBP3-11
USBP2+11
USBP2-11
NEAR CHIPSET LESS THAN 1 INCH
2 4 6 8
8P4R-15
3 5 7
246
135
FB23 60S FB24 60S
FB26 60S FB25 60S
8
RN29 8P4R-15K
7
NEAR USB CONNECTOR
C224 22P
SVCC1 SBD2­SBD2+ SBD3+
C225 22P
1 2 3 4 5 7 8 9
MEDION-USB
USB1
6
10
C223 22P
C222 22P
SBD3­SVCC1
SBD2­SBD2+
SBD3­SBD3+
POWER CIRCUIT FOR USB PORT 0,1
X_COPPER
2 2
PSPWR
VCC5_STR
C2 470P
FS2
1.5A-P
OC#011
C25 104P
X_COPPER
CP3
FB6 X_600S/0603
R55 47K
R330 56K
NEAR USB CONNECTOR
C15
X_105P
1000U/6.3V-TEAPO
+
SVCC0
CT2
R36 47K
CP24
FB32 X_600S/0603
X_COPPER
CP25
FB33 X_600S/0603
11/21 modify
CPU FAN
CPU_CTRL12
CPUFAN12
R54 X_510
R478 4.7K
VCC5
DUAL LAYOUT WITH Q10
SYSTEM FAN
VCC5
R262 X_510
R479 X_4.7K
SYS_CTRL12
SYSFAN12
PWM
G
G
CFAN
R57 2.2K
R56 10K
DS
Q6 2N7002S
D
R313 X_2.2K
R299 X_10K
DS
Q34 X_2N7002S
G
Q77
X_FR9024NS
+12V
+
ELS47U/16V-C
+12V
S
+12V
Q35 X_2PB710S
SFAN
+
246
135
Q10 SI2303
CFAN
C28
246
135
C155 X_ELS47U/16V-C
+12V
8
RN81
7
X_8P4R-0
11/21 modify
add Q77,RN81,RN82
+12V
8
RN82
7
X_8P4R-0
R23
4.7K
R35 27K
3 2 1
R312 X_4.7K
R298 X_27K
3
S_FAN1
2
X_YJ103-BO
1
D2
1N4148S
C_FAN1 YJ103-BO
D15
X_1N4148S
R278 X_10K
CPU_FAN 12
R30 10K
SYS_FAN 12
POWER CIRCUIT FOR USB PORT 2, 3
X_COPPER
1 1
VCC5_STR
OC#111
C214 470P
FS4
1.1A-P
C196 104P
E
CP5
FB21 X_600S/0603
R380 47K
R381 56K
NEAR USB CONNECTOR
+
C228 X_105P
1000U/6.3V-TEAPO
SVCC1
CT43
R427 47K
Title
Micro-Star
Document Number
Last Revision Date:
D
C
B
Friday, January 04, 2002
MS-6513
USB & FAN Connectors
Sheet of
A
Rev
100
23 35
5
REGULATORS OUTPUT DECOUPLING CAPACITORS
POWER Bulk Decuping
VCC_DIMM
VCC_AGP
D D
VCC5
VCC3
VCC5_STR
DDR_VTT
VCC1_8
VCC3_SB
VCC5_SB
C C
VCC_DIMM
For DDR VTT
DDR_VTT
12
12
+
C362
B B
1000U/6.3V-TEAPO
A A
+
C363
1000U/6.3V-TEAPO
2
2
VCC5_STR
+
D
P3055LD
S D
Q72
P3055LD
S
TRI-STATE
FOR 3VSB OR 3VSTR SETTING BY SEL1
VCC3_SB
5
1000UF470UF
Q71
G
G
SEL1
2
2
3
2
1
2
2
CT7 470U/16V CB18 104P CB2 104P CB19 104P
H
L
CB163 104P CB7 105P CB6 104P CB5 104P
SLOTS CHIPSET
VRAM
3.3VDUAL
3.3VSB
3.3VSTR
EC46
1000U/6.3V-TEAPO
PCIRST#10 HD_RST#5 PCIRST#220,21 PCIRST#18,12,13,19,27 SMBDATA5,11,12,16
SMBCLK5,11,12,16
VCC5_SB
1000U/6.3V-TEAPO
VRAM_2.5
2.5V
2.5V
1.25V
12
+
FOR 3VDUAL SETTING BY SEL1
SLP_S5#11 SLP_S3#11,12
VCC5_SB
VCC3_SB
RSMRST#11
PWR_GD11
FP_RST#5,22 PWR_OK22
SUS_LED222
VCC5
R829 330
C361 X_102P
12
CT44
+
X_1000U/6.3V-TEAPO
+
CT41
1000U/6.3V-TEAPO
** SETTING 3VSTR THEN VRAM_2.5 BECOME TO 1.25 VREF
SLP_S5# SLP_S3#
PLED122
VCC3
CT20
R832 1K
330
R830 330
12
+
R823
VCC5_SB
CB159 104P
CB33
105P
4
R831 330
VCC5
VCC3
S
45N02
D
S
D
VCC5_SB
4
VCC3
330 R824
1
DGND
2
PCIRST#/GPIOA
3
HDD_RST#/GPIOA
4
SLOT_RST#/GPIOA
5
DEV_RST#/GPIOA
6
I2C_DATA
7
I2C_CLK
8
BT_DRV
9
BT_SEN
10
BT_SINK
11
AGND0
12
SEL1
Reserved
R833
X_75K
Q74
G
Q75
NDS351S
G
1.2A
**S5O# pin function(Hi level = 5V) same as 5VUSB(Hi level = 12V)
SEL0
H
L
R515
1K
4.7K R826
48
PLED0
PLED1
PWR_OK
FP_RST#/GPIOB
PWR_OK1/GPIOC
CHIP_PWGD/GPIOC
EXTRA_PWGD/GPIOC
VCC
VRAMDRV2
VRAMSEN
VRAMDRV1SSAGND1
VRAM_2.5_DEN
1314151617181920212223
1K R825
VCC5_SB
C364 473P
5VUSB
2 MOSFET
1 MOSFET
222P
3738394041424344454647
SLP_S5#
SLP_S3#
5V_USB
5VSB_DRV
5V_DRV
S5O#/GPIOB/SEL0
RSM_RST#/GPIOB
CPU_PWGD/GPIOC
TYPEDET# VAGP_SEN VAGP_DRV
AGND2
1.25VREF
VCC3
VRAM_2.5_DRV
5VSB
VRGOOD
1.2V_SEN
1.2V_DRV
24
W83302D
R860
0
C365
X_102P
9VSB
C2 C1
THIS PIN IS OPEN DRAIN OUTPUT
C366
X_102P
G
C368
X_102P
R855 X_4.7K R857 X_4.7K R858 X_4.7K
C358
U26
X_102P
36 35 34 33 32 31 30 29 28 27 26 25
105P/0805
104P
VCC3_SB
D
Q67 09N05
S
CB77
104P
3
C359
C388
C391
VCC_DIMM
For DDR
+
CT4
3
VCC3_SB
VREF1_25
D29 1N4148S
D30 SM5817S
VCC3
DS
Q122N7002S
G
CB13 106P/1206
VID_GD 25
D31 SM5817S
1000U/6.3V-TEAPO
5VUSB USE 2 MOSFET
VCC3
CB91 104P CB63 105P
C392
104P
VCC_VID 7
For P4-1.2V
VCC5_SB
FDN351
D
C389
105P
VCC1_8
VCC5
NDS351S
Q69
VCC5_STR
S
D
Q70
45N02
S
9VSB
2.2A
G
G
Low RDS ON MOSFET
+12V
VCC5_SB
For 5VDUAL
C360
X_102P
VCC_DIMM
C248 104P
C250 104P
2
1
1.8V STANDBY POWER TRANSLATOR
(40mils trace / 20 mils space)
VCC3_SB
Q78
2N7002S
D S
C137
104P
G
C386
X_100P
LM358
1
C387
X_103P
9VSB
U4A
84
3
+
2
-
R856 100RST
R859 215RST
VCC1_8SB
C147 104P
ELS47U/16V-C
VREF1_25
CT35
1.8V/3.3V SEQUENCE CIRCUIT
VCC3
Q21 2N3906S
R123 200
R132 200
VCC_AGP
For AGP
S
Q30
G
VCC3
15N03
+
D
CT29
1000U/6.3V-TEAPO
VCC3
R134 470
1.8V POWER TRANSLATOR
Q79
X_NDS351S
D
S
Q73
09N05
D
G
S
Q26
2N3904S
DUAL LAYOUT
EC47
+
X_ELS10U/16V-B
VCC1_8
+
G
LM358
C367
X_100P
CT32 1000U/6.3V-TEAPO CB155 100P CB87 10P
9VSB
7
C369
X_103P
Title
Micro-Star
Document Number
Last Revision Date:
2
Friday, January 04, 2002
ACPI CONTROLLER
Ic=200mA Vebo=5V Vceo=40V
For MuTIOL
U4B
84
5
+
6
-
11/21 modify
MS-6513
Sheet of
1
VCC1_8
R834 100RST
VREF1_25
R835 215RST
24 35
VCC1_8
Rev
100
5
4
3
2
1
CB92 104P
R839
5.1/0805
C375
VID_GD24
CHOK4 1.1UH/25A
CB88 33P
C372 104P
PWM GOOD IN
DS
DS
Q13
FDB6670AL
+12V
VID_GD
Q16
G
G
15N03
R837
2.7/0805
R840
2.7/0805
C370
225P/0805
C373
R843 7.5KST
R845 7.5KST
R847
1M
104P
VID0 VID1 VID2 VID3 VID4
VCCP
Near CPU Pin AC14
CT19 1500U/16V-N
+12V
D27 1N4148S
U27
2
VCCDR
5
BOOT1
4
UGATE1
3
PHASE1
1
LGATE1
13
ISEN1
14 15
PGNDS1 PGNDS2
18
VID0
19
VID1
20
VID2
21
VID3
22
VID4
17
OSC/INH
7 8
SGND COMP
FBR
11
CT24 1500U/16V-N
FBG
12
Near CPU Pin AC15
VCC
BOOT2
UGATE2
PHASE2
LGATE2
ISEN2
PGND
PGOOD
VSEN
STL6917B
FB
CT27 1500U/16V-N
+12V
6
24
25
26
R841
27
R844 7.5KST
16
R846 7.5KST
28
23 10
9
R836
10/0805
R838
2.7/0805
2.7/0805
C371 105P/0805
CT13 1500U/16V-N
D28
1N4148S
C374
104P
R848
R851
15K
1.37KST
C377 152P
C355 225P/0805
DS
G
DS
G
C378 10P
PIN 6,7,9 GND THE SAME
C357 104P
Q20 15N03
R842
5.1/0805
Q17 FDB6670AL
C376
332P
VRM_GD 11
R849 162KST
R852
X
CHOK2 0.8UH/3T
VCC5
CT3
1500UF/6.3V-P
CT14 2200UF/6.3V-R
CT5 2200UF/6.3V-R
CT25
1500UF/6.3V-P
CT26
1500UF/6.3V-P
CT17 2200UF/6.3V-R
CT18 2200UF/6.3V-R
VCCP
CT1 2200UF/6.3V-R
CT8 2200UF/6.3V-R
CT23 2200UF/6.3V-R
+12V
D D
VCCP
CHOK3 0.8UH/3T
C C
3T/BLUE
332P
B B
11/21 modify
+12V
A A
VID[0..4]6,12
5
VID0 VID1 VID2 VID3 VID4
1 3 5 7
R136 1K
2 4
RN8
6
8P4R-1K
8
4
R486
680/0805
R482
680/0805
VR5
ZENER-3.3V-R
R483
X_0/0805
VCC3
ATX12V POWER CONNECTORVID PULL-UP RESISTORS
+12V
C96 103P
3
C94 33P
3
4
JPW1
GND
12V
GND
12V
12V-POWER-CON
1
2
Micro-Star
Document Number
Last Revision Date:
2
Friday, January 04, 2002
Title
VRM 9.0
MS-6513
Sheet of
1
Rev
100
25 35
8
7
6
5
4
3
2
1
SERIAL PORT 1
D4 1N4148S
VCC5
DSRA DCDA
D D
RXDA CTSA RIA
RTSA#12
SOUTA12
DTRA#12
U6
20
VCC
2
RIN1
3
RIN2
4
RIN3
7
RIN4
9
RIN5
16
DIN1
15
DIN2
13
DIN3
11
GND
GD75232/SSOP20
V+ ROUT1 ROUT2 ROUT3 ROUT4 ROUT5
DOUT1 DOUT2 DOUT3
V-
C50 104P
V+
C47 104PC45 104P
1 19 18 17 14 12
5 6 8 10
D5 1N4148S
V-
RTSA TXDA DTRA
DSRA# 12 DCDA# 12 SINA 12 CTSA# 12 RIA# 12
SERIAL PORT 2
C75 104P
C C
B B
VCC5
DCDB DSRB RXDB CTSB RIB
DTRB#12 RTSB#12
SOUTB12
LP_D[0..7]12
LP_BUSY12
LP_ACK#12
LP_INIT#12
LP_ERR#12
LP_AFD#12
LP_STB#12
LP_SLIN#12
LP_SLCT12
LP_PE12
U10
20
VCC
2
RIN1
3
RIN2
4
RIN3
7
RIN4
9
RIN5
16
DIN1
15
DIN2
13
DIN3
11
GND
GD75232/SSOP20
VCC5
LP_D6 LP_D5 LP_D4 LP_D3 LP_PE LP_BUSY LP_ACK# LP_D7
LP_INIT# LP_ERR# LP_AFD# LP_STB# LP_D2 LP_D1 LP_D0 LP_SLIN#
LP_SLCT
C80 104P
1N4148S
D6
R75 2.2K
ROUT1 ROUT2 ROUT3 ROUT4 ROUT5
DOUT1 DOUT2 DOUT3
1 2 3 4 6 7 8 9
1 2 3 4 6 7 8 9
1 2 3 4 6 7 8 9510
1 2 3 4 6 7 8 9510
V+
V-
R477 47K
C74 104P
V+
1 19 18 17 14 12
5 6 8 10
V-
5
RN3 10P8R-2.2K
10
5
RN4 10P8R-2.2K
10
DTRB RTSB TXDB
LP_INIT# LP_SLIN# LP_D1 LP_D2
LP_STB# LP_AFD# LP_D0 LP_ERR#
LP_D3 LP_D4 LP_D5 LP_D6
LP_D7 LP_ACK# LP_BUSY LP_PE
LP_SLCT
DCDB# 12 DSRB# 12 SINB 12 CTSB# 12 RIB# 12
+12V
-12V
DSRA DCDA RXDA RTSA
TXDA CTSA DTRA RIA
DCDA RXDA RTSA TXDA DTRA
DCDB DSRB RXDB DTRB
RTSB CTSB TXDB RIB
2 4 6 8
2 4 6 8
CN7B
26 27 28 29 30
YCN25F-001-1
2 4 6 8
2 4 6 8
1 3 5 7
1 3 5 7
DSRA
31 32
CTSA
33
RIA
34
1 3 5 7
1 3 5 7
CN3 8P4C-220P
CN4 8P4C-220P
CN11 8P4C-220P
CN12 8P4C-220P
D23 X_1N4148-S-LL34
RIA
D22 X_1N4148-S-LL34
RIB
5 4 3 2 1
JMDM1 X_YJ105
COM2 HEADER
DCDB DSRB RXDB RTSB TXDB CTSB DTRB RIB
1
2
3
4
33PC55
6 8
2 4 6 8
2 4 6 8
2 4 6 8
CN8 8P4C-220P
CN9 8P4C-220P
CN6 8P4C-220P
CN5 8P4C-220P
5 7
1 3 5 7
1 3 5 7
1 3 5 7
COMB1
12 34 56 78 9
YJ205-CW
PARALLAL PORT
LP_STB# LP_D0 LP_D1 LP_D2 LP_D3 LP_D4 LP_D5 LP_D6 LP_D7 LP_ACK# LP_BUSY LP_PE LP_SLCT
CN7A
1 2 3 4 5 6 7 8 9
10 11 12 13
YCN25F-001-1
14 15 16 17 18 19 20 21 22 23 24 25
LP_AFD# LP_ERR# LP_INIT# LP_SLIN#
MODEM RING BLOCK LAN WAKEUP BLOCK
X_2N3904S
VCC5_SB
R409 X_330
C216 X_104P
R374 X_10K
R375 X_10K
R392 X_10K
Q42
RING# 11
Q47 X_2N3906S
Ic=200mA Vebo=5V Vceo=40V
JWOL1
1 2 3
X_WOL
LAN WAKEUP HEADER
VCC5_SB
R442 X_4.7K
R429 X_10K
PS2 KEYBOARD & MOUSE CONNECTOR
VCC_MS
MSDATA12
MSCLK12
KBDATA12
KBCLK12
7
8
135
246
VCC_MS
135
RN1 8P4R-4.7K
246
FB3 301S/0603
FB4 301S/0603
FB2 301S/0603
FB5 301S/0603
7
CN1 X_8P4C-22P
8
R21 47K
C10 180P
MS_DT
MS_CK
KB_DT
KB_CK
C9 180P
11 12
C12 180P
KBMS1
7 8
1 2 5 6
YMD12P-1
C6 180P
MS
10
C1 33P
9
GNDA
4
VCC_MS
3
KB
C3 104P
X_COPPER
FB1
C5 X_104P
X_300S/0805
CP1
VCC3_SB
PSPWR
C4 X_104P
R419 X_10K
LAN_WAKE 11
Q55
X_2N3904S
11/21 modify
PSPWR
FLOPPY CONNECTOR
A A
8
7
FDD1
1 2 3 4
7 8
9 10 11 12 13 14 15 16 17 18 19 21 22 23 24 25 26 27 28 29 30 31 32 33 34
YJ217-C-1
6
20
INDEX#
TRACK0# WP# RDATA#
DSKCHG#
DRVDEN0 12
DRVDEN1 12 INDEX# 12 MOT_A# 12 DRV_B# 12 DRV_A# 12 MOT_B# 12 DIR# 12 STEP# 12 WT_DT# 12 WT_EN# 12 TRACK0# 12 WP# 12 RDATA# 12 HEAD# 12 DSKCHG# 12
6
Title
Micro-Star
Document Number
Last Revision Date:
5
4
3
Friday, January 04, 2002
2
MS-6513
IO Connector
Sheet of
Rev
100
26 35
1
A
B
C
D
E
REALTEK 8100(L) LAN
C119 27P
RXIN­RXIN+ TXD-
4 4
SPDLED ACTLED
3 3
49.9RST
R70
49.9RST
R69
C42
104P
R285 100
C_BE#310,13,21
TXD+ TXD-
C112
X_10P
C44
X_10P
AD22
2 2
RXIN+ RXIN-
C41
X_10P
1 1
NEAR PHY
R171 1K
VCC3
R177 15K
D11 X_1N4148S
INTF#11,21
INTC#10,21
PCICLK35
PGNT#410,21 PREQ#410,21
C_BE#3
C_BE#210,13,21
FRAME#10,13,21
IRDY#10,13,21
TRDY#10,13,21
DEVSEL#10,13,21
R202
49.9RST
C109
104P
GND
A
VDD25
R290 0
R289 X_0
LANRST
AD31 AD30 GND AD29 VDD33 AD28 AD27 AD26 AD25 AD24 VDD25 VDD33
AD23
C46
X_104P
R203
49.9RST
C132 104P
C113
X_10P
TXD+
(ISOLATEB)
C134 475P/0805
GND
ISOB
8079787776757473727170696867666564636261605958575655545352
GND
AD20
AD20
AVDD
AVDD25
AD19
VDD
VDD33
AD19
VDD33
CMT
TX+
TX-
RX+ RX-
RXC
TXD+
ISOLATEB
VDD25
AD18
AD17
AD18
AD17
15 16 14
11 9 10
TXD-
AD16
AD16
AVDD
AVDD25
CBE2B
FRAMEB
LED0
81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
100
R72 X_0
LED1NCLED2
INTAB RSTB CLK GNTB REQB AD31 AD30 GND AD29 VDD AD28 AD27 AD26 AD25 AD24 VDD25 VDD CBE3B IDSEL AD23
AD22
GND
AD21
1234567891011121314151617181920212223242526272829
GND
AD22
AD21
C_BE#2 FRAME# IRDY# TRDY# DEVSEL#
U5
2
TDC
1
TD+
3
TD-
6
RD+
8
RD-
7
RDC
C43
TS6121C
104P
6.19KST
RXIN-
RXIN+
IRDYB
TRDYB
Y1
25MHZ
C120
27P
11/21 modify
C121
C117
105P
104P
R206 5.6K
C_BE#1 10,13,21 PAR 10,13,21 SERR# 10,21 PERR# 10,21 STOP# 10,13,21
GND
21
X_COPPER
CP27
21
FB16 X_300S/0805
VCC3_SB
VDD33
1
CS
2
SK
3
DI
4
DO
The 9346 EEPROM should be functional when powered by
3.3V
C_BE#0 10,13,21
AD[31..0] 10,13,21
VDD33
VDD33
C
PME#
PME# 10,20,21
VCTRL
C123
C124
x_475P/0805
AUX
AD0 AD1
AD2 AD3
VDD AD4 AD5 AD6
VDD AD7
U14
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
RTL8100BL
LANGND
104P
AUX LEECS EESK EEDI EEDO AD0 AD1 GND AD2 AD3
VDD33 AD4 AD5 AD6
VDD33 AD7 C_BE#0 GND
C29 X_104P
FB11 30S/0603
R170
GND
GND
X1
X2
GND
GND
RTT2
RTT3
AVDD
RTSET
DEVSELB
GND
GND
B
AVDD25
STOPB
PERRB
SERRB
PAR
CBE1B
VDD
AD15
VDD33
AD15
TX+ TX- RX-
RX+ RX-
123456
PME#
PMEB
AD14
AD14
GND
VCTRL
GND
AD13
AD12
AD13
C_BE#1 PAR SERR# PERR# STOP#
78
NCNCNC
VCTRL
AD12
AD11
AD11
AD10
AD9
AD10
RN2
8P4R-75
AD9
VDD25
51
VDD25
EECS
EESK
EEDO
VDD25
VDD25
CBE0B
AD8
30
AD8
EEDI
GND
GND
VCTRL
ELS10U/16V-B
U15
8
VCC
7
NC
6
NC
5
GND
93C46S-1
。
R60 X_300
R71 X_300
VDD33
Q33
2SB1197K
EC1
+
GND GND
GNDGND
VDD33
GND
C135
104P
BC1
104P
VDD25
VDD25
11/21 modify
ACTLED
RX+ TX­TX+
SPDLED
VCC3_SB
X_104PC18
LAN_USB1B
AMBER+
19
AMBER-
20 16 15 14 13 12 11 10
9 17 18
X_104PC37
GREEN+ GREEN-
AMPLAN
RDN
RDP TDN TDP
NC NC
NC NC
D
FB19 X_80S/0805
VDD33
GND
VDD25
X_COPPER
CP28
EC2
ELS10U/16V-B
PCIRST#18,12,13,19,24
JLAN1
1-2
2-3
VDD33
DC8
104P
VDD33
GNDGND
DC10
104P
C138
105P
1 2 3
JLAN1 YJ103
DC9
104P
DC2
104P
C139
104P
DC4
104P
VDD25
DC7
104P
DE-COUPLE CAPS OF RTL8100 MUST BE
PLACED AS CLOSE TO CHIP AS POSSIBLE.
21
+
LANRST
LAN SELECT
ENABLED
DISABLED
Micro-Star
Title
Document Number
Last Revision Date:
Tuesday, January 08, 2002
DC3
DC11
104P
104P
MS-6513
Realtek RTL8100 LAN
Sheet of
E
DC6
104P
Rev
100
27 35
5
4
3
2
1
PCB OTHER COMPONENT
SIMULATION TRACE
D D
C C
B B
7
8
9
2
BS5
9
2
BS4
6
5
3
4
7
8
6
5
3
4
FM1
X
X
9
2
BS3
9
2
BS1
FM2
X
X_COPPER
CP11
7
8
6
5
3
4
7
8
6
5
3
4
BS4_X1BS3_X1BS2_X1BS1_X1
FM3
X
X
X
9
2
BS6
X_COPPER
CP12
7
8
6
5
3
4
BS7_X1BS6_X1 BS8_X1
FM4
X
X
FM5
X
X
X_COPPER
CP13
BS9_X1
9
2
FM6
BS2
7
8
6
5
3
4
FM7
X
X
X
X
X_COPPER
CP14
U3_X1
BS1_X1
BS6_X1 BS9_X1BS8_X1
FM8
X
X
U4_X1
BS7_X1
BS3_X1
J1
X
VCC5
J2
X
AGPDDR
BS4_X1BS2_X1
X_COPPER
CP15
A A
5
X_COPPER
CP16
X_COPPER
CP17
4
X_COPPER
CP18
Title
Micro-Star
Document Number
Last Revision Date:
3
2
Sunday, December 30, 2001
MS-6513
MANUAL
Sheet of
1
Rev
100
28 35
5
4
3
2
1
Setting
D D
Jumper Description Connector
JAUDIO1 AUDIO FRONT PANEL HEADPHONE JACK HEADER JBAT1 1-2
CLEAR CMOS NORMAL
(Default)
CLEAR CMOS2-3
CD_IN1 CDROM HEADER (ATAPI)
USB1 EXTERNAL USB
J11/12 CENTER/SUBWOOFER SELECT
U7 INTEL mPGA478-B CPU IDE1
IDE2 DIM1
DIM2 AGP1 PCI1
PCI2 PCI Slot2 PCI3 PCI Slot3(MEDION SPEC)
COM1
JLAN1 ONBOARD LAN ENABLE/DISABLE
C C
COMB1 Serial Port
COMB1 EXTERNAL COMB
Description
Primary Secondary
SDRAM DIMM1 SDRAM DIMM2
AGP Slot PCI Slot1
Serial Port
Parallel PortLPT
FloopyFDD1 JMDM1 MODEM RING HEADER JWOL1 LAN WAKEUP HEADER KBMS1 PS/2 Keyboard and PS/2 mouse
CPU FAN HEADERC_FAN1 USB USB1
B B
POWER F_P1
USB REAR CONNECTOR
USB INTERNAL HEADER
ATX Power
Front Panel
ATX12V PowerJPW1
A A
Title
Micro-Star
Document Number
Last Revision Date:
5
4
3
2
Sunday, December 30, 2001
MS-6513
JUMPER SETTING
Sheet of
1
Rev
100
29 35
5
4
3
2
1
CPUCLK
MCHCLK
CPUCLK#
MCHCLK#
D D
0.5" MAX 2"~ 9"
L1 L2 L4
L1 L2 L4
RS
RS
0"~ 0.2"
0"~ 0.2"
L3
RT
CPU
MCH
ITP
L3
RT
L1+L2DEVICE
X
X
X
* Line Width : 7.0 mil * Differential pair spacing : 7.0mil * Spacing to other traces : 28 mil * BCLK0/BCLK1 LENGTH MATCH +/- 10 mil
GND
DEVICE L1+L2
MCH_66
ICH_66
AGP_66
0"~ 0.5 " 4"~ 8.5"
L1 L2
RS
ICH_PCLK
FWH_PCLK
C C
SIO_PCLK
ISAPCLK
0"~ 0.5 " 4"~ 8.5"
L1 L2
RS
PCICLK[4..0]
RSICH_14
OSC
4"~ 8.5"0"~ 0.5 "
L2L1
MCH
ICH
AGP
DEVICE L1+L2
ICH
FWH
SIO
PCI
DEVICE
ICH
ISA BRIDGE
X
X +/- 100 mils
X- 4"
X
X
X
X-2.5"
L1+L2
Y
Y
* Line Width : 5.0 mil * Spacing to other traces : 20 mil
* Line Width : 5.0 mil * Spacing to other traces : 20 mil * L1/L2 TRACE SAME AS MCH_66 TRACE LENGTH
* Line Width : 5.0 mil * Spacing to other traces : 10 mil
ICH_48
B B
SIO_48
L1
RS
3"~12"0"~ 0.5 "
L2
DEVICE L1+L2
ICH
SIO
* Line Width : 5.0 mil * Spacing to other traces : 20 mil
CK 408
0.5" TO 6.5"
RN
2.5" TO 9"- A
CNR
* Line Width : 7.0 mil * Differential signls space : 14mils * Differential signls length mismatch +/- 7mil
A
LAN_PCLK
A A
ICH2
RST
RXD[2..0]
TXD[2..0]
AS SHORT AS POSSIBLE
5
Title
Micro-Star
Document Number
Last Revision Date:
4
3
2
Tuesday, November 20, 2001
CK-408 and LAN Design Guide
MS-6513
Sheet of
1
Rev
30 35
5
4
3
2
1
Pentium 4 Processor /Northwood mPGA 478
Source Synchronous Signal Group and the Associated Strobes
Signals Associated Strobe
REQ[4:0],A[16:3]#
D D
A[31:17]#
D[15:0]#,DBI0#
D[31:16]#,DBI1#
D[47:32]#,DBI2#
D[63:48]#,DBI3#
Signals InaccuracyLength
Data
Address
Strobe
Clock
*
Delta=(CPU_pkglen.net-CPUpkglen.strobe)+(CS_pkglen.net-CS_pkglen.strobe)
2.0" to 10.0"
2.0" to 10.0"
2.0" to 10.0"
2.0" to 10.0"
Trace : 7 mil width 13mil space
Miscellaneous Signals
C C
HL_STB/HL_STB#
Taces 5mils
20mils
15mils
20mils
* Max Length : 8" * STB and STB# Length must be equal
B B
ADSTB0#
ADSTB1#
DSTBP0#,DSTBN0#
DSTBP1#,DSTBN1#
DSTBP2#,DSTBN2#
DSTBP3#,DSTBN3#
HL[0:10]
HL_STB
HL_STB#
HL[0:10]
+/- 100 mil
+/- 200 mil
+/- 25 mil
Don't need
HL[10..0]
20mils
15mils
20mils
* Max Length : 8" * Length must be matched within +/- 0."
of the Strobe Signals
Others
HL[0:10]
HL[0:10]
Others
USB
* USB Trace width : 9 mils
* USB Trace Spacing : 25 mils
* Differential USB Signlas Trace Spacing : 18 mils * USB Power Trace must be 40mils width
AGP
SIGNALS
1X Timing group 2X/4X Timing group
SET#1 AGPCLK PIPE# RBF# WBF# ST[2..0] GFRAME# GIRDY#
A A
GTRDY# GSTOP# GDEVSEL# GREQ# GGNT# GPAR
GAD[15..0] GC_BE#[1..0] GAD_STB0 GAD_STB0#
SET#2
GAD[31..16] GC_BE#[3..2] GAD_STB1 GAD_STB1#
SET#3
SBA[7..0] SB_STB SB_STB#
5
1X Timing group
2X/4X Timing group
SET#1
2X/4X Timing group
SET#2
2X/4X Timing group
SET#3
2X/4X Timing group
SET#1
2X/4X Timing group
SET#2
2X/4X Timing group
SET#3
Maximum Length Width Space Length
5 mil
5 mil
7.5"
20 mil
5 mil
7.25"
20 mil
5 mil
7.25"
20 mil
5 mil
7.25"
15 mil
5 mil
6"
15 mil
5 mil
6"
15 mil
5 mil
6"
4
Dismatch
Relative to
XX
GAD_STB0
+/- 0.125"
+/- 0.125"
+/- 0.125"
+/- 0.25"
+/- 0.25"
+/- 0.25"
GAD_STB0#
GAD_STB1 GAD_STB1#
SB_STB SB_STB#
GAD_STB0 GAD_STB0#
GAD_STB1 GAD_STB1#
SB_STB SB_STB#
Title
Micro-Star
Document Number
Last Revision Date:
3
2
Monday, November 19, 2001
MS-6513
Revision History - 1
Sheet of
1
Rev
31 35
5
SDRAM Routing Guidelines
5.Feedback - RDCLKO,RDCLKIN routing rule
2 or 3 DIMM feedback layout guideline
Signal Length Width Trace Spacing
Trace L
D D
50 mils 7 mil 5 mil
RDCLKO Ball RDCLKIN BallL
4
3
2
1
SCK[5:0] layout guideline
MCH
SCK/SCK#[2:0]
A
F
SCK/SCK#[5:3]
GA
DIMM1 DIMM2
DDR-SDRAM Routing Guidelines
1.DDR bus reference plane stack-up
PCB Layer Description
Layer 1 Signal
Layer 2
Layer 3
Layer 4
*All the memory bus signals must be referenced to GND
2.DDR signal groups
C C
Data
Command
Control
Clock
Feedback
3.SDQ[63:0],SCB[7:0],SDQS[8:],SCK/SCK#[5:0]routing rule
Signal
SDQ[63:0] Max = 0.5" SCB[7:0] SQDS[8:0]
(Note1)
SCK/SCK#[2:0]
B B
SCK/SCK#[5:3]
(Note3)
Ground Flood
Ground
Power / Signal
SignalsGroup
SDQ[63:0],SCB[7:0],SDQS[8:0]
SMA[12:0],SBS[1:0],SRAS#,SCAS#,SWE#
SCKE[3:0],SCS#[3:0]
SCK[5:0],SCK#[5:0]
RCVENOUT#,RCVENIN#
Length A
Package length
Length B Width
Length C Length D
2.0" - 5.0" 5 mil
DIMM 1 = A + B + C = X
DIMM 2 = A + B + C + D =
Package length
B+C+2"<= None None 5 mil
Length F <= B+C+1"
2.0" - 6.5"
DIMM 1 = A + F =X + 1" to X + 2"
Package length
B+C+D+2"<=Length G <= B+C+D+1" 5 mil (Note4)
2.5" - 7.0"
X + D
0.3' - 0.5"
Length E
0.1" - 0.8"
Spacing
(Note2)
(Note4)
Routing Layer
Top
Bottom
Bottom
Note1:Each data and strobe signal group must be length matching +/- 25 mils
SDQS[X] = +/- 25 mils SDQ[X]/SCB[X] group length
Signals Associated Strobe
SDQ[7:0]
SDQ[15:8]
SDQ[23:16]
SDQ[31:17]
SDQ[39:32]
SDQ[47:40]
SDQ[55:48]
SDQ[63:56]
SCB[7:0]
Note2:Trace spacing normally = 12 mils and through between DIMM 2 pin = 7 mils, but breakout form MCH ball = 5 mils width with 7mils spacing for a max of 350mils
SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
Note3:
SCK[X] length = SCK#[X] length
*
SCK/SCK#[2:0] routed to DIMM 0 are equal in length, and SCK/SCK#[5:3] routed to
*
DIMM 1 are equal in 1ength
Note4:
Between the pair differential clock 2 signal trace spacing = 7 mils*
Differential Trace with 2.5V copper flood spacing = 10 mils minimum
*
Serpentine spacing = 20 mils minimum
*
Differential signals breakout form MCH = 5 mil width with 7 mil differential spacing and
*
7 mil isolation spacing from another signal for a max of 350 mils
Note5:Data group signal can NOT placed within the same RPACK's(series and parallel resistor packs) as the command or control group signal
DIMM 2 = A + G =X + D + 1" to X + D + 2"
* Package length see Table - 4
SDQ[63:0],SCB[7:0],SDQS[8:] layout guideline
MCH DIMM1 DIMM2
BC
A A
5
DEA
4
Vtt
(Note5)(Note5)
Title
Micro-Star
Document Number
Last Revision Date:
3
2
Tuesday, November 20, 2001
MS-6513
DDR Layout Guideline1
Sheet of
1
Rev
5
4
3
2
1
DDR-SDRAM Routing Guidelines
4.SCKE[3:0],SCS#[3:0] routing rule
DIMM 0
Length F
SCS#[1:0] SCKE[1:0]
(Note1)
D D
Total lenght
Max = 40 mils 2.0" - 3.5" Max = 500 mils
DIMM0 SCK/SCK#[2:0] length =
Length GSignal
Length H Length I
(Note2)
0.4" - 1.3"
X"
X"- 1"DIMM0 SCS#/SCKE length = F + G + H =
DIMM 1
Length GSignal
Length J Length K
(Note2)
0.1" - 0.8"
SCS#[3:2] SCKE[3:2]
(Note1)
Total lenght
Length F
Max = 40 mils 2.0" - 3.5" Max = 1"
DIMM1 SCK/SCK#[5:3] length = Y"
DIMM1 SCS#/SCKE length = F + G + J =Y"- 1"
Width
5 mils
Width
5 mils
Note1:
* Trace spacing normally = 12 mils and through between DIMM 2 pin or DIMM to Rtt = 7
mils, but breakout form MCH ball = 5 mils width with 7mils spacing for a max of 350mils
Trace with 2.5V copper flood spacing = 7 mils minimum
*
Isolation spacing form another group signal spacing = 20 mils minimum
*
Command signals breakout form MCH = 5 mil width with 7 mil spacing for a max of 350 mils*
Note2:Command group signal can NOT placed within the same RPACK's(series and parallel resistor packs) as the data or control group signal
(Top)
MNL
(Bottom )
(Note2)
(Top)
(Top)
O
(Top)
P
MCH DIMM1 DIMM2
Vtt
(Note2)
(Note3)
Vtt
Vtt
5.Feedback - RCVENOUT#,RCVENIN# routing rule
Signal Length Q
RCVENOUT# RCVENIN#
(Note1)
Total Length
40 mils
Q + R + S = 1080 mils
Length R Length S
Equal 1" 40 mils
MCH
(Top)
Q
RCVENOUT#
(Top)
R
(Bottom)
S
RCVENIN#
Note1:
Width
5 milS
MCH DIMM1 DIMM2
C C
(Top)
(Top)
F
GH
(Bottom )
GJF
(Bottom )
Note1:
* Trace spacing normally = 12 mils and through between DIMM 2 pin or DIMM to Rtt = 7
mils, but breakout form MCH ball = 5 mils width with 7mils spacing for a max of 350mils
Trace with 2.5V copper flood spacing = 7 mils minimum
*
Isolation spacing form another group signal spacing = 20 mils minimum
*
Control signals breakout form MCH = 5 mil width with 7 mil spacing for a max of 350 mils*
Note2:This purpose prevent break form DIMM0 bottom size 2.5V copper flood to MCH power plane
B B
Note3:Control group signal can NOT placed within the same parallel resistor packs as the command or data group signal
(Top)
(Top)
I
(Top) (Top)
K
* Trace spacing = 12 mils
Trace with 2.5V copper flood spacing = 7 mils minimum
*
5.SMA[12:0],SBS[1:0],SRAS#,SCAS# routing rule
Length L
SMA[12:0] SBS[1:0] SRAS# SCAS#
(Note1)
DIMM 0
Total lenght
DIMM 1
Total lenght
A A
Max = 40 mils 2.0" - 3.5" Max = 500 mils 0.3" - 0.5"
DIMM0 SCK/SCK#[2:0] length =
DIMM0 SCK/SCK#[5:3] length = Y"
Command signal length = L + M + N + O = Y" - 1"
Length MSignal
Length N Length O
Length P
0.1" - 0.8"
Width
5 mils
X"
X" - 1"Command signal length = L + M + N =
Isolation spacing form another group signal spacing = 10 mils minimum
*
Command signals breakout form MCH = 5 mil width with 7 mil spacing for a max of 350 mils*
Title
Micro-Star
Document Number
Last Revision Date:
5
4
3
2
Tuesday, November 20, 2001
MS-6513
DDR Layout Guideline2
Sheet of
1
Rev
5
4
3
2
1
Table - 4
DDR Data Signals(1)
Signal MCH ball
SDQ0
SDQ1
SDQ2
SDQ3
D D
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
C C
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
B B
G28
F27
C28
E28
H25
G27
F25
B28
E27
C27
B25
C25
B27
D27
D26
E25
D24
E23
C22
E21
C24
B23
D22
B21
C21
D20
C19
D18
C20
E19
C18
E17
Package length(")
0.716
0.699
0.874
0.754
0.532
0.666
0.592
0.892
0.797
0.833
0.812
0.753
0.886
0.867
0.773
0.645
0.722
0.602
0.699
0.566
0.785
0.781
0.640
0.711
0.627
0.555
0.587
0.522
0.615
0.487
0.579
0.521
Signal Package length(")MCH ball
DDR Data Signals(2)
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63
E13
C12
B11
C10
B13
C13
C11
D10
E10
C9
D8
E8
E11
B9
B7
C7
C6
D6
D4
B3
E6
B5
C4
E5
C3
D3
F4
F3
B2
C2
E2
G5
0.432
0.543
0.596
0.590
0.639
0.552
0.588
0.626
0.533
0.605
0.587
0.522
0.523
0.715
0.706
0.643
0.700
0.664
0.760
0.922
0.640
0.846
0.810
0.670
0.859
0.811
0.723
0.814
0.949
0.893
0.865
0.689
DDR ECC Signals
Signal Package length(")MCH ball
SCB0
SCB1
SCB2
SCB3
SCB4
SCB5
SCB6
SCB7
C16
D16
B15
C14
B17
C17
C15
D14
DDR Data Strobe Signals
Signal
SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8
MCH ball
F26
C26
C23
B19
D12
C8
C5
E3 0.821
E15
0.570
0.526
0.623
0.533
0.621
0.583
0.540
0.503
Package length(")
0.651
0.775
0.738
0.636
0.493
0.596
0.776
0.520
Signal
SCK#0
SCK1
SCK#1
SCK2
SCK#2
SCK3
SCK#3
SCK4
SCK#4
SCK5
SCK#5
DDR Clock Signals
MCH ball
Package length(")
E14
F15
J24
G25
G6 0.551
G7
G15
G14
E24
G24
H5
F5
0.453SCK0
0.432
0.454
0.587
0.543
0.371
0.349
0.610
0.548
0.589
0.693
A A
Title
Micro-Star
Document Number
Last Revision Date:
5
4
3
2
Monday, November 19, 2001
MS-6513
DDR Layout Guideline3
Sheet of
1
Rev
5
4
3
2
1
D D
JBAT1 Clear CMOS
Normal1 - 2 Clear CMOS2 - 3
*
BAT SOCKET
12
JP2 H/W AUDIO
DISABLE1 - 2 ENABLE
2 - 3
*
J7 BIOS Update
SHORT Locked
JBAT1(1-2)
YJUMPER-MG
BAT1[A]
YSKTBT
FRONT PANNEL BUZZER
C C
F_P114-15
X_YJUMPER-MG
JP2(2-3)
X_YJUMPER-MG
LAN SELECTJLAN1
1-2 ENABLED
2-3
YJUMPER-MG
DISABLED
JLAN1(1-2)
OPEN
Unlocked
J7(1)
X_YJUMPER-MG
*
J11 J12
1-2
2-3
YJUMPER-MG
1-2
Mode1 Center to left Channel/Subwoofer to right channel
2-3
Mode2 Center to right Channel/Subwoofer to left channel*
J11(1-2)
J12(1-2)
YJUMPER-MG
U23(1)
1
VPP
2
RST#
3
FGPI3
4
FGPI2
5
FGPI1
6
FGPI0
7
WP#
8
TBL#
9
ID3
10
ID2
11
ID1
12
ID0
13
FWH0
14
FWH1
15
FWH2
16 17
GND FWH3
SST49LF002A
Connection Scheme
VCC
CLK
FGPI4
IC(VIL)
GNDA VCCA
GND VCC
INIT#
FWH4
RFU RFU RFU RFU RFU
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18
MS6513 PCB
BIOS
B B
PCB
MS-6513-100
COM1
YCN9M-1
X_U12-A
X_845-MCH-PIN
X_U12-C
X_845-MCH-PIN
X_U12-B
845-MCH-PIN
X_U12-D
845-MCH-PIN
X_U12
845-MCH-H1
X_U7-1
P4-BRACKET
X_U7-2
P4-RM
X_U7-3
P4-SCREW
X_U7-4
P4-SCREW
X_U7-5
P4-SCREW
X_U7-6
P4-SCREW
NC
A A
5
4
3
X_Q16-Q13
SSTHEATSINK
X_Q20-Q17
SSTHEATSINK
2
Micro-Star
Title
Document Number
Last Revision Date:
Friday, January 04, 2002
MS-6513
PACKING BOM
Sheet of
1
Rev
100
35 35
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