Motorola MC14LC5004FU, MC14LC5003FU, MC14LC5003, MC14LC5004 Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

MC14LC5003

128 Segment LCD Drivers

CMOS

The MC14LC5003/5004 are 128-segment, multiplexed-by-four LCD Drivers. The two devices are functionally the same except for their data input protocols. The MC14LC5003 uses a serial interface data input protocol. The device may be interf aced to the MC68HCXX product families using a minimal amount of software (see example). The MC14LC5004 has a IIC interface and has essentially the same protocol, except that the device sends an ac knowledge bit back to the transmitter after each eight-bit byte is received. MC14LC5004 also has a “read mode”, whereby data sent to the device ma y be retrieved via the IIC bus.

The MC14LC5003/MC14LC5004 drives the liquid-crystal displays in a multiplexed-b y-four conﬁguration. The device accepts data from a microprocessor or other serial data source to drive one segment per bit. The chip does not have a decoder , allo wing f or the ﬂe xibility of f ormatting the segment data externally .

Devices are independently addressable via a two-wire (or three-wire) communication link which can be common with other peripheral devices.

The MC14LC5003/MC14LC5004 are low cost version of MC145003 and MC145004 without cascading function.

• Drives 128 Segments Per Package

• May Be Used with the Following LCDs: Segmented Alphanumeric,

Bar Graph, Dot Matrix, Custom

• Quiescent Supply Current: 30 A @ 2.7 V V

• Operating Voltage Range: 2.7 to 5.5 V

• Operating Temperature Range: -40 to 85C

• Separate Access to LCD Drive Section’s Supply Voltage to Allow f or Tem-

perature Compensation

• See Application Notes AN1066 and AN442

BLOCK DIAGRAM

OSC1 OSC2

OSCILLATOR

DD

BP1-BP4 FP1-FP32

V

LCD

DRIVERS

MC14LC5004

1

52

ORDERING INFORMATION

MC14LC5003FU QFP MC14LC5004FU QFP MCC14LC5003 BARE DIE MCC14LC5004 BARE DIE

PIN ASSIGNMENT

DD

OSC2

V

FP18

FP17

BP2

BP1

FP16

FP15

NC

OSC1

52 51 50 49 48 47 46 45 44 43 42 41 40

FP32

1

FP31

2

FP30

3

FP29

4

FP28

5

FP27

6

FP26

7

FP25

8

FP24

9

FP23

10

FP22

11

FP21

12

FP20

13 14 15 16 17 18 19 20 21 22 23 24 25 26

NC

FP19

NC=NO CONNECTION

BP3

LCD

V

BP4A0A1

SS

V

FP14

QFP

FU SUFFIX

CASE 848B

ENB

NC

A2

39 38 37 36 35 34 33 32 31 30 29 28 27

NC

FP11

FP13

FP12

Din DCLK NC FP1 FP2 FP3 FP4 FP5 FP6 FP7 FP8 FP9 FP10

REV 2 10/96

DCLK

D

A0 A1

A2

ENB

FRAME

SYNC

GENERATOR

POR

in

DATA AND ADDRESS

CONTROL AND TIMING

LCD VOLTAGE

WAVEFORM AND TIMING

GENERATOR

128-BIT LATCH

128-BIT SHIFT REGISTER

128 - 32

MULTIPLEX

MC14LC5003 • MC14LC5004MOTOROLA

3–3

ABSOLUTE MAXIMUM RATINGS (Voltages Referenced to VSS)

Symbol Parameter Value Unit

V

in osc

T

DC Supply Voltage - 0.5 to + 6.5 V

DD

Input Voltage, Din, and Data Clock - 0.5 to 15 V

in

Input Voltage, OSCin of Master - 0.5 to VDD+ 0.5 V

I

DC Input Current, per Pin ± 10 mA

in

T

Operating Temperature Range - 40 to + 85 °C

A

Storage Temperature Range - 65 to + 150 °C

stg

* Maximum Ratings are those values beyond which damage to the device may occur. Func-

tional operation should be restricted to the limits in the Electrical Characteristics tables or Pin Descriptions section.

This device contains protection circuitry to guard against damage due to high static voltages or electric ﬁelds. Howev er , precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. This device may be light sensitive. Caution should be taken to avoid exposure of this device to any light source during normal operation. This device is not radiation protected.

ELECTRICAL CHARACTERISTICS (Voltages Referenced to V

Characteristic

Symbol

Output Drive Current — Frontplanes

VO = 0.15 V I

VO = 2.65 V I

VO = 1.72 V I

VO = 1.08 V I

VO = 0.15 V I

VO = 5.35 V I

VO = 3.52 V I

VO = 1.98 V I

FH

I

FL

FH

I

FL

FH

I

FL

FH

I

FL

FH

I

FL

FH

I

FL

FH

I

FL

FH

I

FL

Supply Standby Currents (No Clock)

IDD = Standby @ I

= Standby @ I

I

LCD

= Standby @ I

I

DD

= Standby @ I

I

LCD

out out out out

= 0 µA = 0 µA = 0 µA = 0 µA

I

DDS

I

LCDS

I

DDS

I

LCDS

, TA= 25C)

SS

V

DD

V

5 5

2.7 —

5.5 —

V

LCD

V Min Typical Max

2.7

5.5

—

2.7 —

5.5

260 260

-240

-40 —

40 —

600 600

-520

-35 —

55 —

— — — —

— —

— — — —

Unit

µA — —

— —

—

-1.5 —

2

— —

—

-1.5 —

1

µA

30

800

50

1500

Supply Currents (f

= Quiescent @ I

I

DD

I

= Quiescent @ loading = 270pF

DD

= Quiescent @ I

I

DD

= Quiescent @ loading = 270pF

I

DD

= Quiescent @ I

I

LCD

= Quiescent @ I

I

LCD

) = 110 kHz

OSC

= 0 µA, no loading

out

= 0 µA, no loading

out

= 0 µA, no loading

out

= 0 µA, no loading

out

I I I I

I

LCDQ

I

LCDQ

Input Current I Input Capacitance C

MC14LC5003 • MC14LC5004 3–4

DDQ DDQ DDQ DDQ

in

µA

2.7

5.5

5.5 — —

— — — —

2.7

5.5

— — — — — —

30 —

170

— — —

— 70 —

400

40 70

— — -0.1 — 0.1 µA

in

— — — — 7.5 pF

(continued)

MOTOROLA

ELECTRICAL CHARACTERISTICS (Continued)

V

DD

Characteristic

Symbol

Frequencies

OSC2 Frequency @ R1; R1 = 200 kΩ

BP Frequency @ R1

OSC2 Frequency @ R2; R2 = 996 kΩ

Average DC Offset Voltage (BP Relative to FP) V Input Voltage “0” Level V

“1” Level V

f

OSC2

f

BP

f

OSC2

V

OO

2.8

IL

5.5

IL

2.8

IH

5.5

IH

Output Drive Current — Backplanes VO = 2.65 V IBH*

I

BL

VO = 0.15 V I

VO = 1.08V I

VO = 1.72 V I

VO = 5.35 V I

VO = 0.15 V I

VO = 1.98 V I

VO = 3.52 V I

Pulse Width, Data Clock (Figure 1) t

DCLK Rise/Fall Time (Figure 1) tr, t

Setup Time, Din to DCLK (Figure 2) t

Hold Time, Din to DCLK (Figure 2) t

DCLK Low to ENB High (Figure 3) t

ENB High to DCLK High (Figure 3) t

ENB High Pulse Width (Figure 3) t

ENB Low to DCLK High (Figure 3) t

BH

I

BL

BH

I

BL

BH

I

BL

BH

I

BL

BH

I

BL

BH

I

BL

BH

I

BL

w

f

su

h

rec

w

su

NOTE: Timing for Figures 1, 2, and 3 are design estimates only. * For a time (t = 4/OSC FREQ.) after the backplane waveform changes to a new voltage level, the circuit is maintained in the high-current state to

allow the load capacitances to charge quickly. The circuit is then returned to the low-current state until the next voltage change.

LCD

V

5 5 5

V Min Typical Max

5 5 5

100 100

23

— — —

150 150

33

Unit

kHz

Hz

kHz

5 2.8 -50 — +50 mV

5 5

5

2.8

5

2.8

5

2.8

5

2.8

5

2.8

5

2.8

5

2.8

5

2.8

5

5.5

5

5.5

5

5.5

5

5.5

5

5.5

5

5.5

5

5.5

5

5.5

5 3

— —

2

3.85

-240

-240 260

260

40 —

-40 —

-520

-520 600

600

55 —

-35 —

50

100

— —

0 0

30 60

10 20

50

100

10 20

— —

0.85

1.65 —

— —

2

—

-1

— —

—

1

—

-1

— —

20

120

— —

V

µA

ns

µs

ns

MC14LC5003 • MC14LC5004MOTOROLA

3–5

SWITCHING WAVEFORMS

CLK

90%

50%

10%

t

f

t

r

V

DD

D

in

50%

GND

t

w

t

w

CLK

Figure 1. Figure 2.

ENB

CLK

50%

FIRST

CLK

t

w

t

su

LAST

CLK

t

w

t

h

t

rec

V

DD

GND

V

DD

GND

Figure 3.

VALID

V

DD

GND

t

su

50%

t

h

V

DD

GND

MC14LC5003 • MC14LC5004 3–6

MOTOROLA

FUNCTIONAL DESCRIPTION

The MC14LC5003/MC14LC5004 has essentially two sections which operate asynchronously from each other; the data input and storage section and the LCD drive section. The LCD drive and timing is derived from the oscillator, while the data input and storage is controlled by the Data In (D

(DCLK), Address (A0, A1, A2), and Enable (

), Data Clock

in

ENB) pins.

Data is shifted serially into the 128-bit shift register and arranged into four consecutive b locks of 32 parallel data bits. A time-multiplex of the four backplane drivers is made (each backplane driver becoming active then inactive one after another) and, at the start of each backplane active period, the corresponding block of 32 bits is made available at the frontplane drivers. A high input to a plane driver turns the driver on, and a low input turns the driver off.

Figure 4 shows the sequence of backplanes. Figure 5 shows the possible conﬁgurations of the frontplanes relative to the backplanes. When a backplane driver is on, its output s witches

from V to 2/3 V output switches from 0 V to V from 2/3 V

to 0 V, and when it is off, it switches from 1/3 V

LCD

. When a frontplane driver is on, its

LCD

, and when it is off, it switches

LCD

to 1/3 V

LCD

.

LCD

The LCD drive and timing section provides the multiplex signals and backplane driver input signals and formats the frontplane and backplane waveforms.

The address pins are used to uniquely distinguish LCD driver from any other chips on the same bus and to deﬁne LCD driver as the “master” in the system. There must be one master in any system.

The enable pin may be used as a third control line in the communication bus. It may be used to deﬁne the moment when the data is latched. If not used, then the data is latched after 128 bits of data have been received.

BP1

BP2

BP3

BP4

TIME FRAME

Figure 4. Backplane Sequence

V

LCD

2/3 (V 1/3 (V 0 V

V

LCD

2/3 (V 1/3 (V

0 V V

LCD

2/3 (V 1/3 (V 0 V

V

LCD

2/3 (V 1/3 (V 0 V

LCD LCD

) )

MC14LC5003 • MC14LC5004MOTOROLA

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