Motorola MC10188FN, MC10188P Datasheet
SEMICONDUCTOR TECHNICAL DATA
The MC10188 is a high–speed hex buffer with a common Enable input.
When Enable is in the high state, all outputs are in the low state. When Enable
is in the low state, the outputs take the same state as the inputs.
Power Dissipation = 180 mW typ/pkg (No Load)
Propagation Delay= 2.0 ns typ (B – Q)
2.5 ns typ (A – Q)
LOGIC DIAGRAM
10
11
12
X
9
Y
5
6
7
OUT
V
= PIN 1
CC1
V
= PIN 16
CC2
VEE= PIN 8
2
3
4
13
14
15
TRUTH TABLE
Inputs Output
X Y OUT
L L L
L H H
H L L
H H L
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
DIP
PIN ASSIGNMENT
16
IN
IN
IN
Book (DL122/D).
1
2
3
4
5
6
7
8
15
14
13
12
11
10
9
V
CC2
F
OUT
E
OUT
D
OUT
F
IN
E
IN
D
IN
COMMON
V
CC1
A
OUT
B
OUT
C
OUT
A
B
C
V
EE
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
3/93
Motorola, Inc. 1996
3–152
REV 5
MC10188
Under
Und
(VCC)
ELECTRICAL CHARACTERISTICS
Test Limits
Pin
Characteristic Symbol
Power Supply Drain Current I
Input Current I
Output Voltage Logic 1 V
Output Voltage Logic 0 V
Threshold Voltage Logic 1 V
Threshold Voltage Logic 0 V
Switching Times (50Ω Load) ns
Propagation Delay Enable
Data
Rise/Fall Time (20 to 80%) t
inH
I
inH
OH
OL
OHA
OLA
t
PHL
t
PLH
TLH
t
THL
E
Under
Test
8 46 42 46 mAdc
5 425 265 265 µAdc
9 460 290 290 µAdc
2 –1.060 –0.890 –0.960 –0.810 –0.890 –0.700 Vdc
2 –1.890 –1.675 –1.850 –1.650 –1.825 –1.615 Vdc
2 –1.080 –0.980 –0.910 Vdc
2 –1.655 –1.630 –1.595 Vdc
2
2
2 1.1 3.7 1.1 3.3 1.1 3.7
–30°C +25°C +85°C
Min Max Min Max Min Max
1.1
1.0
3.9
3.3
1.1
1.0
3.5
2.9
1.1
1.0
3.9
3.3
Unit
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
@ Test Temperature V
–30°C –0.890 –1.890 –1.205 –1.500 –5.2
+25°C –0.810 –1.850 –1.105 –1.475 –5.2
+85°C –0.700 –1.825 –1.035 –1.440 –5.2
Pin
Characteristic Symbol
Power Supply Drain Current I
Input Current I
Output Voltage Logic 1 V
Output Voltage Logic 0 V
Threshold Voltage Logic 1 V
Threshold Voltage Logic 0 V
Switching Times (50Ω Load) Pulse In Pulse Out –3.2 V +2.0 V
Propagation Delay Enable
Data
Rise/Fall Time (20 to 80%) t
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
inH
I
inH
OH
OHA
OLA
t
PHL
t
PLH
TLH
t
THL
E
OL
er
Test
8 8 1, 16
5 5 8 1, 16
9 9 8 1, 16
2 5 8 1, 16
2 9 8 1, 16
2 5 8 1, 16
2 5 8 1, 16
2
2
2 5 2 8 1, 16
IHmax
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
V
IHmax
V
ILmin
V
ILmin
V
IHAminVILAmax
V
IHAminVILAmax
9
5
V
EE
V
EE
2
2
8
8
Gnd
1, 16
1, 16
DL122 — Rev 6
3–153 MOTOROLAMECL Data
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