SEMICONDUCTOR TECHNICAL DATA
3–141
REV 6
Motorola, Inc. 1996
9/96
The MC10181 is a high–speed arithmetic logic unit capable of performing 16
logic operations and 16 arithmetic operations on two four–bit words. Full
internal carry is incorporated for ripple through operation.
Arithmetic logic operations are selected by applying the appropriate binary
word to the select inputs (S0 through S3) as indicated in the tables of
arithmetic/logic functions. Group carry propagate (PG) and carry generate (GG)
are provided to allow fast operations on very long words using a second order
look ahead. The internal carry is enabled by applying a low level voltage to the
mode control input (M).
PD= 600 mW typ/pkg (No Load)
tpd (typ): A1 to F = 6.5 ns
Cn to Cn + 4 = 3.1 ns
A1 to PG = 5.0 ns
A1 to GG = 4.5 ns
A1 to Cn + 4 = 5.0
LOGIC DIAGRAM
V
CC1
= PIN 1
V
CC2
= PIN 24
VEE= PIN 12
23
13
15
17
14
21
20
18
19
16
11
10
9
22
2
3
7
6
4
8
5
S0 S1 S2 S3
A0
B0
A1
B1
A2
B2
A3
B3
C
n
M
F0
F1
F2
F3
G
G
P
G
C
n+4
Logic Functions Arithmetic Operation
F
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
F = A
F = A + B
F = A + B
F = Logical “1”
F = A • B
F = B
F = AB
F = A + B
F = A • B
F = A B
F = B
F = A + B
F = Logical “0”
F = A
• B
F = A • B
F = A
F = A
F = A plus (A • B)
F = A plus (A • B)
F = A times 2
F = (A + B) plus 0
F = (A + B) plus (A
• B)
F = A plus B
F = A plus (A + B)
F = (A + B) plus 0
F = A minus B minus 1
F = (A + B) plus (A • B)
F = A plus (A + B)
F = minus 1 (two’s complement)
F = (A
• B) minus 1
F = (A • B) minus 1
F = A minus 1
PIN ASSIGNMENT
V
CC1
F0
F1
G
G
CN +
4
F3
F2
P
G
V
CC2
M
C
N
A0
B0
B1
A1
S1
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
B3
A3
B2
V
EE
A2
S2
S0
S3
16
15
14
13
9
10
11
12
L SUFFIX
CERAMIC PACKAGE
CASE 623–05