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LX1664/64A, LX1665/65A |
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DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC |
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T H E I N F I N I T E P O W E R O F I N N O V A T I O N |
P R O D U C T I O N D A T A S H E E T |
D E S C R I P T I O N
The LX1664/64A and LX1665/65A are monolithic switching regulator controller IC’s designed to provide a low cost, high performance adjustable power supply for advanced microprocessors and other applications requiring a very fast transient response and a high degree of accuracy.
Short-circuit Current Limiting without Expensive Current Sense Resistors.
Current-sensing mechanism can use PCB trace resistance or the parasitic resistance of the main inductor. The LX1664A and LX1665A have reduced current sense comparator threshold for optimum performance using a sense resistor. For applications requiring a high degree of accuracy, a conventional sense resistor can be used to sense current.
Programmable Synchronous Rectifier Driver for CPU Core. The main output is adjustable from 1.3V to 3.5V using a 5-bit code. The IC can read a VID signal
set by a DIP switch on the motherboard, or hardwired into the processor’s package (as in the case of Pentium® Pro and Pentium II processors). The 5-bit code adjusts the output voltage between 1.30 and 2.05V in 50mV increments and between 2.0 and 3.5V in 100mV increments, conforming to the Intel Corporation specification. The device can drive dual MOSFET’s resulting in typical efficiencies of 85 - 90% even with loads in excess of 10 amperes. For cost sensitive applications, the bottom MOSFET can be replaced with a Schottky diode (non-syn- chronous operation).
Linear Regulator Driver. The LX1664/ 65 family of devices have a secondary regulator output. This can drive a MOSFET or bipolar transistor as a pass element to construct a low-cost adjustable linear regulator suitable for powering a 1.5V GTL+ bus or 2.5V clock supply.
(continued next page)
IMPORTANT: For the most current data, consult LinFinity's web site: http://www.linfinity.com.
K E Y F E AT U R E S
■5-bit Programmable Output For CPU Core
Supply
■Adjustable Linear Regulator Driver Output
■No Sense Resistor Required For Short-
Circuit Current Limiting
■Designed To Drive Either Synchronous Or
Non-Synchronous Output Stages
■Soft-Start Capability
■Modulated, Constant Off-Time Architecture
For Fast Transient Response And Simple
System Design
■Available Over-Voltage Protection (OVP) Crowbar Driver And Power Good Flag
(LX1665 only)
A P P L I C AT I O N S
■Socket 7 (Pentium Class) Microprocessor
Supplies (including Intel Pentium Processor, AMD-K6TM And Cyrix® 6x86TM, Gx86TM and M2TM Processors)
■Pentium II and Deschutes Processor & L2-
Cache Supplies
■Voltage Regulator Modules
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P R O D U C T H I G H L I G H T |
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LX1665 I N A |
PE N T I U M |
II SI N G L E -CH I P PO W E R |
SU P P LY |
SO L U T I O N |
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12V |
F1 20A |
5V |
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C3 |
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L2 |
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1µH |
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6.3V |
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0.1µF |
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U1 |
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C5 |
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1500µF x3 |
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LX1665 |
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1µF |
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1 |
18 |
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Q1 |
C2 |
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R1 |
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SS |
VC1 |
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Supply Voltage |
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INV |
TDRV |
17 |
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IRL3102 |
L1 |
0.0025 |
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for CPU Core VOUT |
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3 |
16 |
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2.5µH |
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4 |
VCC_CORE |
GND |
15 |
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Q2 |
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C |
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VID0 |
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VID0 |
BDRV |
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IRL3303 |
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1 |
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VID1 |
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VID1 |
VCC |
14 |
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6.3V, 1500µF x 3** |
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6 |
13 |
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C9 |
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** Three capacitors for Pentium |
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VID2 |
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VID2 |
CT |
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Four capacitors for Pentium II |
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C8 |
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330µF |
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VID3 |
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7 |
VID3 |
OV 12 |
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Q4 |
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VID4 |
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8 |
VID4 |
LDRV |
11 |
680pF |
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Supply Voltage |
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IRLZ44 |
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For I/O Chipset or GTL+ Bus |
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9 |
LFB |
PWRGD 10 |
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R5 |
C7 |
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18-pin |
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OV |
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330µF |
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Wide-Body SOIC |
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PWRGD |
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R6 |
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PA C K A G E O R D E R I N F O R M AT I O N |
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Guide |
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TA (°C) |
N |
Plastic DIP |
N |
Plastic DIP |
D Plastic SOIC |
DW Plastic SOIC Wide |
page |
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16-pin |
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18-pin |
16-pin |
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18-pin |
See next for |
Selection |
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0 to 70 |
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LX1664CN |
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LX1665CN |
LX1664CD |
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LX1665CDW |
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LX1664ACN |
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LX1665ACN |
LX1664ACD |
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LX1665ACDW |
Note: All surface-mount packages are available in Tape & Reel. Append the letter "T" to part number. (e.g. LX1664CDT)
Copyright © 1999 |
L I N F I N I T Y M I C R O E L E C T R O N I C S I N C . |
1 |
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11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841, 714-898-8121, FAX: 714-893-2570 |
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Rev. 1.2 11/99 |
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
D E S C R I P T I O N (con't.)
Smallest Package Size. The LX1664 is available in a narrow body 16-pin surface mount IC package for space sensitive applications. The LX1665 provides the additional functions of Over Voltage Protection (OVP) and Power Good (PWRGD) output drives for applications requiring output voltage monitoring and protection functions.
Ultra-Fast Transient Response reduces system cost. The modulated offtime architecture results in the fastest tran-
sient response for a given inductor, reducing output capacitor requirements, and reducing the total regulator system cost.
Over-Voltage Protection and Power Good Flag. The OVP output in the LX1665 & LX1665A can be used to drive an SCR crowbar circuit to protect the load in the event of a short-circuit of the main MOSFET. The LX1665 & LX1665A also have a logiclevel Power Good Flag to signal when the output voltage is out of specified limits.
D E V I C E S E L E C T I O N G U I D E
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OVP and |
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Current-Sense |
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DEVICE |
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Packages |
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Power Good |
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Comp. Thresh. (mV) |
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Optimal Load |
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LX1664 |
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16-pin SOIC |
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No |
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100 |
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Pentium-class (<10A) |
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LX1664A |
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& DIP |
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60 |
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Pentium II (> 10A) |
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LX1665 |
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18-pin SOIC |
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Yes |
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100 |
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Pentium-class (<10A) |
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LX1665A |
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& DIP |
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60 |
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Pentium II (> 10A) |
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ABSOLUTE MAXIMUM RATINGS (Note 1) |
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Supply Voltage (VC1) .................................................................................................... |
25V |
Supply Voltage (VCC) .................................................................................................... |
15V |
Output Drive Peak Current Source (500ns)............................................................... |
1.5A |
Output Drive Peak Current Sink (500ns) ................................................................... |
1.5A |
Input Voltage (SS, INV, VCC_CORE, CT, VID0-VID4) ........................................... |
-0.3V to 6V |
Operating Junction Temperature |
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Plastic (N, D & DW Packages) ............................................................................. |
150°C |
Storage Temperature Range .................................................................... |
-65°C to +150°C |
Lead Temperature (Soldering, 10 Seconds) ............................................................. |
300°C |
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Pin numbers refer to DIL packages only.
THERMAL DATA
N (16-PIN DIP) PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA |
65°C/W |
N (18-PIN DIP) PACKAGE: |
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THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA |
60°C/W |
D PACKAGE: |
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THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA |
120°C/W |
DW PACKAGE: |
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THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA |
90°C/W |
PACKAGE PIN OUTS
SS |
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1 |
16 |
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VC1 |
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INV |
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2 |
15 |
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TDRV |
VCC_CORE |
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3 |
14 |
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GND |
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VID0 |
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4 |
13 |
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BDRV |
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VID1 |
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5 |
12 |
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VCC |
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VID2 |
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6 |
11 |
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CT |
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VID3 |
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7 |
10 |
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LDRV |
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VID4 |
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8 |
9 |
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LFB |
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N PACKAGE — 16-Pin
LX1664/1664A (Top View)
SS |
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1 |
18 |
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VC1 |
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INV |
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2 |
17 |
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TDRV |
VCC_CORE |
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3 |
16 |
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GND |
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VID0 |
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4 |
15 |
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BDRV |
VID1 |
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5 |
14 |
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VCC |
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VID2 |
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6 |
13 |
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CT |
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VID3 |
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7 |
12 |
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OV |
VID4 |
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8 |
11 |
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LDRV |
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LFB |
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9 |
10 |
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PWRGD |
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N PACKAGE — 18-Pin
LX1665/1665A (Top View)
SS |
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1 |
16 |
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VC1 |
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INV |
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2 |
15 |
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TDRV |
VCC_CORE |
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3 |
14 |
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GND |
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VID0 |
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4 |
13 |
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BDRV |
VID1 |
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5 |
12 |
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VCC |
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VID2 |
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6 |
11 |
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CT |
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VID3 |
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7 |
10 |
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LDRV |
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VID4 |
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8 |
9 |
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LFB |
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D PACKAGE — 16-Pin
LX1664/1664A (Top View)
SS |
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1 |
18 |
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VC1 |
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INV |
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2 |
17 |
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TDRV |
VCC_CORE |
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3 |
16 |
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GND |
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VID0 |
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4 |
15 |
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BDRV |
VID1 |
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5 |
14 |
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VCC |
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VID2 |
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6 |
13 |
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CT |
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VID3 |
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7 |
12 |
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OV |
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VID4 |
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8 |
11 |
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LDRV |
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LFB |
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9 |
10 |
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PWRGD |
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DW PACKAGE — 18-Pin
LX1665/1665A (Top View)
Junction Temperature Calculation: TJ = TA + (PD x θJA).
The θJA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow
2 |
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Copyright © 1999 |
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Rev. 1.2 11/99 |
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P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
E L E C T R I C A L C H A R A C T E R I S T I C S
(Unless otherwise specified, 10.8 < VCC < 13.2, 0°C ≤ TA ≤ 70°C. Test conditions: VCC = 12V, T = 25°C. Use Application Circuit.)
Parameter |
Symbol |
Test Conditions |
LX1664/1665 (A) |
Units |
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Min. |
Typ. |
Max. |
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Reference & DAC Section (See Table 1 - Next Page) |
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Regulation Accuracy (See Table 1) |
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(Less 40mV output adaptive positioning), VCC = 12V, ILOAD = 6A |
-30 |
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30 |
mV |
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Regulation Accuracy |
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1.8V ≤ VOUT ≤ 2.8V |
-1 |
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1 |
% |
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Timing Section |
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Off Time Initial |
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OT |
VCC_CORE = 1.3V, CT = 390pF |
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2 |
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µs |
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VCC_CORE = 3.5V, CT = 390pF |
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1 |
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µs |
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Off Time Temp Stability |
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VCC_CORE = 1.3V to 3.5V |
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40 |
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ppm |
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Discharging Current |
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IDIS |
VCC_CORE = 1.3V, VCT = 1.5V |
180 |
210 |
240 |
µA |
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Ramp Peak |
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VP |
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2 |
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V |
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Ramp Peak-Valley |
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VRPP |
VCC_CORE = 1.3V |
0.9 |
1 |
1.1 |
V |
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VCC_CORE = 3.5V |
0.37 |
0.42 |
0.47 |
V |
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Ramp Valley Delay to Output |
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10% Overdrive |
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100 |
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ns |
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Error Comparator Section |
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Input Bias Current |
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IB |
1.3V < VSS = VINV < 3.5V |
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0.8 |
2 |
µA |
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Input Offset Voltage |
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VIO |
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36 |
41 |
46 |
mV |
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EC Delay to Output |
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10% Overdrive |
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200 |
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ns |
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Current Sense Section |
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Input Bias Current (VCC_CORE Pin) |
IB |
1.3V < VINV = VCC_CORE < 3.5V |
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27 |
35 |
µA |
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Pulse By Pulse CL |
LX1664/1665 |
VCLP |
Initial Accuracy |
85 |
100 |
115 |
mV |
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LX1664A/1665A |
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Initial Accuracy |
50 |
60 |
70 |
mV |
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CS Delay to Output |
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10% Overdrive |
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200 |
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ns |
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Output Drivers Section |
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Drive Rise Time |
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TR |
VC1 = VCC = 12V, CL = 3000pF |
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70 |
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ns |
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Drive Fall Time |
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TF |
VC1 = VCC = 12V, CL = 3000pF |
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70 |
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ns |
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Drive High |
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VDH |
VCC = VCC = 12V, ISOURCE = 20mA |
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11 |
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V |
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VCC = VCC = 12V, ISINK = 200mA |
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10 |
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V |
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Drive Low |
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VDL |
VCC = VCC = 12V, ISOURCE = 20mA |
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0.06 |
0.1 |
V |
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VCC = VCC = 12V, ISINK = 200mA |
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0.8 |
1.2 |
V |
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Output Pull Down |
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VPD |
VCC = VC = 0, IPULL UP = 2mA |
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0.8 |
1.4 |
V |
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UVLO and S.S. Section |
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Start-Up Threshold |
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VST |
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9.9 |
10.1 |
10.4 |
V |
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Hysteresis |
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VHYST |
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0.31 |
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V |
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SS Sink Current |
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ISD |
VC1 = 10.1V |
2 |
5.5 |
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mA |
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SS Sat Voltage |
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VOL |
VC1 = 9V, ISD = 200µA |
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0.15 |
0.6 |
V |
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Supply Current Section |
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Dynamic Operating Current |
ICD |
VCC = VC1 = 12V, Out Freq = 200kHz, CL = 0 |
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27 |
mA |
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Power Good / Over-Voltage Protection Section (LX1665 Only) |
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Lower Threshold |
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(VCC_CORE / DACOUT) |
88 |
90 |
92 |
% |
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Hysteresis |
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1 |
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% |
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Power Good Voltage Low |
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IPWRGD = 5mA |
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0.5 |
0.7 |
V |
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Over-Voltage Threshold |
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(VCC_CORE / VDAC) |
110 |
117 |
125 |
% |
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OVP Sourcing Current |
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VOV = 5V |
30 |
45 |
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mA |
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Linear Regulator Section |
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Output Voltage |
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Set by external resistors |
1.5 |
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3.6 |
V |
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Setpoint Accuracy |
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IL = 0.5A using 0.5% resistors |
-1.5 |
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1.5 |
% |
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Output Temperature Drift |
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40 |
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ppm |
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Load Regulation |
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1.5 |
% |
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Cummulative Accuracy |
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3 |
% |
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Op-Amp Output Current |
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Open Loop |
50 |
70 |
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mA |
Copyright © 1999 |
3 |
Rev. 1.2 11/99 |
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
E L E C T R I C A L C H A R A C T E R I S T I C S
|
Table 1 - Adaptive Transient Voltage Output |
(Output Voltage Setpoint — Typical) |
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Processor Pins |
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Output Voltage (VCC_CORE) |
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0 = Ground, 1 = Open (Floating) |
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VID4 |
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VID3 |
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VID2 |
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VID1 |
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VID0 |
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0.0A |
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Nominal Output* |
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0 |
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1 |
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1 |
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1 |
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1 |
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1.34V |
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1.30V |
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0 |
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1 |
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1 |
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1 |
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0 |
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1.39V |
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1.35V |
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0 |
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1 |
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1 |
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0 |
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1 |
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1.44V |
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1.40V |
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0 |
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1 |
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1 |
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0 |
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0 |
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1.49V |
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1.45V |
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0 |
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1 |
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0 |
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1 |
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1 |
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1.54V |
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1.50V |
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0 |
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1 |
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0 |
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1 |
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0 |
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1.59V |
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1.55V |
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0 |
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1 |
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0 |
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0 |
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1 |
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1.64V |
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1.60V |
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0 |
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1 |
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0 |
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0 |
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0 |
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1.69V |
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1.65V |
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0 |
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0 |
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1 |
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1 |
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1 |
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1.74V |
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1.70V |
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0 |
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0 |
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1 |
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1 |
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0 |
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1.79V |
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1.75V |
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0 |
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0 |
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1 |
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0 |
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1 |
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1.84V |
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1.80V |
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0 |
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0 |
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1 |
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0 |
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0 |
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1.89V |
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1.85V |
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0 |
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0 |
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0 |
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1 |
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1 |
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1.94V |
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1.90V |
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0 |
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0 |
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0 |
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1 |
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0 |
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1.99V |
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1.95V |
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0 |
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0 |
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0 |
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0 |
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1 |
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2.04V |
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2.00V |
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0 |
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0 |
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0 |
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0 |
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0 |
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2.09V |
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2.05V |
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1 |
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1 |
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1 |
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1 |
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1 |
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2.04V |
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2.00V |
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1 |
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1 |
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1 |
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1 |
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0 |
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2.14V |
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2.10V |
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1 |
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1 |
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1 |
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0 |
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1 |
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2.24V |
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2.20V |
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1 |
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1 |
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1 |
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0 |
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0 |
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2.34V |
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2.30V |
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1 |
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1 |
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0 |
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1 |
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1 |
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2.44V |
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2.40V |
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1 |
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1 |
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0 |
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1 |
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0 |
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2.54V |
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2.50V |
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1 |
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1 |
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0 |
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0 |
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1 |
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2.64V |
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2.60V |
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1 |
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1 |
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0 |
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0 |
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0 |
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2.74V |
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2.70V |
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1 |
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0 |
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1 |
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1 |
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1 |
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2.84V |
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2.80V |
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1 |
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0 |
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1 |
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1 |
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0 |
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2.94V |
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2.90V |
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1 |
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0 |
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1 |
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0 |
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1 |
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3.04V |
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3.00V |
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1 |
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0 |
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1 |
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0 |
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0 |
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3.14V |
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3.10V |
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1 |
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0 |
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0 |
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1 |
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1 |
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3.24V |
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3.20V |
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1 |
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0 |
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0 |
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1 |
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0 |
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3.34V |
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3.30V |
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1 |
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0 |
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0 |
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0 |
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1 |
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3.44V |
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3.40V |
1 |
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0 |
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0 |
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0 |
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0 |
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3.54V |
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3.50V |
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* Nominal = DAC setpoint voltage with no adaptive output voltage positioning.
Note:
Adaptive Transient Voltage Output
In order to improve transient response a 40mV offset is built into the Current Sense comparator. At high currents, the peak output voltage will be lower than the nominal set point, as shown in Figure 1. The actual output voltage will be a function of the sense resistor, the output current and output ripple.
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5A/Div. |
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Output Load 0 to 14A |
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0A |
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2.8V |
100mV/Div. |
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Output Voltage |
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Time - 100µs/Div.
FIGURE 1 — Output Transient Response (using 5mΩ sense resistor and 5µH output inductor)
4 |
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Copyright © 1999 |
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Rev. 1.2 11/99 |
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P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
C H A R A C T E R I S T I C S C U RV E S
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95 |
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90 |
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(%) |
85 |
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EFFICIENCY |
80 |
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Output Set Point |
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EFFICIENCY AT 3.1V |
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75 |
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EFFICIENCY AT 2.8V |
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EFFICIENCY AT 1.8V |
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70 |
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1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
11 |
12 |
13 |
14 |
IOUT (A)
FIGURE 2 — Efficiency Test Results:
Non-Synchronous Operation, VIN = 5V
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100 |
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95 |
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90 |
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(%) |
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EFFICIENCY |
85 |
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80 |
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Output Set Point |
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EFFICIENCY AT 3.1V |
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75 |
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EFFICIENCY AT 2.8V |
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EFFICIENCY AT 1.8V |
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70 |
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1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
11 |
12 |
13 |
14 |
IOUT (A)
FIGURE 3 — Efficiency Test Results:
Synchronous Operation, VIN = 5V
90 |
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85 |
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80 |
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75 |
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70 |
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Output Set Point |
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1.8V EFFICIENCY |
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65 |
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2.8V EFFICIENCY |
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3.3V EFFICIENCY |
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60 |
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1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
11 |
12 |
13 |
14 |
IOUT (A)
FIGURE 4 — Efficiency Test Results: Synchronous Operation, VIN = 12V.
Note: Non-synchronous operation not recommended for 12V operation, due to power loss in Schottky diode.
Copyright © 1999 |
5 |
Rev. 1.2 11/99 |
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
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P R O D U C T I O N D A T A S H E E T |
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B L O C K D I A G R A M |
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VCC |
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18 |
VC1 |
SS |
1 |
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PWM Latch |
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Trimmed |
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2V Out |
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S |
Q |
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2V REF |
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UVLO |
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R DOM |
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17 |
TDRV |
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10.6/10.1 |
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R |
Q |
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Internal |
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VCC |
VREG |
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16 |
GND |
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40mV |
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Break |
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15 |
BDRV |
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Before |
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Make |
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INV |
2 |
Error Comp |
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Off-Time |
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0.7V |
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SYNC EN |
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Controller |
14 |
VCC |
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Comp |
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VCC_CORE |
3 |
100mV ** |
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CS Comp |
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OV Comp |
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CT |
13 |
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12 |
OV* |
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UV Comp |
10 |
PWRGD* |
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10k |
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DAC OUT |
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LX1665/1665A ONLY |
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DAC |
1.5V |
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Linear Op Amp |
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11 LDRV
9 LFB
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4 |
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5 |
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6 |
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7 |
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8 |
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Note: Pin numbers are correct for LX1665/1665A, 18-pin package. |
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VID0 |
VID1 |
VID2 |
VID3 |
VID4 |
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* Not connected on LX1664/1664A. |
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** 60mV in LX1664A/1665A.
FIGURE 5 — LX1664/1665 Block Diagram
6 |
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Copyright © 1999 |
|
Rev. 1.2 11/99 |
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