Melexis TH72016 Technical data
TH72016
433MHz
FSK/ASK Transmitter
Features
Fully integrated PLL-stabilized VCO
Frequency range from 380 MHz to 450 MHz
Single-ended RF output
FSK through crystal pulling allows modulation
from DC to 40 kbit/s
High FSK deviation possible for wideband data
transmission
ASK achieved by on/off keying of internal
power amplifier up to 40 kbit/s
Wide power supply range from 1.95 V to 5.5 V
Very low standby current
Ordering Information
Part Number Temperature Code Package Code Delivery Form
Microcontroller clock output
On-chip low voltage detector
High over-all frequency accuracy
FSK deviation and center frequency
independently adjustable
Adjustable output power range from
-12 dBm to +10 dBm
Adjustable current consumption from
3.8 mA to 11.0 mA
Conforms to EN 300 220 and similar standards
10-pin Quad Flat No-Lead Package (QFN)
TH72016 K (-40 °C to 125 °C) LD (10L QFN 3x3 Dual)
121 pc/tube
5000 pc/T&R
Application Examples Pin Description
General digital data transmission
Tire Pressure Monitoring Systems (TPMS)
Remote Keyless Entry (RKE)
Wireless access control
Alarm and security systems
Garage door openers
Remote Controls
Home and building automation
FSKDTA
FSKSW
ROI
EN
CKOUT
top
TH72016
VCC
VEE
OUT
CKDIV
PSEL
10
9
8
7
6
bottom
1
2
3
4
5
Low-power telemetry systems
General Description
The TH72016 FSK/ASK transmitter IC is designed for applications in the European 433 MHz industrialscientific-medical (ISM) band, according to the EN 300 220 telecommunications standard; but it can also be
used in other countries with similar standards, e.g. FCC part 15.231.
The transmitter's carrier frequency f
is determined by the frequency of the reference crystal f
c
grated PLL synthesizer ensures that carrier frequencies, ranging from 380 MHz to 450 MHz, can be
achieved. This is done by using a crystal with a reference frequency according to: f
= fc/N, where N = 32 is
ref
the PLL feedback divider ratio.
A clock signal with selectable frequency is provided. It can be used to drive a microcontroller.
. The inte-
ref
39010 72016 Page 1 of 16 Data Sheet
Rev. 007 March/08
TH72016
433MHz
FSK/ASK Transmitter
Document Content
1 Theory of Operation...................................................................................................3
1.1 General............................................................................................................................. 3
1.2 Block Diagram.................................................................................................................. 3
2 Functional Description ..............................................................................................3
2.1 Crystal Oscillator .............................................................................................................. 3
2.2 FSK Modulation................................................................................................................ 4
2.3 Crystal Pulling................................................................................................................... 4
2.4 ASK Modulation................................................................................................................ 5
2.5 Output Power Selection.................................................................................................... 5
2.6 Lock Detection.................................................................................................................. 5
2.7 Low Voltage Detection...................................................................................................... 5
2.8 Mode Control Logic .......................................................................................................... 6
2.9 Clock Output..................................................................................................................... 6
2.10 Timing Diagrams .............................................................................................................. 6
3 Pin Definition and Description..................................................................................7
4 Electrical Characteristics ..........................................................................................8
4.1 Absolute Maximum Ratings.............................................................................................. 8
4.2 Normal Operating Conditions........................................................................................... 8
4.3 Crystal Parameters........................................................................................................... 8
4.4 DC Characteristics............................................................................................................ 9
4.5 AC Characteristics.......................................................................................................... 10
4.6 Output Power Steps – FSK Mode .................................................................................. 11
4.7 Output Power Steps – ASK Mode .................................................................................. 11
5 Test Circuit ...............................................................................................................12
5.1 Test circuit component list to Fig. 6................................................................................ 12
6 Package Description................................................................................................13
6.1 Soldering Information ..................................................................................................... 13
6.2 Recommended PCB Footprints...................................................................................... 13
7 Reliability Information..............................................................................................14
8 ESD Precautions ............................................................Error! Bookmark not defined.
9 Disclaimer.................................................................................................................16
39010 72016 Page 2 of 16 Data Sheet
Rev. 007 March/08
TH72016
V
433MHz
FSK/ASK Transmitter
1 Theory of Operation
1.1 General
As depicted in Fig.1, the TH72016 transmitter consists of a fully integrated voltage-controlled oscillator
(VCO), a divide-by-32 divider (div32), a phase-frequency detector (PFD) and a charge pump (CP). An internal loop filter determines the dynamic behavior of the PLL and suppresses reference spurious signals. A
Colpitts crystal oscillator (XOSC) is used as the reference oscillator of a phase-locked loop (PLL) synthesizer. The VCO’s output signal feeds the power amplifier (PA). The RF signal power P
four steps from P
voltage V
at pin PSEL. The open-collector output (OUT) can be used either to directly drive a loop antenna
PS
= –12 dBm to +10 dBm, either by changing the value of resistor RPS or by varying the
out
or to be matched to a 50Ohm load. Bandgap biasing ensures stable operation of the IC at a power supply
range of 1.95 V to 5.5 V.
1.2 Block Diagram
can be adjusted in
out
XTAL
CX1
CKOUT
FSKSW
CX2
ROI
5
3
2
div 4
div 16
XOSC
1
FSKDTA
CKDIV
XBUF
RPS
VCC
7
PLL
32
PFD
CP
10
CO
PSEL
R1
6
PA
mode
control
9
VEE
ASKDTA
8
OUT
4
EN
antenna
matching
network
Fig. 1: Block diagram with external components
2 Functional Description
2.1 Crystal Oscillator
A Colpitts crystal oscillator with integrated functional capacitors is used as the reference oscillator for the PLL
synthesizer. The equivalent input capacitance CRO offered by the crystal oscillator input pin ROI is about
18pF. The crystal oscillator is provided with an amplitude control loop in order to have a very stable frequency over the specified supply voltage and temperature range in combination with a short start-up time.
39010 72016 Page 3 of 16 Data Sheet
Rev. 007 March/08
O
O
2.2 FSK Modulation
FSK modulation can be achieved by pulling the
crystal oscillator frequency. A CMOScompatible data stream applied at the pin
FSKDTA digitally modulates the XOSC via an
integrated NMOS switch. Two external pulling
capacitors CX1 and CX2 allow the FSK deviation Δf and the center frequency f
justed independently. At FSKDTA = 0, CX2 is
connected in parallel to CX1 leading to the lowfrequency component of the FSK spectrum
); while at FSKDTA = 1, CX2 is deactivated
(f
min
and the XOSC is set to its high frequency f
An external reference signal can be directly ACcoupled to the reference oscillator input pin
ROI. Then the transmitter is used without a
crystal. Now the reference signal sets the carrier frequency and may also contain the FSK (or
FM) modulation.
to be ad-
c
max
.
TH72016
FSK/ASK Transmitter
Fig. 2: Crystal pulling circuitry
FSKDTA Description
0
1
XTAL
CX2
CX1
= fc - Δf (FSK switch is closed)
f
min
= fc + Δf (FSK switch is open)
f
max
433MHz
VCC
ROI
FSKSW
VEE
2.3 Crystal Pulling
A crystal is tuned by the manufacturer to the
required oscillation frequency f
at a given load
0
capacitance CL and within the specified calibration tolerance. The only way to pull the oscillation frequency is to vary the effective load capacitance CL
seen by the crystal.
eff
Figure 3 shows the oscillation frequency of a
crystal as a function of the effective load capacitance. This capacitance changes in accordance with the logic level of FSKDTA around
the specified load capacitance. The figure illustrates the relationship between the external
pulling capacitors and the frequency deviation.
It can also be seen that the pulling sensitivity
increases with the reduction of CL. Therefore,
applications with a high frequency deviation
require a low load capacitance. For narrow
band FSK applications, a higher load capacitance could be chosen in order to reduce the
frequency drift caused by the tolerances of the
chip and the external pulling capacitors.
For ASK applications CX2 can be omitted. Then CX1 has to be adjusted for center frequency.
f
f
max
f
c
XTAL
L1
C1
R1
f
min
CX1+CR
CLCX1 CRO
(CX1+CX2) CRO
CX1+CX2+CR
Fig. 3: Crystal pulling characteristic
C0
CL
CL
eff
eff
39010 72016 Page 4 of 16 Data Sheet
Rev. 007 March/08
TH72016
433MHz
FSK/ASK Transmitter
2.4 ASK Modulation
The TH72016 can be ASK-modulated by applying data directly at pin PSEL. This turns the PA on and off
which leads to an ASK signal at the output.
2.5 Output Power Selection
The transmitter is provided with an output power selection feature. There are four predefined output power
steps and one off-step accessible via the power selection pin PSEL. A digital power step adjustment was
chosen because of its high accuracy and stability. The number of steps and the step sizes as well as the
corresponding power levels are selected to cover a wide spectrum of different applications.
The implementation of the output power control
logic is shown in figure 4. There are two
matched current sources with an amount of
about 8 µA. One current source is directly applied to the PSEL pin. The other current source
is used for the generation of reference voltages
with a resistor ladder. These reference voltages
are defining the thresholds between the power
steps. The four comparators deliver thermometer-coded control signals depending on the
voltage level at the pin PSEL. In order to have a
certain amount of ripple tolerance in a noisy
environment the comparators are provided with
a little hysteresis of about 20 mV. With these
control signals, weighted current sources of the
power amplifier are switched on or off to set the
desired output power level (Digitally Controlled
Current Source). The LOCK signal and the
output of the low voltage detector are gating
this current source.
There are two ways to select the desired output power step. First by applying a DC voltage at the pin PSEL,
then this voltage directly selects the desired output power step. This kind of power selection can be used if
the transmission power must be changed during operation. For a fixed-power application a resistor can be
used which is connected from the PSEL pin to ground. The voltage drop across this resistor selects the desired output power level. For fixed-power applications at the highest power step this resistor can be omitted.
The pin PSEL is in a high impedance state during the “TX standby” mode.
RPS
PSEL
Fig. 4: Block diagram of output power control circuitry
&
&
&
&
&
OUT
2.6 Lock Detection
The lock detection circuitry turns on the power amplifier only after PLL lock. This prevents from unwanted
emission of the transmitter if the PLL is unlocked.
2.7 Low Voltage Detection
The supply voltage is sensed by a low voltage detect circuitry. The power amplifier is turned off if the supply
voltage drops below a value of about 1.85 V. This is done in order to prevent unwanted emission of the
transmitter if the supply voltage is too low.
39010 72016 Page 5 of 16 Data Sheet
Rev. 007 March/08
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