Fully integrated PLL-stabilized VCO
Frequency range from 380 MHz to 450 MHz
Single-ended RF output
FSK through crystal pulling allows modulation
from DC to 40 kbit/s
High FSK deviation possible for wideband data
transmission
ASK achieved by on/off keying of internal
power amplifier up to 40 kbit/s
Wide power supply range from 1.95 V to 5.5 V
Very low standby current
Ordering Information
Part Number Temperature Code Package Code Delivery Form
Microcontroller clock output
On-chip low voltage detector
High over-all frequency accuracy
FSK deviation and center frequency
independently adjustable
Adjustable output power range from
-12 dBm to +10 dBm
Adjustable current consumption from
3.8 mA to 11.0 mA
Conforms to EN 300 220 and similar standards
10-pin Quad Flat No-Lead Package (QFN)
TH72016 K (-40 °C to 125 °C) LD (10L QFN 3x3 Dual)
121 pc/tube
5000 pc/T&R
Application Examples Pin Description
General digital data transmission
Tire Pressure Monitoring Systems (TPMS)
Remote Keyless Entry (RKE)
Wireless access control
Alarm and security systems
Garage door openers
Remote Controls
Home and building automation
FSKDTA
FSKSW
ROI
EN
CKOUT
top
TH72016
VCC
VEE
OUT
CKDIV
PSEL
10
9
8
7
6
bottom
1
2
3
4
5
Low-power telemetry systems
General Description
The TH72016 FSK/ASK transmitter IC is designed for applications in the European 433 MHz industrialscientific-medical (ISM) band, according to the EN 300 220 telecommunications standard; but it can also be
used in other countries with similar standards, e.g. FCC part 15.231.
The transmitter's carrier frequency f
is determined by the frequency of the reference crystal f
c
grated PLL synthesizer ensures that carrier frequencies, ranging from 380 MHz to 450 MHz, can be
achieved. This is done by using a crystal with a reference frequency according to: f
= fc/N, where N = 32 is
ref
the PLL feedback divider ratio.
A clock signal with selectable frequency is provided. It can be used to drive a microcontroller.
. The inte-
ref
39010 72016 Page 1 of 16 Data Sheet
Rev. 007 March/08
TH72016
433MHz
FSK/ASK Transmitter
Document Content
1 Theory of Operation...................................................................................................3
39010 72016 Page 2 of 16 Data Sheet
Rev. 007 March/08
TH72016
V
433MHz
FSK/ASK Transmitter
1 Theory of Operation
1.1 General
As depicted in Fig.1, the TH72016 transmitter consists of a fully integrated voltage-controlled oscillator
(VCO), a divide-by-32 divider (div32), a phase-frequency detector (PFD) and a charge pump (CP). An internal loop filter determines the dynamic behavior of the PLL and suppresses reference spurious signals. A
Colpitts crystal oscillator (XOSC) is used as the reference oscillator of a phase-locked loop (PLL) synthesizer. The VCO’s output signal feeds the power amplifier (PA). The RF signal power P
four steps from P
voltage V
at pin PSEL. The open-collector output (OUT) can be used either to directly drive a loop antenna
PS
= –12 dBm to +10 dBm, either by changing the value of resistor RPS or by varying the
out
or to be matched to a 50Ohm load. Bandgap biasing ensures stable operation of the IC at a power supply
range of 1.95 V to 5.5 V.
1.2 Block Diagram
can be adjusted in
out
XTAL
CX1
CKOUT
FSKSW
CX2
ROI
5
3
2
div 4
div 16
XOSC
1
FSKDTA
CKDIV
XBUF
RPS
VCC
7
PLL
32
PFD
CP
10
CO
PSEL
R1
6
PA
mode
control
9
VEE
ASKDTA
8
OUT
4
EN
antenna
matching
network
Fig. 1: Block diagram with external components
2 Functional Description
2.1 Crystal Oscillator
A Colpitts crystal oscillator with integrated functional capacitors is used as the reference oscillator for the PLL
synthesizer. The equivalent input capacitance CRO offered by the crystal oscillator input pin ROI is about
18pF. The crystal oscillator is provided with an amplitude control loop in order to have a very stable frequency over the specified supply voltage and temperature range in combination with a short start-up time.
39010 72016 Page 3 of 16 Data Sheet
Rev. 007 March/08
O
O
2.2 FSK Modulation
FSK modulation can be achieved by pulling the
crystal oscillator frequency. A CMOScompatible data stream applied at the pin
FSKDTA digitally modulates the XOSC via an
integrated NMOS switch. Two external pulling
capacitors CX1 and CX2 allow the FSK deviation Δf and the center frequency f
justed independently. At FSKDTA = 0, CX2 is
connected in parallel to CX1 leading to the lowfrequency component of the FSK spectrum
); while at FSKDTA = 1, CX2 is deactivated
(f
min
and the XOSC is set to its high frequency f
An external reference signal can be directly ACcoupled to the reference oscillator input pin
ROI. Then the transmitter is used without a
crystal. Now the reference signal sets the carrier frequency and may also contain the FSK (or
FM) modulation.
to be ad-
c
max
.
TH72016
FSK/ASK Transmitter
Fig. 2: Crystal pulling circuitry
FSKDTA Description
0
1
XTAL
CX2
CX1
= fc - Δf (FSK switch is closed)
f
min
= fc + Δf (FSK switch is open)
f
max
433MHz
VCC
ROI
FSKSW
VEE
2.3 Crystal Pulling
A crystal is tuned by the manufacturer to the
required oscillation frequency f
at a given load
0
capacitance CL and within the specified calibration tolerance. The only way to pull the oscillation frequency is to vary the effective load capacitance CL
seen by the crystal.
eff
Figure 3 shows the oscillation frequency of a
crystal as a function of the effective load capacitance. This capacitance changes in accordance with the logic level of FSKDTA around
the specified load capacitance. The figure illustrates the relationship between the external
pulling capacitors and the frequency deviation.
It can also be seen that the pulling sensitivity
increases with the reduction of CL. Therefore,
applications with a high frequency deviation
require a low load capacitance. For narrow
band FSK applications, a higher load capacitance could be chosen in order to reduce the
frequency drift caused by the tolerances of the
chip and the external pulling capacitors.
For ASK applications CX2 can be omitted. Then CX1 has to be adjusted for center frequency.
f
f
max
f
c
XTAL
L1
C1
R1
f
min
CX1+CR
CLCX1 CRO
(CX1+CX2) CRO
CX1+CX2+CR
Fig. 3: Crystal pulling characteristic
C0
CL
CL
eff
eff
39010 72016 Page 4 of 16 Data Sheet
Rev. 007 March/08
TH72016
433MHz
FSK/ASK Transmitter
2.4 ASK Modulation
The TH72016 can be ASK-modulated by applying data directly at pin PSEL. This turns the PA on and off
which leads to an ASK signal at the output.
2.5 Output Power Selection
The transmitter is provided with an output power selection feature. There are four predefined output power
steps and one off-step accessible via the power selection pin PSEL. A digital power step adjustment was
chosen because of its high accuracy and stability. The number of steps and the step sizes as well as the
corresponding power levels are selected to cover a wide spectrum of different applications.
The implementation of the output power control
logic is shown in figure 4. There are two
matched current sources with an amount of
about 8 µA. One current source is directly applied to the PSEL pin. The other current source
is used for the generation of reference voltages
with a resistor ladder. These reference voltages
are defining the thresholds between the power
steps. The four comparators deliver thermometer-coded control signals depending on the
voltage level at the pin PSEL. In order to have a
certain amount of ripple tolerance in a noisy
environment the comparators are provided with
a little hysteresis of about 20 mV. With these
control signals, weighted current sources of the
power amplifier are switched on or off to set the
desired output power level (Digitally Controlled
Current Source). The LOCK signal and the
output of the low voltage detector are gating
this current source.
There are two ways to select the desired output power step. First by applying a DC voltage at the pin PSEL,
then this voltage directly selects the desired output power step. This kind of power selection can be used if
the transmission power must be changed during operation. For a fixed-power application a resistor can be
used which is connected from the PSEL pin to ground. The voltage drop across this resistor selects the desired output power level. For fixed-power applications at the highest power step this resistor can be omitted.
The pin PSEL is in a high impedance state during the “TX standby” mode.
RPS
PSEL
Fig. 4: Block diagram of output power control circuitry
&
&
&
&
&
OUT
2.6 Lock Detection
The lock detection circuitry turns on the power amplifier only after PLL lock. This prevents from unwanted
emission of the transmitter if the PLL is unlocked.
2.7 Low Voltage Detection
The supply voltage is sensed by a low voltage detect circuitry. The power amplifier is turned off if the supply
voltage drops below a value of about 1.85 V. This is done in order to prevent unwanted emission of the
transmitter if the supply voltage is too low.
39010 72016 Page 5 of 16 Data Sheet
Rev. 007 March/08
TH72016
433MHz
FSK/ASK Transmitter
2.8 Mode Control Logic
The mode control logic allows two different
modes of operation as listed in the following
table. The mode control pin EN is pulled-down
internally. This guarantees that the whole circuit
is shut down if this pin is left floating.
2.9 Clock Output
The clock output CKOUT is CMOS-compatible and can be used to drive a microcontroller. The frequency of
the clock can be changed by the clock divider control signal CKDIV, that can be selected according to the
following table. A capacitor at pin CKOUT can be used to control the clock voltage swing and the spurious
emission.
CKDIV Clock divider ratio Clock frequency / fc=433.92MHz
0 4 3.39MHz
1 16 848kHz
EN Mode Description
0 TX standby TX disabled
1
TX active
CKOUT active
TX / CKOUT
enabled
2.10 Timing Diagrams
After enabling the transmitter by the EN signal, the power amplifier remains inactive for the time ton, the
transmitter start-up time. The crystal oscillator starts oscillation and the PLL locks to the desired output frequency within the time duration t
and then the RF carrier can be FSK or ASK modulated.
high
EN
low
high
LOCK
low
high
FSKDTA
low
. After successful PLL lock, the LOCK signal turns on the power amplifier,
on
high
EN
low
high
LOCK
low
high
PSEL
low
RF carrier
t
t
on
t
on
t
Fig. 5: Timing diagrams for FSK and ASK modulation
39010 72016 Page 6 of 16 Data Sheet
Rev. 007 March/08
TH72016
FSK/ASK Transmitter
3 Pin Definition and Description
Pin No. Name I/O Type Functional Schematic Description
1 FSKDTA input
2 FSKSW analog I/O
FSKDTA
1
FSKSW
2
1.5k
0: ENTX=1
1: ENTX=0
Ω
FSK data input,
CMOS compatible with internal pull-up circuit
TX standby: no pull-up
TX active: pull-up
XOSC FSK pulling pin,
MOS switch
433MHz
3 ROI analog I/O
4 EN input
5 CKOUT output
6 PSEL analog I/O
7 CKDIV input
8 OUT output
EN
4
CKDIV
7
ROI
3
CKOUT
5
PSEL
6
OUT
8
1.5k
1.5k
Ω
Ω
36p
36p
1.5k
25k
400
XOSC connection to XTAL,
Colpitts type crystal oscillator
mode control input,
CMOS-compatible with internal pull-down circuit
clock output,
Ω
CMOS-compatible
power select input, high-
Ω
8µA
impedance comparator logic
TX standby: I
TX active: I
PSEL
PSEL
= 0
= 8µA
clock divider control input,
CMOS compatible with
internal pull-down circuit
0: ENTX= 0
1: ENTX= 1
VCC
TX standby: no pull-down
TX active: pull-down
power amplifier output,
open collector
9 VEE ground
10 VCC supply
VEE
VEE
negative power supply
positive power supply
39010 72016 Page 7 of 16 Data Sheet
Rev. 007 March/08
TH72016
433MHz
FSK/ASK Transmitter
4 Electrical Characteristics
4.1 Absolute Maximum Ratings
Parameter Symbol Condition Min Max Unit
Supply voltage VCC 0 7.0 V
Input voltage VIN -0.3 VCC+0.3 V
Storage temperature T
Junction temperature TJ 150 °C
Thermal Resistance R
Power dissipation P
Electrostatic discharge V
-65 150 °C
STG
49 K/W
thJA
0.12 W
diss
human body model (HBM)
ESD
±2.0
kV
according to CDF-AECQ100-002
4.2 Normal Operating Conditions
Parameter Symbol Condition Min Max Unit
Supply voltage VCC 1.95 5.5 V
Operating temperature TA -40 125 °C
Input low voltage CMOS V
Input high voltage CMOS V
XOSC frequency f
VCO frequency fc
Clock frequency f
FSK deviation
CLK
Δf
EN, FSKDTA 0.3*V
IL
EN, FSKDTA 0.7*V
IH
set by the crystal 11.9 14 MHz
ref
f
c
CKDIV=0, f
CKDIV=1, f
= 32 • f
ref
= f
CLK
CLK
/ 4 3 3.5 MHz
ref
= f
/ 16 750 875 kHz
ref
depending on CX1, CX2
CC
380 450 MHz
±2.5 ±40
CC
V
V
kHz
and crystal parameters
FSK Data rate R NRZ 40 kbit/s
ASK Data rate R NRZ 40 kbit/s
4.3 Crystal Parameters
Parameter Symbol Condition Min Max Unit
Crystal frequency f0 fundamental mode, AT 11.9 14 MHz
Load capacitance CL 10 15 pF
Static capacitance C0 7 pF
Series resistance R1
Spurious response a
only required for FSK -10 dB
spur
70
Ω
39010 72016 Page 8 of 16 Data Sheet
Rev. 007 March/08
4.4 DC Characteristics
all parameters under normal operating conditions, unless otherwise stated;
typical values at T
Parameter Symbol Condition Min Typ Max Unit
Operating Currents
= 23 °C and VCC = 3 V
A
TH72016
433MHz
FSK/ASK Transmitter
Standby current I
Supply current in power step 0 I
Supply current in power step 1 I
Supply current in power step 2 I
Supply current in power step 3 I
Supply current in power step 4 I
SBY
CC0
CC1
CC2
CC3
CC4
EN=0, TA=85°C 0.2 200 nA
EN=0, T
=125°C 4 µA
A
EN=1 1.5 2.9 5.0 mA
EN=1 2.1 3.8 6.0 mA
EN=1 3.0 5.0 7.5 mA
EN=1 4.5 6.9 9.5 mA
EN=1 7.3 11.0 14.5 mA
Digital Pin Characteristics
Input low voltage CMOS VIL EN, FSKDTA -0.3 0.3*Vcc V
Input high voltage CMOS VIH EN, FSKDTA 0.7*VCC VCC+0.3 V
Pull down current, EN I
Low level input current, EN I
High level input current, FSKDTA
Pull up current FSKDTA
EN=1 0.2 4.0 40 µA
PDEN
EN=0 0.02 µA
INLEN
I
FSKDTA=1 0.02 µA
INHDTA
FSKDTA=0, EN=1 0.1 1.5 12 µA
I
PUDTAa
active mode
Pull up current FSK
FSKDTA=0, EN=0 0.02 µA
I
PUDTAs
standby mode
Low level input current CKDIV I
Pull-down current CKDIV
I
PDCKDIVa
CKDIV=0 0.02 µA
INLCKDIV
CKDIV=1, EN=1 0.1 1.5 12 µA
active mode
Pull-down current CKDIV
I
PDCKDIVs
CKDIV=1, EN=0 0.02 µA
standby mode
FSK Switch Resistance
MOS switch On resistance RON FSKDTA=0, EN=1 20 70
MOS switch Off resistance R
FSKDTA=1, EN=1 1
OFF
Ω
MΩ
Power Select Characteristics
Power select current I
Power select voltage step 0 V
Power select voltage step 1 V
Power select voltage step 2 V
Power select voltage step 3 V
Power select voltage step 4 V
EN=1 7.0 8.6 9.9 µA
PSEL
EN=1 0.035 V
PS0
EN=1 0.14 0.24 V
PS1
EN=1 0.37 0.60 V
PS2
EN=1 0.78 1.29 V
PS3
EN=1 1.55 V
PS4
Low Voltage Detection Characteristic
Low voltage detect threshold V
EN=1 1.75 1.85 1.95 V
LVD
39010 72016 Page 9 of 16 Data Sheet
Rev. 007 March/08
4.5 AC Characteristics
all parameters under normal operating conditions, unless otherwise stated;
typical values at T
Parameter Symbol Condition Min Typ Max Unit
CW Spectrum Characteristics
= 23 °C and VCC = 3 V; test circuit shown in Fig. 6, fc = 433.92 MHz
A
TH72016
433MHz
FSK/ASK Transmitter
Output power in step 0
EN=1 -70 dBm
P
off
(Isolation in off-state)
Output power in step 1 P
Output power in step 2 P
Output power in step 3 P
Output power in step 4 P
only needed for FSK
clock spur suppression capacitor, CKDIV 0 / 1
FSK or CW mode power-select resistor
ASK power-select resistor, not used at FSK
de-coupling capacitor
de-coupling capacitor
fundamental wave crystal,
CL = 10 pF, C0, max = 5 pF, R1 = 50 Ω
39010 72016 Page 12 of 16 Data Sheet
Rev. 007 March/08
6 Package Description
The device TH72016 i s Ro HS compliant.
TH72016
433MHz
FSK/ASK Transmitter
D
610
E
1
A
A1
5
A3
E2
b
The “exposed pad” is not connected
it should not be connected to the PCB.
D2
exposed pad
e
to internal ground,
L
0.23
0.36
0.225x45°
Fig. 7: 10L QFN 3x3 Dual
all Dimensions in mm
D E D2 E2 A A1 A3 L e b
min 2.85 2.85 2.23 1.49 0.80 0 0.3 0.18
max 3.15 3.15 2.48 1.74 1.00
0.05 0.5 0.30
0.20 0.50
all Dimensions in inch
min 0.112 0.112 0.0878 0.051 0.03150 0.01180.0071
max 0.124 0.124 0.0976 0.055 0.0393
0.0020.01970.0118
0.00790.0197
6.1 Soldering Information
•The device TH72016 is qualified for MSL1 with soldering peak temperature 2 60 deg C
according to JEDEC J-STD-20
6.2 Recommended PCB Footprints
X
Y
10
Z
G
15
D2
th
39010 72016 Page 13 of 16 Data Sheet
Rev. 007 March/08
e
C
PL
6
E2
th
solder st opsolder pad
all Dimensions in mm
Z
min3.55 1.9 3.2 1.3 0.25 0.7 0.3
max3.90 2.3 3.6 1.7 0.30 1.0
G
D2
E2
th
X Y C
th
PL
0.5
all Dimensions in inch
min 0.1398 0.0748 0.1260 0.0512 0.0098 0.0276 0.0591
max 0.1535 0.0906 0.1417 0.0669 0.0118 0.0394
0.0197
Fig. 8: PCB land pattern style
e
0.5
0.0197
TH72016
433MHz
FSK/ASK Transmitter
7 Reliability Information
This Melexis device is classified and qualified regarding soldering technology, solderability and moisture
sensitivity level, as defined in this specification, according to following test methods:
Reflow Soldering SMD’s (S
• IPC/JEDEC J-STD-020
“Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices (classification reflow profiles according to table 5-2)”
Wave Soldering SMD’s (S
• EN60749-20
“Resistance of plastic- encapsulated SMD’s to combined effect of moisture and soldering heat”
Solderability SMD’s (S
• EIA/JEDEC JESD22-B102
“Solderability”
For all soldering technologies deviating from above mentioned standard conditions (regarding peak temperature, temperature gradient, temperature profile etc) additional classification and qualification tests have to be
agreed upon with Melexis.
The application of Wave Soldering for SMD’s is allowed only after consulting Melexis regarding assurance of
adhesive strength between device and board.
urface Mount Devices)
urface Mount Devices)
urface Mount Devices)
8 ESD Precautions
Electronic semiconductor products are sensitive to Electro Static Discharge (ESD).
Always observe Electro Static Discharge control procedures whenever handling semiconductor products.
39010 72016 Page 14 of 16 Data Sheet
Rev. 007 March/08
Your Notes
TH72016
433MHz
FSK/ASK Transmitter
39010 72016 Page 15 of 16 Data Sheet
Rev. 007 March/08
TH72016
433MHz
FSK/ASK Transmitter
9 Disclaimer
1) The information included in this documentation is subject to Melexis intellectual and other property rights.
Reproduction of information is permissible only if the information will not be altered and is accompanied
by all associated conditions, limitations and notices.
2) Any use of the documentation without the prior written consent of Melexis other than the one set forth in
clause 1 is an unfair and deceptive business practice. Melexis is not responsible or liable for such altered
documentation.
3) The information furnished by Melexis in this documentation is provided ’as is’. Except as expressly warranted in any other applicable license agreement, Melexis disclaims all warranties either express, implied, statutory or otherwise including but not limited to the merchantability, fitness for a particular purpose, title and non-infringement with regard to the content of this documentation.
4) Notwithstanding the fact that Melexis endeavors to take care of the concept and content of this documentation, it may include technical or factual inaccuracies or typographical errors. Melexis disclaims any
responsibility in connection herewith.
5) Melexis reserves the right to change the documentation, the specifications and prices at any time and
without notice. Therefore, prior to designing this product into a system, it is necessary to check with
Melexis for current information.
6) Melexis shall not be liable to recipient or any third party for any damages, including but not limited to
personal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the information in this documentation.
7) The product described in this documentation is intended for use in normal commercial applications. Applications requiring operation beyond ranges specified in this documentation, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by Melexis for each application.
8) Any supply of products by Melexis will be governed by the Melexis Terms of Sale, published on