! Double superhet architecture for high degree of image rejection
! FSK for digital data and FM reception for analog signal transmission
! FM/FSK demodulation with phase-coincidence demodulator
! Low current consumption in active mode and very low standby current
! Switchable LNA gain for improved dynamic range
! RSSI allows signal strength indication and ASK detection
! Surface mount package LQFP32
Ordering Information
Part No.Temperature RangePackage
TH71102-40 °C to 85°CLQFP32
Application Examples
! General digital and analog 315 MHz or 433 MHz ISM band usage
! Low-power telemetry
! Alarm and security systems
! Keyless car and central locking
! Pagers
Technical Data Overview
! Input frequency range: 300 MHz to 450 MHz
! Power supply range: 2.5 V to 5.5 V
! Temperature range: -40 °C to +85 °C
! Operating current: 6.5 mA at low gain and 8.2 mA at high gain mode
! Standby current: < 100 nA
! Sensitivity: -111 dBm
! Sensitivity: -104 dBm
! Range of first IF: 10 MHz to 80 MHz
! Range of second IF: 455 kHz to 21.4 MHz
! Maximum input level: –10 dBm at ASK and 0 dBm at FSK
! Image rejection: > 65 dB (e.g. with SAW front-end filter and at 10.7 MHz 2
! Spurious emission: < -70 dBm
! Input frequency acceptance: ±50 kHz (with AFC option)
! RSSI range: 70 dB
! Frequency deviation range: ±5 kHz to ±120 kHz
! Maximum data rate: 80 kbit/s NRZ
! Maximum analog modulation frequency: 15 kHz
1)
at ± 8 kHz FSK deviation, BER = 3⋅10-3 and phase-coincidence demodulation
2)
at ± 50 kHz FSK deviation, BER = 3⋅10-3 and phase-coincidence demodulation
1)
with 40 kHz second IF filter BW (incl. SAW front-end filter loss)
2)
with 150 kHz second IF filter BW (incl. SAW front-end filter loss)
nd
IF)
TH71102 Data SheetPage 1 of 20 Nov. 2001
3901071102 Rev. 005
Page 2
TH71102
315/433MHz
FSK/FM/ASK Receiver
General Description
The TH71102 receiver IC consists of the following building blocks:
" PLL synthesizer (PLL SYNTH) for generation of the first and second local oscillator signals LO1 and LO2
" Parts of the PLL SYNTH are the high-frequency VCO1, the feedback dividers DIV_8 and DIV_2,
a phase-frequency detector (PFD) with charge pump (CP) and a crystal-based reference oscillator (RO)
" Low-noise amplifier (LNA) for high-sensitivity RF signal reception
" First mixer (MIX1) for down-conversion of the RF signal to the first IF (IF1)
" second mixer (MIX2) for down-conversion of the IF1 to the second IF (IF2)
" IF amplifier (IFA) to amplify and limit the IF2 signal and for RSSI generation
" Phase coincidence demodulator (DEMOD) with third mixer (MIX3) to demodulate the IF signal
" Operational amplifier (OA) for data slicing, filtering and ASK detection
" Bias circuitry for bandgap biasing and circuit shutdown
With the T H71102 receiver c hip, various circuit c onfigurations c an be arranged in or der to m eet a num ber of
different custom er requirements . For FM/FSK reception the IF tank used in the phase coincidence dem odulator can be constituted either by a ceramic resonator or an LC tank (optionally with a varactor diode to create
an AFC circuit). In ASK configuration, the RSSI signal is feed to an ASK detector, which is constituted by the
operational amplifier.
DemodulationType of receiver
FM / FSK
FM / FSK
ASK
The superheterodyne configuration is double conversion where MIX1 and MIX2 are driven by the internal
local oscillator signals LO1 and LO2, r espectively. This allows a high degree of im age rejec tion, achieved in
conjunction with an RF frontend filter. Efficient RF frontend f iltering is realized by using a SAW, ceram ic or
helix filter in front of the LNA and by adding an LC filter at the LNA output.
A single-conversion variant, called TH71101, is also available. Both RXICs have the same die. At the
TH71101 the second mixer MIX2 operates as an amplifier.
narrow-band RX with ceramic demodulation tank
wide-band RX with LC demodulation tank
RX with RSSI-based demodulation
TH71102 Data SheetPage 2 of 20 Nov. 2001
3901071102 Rev. 005
Page 3
Block Diagram
TH71102
315/433MHz
FSK/FM/ASK Receiver
IN_DEM
OUT_IFA
1516
14
RSSI
21
FPC2
13
FBC1
12
IN_IFA
11
VEE_IF
10
OUT_MIX2
932
VCC_MIX
8
IF1N
7
IF1P
6
VEE_MIX
5
24
23
OUTP
OUTN
20
19
OAP
OAN
18
OUT_OA
OA
VCC_BIAS
17
VEE_BIAS
22
MIX3
ENRX
BIAS
28
VCC_PLL
27
VEE_RO
25
IFA
RO
RO
26
PFD
IF2
CP
LO2
DIV_2
LF
29
MIX2
IF1
DIV_8
LO1
VCO1
MIX1
IN_MIX1
4
OUT_LNA
GAIN_LNA
VEE_LNAC
1
LNA
IN_LNA
31
VEE_LNA
30
VCC_LNA
32
Fig. 1: TH71102 block diagram
TH71102 Data SheetPage 3 of 20 Nov. 2001
3901071102 Rev. 005
Page 4
TH71102
315/433MHz
FSK/FM/ASK Receiver
Frequency Planning
Frequency planning is straightforward for single-conversion applications because there is only one IF that
might be chosen, and then the only possible choice is low-side or high-side injection of the LO1 s ignal (which
is now the one and only LO signal in the receiver).
The receiver’s double-conver sion architecture requires careful frequenc y planning. Besides the desired RF
input signal, there are a number of s purious signals that may cause an undesired response at the output.
Among them are the image of the RF signal (that must be suppressed by the RF front-end f ilter), spurious
signals injected to the first IF ( IF1) and their im ages which could be m ixed down to the sam e sec ond IF (IF2)
as the desired RF signal (they must be suppressed by the LC filter at IF1 and/or by low-crosstalk design).
By configuring the TH71102 for double conversion and using its internal PLL synthesizer with fixed feedback
divider ratios of N1 = 8 (DIV_8) and N2 = 2 (DIV_2) , four types of down-conversion are possible: low-side
injection of LO1 and LO2 (low - low), LO1 low-side and LO2 high-side (low-high), LO1 high-side and LO2
low-side (high-low) or LO1 and LO2 high-s ide (high-high). T he following table sum m arizes som e equations
that are useful to calculate the crystal reference frequency (REF), the firs t IF (IF1) and the VCO1 or firs t LO
frequency (LO1), respectively, for a given RF and second IF (IF2).
The following table depicts generated, desired, pos sible images and som e undesired s ignals cons idering the
examples of 315 MHz and 433.6 MHz RF reception at IF2 = 10.7 MHz.
The selection of the ref erence crystal frequency is based on som e assumptions. As for example: the f irst IF
and the image frequencies should not be in a radio band where strong interfering signals might occur
(because they could represent parasitic receiving s ignals), the LO1 s ignal should be in the range of 300 MHz
to 430 MHz (because this is the optimum frequency range of the VCO1). Furtherm ore the first IF should be
as high as possible to achieve highest RF image rejection. The colum ns in bold depict the selec ted f r equenc y
plans to receive at 315 MHz and 433.6 MHz, respectively.
TH71102 Data SheetPage 4 of 20 Nov. 2001
3901071102 Rev. 005
RSSI output, for RSSI and
ASK detection, approx.
36kΩ output impedance
22VEE_BIASground
ground for general bias
system and OA
23OUTPanalog
output
24OUTNanalog
OUTP
OUTN
23
24
Ω
50
20µA
20µA
FSK/FM positive output,
output impedance of
100kΩ to 300kΩ
FSK/FM negative output,
output impedance of
100kΩ to 300kΩ
25VEE_ROgroundground of dividers, PFD and
RO
26ROanalog
input
RO
26
50k
30p
30p
RO input, Colpitts type
oscillator with internal feedback capacitors
27VCC_PLLsupplypositive supply of RO, DIV,
PFD and charge pump
28ENRXdigital
input
ENRX
1.5k
mode control input
(CMOS Input)
28
29LFanalog
output
LF
29
200
400
Ω
Ω
4p
charge pump output and
VCO1 control input
30VEE_LNAgroundLNA biasing ground
32VCC_LNAsupplypositive supply of LNA
biasing
TH71102 Data SheetPage 7 of 20 Nov. 2001
3901071102 Rev. 005
Page 8
Technical Data
Mode Configurations
ENRXModeDescription
0SBYstandby mode
1ONentire chip active
Note: ENRX are pulled down internally
LNA Gain Control
TH71102
315/433MHz
FSK/FM/ASK Receiver
V
GAIN_LNA
ModeDescription
< 0.8 VHIGH GAINLNA set to high gain by voltage at GAIN_LNA
> 1.4 VLOW GAINLNA set to low gain by voltage at GAIN_LNA
Note: hysteresis between gain modes to ensure stability
Absolute Maximum Ratings
ParameterSymbolCondition / NoteMinMax
Supply voltage V
Input voltage V
Input RF level P
Storage temperature T
cc
IN
imax
STG
Electrostatic discharge ESD
0 7.0 V
- 0.3 VCC+0.3 V
no damage 10 dBm
-40 +125 °C
human body model,
MIL STD 833D
method 3015.7, all pins
except OUT_IFA
pin OUT_IFA -500 +250 V
-500
+500
Unit
V
Normal Operating Conditions
ParameterSymbolConditionMinMaxUnit
Supply voltage V
Operating temperature T
Input frequency f
Frequency deviation
FSK data rateR
FM bandwidthf
ASK data rateR
cc
a
i
∆f
FSK
m
ASK
2.5 5.5 V
-40 +85 ºC
300 450 MHz
at FM or FSK
±5±120
kHz
NRZ40kbit/s
15kHz
NRZ80kbit/s
TH71102 Data SheetPage 8 of 20 Nov. 2001
3901071102 Rev. 005
Page 9
DC Characteristics
all parameters under normal operating conditions, unless otherwise stated;
typical values at T
= 23 °C and V
a
cc
= 3 V
ParameterSymbolConditionMinTypMaxUnit
Standby currentI
Total supply current at low gainI
SBY
cc, low
ENRX=0100nA
ENRX=1,
LNA at LOW GAIN
Total supply current at high gainI
cc, high
ENRX=1,
LNA at HIGH GAIN
Opamp input offset voltageV
Opamp input offset currentI
Opamp input bias currentI
RSSI voltage at low input levelV
offs
offs
bias
RSSI, low
I
– I
OAP
OAN
0.5 * (I
OAP
+ I
Pi = -65 dBm,
)-100100nA
OAN
LNA at LOW GAIN
RSSI voltage at high input levelV
RSSI, high
Pi = -35 dBm,
LNA at LOW GAIN
TH71102
315/433MHz
FSK/FM/ASK Receiver
5.06.58.0mA
6.58.210.0mA
-2020mV
-5050nA
0.51.01.5V
1.251.92.45V
AC System Characteristics
all parameters under normal operating conditions, unless otherwise stated;
all parameters based on test circuits for FSK (Fig. 2), FM (Fig. 4) and ASK (Fig. 5), respectively;
typical values at T
= 23 °C and V
a
= 3 V, RF at 433.6 MHz, second IF at 10.7 MHz
cc
ParameterSymbolConditionMinTypMaxUnit
start-up time – FSK/FMT
FSK
ENRX from 0 to 1,
0.9ms
valid data at output
start-up time – ASKT
ASK
depends on ASK
R3•C12
detector time constant,
input sensitivity – FSK
(narrow band)
input sensitivity – FSK
(wide band)
input sensitivity – ASK
(narrow band)
input sensitivity – ASK
(wide band)
maximum input signal – FSK/FM P
maximum input signal – ASKP
P
min, n
P
min, w
P
minA, n
P
minA, w
max, FM
max, ASK
valid data at output
B
= 40kHz
IF2
∆f = ±15kHz (FSK/FM)
BER ≤ 3⋅10
B
= 150kHz
IF2
∆f = ±50kHz (FSK/FM)
BER ≤ 3⋅10
B
= 40kHz
IF2
BER ≤ 3⋅10
B
= 150kHz
IF2
BER ≤ 3⋅10
BER ≤ 3⋅10
LNA at LOW GAIN
BER ≤ 3⋅10
-3
-3
-3
-3
-3
-3
-111dBm
-104dBm
-109dBm
-106dBm
0dBm
-10dBm
T
LNA at LOW GAIN
spurious emissionP
image rejection
blocking immunity
VCO gainK
Charge pump currentI
∆P
∆P
CP
spur
imag
block
VCO
∆f
> ±2MHz, note 1
block
65dB
57dB
250MHz/V
60µA
-70dBm
Notes: 1. desired signal with FSK/FM or ASK modulation, CW blocking signal
ms
+
FSK
TH71102 Data SheetPage 9 of 20 Nov. 2001
3901071102 Rev. 005
Page 10
Test Circuits
FSK Reception
TH71102
315/433MHz
FSK/FM/ASK Receiver
L2
XT AL
R1
C5
VCC
C1
C3
VCC
VEE
VCC
C14
OUTN
RO
VCC
ENRX
LF
VEE
IN_LNA
VEE
OUTP
GAIN_LNA
C16C15
VEE
RSSI
LQFP32
IN_MIX1
OUT_LNA
OAP
VEE
OAN
IF1P
VCC
IN_DEM
OUT_OA
OUT_IFA
VCC
FBC2
FBC1
IN_IFA
VEE
VCC
IF1N
VCC
OUT_MIX2
C13
C12
CP
CERRES
VCC
C11
C9
C10
CERFIL
L1
SAWFIL
C4
L3
C7
C6
L4
C8
L5
LCFIL
CB*
VCC
Fig. 2: Test circuit for FSK reception
TH71102 Data SheetPage 10 of 20 Nov. 2001
3901071102 Rev. 005
crystal series capacitor
loop filter capacitor
capacitor to match to SAW filter input
capacitor to match to SAW filter output
LNA output tank capacitor
MIX1 input matching capacitor
IF1 tank capacitor
IFA feedback capacitor
IFA feedback capacitor
IFA feedback capacitor
DEMOD phase-shift capacitor
DEMOD coupling capacitor
CERRES parallel capacitor
demodulator output low-pass capacitor, depending on
data rate
demodulator output low-pass capacitor, depending on
data rate
RSSI output low-pass capacitor
loop filter resistor
inductor to match SAW filter
inductor to match SAW filter
LNA output tank inductor
IF1 tank inductor
IF1 tank inductor
fundamental-mode crystal, C
C
0, max
= 7 pF, R
m, max
= 50 Ω
low-loss SAW filter from EPCOS
TH71102
315/433MHz
= 10 pF to 15pF,
load
CERFIL
CERRES SMD type CDACV10.7MG18-A
leaded
type
SMD typeSFECV10.7MJS-A
SFE10.7MFP
= 40 kHz
@ B
IF2
= 150 kHz
@ B
IF2
TBD
±40 kHz
ceramic filter from Murata
ceramic demodulator tank from Murata
NIP – not in place, may be used optionally
TH71102 Data SheetPage 11 of 20 Nov. 2001
3901071102 Rev. 005
Page 12
FSK Circuit with AFC and Ceramic Resonator Tolerance Compensation
TH71102
315/433MHz
FSK/FM/ASK Receiver
L2
XTAL
R1
C5
VCC
C1
C3
VCC
VEE
VCC
C14
OUTN
RO
VCC
ENRX
LF
VEE
IN_LNA
VEE
R4
OUTP
GAIN_LNA
C16C15
R5
VEE
RSSI
LQFP32
IN_MIX1
OUT_LNA
C17
OAP
VEE
C18
OAN
IF1P
VCC
IN_DEM
OUT_OA
OUT_IFA
VCC
FBC2
FBC1
IN_IFA
VEE
VCC
IF1N
R3
VCC
OUT_MIX2
C13
C12
CP VD
CERRES
VCC
C11
C9
C10
CERFIL
L4
C8
L5
LCFIL
CB*
VCC
SAWFIL
L1
C4
L3
C7
C6
Fig. 3: Test circuit for FSK with AFC and resonator compensation
Circuit Feature
! Improves input frequency acceptance range up to RF
±50 kHz
nom
! Eliminates calibration tolerances of ceramic resonator
! Eliminates temperature tolerances of ceramic resonator
! Non-inverted and inverted CMOS-compatible outputs
TH71102 Data SheetPage 12 of 20 Nov. 2001
3901071102 Rev. 005
Page 13
FSK/FM/ASK Receiver
FSK test circuit with AFC component list to Fig. 3
crystal series capacitor
loop filter capacitor
capacitor to match to SAW filter input
capacitor to match to SAW filter output
LNA output tank capacitor
MIX1 input matching capacitor
IF1 tank capacitor
IFA feedback capacitor
IFA feedback capacitor
IFA feedback capacitor
DEMOD phase-shift capacitor
DEMOD coupling capacitor
ceramic resonator loading capacitor
demodulator output low-pass capacitor, depending on
data rate
demodulator output low-pass capacitor, depending on
data rate
RSSI output low-pass capacitor
integrator capacitor, fixed
integrator capacitor, @ 0.5 to 2 kbit/s NRZ
integrator capacitor, @ 2 to 20 kbit/s NRZ
integrator capacitor, @ 20 to 40 kbit/s NRZ
loop filter resistor
varactor diode biasing resistor
integrator resistor
integrator resistor
inductor to match SAW filter
inductor to match SAW filter
LNA output tank inductor
IF1 tank inductor
IF1 tank inductor
varactor diode from Infineon
fundamental-mode crystal, C
C
0, max
= 7 pF, R
m, max
= 50 Ω
low-loss SAW filter from EPCOS
ceramic filter from Murata
ceramic demodulator tank from Murata
TH71102
315/433MHz
= 10 pF to 15pF,
load
TH71102 Data SheetPage 13 of 20 Nov. 2001
3901071102 Rev. 005
Page 14
FM Reception
TH71102
315/433MHz
FSK/FM/ASK Receiver
L2
XT AL
R1
C5
VCC
C1
C3
VCC
VEE
VCC
OUTN
RO
VCC
ENRX
LF
VEE
IN_LNA
VEE
OUTP
GAIN_LNA
C16
R6
C15
VEE
RSSI
LQFP32
IN_MIX1
OUT_LNA
R5
C14
R4
OAP
VEE
OAN
IF1P
R3
VCC
IN_DEM
OUT_OA
OUT_IFA
VCC
FBC2
FBC1
IN_IFA
VEE
VCC
IF1N
VCC
OUT_MIX2
C13
C12
CP
CERRES
VCC
C11
C9
C10
CERFIL
L1
SAWFIL
C4
L3
C7
C6
L4
C8
L5
LCFIL
CB*
VCC
Fig. 4: Test circuit for FM reception
TH71102 Data SheetPage 14 of 20 Nov. 2001
3901071102 Rev. 005
crystal series capacitor
loop filter capacitor
capacitor to match to SAW filter input
capacitor to match to SAW filter output
LNA output tank capacitor
MIX1 input matching capacitor
IF1 tank capacitor
IFA feedback capacitor
IFA feedback capacitor
IFA feedback capacitor
DEMOD phase-shift capacitor
DEMOD coupling capacitor
CERRES parallel capacitor
sallen-Key low-pass filter capacitor, to set cut-off fre-
quency
sallen-Key low-pass filter capacitor, to set cut-off fre-
quency
RSSI output low-pass capacitor
loop filter resistor
sallen-Key filter resistor, to set desired filter characteristic
sallen-Key filter resistor, to set desired filter characteristic
sallen-Key filter resistor, to set cut-off frequency
sallen-Key filter resistor, to set cut-off frequency
inductor to match SAW filter
inductor to match SAW filter
LNA output tank inductor
IF1 tank inductor
IF1 tank inductor
fundamental-mode crystal, C
C
0, max
= 7 pF, R
m, max
= 50 Ω
low-loss SAW filter from EPCOS
ceramic filter from Murata
ceramic demodulator tank from Murata
TH71102
315/433MHz
= 10 pF to 15pF,
load
TH71102 Data SheetPage 15 of 20 Nov. 2001
3901071102 Rev. 005
Page 16
ASK Reception
TH71102
315/433MHz
FSK/FM/ASK Receiver
R3
L2
C13
C12
VEE
XT AL
C1
VCC
C3
R1
VCC
C5
VCC
SAWFIL
OUTN
RO
VCC
ENRX
LF
VEE
IN_LNA
VEE
VEE
OUTP
RSSI
OAN
OAP
LQFP32
IN_MIX1
VEE
GAIN_LNA
OUT_LNA
C7
IF1P
C8
VCC
IN_DEM
OUT_OA
OUT_IFA
VCC
FBC2
FBC1
IN_IFA
VEE
VCC
IF1N
VCC
VCC
C11
C9
C10
CERFIL
OUT_MIX2
L1
C4
L3
C6
L4
L5
LCFIL
CB*
VCC
Fig. 5: Test circuit for ASK reception
TH71102 Data SheetPage 16 of 20 Nov. 2001
3901071102 Rev. 005
crystal series capacitor
loop filter capacitor
capacitor to match to SAW filter input
capacitor to match to SAW filter output
LNA output tank capacitor
MIX1 input matching capacitor
IF1 tank capacitor
IFA feedback capacitor
IFA feedback capacitor
IFA feedback capacitor
ASK data slicer capacitor, depending on data rate
RSSI output low-pass capacitor
loop filter resistor
ASK data slicer resistor, depending on data rate
inductor to match SAW filter
inductor to match SAW filter
LNA output tank inductor
IF1 tank inductor
IF1 tank inductor
fundamental-mode crystal, C
C
0, max
= 7 pF, R
m, max
= 50 Ω
low-loss SAW filter from EPCOS
ceramic filter from Murata
TH71102
315/433MHz
= 10 pF to 15pF,
load
TH71102 Data SheetPage 17 of 20 Nov. 2001
3901071102 Rev. 005
Page 18
Package Dimensions
TH71102
315/433MHz
FSK/FM/ASK Receiver
D
D1
1724
b
25
16
E
E1
32
1
A1A2A
8
L
e
9
Fig. 6: LQFP32 (Low Quad Flat Package)
All Dimension in mm, coplanaríty < 0.1mm
E1, D1AA1A2ebLE, D
min0.051.350.300.450°
7.000.89.00
max1.600.151.450.450.757°
All Dimension in inch, coplanaríty < 0.004”
min0.0020.0530.012 0.0180°
0.2760.0310.354
max0.6300.0060.0570.018 0.0307°
αααα
TH71102 Data SheetPage 18 of 20 Nov. 2001
3901071102 Rev. 005
Page 19
Your Notes
TH71102
315/433MHz
FSK/FM/ASK Receiver
TH71102 Data SheetPage 19 of 20 Nov. 2001
3901071102 Rev. 005