LG Display LC320EUD-SCA2 Specification
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LC320EUD
Product Specification
SPECIFICATION
FOR
APPROVAL
()Preliminary Specification
() Final Specification
Title 32.0” WUXGA TFT LCD
BUYER General
MODEL
APPROVED BY
/
/
SIGNATURE
DATE
SUPPLIER LG Display Co., Ltd.
*MODEL LC320EUD
SUFFIX SCA2 (RoHS Verified)
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
P.Y. Kim / Team Leader
REVIEWED BY
T.H. Lee / Project Leader
SIGNATURE
DATE
PREPARED BY
/
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 1.0
Y.H. Lee / Engineer
TV Product Development Dept.
LG Display Co., Ltd.
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LC320EUD
Product Specification
CONTENTS
Number ITEM
COVER 1
CONTENTS
RECORD OF REVISIONS
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATIONS
3-1 ELECTRICAL CHARACTERISTICS
3-2 INTERFACE CONNECTIONS
3-3 SIGNAL TIMING SPECIFICATIONS
3-4 LVDS SIGNAL SPECIFICATIONS
3-5 COLOR DATA REFERENCE
3-6 POWER SEQUENCE
4 OPTICAL SPECIFICATIONS
5 MECHANICAL CHARACTERISTICS
Page
2
3
4
5
6
6
8
11
12
15
16
18
22
6 RELIABILITY
7 INTERNATIONAL STANDARDS
7-1 SAFETY
7-2 EMC
7-3 ENVIRONMENT
8 PACKING
8-1 INFORMATION OF LCM LABEL
8-2 PACKING FORM
9 PRECAUTIONS
9-1 MOUNTING PRECAUTIONS
9-2 OPERATING PRECAUTIONS
9-3 ELECTROSTATIC DISCHARGE CONTROL
9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE
9-5 STORAGE
9-6 HANDLING PRECAUTIONS FOR PROTECTION FILM
Ver. 1.0
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Revision No. Revision Date Page Description
1.0 Aug, 31, 2010 4 Updated General Features.
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LC320EUD
Product Specification
RECORD OF REVISIONS
7 Updated Electrical Specifications for Backlight.
17 Correct Power Sequence Parameter.
18 Updated Optical Specifications.
23,24 Updated Mechanical Drawings.
26 Updated International Standards.
- Final Specifications.
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1. General Description
The LC320EUD is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 31.55 inch diagonally
measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.06Bilion colors.
It has been designed to apply the 10-bit 4-port LVDS interface.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
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LC320EUD
Product Specification
Mini-LVDS(RGB)
Control
Signals
Power Signals
Source Driver Circuit
S1 S1920
G1
TFT - LCD Panel
(1920 Ý RGB Ý 1080 pixels)
[Gate In Panel]
G1080
LVDS
2Port
LVDS
2Port
LVDS
Select
Bit
Select
+12.0V
CN2
(41pin)
CN1
(51pin)
LVDS 3,4
LVDS 1,2
Option
signal
I2C
EEPROM
SCL
SDA
Timing Controller
LVDS Rx + DGA + ODC
Integrated
Power Circuit
Block
+24.0V, GND, On/Off
ExtV
BR-B
LED Driver
Back light Assembly
General Features
Active Screen Size 31.55 inches(801.31mm) diagonal
Outline Dimension
Pixel Pitch 0.36375 mm x 0.36375 mm
Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Color Depth 10bit(D), 1.06Billon colors
Luminance, White 450 cd/m
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Power Consumption Total 69.72W (Typ.) [Logic= 7.32W, LED Driver=62.4W (ExtVbr_B=100% )]
Weight 6.9 Kg (Typ.)
Display Mode Transmissive mode, Normally black
Surface Treatment Hard coating(3H), Anti-glare treatment of the front polarizer (Haze 10%)
741.4(H) Ý 435.8 (V) X 10.8(B)/23.6(D) mm (Typ.)
2
(Center 1point ,Typ.)
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2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or damage to the
LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
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LC320EUD
Product Specification
Parameter Symbol
Power Input Voltage
Driver Control Voltage
T-Con Option Selection Voltage VLOGIC -0.3 +4.0 VDC
Operating Temperature TOP 0+50
Storage Temperature T
Panel Front Temperature TSUR -+68
Operating Ambient Humidity HOP 10 90 %RH
Storage Humidity H
Note
1. Ambient temperature condition (Ta =
LCD Circuit V
Driver VBL -0.3 + 27.0 VDC
ON/OFF V
Brightness EXTVBR-B 0.0 +5.5 VDC
25 r 2 ¶C )
LCD -0.3 +14.0 VDC
OFF / VON -0.3 +5.5 VDC
ST -20 +60
ST 10 90 %RH
Value
Unit Note
Min Max
¶C
¶C
¶C
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39¶C, and no condensation of water.
3. Gravity mura can be guaranteed below 40¶C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68¶C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68ć. The range of operating temperature may degraded in case of
improper thermal management in final product design.
90%
1
2,3
4
2,3
60
60%
Ver. 1.0
Wet Bulb
Temperature [
10
0
10 20 30 40 50 60 70 800-20
Dry Bulb Temperature [
¶C]
20
30
40
50
40%
Humidity [(%)RH]
10%
¶C]
Storage
Operation
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3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.
Table 2. ELECTRICAL CHARACTERISTICS
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LC320EUD
Product Specification
Parameter Symbol
Min Typ Max
Circuit :
Power Input Voltage V
Power Input Current ILCD
Power Consumption P
Rush current I
Note
1. The specified current and power consumption are under the V
LCD 10.8 12.0 13.2 VDC
- 610 790 mA 1
- 800 1040 mA 2
LCD 7.32 9.49 Watt 1
RUSH --5.0A3
Value
=12.0V, Ta=25 r 2¶C, fV=120Hz
LCD
condition whereas mosaic pattern(8 x 6) is displayed and fVis the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
White : 1023 Gray
Black : 0 Gray
Unit Note
Mosaic Pattern(8 x 6)
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Table 3. ELECTRICAL CHARACTERISTICS (Continue)
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LC320EUD
Product Specification
Parameter Symbol
LED Driver :
Power Supply Input Voltage VBL 22.8 24.0 25.2 Vdc 1
Power Supply Input Current IBL_A
Power Supply Input Current (In-Rush) Irush - - 4.5 A
Power Consumption PBL -
On/Off
Brightness Adjust ExtV
PWM Frequency for
NTSC & PAL
Pulse Duty Level
(PWM)
LED :
Life Time 30,000 50,000 Hrs 2
On V on 2.5 - 5.0 Vdc
Off V off -0.3 0.0 0.8 Vdc
BR-B 10 - 100 % On Duty
PAL 100 Hz 3
NTSC 120 Hz 3
High Level 2.5 - 5.0
Low Level 0.0 - 0.8
Min Typ Max
Values
-
2.6
62.4 67
2.8
Unit Notes
AExt VBR-B = 100%
VBL = 22.8V
Ext VBR-B = 100%
WExt VBR-B = 100%
Vdc
Vdc
HIGH : on duty
LOW : off duty
4
Notes :
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60
minutes at 25·2¶C. The specified current and power consumption are under the typical supply Input voltage
24Vand V
BR (ExtVBR-B : 100%), it is total power consumption.
2. The life time(MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
25·2¶C.
3. LGD recommend that the PWM freq. is synchronized with One time harmonic of Vsync signal of system.
Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.
4. The duration of rush current is about 10ms.
5. Even though inrush current is over the specified value, there is no problem if I
Ver. 1.0
2
T spec of fuse is satisfied.
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ೢHೣ
ಫHಬ
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Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, 51-pin connector and 41-pin connector are used
for the module electronics and 14-pin connector is used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector : FI-R51S-HF(manufactured by JAE) or KN25-51P-0.5SH(manufactured by Hirose)
(CN1) Refer to below and next Page table
- Mating Connector : FI-R51HL(JAE) or compatible
Table 4-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION
No Symbol Description No Symbol Description
1
2
3
4
5
6
7
8
9
10
11 GND
12 R1AN
13 R1AP
14 R1BN
15
16 R1CN
17 R1CP
18 GND
19 R1CLKN
20
21 GND
22 R1DN
23 R1DP
24 R1EN
25 R1EP
26
Note
NC No Connection
NC No Connection
NC No Connection
NC No Connection (Reserved for LGD)
NC No Connection (Reserved for LGD)
NC No Connection (Reserved for LGD)
=JEIDA , ಫLಬor NC = VESA
LVDS Select
NC No Connection
NC No Connection
NC No Connection
R1BP
R1CLKP
NC
Ground
FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)
FIRST LVDS Receiver Signal (C-)
FIRST LVDS Receiver Signal (C+)
Ground
FIRST LVDS Receiver Clock Signal(-)
FIRST LVDS Receiver Clock Signal(+)
Ground
FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
FIRST LVDS Receiver Signal (E-)
FIRST LVDS Receiver Signal (E+)
No Connection
1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All V
LCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. Specific pins(pin No. #2~#6) are used for internal data process of the LCD module.
These pins should be no connection.
5. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.
6. Specific pin No. #44 is used for “No signal detection” of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).
LC320EUD
or NC= 10bit(D) , ೢLೣ= 8bit
27
Bit Select
28
29
30
31
32
33
34
35
36
37
38
39
40 R2EN
41 R2EP
42
43
44
45
46
47
48
49
50
51
-- -
R2AN
R2AP
R2BN
R2BP
R2CN
R2CP
GND
R2CLKN
R2CLKP
GND
R2DN
R2DP
NC
NC
GND Ground
GND Ground
GND Ground
NC No connection
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
Ground
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
SECOND LVDS Receiver Signal (E-)
SECOND LVDS Receiver Signal (E+)
No Connection
No Connection
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-LCD Connector : FI-RE41S-HF (manufactured by JAE) or KN25-41P-0.5SH (manufactured by Hirose)
(CN2)
- Mating Connector : FI-RE41HL
Table 4-2. MODULE CONNECTOR(CN2) PIN CONFIGURATION
No Symbol Description No Symbol Description
1
2
3
4NC
5
6
7
8
9
10
11
12
13 RB3P
14
15
16
17
18 RCLK3P
19
20
21
NC
NC
NC
NC
NC
NC
NC
GND
RA3N
RA3P
RB3N
RC3N
RC3P
GND
RCLK3N
GND
RD3N
RD3P
No connection(Reserved) 22
No connection 23
No connection 24 GND Ground
No connection
No connection
No connection 27
No connection 28
No connection 29 RB4P
Ground
THIRD LVDS Receiver Signal (A-)
THIRD LVDS Receiver Signal (A+)
THIRD LVDS Receiver Signal (B-)
THIRD LVDS Receiver Signal (B+)
THIRD LVDS Receiver Signal (C-)
THIRD LVDS Receiver Signal (C+)
Ground
THIRD LVDS Receiver Clock Signal(-)
THIRD LVDS Receiver Clock Signal(+)
Ground
THIRD LVDS Receiver Signal (D-)
LVDS Receiver Signal (D+)
D
THIR
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Product Specification
25 GND Ground
26
30
31
32
33
34 RCLK4P
35
36
37
38
39
40 GND Ground
41 GND Ground
RCLK4N
-
RE3N
RE3P
RA4N
RA4P
RB4N
RC4N
RC4P
GND
GND
RD4N
RD4P
RE4N
RE4P
LC320EUD
THIRD LVDS Receiver Signal (E-)
THIRD LVDS Receiver Signal (E+)
FORTH LVDS Receiver Signal (A-)
FORTH LVDS Receiver Signal (A+)
FORTH LVDS Receiver Signal (B-)
FORTH LVDS Receiver Signal (B+)
FORTH LVDS Receiver Signal (C-)
FORTH LVDS Receiver Signal (C+)
Ground
FORTH LVDS Receiver Clock Signal(-)
FORTH LVDS Receiver Clock Signal(+)
Ground
FORTH LVDS Receiver Signal (D-)
FORTH LVDS Receiver Signal (D+)
FORTH LVDS Receiver Signal (E-)
FORTH LVDS Receiver Signal (E+)
Note : 1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. LVDS pin (pin No. #22,23,38,39) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.
CN1 CN2
CN1 CN2
#1 #51 #1 #41
#1 #51
#1 #41
Rear view of LCM
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ଝ
3-2-2. Backlight Module
Master
- LED Driver Connector : 20022WR-14B1(Yeonho) or Equivalent
- Mating Connector : 20022HS-14 or Equivalent
Table 5. LED DRIVER CONNECTOR PIN CONFIGURATION
Pin No Symbol Description Master Note
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LC320EUD
Product Specification
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VBL Power Supply +24.0V VBL
VBL Power Supply +24.0V VBL
VBL Power Supply +24.0V VBL
VBL Power Supply +24.0V VBL
VBL Power Supply +24.0V VBL
GND
GND
GND
GND
GND
NC No connection OPEN or GND
ON/OFF
V
EXTVBR-B External PWM
GND
Backlight Ground
Backlight Ground
Backlight Ground
Backlight Ground
Backlight Ground
Backlight ON/OFF control
Backlight Ground
V
EXTVBR-B
Notes : 1. GND should be connected to the LCD module’s metal frame.
2. High : on duty / Low : off duty, Pin#13 can be opened. ( if Pin #13 is open , EXTVBR-B is 100% )
3. #14 of Input CNT Must be Connected to Backlight Ground.
4. Each impedance of pin #12 and 13 is over 50 [KΩ] and over 50 [KΩ].
GND
GND
GND
GND
GND
ON/OFF
GND
1
2
3
Rear view of LCM
PCB
14
…
<Master>
1
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3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6-1. TIMING TABLE for NTSC (DE Only Mode)
ITEM Symbol Min Typ Max Unit Note
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LC320EUD
Product Specification
Horizontal
Vertical
Display
Period
Blank tHB 40 70 200 tCLK 1
Total t
Display
Period
Blank tVB 16 45 86 Lines 1
Total t
HV 480 480 480 tCLK 1920 / 4
t
HP 520 550 680 tCLK
t
VV 1080 1080 1080 Lines
VP 1096 1125 1166 Lines
DCLK fCLK 66.97 74.25 78.00 MHz
Frequency
Horizontal fH 121.8 135 140 KHz 2
Vertical f
V 108 120 122 Hz 2
Table 6-2 TIMING TABLE for DVB/PAL (DE Only Mode)
ITEM Symbol Min Typ Max Unit Note
Horizontal
Display
Period
Blank t
t
HV 480 480 480 tCLK 1920 / 4
HB 40 70 200 tCLK 1
Vertical
Frequency
Total t
Display
Period
Blank tVB 228 270 300 Lines 1
Total t
DCLK f
Horizontal f
Vertical f
HP 520 550 680 tCLK
t
VV 1080 1080 1080 Lines
VP 1308 1350 1380 Lines
CLK 66.97 74.25 78.00 MHz
H 121.8 135 140 KHz 2
V 95 100 104 Hz 2
Note 1. The Input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode).
If you use spread spectrum for EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency.
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3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
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LC320EUD
Product Specification
DCLK
First data
Second data
Third data
Forth data
DE(Data Enable)
tCLK
0.5 VDD
Invalid data
Invalid data
Invalid data
Invalid data
DE, Data
Valid data
Pixel 0
Valid data
Pixel 1
Valid data
Pixel 2
Valid data
Pixel 3
Pixel 4
Pixel 5
Pixel 6
Pixel 7
0.7VDD
0.3VDD
Invalid data
Invalid data
Invalid data
Invalid data
DE(Data Enable)
Ver. 1.0
* tHB = tHFP + tWH +tHBP
* tVB = tVFP + tWV +tVBP
1 1080
tVV
tVP
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