Keysight N4891A User Manual

Keysight N4891A 400GBASE FEC-Aware Rx Test Solution
User Guide
Notices
CAUTION
WARNING
© Keysight Technologies 2021
No part of this manual may be reproduced in any form or by any means (including elec­tronic storage and retrieval or translation into a foreign language) without prior agree­ment and written consent from Keysight Technologies as governed by United States and international copyright laws.
Manual Part Number
N4891-90119
Edition
Second edition, January 2021
Keysight Technologies Deutschland GmbH Herrenberger Strasse 130, 71034 Böblingen, Germany
Technology Licenses
The hardware and/or software described in this document are furnished under a license and may be used or copied only in accor­dance with the terms of such license.
U.S. Government Rights
The Software is “commercial computer soft­ware,” as defined by Federal Acquisition Regulation (“FAR”) 2.101. Pursuant to FAR
12.212 and 27.405-3 and Department of Defense FAR Supplement
(“DFARS”) 227.7202, the U.S. government acquires commercial computer software under the same terms by which the software is customarily provided to the public. Accordingly, Keysight provides the Software to U.S. government customers under its standard commercial license, which is embodied in its End User License Agreement (EULA), a copy of which can be found at
http://www.keysight.com/find/sweula. The
license set forth in the EULA represents the exclusive authority by which the U.S. gov­ernment may use, modify, distribute, or dis­close the Software. The EULA and the license set forth therein, does not require or permit, among other things, that Keysight: (1) Furnish technical information related to commercial computer software or commer­cial computer software documentation that is not customarily provided to the public; or (2) Relinquish to, or otherwise provide, the government rights in excess of these rights
customarily provided to the public to use, modify, reproduce, release, perform, dis­play, or disclose commercial computer soft­ware or commercial computer software documentation. No additional government requirements beyond those set forth in the EULA shall apply, except to the extent that those terms, rights, or licenses are explicitly required from all providers of commercial computer software pursuant to the FAR and the DFARS and are set forth specifically in writing elsewhere in the EULA. Keysight shall be under no obligation to update, revise or otherwise modify the Software. With respect to any technical data as defined by FAR 2.101, pursuant to FAR
12.211 and 27.404.2 and DFARS 227.7102, the U.S. government acquires no greater than Limited Rights as defined in FAR 27.401 or DFAR 227.7103-5 (c), as applicable in any technical data.
Warranty
THE MATERIAL CONTAINED IN THIS DOCUMENT IS PROVIDED "AS IS," AND IS SUBJECT TO BEING CHANGED, WITHOUT NOTICE, IN FUTURE EDITIONS. FURTHER, TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, KEYSIGHT DISCLAIMS ALL WARRANTIES, EITHER EXPRESS OR IMPLIED WITH REGARD TO THIS MANUAL AND ANY INFORMATION CONTAINED HEREIN, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. KEYSIGHT SHALL NOT BE LIABLE FOR ERRORS OR FOR INCIDENTAL OR CONSEQUENTIAL DAMAGES IN CONNECTION WITH THE FURNISHING, USE, OR PERFORMANCE OF THIS DOCUMENT OR ANY INFORMATION CONTAINED HEREIN. SHOULD KEYSIGHT AND THE USER HAVE A SEPARATE WRITTEN AGREEMENT WITH WARRANTY TERMS COVERING THE MATERIAL IN THIS DOCUMENT THAT CONFLICT WITH THESE TERMS, THE WARRANTY TERMS IN THE SEPARATE AGREEMENT WILL CONTROL.
Safety Notices
A CAUTION notice denotes a hazard. It calls attention to an operating proce­dure, practice, or the like that, if not correctly performed or adhered to, could result in damage to the product or loss of important data. Do not pro­ceed beyond a CAUTION notice until the indicated conditions are fully under­stood and met.
A WARNING notice denotes a hazard. It calls attention to an operating proce­dure, practice, or the like that, if not correctly performed or adhered to, could result in personal injury or death. Do not proceed beyond a WARNING notice until the indicated conditions are fully understood and met.

Contents

1 Introduction
2 Getting Started with the N4891A Solution
Contents
Safety Issues 8
Safety and damage messages 8 Safety Warnings 8
Introduction to the N4891A Solution 9
N4891A 400G Multi-Port Tester 9 N4891A 400GBASE FEC-aware Receiver Test Solution 9
Specifications 10
Chassis Setup 12
Installing the N4891A equipment 12
Front Panel Overview 14
Controlling the Equipment 15
Connecting to the N4891A chassis 15 Configuring the Hostname 16 Setting up the N4891A solution 16
Installing License 18
3 Using the KiOS Interface for the N4891A Solution
Accessing the KiOS interface 22
Landing Page 22
Line Speed Control 25
Port Settings 26
Mode 27 BERT 28 Host QSFP-DD 29
Statistics page 31
BERT statistics page 31 FEC Statistics Page 34 eBERT Statistics 38
CMIS 40
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 3
Contents
Menu Options 43
New tab 43 Test A u tomation 43 System Admin 44 System Logs 46 Software Update 47 License Manager 49 Help 51
4 Testing Optical Transceivers
About Optical Transceivers 54
Basic Functional Testing 55
Workflow 55
5 FEC-aware Receiver Testing
Hardware & Software Requirements 58
N4891A options 58 M8070B requirements 59 M8045A options 59 Accessories 59 Recommended Port setup 59
Setup Configuration 61
Connection Setup 61 Procedure 62
Setting PRBS Mode 65
Loopback Configuration—BERT mode 65 Checking BER on STATS View 66
Setting FEC-aware Mode 67
Loopback Configuration—KP4 FEC-aware mode 67 Synchronizing with M8040A 68
Receiver Compliance Testing 70
Jitter Injection 71 Using the M8070B DUT Control Interface 72 Testing 100G/l Optical Interfaces 72
4 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Troubleshooting 74
Scenario 1: Link is not up in BERT mode 74 Scenario 2: Link is not up in KP4 mode, BERT mode works as intended
76
Contents
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 5
Contents
6 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution
User Guide

1 Introduction

Safety Issues / 8 Introduction to the N4891A Solution / 9 Specifications / 10
1 Introduction

Safety Issues

Safety and damage messages

The safety alert symbol is used to indicate a hazard. Specific keywords and additional graphical representations are used to explain the specific nature of each hazard. Table 1describes the safety warning and equipment damage icons and textual conventions used in this document.
Table 1 Types of hazard
Type of Hazard Icon Description
CAUTION Indicates a hazardous situation that, if not avoided, could result in minor or moderate injury.
Indicates a hazardous situation that, if not avoided, could result in death or serious injury. Additional icons are used to indicate specific types of warnings.
Laser radiation hazard warning.

Safety Warnings

Reliable Earthing
Touch Current from Coaxial Cables
Fan Instruction
Electrostatic discharge hazard warning.
WARNING
High voltage hazard warning.
Hot surface hazard warning.
Moving fan blades hazard warning.
NOTICE Indicates a condition or occurrence that could result in property damage.
Protective earthing connection of the socket-outlet should be verified by a SKILLED PERSON.
Connect the shield coaxial cables to building earth in accordance with applicable local, national, and international electrical codes.
Moving fan blade. Keep body parts away from fan blades.
8 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide

Introduction to the N4891A Solution

N4891A 400G Multi-Port Tester

The N4891A is a compact Bit Error Rate (BER) and Forward Error Correction (FEC) test system. You can use it to characterize and quantify, at line rate, the actual BER and FEC performance of silicon communication devices, ASICs, fiber and copper interconnects, optical transceivers, and the port electronics of switches, routers, and other networking equipment with 26.5625 GBaud PAM4 interfaces. You can also use it to test the interconnection interoperability for all types of networking devices and equipment.
It is available in two models: 2-port or 4-port. The 2-port model is field-upgradeable to 4 ports.
For both models, an optional RS-544 (KP4) FEC test capability is available that simplifies FEC lane testing.
The N4891A is powered by IXIA's KiOS operating system, and includes Layer 1 BERT 400GE test software. A browser-based user interface makes it easy to run tests and manage the N4891A equipment. Keysight N4891A and Ixia A400GE-QDD offer the same capabilities and are interchangeable.
The N4891A chassis can be mounted on a bench-top or in a rack. See “Installing the N4891A
equipment” on page 12 for more information.
Introduction 1

N4891A 400GBASE FEC-aware Receiver Test Solution

When used in combination with the Keysight M8040A, the N4891A offers a unique 400GBASE FEC-aware Receiver Test Solution. This solution enables measurement of frame loss ratio in 400G Ethernet links using FEC by supplying one stressed lane, while maintaining the proper FEC striped test pattern data. The test method is prescribed in the IEEE 802.3 standard clauses 121,122, 124 and 136, 137 and 138 (802.3bs and 802.3cd respectively). This solution provides unique insights to understand how component and system design trade-offs are affected by Forward Error Correction (FEC) requirements and to predict the system margin under realistic conditions.
For more information regarding the M8040A J-BERT system, refer to
https://www.keysight.com/find/M8040A.
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 9
1 Introduction

Specifications

Tabl e 2 lists out the specifications for various characteristics of the N4891A chassis. For the more
detailed set of specifications, refer to the N4891A 400GBASE FEC-aware Receiver Test Solution Data
Sheet.
Table 2 N4891A Specifications
Device Characteristics Specification values
Physical Interfaces Native QSFP-DD MSA form factor compatible physical ports
Chassis Configurations 2- or 4-port base chassis system, desktop or rack mount, 2 RU
Chassis Connector Systems Power ON/OFF button
Chassis Clock IN – Electrical Specifications Frequency: 166.015625 MHz +/- 100 PPM
Chassis Clock OUT – Electrical Specifications Frequency: 166.015625 MHz +/- 100 PPM
Hardware Trigger IN / OUT – Electrical Specifications
Chassis System Electrical Power Operates on 100-240VAC, 50/60Hz,
Chassis System Dimensions 11.14” (L) x 17.4” (W) x 3.65” (H)
Chassis System Weights Hardware only: 21.75 lbs. (9.87 kg)
Temperature (Ambient Air) Operating: 41°F to 95°F (5°C to 35°C)
1 LED per port Clock IN / OUT: 2 SMA female connectors Trigger IN / OUT: 2 SMA female connectors 4 USB: (2) USB 2.0 (2) USB 3.0 compatible ports 1 RJ45: 1000/100/10Mbps Ethernet management port 1 Display Port, supports a maximum resolution of 4096 x 2304 @60Hz
50 ohm termination Minimum = 0.5 Vpk-pk = 0.18 Vrms (sine) Maximum = 3.0 Vpk-pk = 1.06 Vrms (sine)
HCSL, 50 Ohm VOH > 0.55V, VOL < 0.15V, Swing > 0.55V
Trigger In: 50 ohm termination; Minimum = -1.0V, Maximum = +4.0V, Swing > 0.2V Trigger Out: HCSL, 50 ohm; VOH > 0.55V, VOL < 0.15V, Swing > 0.55V
8 Amps on 100-125VAC
4 Amps on single phase, 200-240VAC
283mm (L) x 442mm (W) x 92.65mm (H)
Shipping: 30.49 lbs. (13.83 kg) Includes rack mount ears, cable support bracket, power cord, accessories and packaging.
Storage: 41°F to 122°F (5°C to 50°C)
Humidity (Ambient Air) Operating: 0% to 80%, non-condensing
Regulatory Compliance Specifications IEC 60950-1, UL 60950-1, CSA C22.2 No.60950-1, IEC 62368-1, UL 62368-1,
10 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Storage: 0% to 80%, non-condensing
CSA 62368-1, CE (LVD, EMC, RoHS), EN/IEC 55032, EN/IEC 55024, CFR 47, FCC Part 15B, ICES-003, AS/NZ CISPR 32/24, KN32/35
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution
User Guide
2 Getting Started with the
N4891A Solution
Chassis Setup / 12 Front Panel Overview / 14 Controlling the Equipment / 15 Installing License / 18
2 Getting Started with the N4891A Solution

Chassis Setup

The workflow to install and use a new N4891A chassis is as follows: 1 Unpack the N4891A. 2 Attach the accessories depending on how you will mount the equipment (see “Installing the
N4891A equipment” on page 12):
• On a bench: Attach the rubber feet.
• In a rack: Attach the mounting ears and then insert the N4891A chassis into the rack. 3 Connect the N4891A's management port to a network, and obtain an IP address. 4 Activate the license for the N4891A. 5 Connect the N4891A to the DUT. 6 Access the KiOS software and begin testing.

Installing the N4891A equipment

The N4891A chassis can be mounted on a bench or in a rack.
Bench mounting
To mount the N4891A chassis on a bench, install the four rubber feet to the bottom of the unit, one at each corner, using the supplied screws. Refer to Figure 1.
Figure 1 Illustration for bench mounting the N4891A chassis
12 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Getting Started with the N4891A Solution 2
Bench mounting
To mount the N4891A chassis in a rack (refer to Figure 2): 1 Install the mounting ears (one at each corner). 2 Insert the N4891A chassis into the rack and fasten the ears to the rack.
Figure 2 Illustration for bench mounting the N4891A chassis
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 13
2 Getting Started with the N4891A Solution

Front Panel Overview

The N4891A front panel includes the following components:
• Power ON/OFF button
• 1 link/activity LED per port
• Clock in/out: 2 SMA female connectors
• Trigger in/out: 2 SMA female connectors
• 4 USB: 2 USB 2.0 + 2 USB 3.0 ports
• 1 RJ45: 1000/100/10Mbps Ethernet management port
• 1 Display Port supporting a maximum resolution of 4096 x 2304 @60Hz
14 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide

Controlling the Equipment

Connecting to the N4891A chassis

The N4891A is pre-configured to obtain an IP address over DHCP. To set up N4891A and to use it for testing, you must find the IP address assigned to it.
There are two methods you can use to find the IP address assigned to the N4891A:
• DisplayPort: You can plug a monitor into the DisplayPort on the front panel.
• USB flash drive: After booting and obtaining an IP address, the N4891A chassis automatically
copies its address to a USB flash drive inserted into any of the USB ports.
DisplayPort method
1 With the N4891A chassis powered off, connect one end of an Ethernet cable to the management
port of the chassis, and connect the other end to a switch port that has access to a network that includes a DHCP server.
2 Connect a monitor to the DisplayPort on the front panel of the N4891A chassis, and a keyboard
and mouse to the USB ports. 3 Power on the N4891A chassis. 4 Use either a web browser or a console window to fetch the IP address.
•Web Browser:
i Launch a browser window. ii In the URL field, type localhost. iii When the Landing page appears, select System Admin from the main menu (in the upper right
corner).
iv Note the IP address from the Linux OS attributes.
Getting Started with the N4891A Solution 2
Figure 3 Finding IP address using the web browser
•Console window:
i Launch a console window on the N4891A chassis. ii Use the ifconfig command to display the IP address.
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 15
2 Getting Started with the N4891A Solution
Flash Drive method
1 With the N4891A chassis powered off, connect one end of an Ethernet cable to the management
port of the chassis, and connect the other end to a switch port that has access to a network that
includes a DHCP server. 2 Insert a thumb drive into and of the USB ports. 3 Power on the N4891A chassis. 4 Remove the flash drive and use a file explorer to find a file named hostname.txt in the root
directory of the file system on the flash drive. 5Open the hostname.txt file and make a note of the IP address in it.

Configuring the Hostname

1 With the N4891A chassis powered off, connect one end of an Ethernet cable to the management
port of the chassis, and connect the other end to a switch port that has access to a network that
includes a DHCP server. 2 Power on the N4891A chassis. 3 Launch a terminal window to the N4891A chassis. 4 Use the following command to set the host name:
hostnamectl set-hostname <host name>

Setting up the N4891A solution

The setting up of the N4891A 400GBASE FEC-aware Receiver Test Solution requires following additional steps:
1 Connect the ‘Clock Out’ of the N4891A chassis to the ‘Ref CLK In’ of the M8045A pattern
generator. 2 Connect the ‘Trigger Out’ of the N4891A chassis to the ‘Ctrl In A’ of the M8045A pattern
generator. 3 Connect the device under test (DUT).
i Plug a QSFP-DD HCB Tx breakout adapter in an N4891A port. ii Connect lanes #2-8 of the QSFP-DD HCB Tx breakout adapter to a module compliance board
(MCB).
iii Terminate lane #1 of the QSFP-DD HCB Tx breakout adapter with a 50Ohm terminations.
4 Connect the M8045A pattern generator data out signal (from M8057A/B remote head) to the
remaining MCB lane loopback the DUT to a different N4891A port.
i Using a compatible QSFP-DD module or cable. ii Using a QSFP-DD HCB Rx breakout adapter.
16 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Getting Started with the N4891A Solution 2
Figure 4 Connection diagram sample for the N4891 solution
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 17
2 Getting Started with the N4891A Solution
NOTE

Installing License

You must install and activate the license for the KiOS software before you can use it.
Before you begin, ensure that you:
• know the MAC address of the N4891A chassis (you can find the MAC address on the System
Admin page)
• have a valid license
To activate a license: 1 Ensure that you know the IP address assigned to the N4891A chassis. 2 On a PC that can access the same network as the N4891A chassis is on, open a browser window
and enter the IP address into the URL field.
The KiOS software landing page is displayed. 3 Select License Manager from the main menu in the upper-right corner.
The License Manager page is displayed.
Figure 5 The License Manager page in KiOS software
4 On the License Manager page, click the MyKeysight.com link at the top of the page. 5 Login to the Keysight website, and download your license file. 6 On the License Manager page, select Add New License. 7 Select Choose File, then select the license file. 8 Select OK to add the license file to the KiOS.
After license options are installed, the Options field in the Status table of the SYSTEM ADMIN displays ‘4 Ports’ as 4P, ‘-KP4 option’ as FEC, ‘-SYC option’ as SYNC, and ‘-BRT option’ as EBERT.
18 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Getting Started with the N4891A Solution 2
Tabl e 3 shows the fields that appear in the License Manager page along with their description.
Table 3 License Manager fields and description
License Manager field Description
Feature Feature enabled after installing the license.
Description Description of the licensed feature.
Version Version of the licensed feature.
Expiration Date and time that the license shall expire.
Type Type of license.
Count Number of licenses installed.
Filename Name of the license file.
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 19
2 Getting Started with the N4891A Solution
20 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution
User Guide
3 Using the KiOS Interface for
the N4891A Solution
Accessing the KiOS interface / 22 Line Speed Control / 25 Port Settings / 26 Statistics page / 31 CMIS / 40 Menu Options / 43
3 Using the KiOS Interface for the N4891A Solution
NOTE

Accessing the KiOS interface

Landing Page

The landing page of the KiOS web interface is displayed in Figure 6. The “Landing” page is the top-level page in the software. Figure 7, Figure 8 and Figure 9 describe the various components on the page.
The latest features and changes in the application are reflected in the A400GE User Guide, which can be found under the Help entry in the Options menu. For more information, see
“Menu Options" on page 43.
Figure 6 Main components of the landing page
22 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Figure 7 Landing page components (top-right corner)
Using the KiOS Interface for the N4891A Solution 3
Figure 8 Landing page components (bottom)
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 23
3 Using the KiOS Interface for the N4891A Solution
Figure 9 Landing page components (left)
24 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide

Line Speed Control

Using the KiOS Interface for the N4891A Solution 3
Enables you to change the line speed of all ports in the chassis. This affects only the ports running in “KP4 FEC” mode (see “Port Settings" on page 26 and “FEC Statistics Page" on page 34).
Figure 10 Line Speed Options
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 25
3 Using the KiOS Interface for the N4891A Solution

Port Settings

The Port Settings page enables you to configure the port settings such as the port mode (BERT or KP4 FEC), BERT patterns, and other port-specific settings.
Figure 11 Port settings in KiOS software
To configure the port settings: 1Click SETTINGS on the top right corner of the page. 2 Select the port that you want to configure. By default, Port 1 is selected. 3 Select the area of the port settings (Mode, BERT, or Host QSFP-DD) that you want to configure. 4 Configure the selected settings. Refer to the further sections for more information regarding
configuring each setting. 5Click Apply to save any changes.
26 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide

Mode

Using the KiOS Interface for the N4891A Solution 3
The Mode settings control the port mode. Click Apply to save any changes.
Figure 12 Mode options in KiOS software
Table 4 Mode options and their description
Mode Description
Link Operational mode of the port. The options are:
Operation Mode The options are:
Normal
Internal Loopback—supports internal electrical loopback inside the N4891A, no
transceiver is required in the QSFP-DD port
BERT—Bit Error Rate Testing mode
Depending on the selected line speed, one of the following:
• KP4 FEC (400GE)
• KP4 FEC (2x200GE)
• KP4 FEC (4x100GE)
• KP4 FEC (8x50GE)
Note: In eBERT mode, the KP4 option is not available.
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 27
3 Using the KiOS Interface for the N4891A Solution

BERT

The BERT settings define the traffic patterns sent by the port when the operation Mode is selected as BERT mode. Click Apply to save any changes.
Figure 13 BERT Patterns options in KiOS software
Table 5 Options available in BERT Patterns
Mode Description
Lane Physical Lane on port.
Tx Pattern Pseudo-random binary sequence (PRBS) pattern sent by lane.
Tx Invert If enabled, the transmitted pattern is inverted.
Rx Pattern PRBS pattern that the lane expects to receive.
Rx Invert If enabled, the received pattern is inverted.
28 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
If you select Auto-Detect, KiOS automatically identifies the incoming pattern.
If you select a specific pattern, KiOS discards any traffic that does not match the
selected pattern.

Host QSFP-DD

Host QSFP-DD
Using the KiOS Interface for the N4891A Solution 3
The Host QSFP-DD settings define the QSFP-DD settings on the port.
Configures the serialization/deserialization (SerDes) transmit equalization settings for the SerDes lanes. The SerDes Lanes table displays the current SerDes settings.
Figure 14 Host QSFP-DD options in KiOS software, version 3.0
Table 6 Configuration options in Host QSFP-DD
Config Options Description
Electrical defaults Use the electrical defaults for the SerDes lane settings.
Optical defaults Use the optical defaults for the SerDes lane settings.
Select All Manually configure all the SerDes lanes with identical settings.
Use the sliders to change the settings.
SerDes Lanes
Current settings of each SerDes lane along with the set value for each port. The options are:
• Pre-cursor 2 (dB)
• Pre-cursor (dB)
• Driver Amplitude (mV)
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 29
3 Using the KiOS Interface for the N4891A Solution
• Post-cursor (dB)
Module Control/Status
Configures the QSFP-DD module settings and displays their status. The options are:
The non-editable parameter ModSelL is always held low so that the QSFP-DD module responds to
management commands.
•Power—Controls power to the QSFP-DD.
• ResetL—Controls whether or not the QSFP-DD is in the Reset state.
•LPMode — Controls whether or not the QSFP-DD is in Low Power mode.
•ModPrsL — Indicates when the QSFP-DD is always reported as present (inserted) or not.
• The non-editable parameters ModState and IntL indicate the current sate of the QSFP-DD module
and if the status is currently being changed.
30 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide

Statistics page

BERT statistics page

Using the KiOS Interface for the N4891A Solution 3
Statistics of the selected port are displayed when you click STATS. The statistics that are displayed are dependent on the Port mode (BERT, KP4, or eBERT).
When the port is in BERT mode, the BERT Stats page is displayed. Statistics are available for both transmitted and received lanes, which are either PAM4 lanes or PCS lanes.
You can use the buttons at the top of the page to start, pause, or stop statistics gathering, and to clear the current statistics and reset the statistics counters to zero (0). Duration displays the length of time that the port has been sending and receiving traffic. Next to the duration, the current status of the port displays (Running, Stopped, or Paused). Refer to Figure 15.
Figure 15 Buttons available in Stats page (for both BERT and FEC mode)
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 31
3 Using the KiOS Interface for the N4891A Solution
The 8x50G and 16x25G buttons change the way the lanes are displayed in the statistics table. Refer to Figure 16 and Figure 17.
8x50G 8 lanes of 50G traffic
16x25G 16 lanes of 25G traffic
Figure 16 BERT statistics for 8x50Gb/s PAM4
Table 7 Various attributes of the BERT statistics for 8x50Gb/s PAM4 lanes
BERT Stats attributes Description
Lane Physical lane identifier. The physical lane is paired with its corresponding PCS lanes.
Pattern Lock Indicates whether the receiver side is locked to a particular data pattern.
Pattern Transmitted Pseudo-random data pattern being transmitted.
Pattern Received Pseudo-random data pattern being received.
PAM4 Symbols Sent Total number of PAM4 symbols sent. A PAM4 symbol contains 2 bits.
PAM4 Symbols Received Total number of PAM4 symbols received.
Bit Errors Received Total number of bit errors received.
PAM4 Symbol Errors Received [+] This is the total number of PAM4 symbols that have been received with a least one error. Click
PAM4 Symbol Error Ratio [+] Ratio of the total number of PAM4 symbols with at least one error to the total number of PAM4
Green indicates locked, which means that Rx identifies and syncs to PRBS
Red indicates not locked, which means that pattern is not recognized
the plus sign (+) to display the number of errors for each symbol value (00, 01, 10 and 11).
symbols received. Click the plus sign (+) to display the ratio for each symbol value (00, 01, 10 and 11). PAM4 SER should be between 1x and 2x BER. 1 bit error per symbol, ½ as many symbols as bits (SER = 2x BER) 2 bit errors per symbol (SER = BER)
Bit Error Ratio This is the NRZ Bit Error Ratio. This attribute displays the Ratio of error bits to total bits
Pattern Lock Lost Count Number of times pattern lock has been lost (equivalent to sync loss seconds in a BERT system).
32 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
transmitted, in the format 0.00E0.
Using the KiOS Interface for the N4891A Solution 3
Figure 17 BERT statistics for 16x25Gb/s PAM4
Table 8 Various attributes of the BERT statistics for 16x25Gb/s NRZ lanes
BERT Stats attributes Description
Lane Physical lane identifier. The physical lane is paired with its corresponding PCS lanes.
Pattern Lock Indicates whether the receiver side is locked to a particular data pattern.
Pattern Transmitted Pseudo-random data pattern being transmitted.
Pattern Received Pseudo-random data pattern being received.
Bits Sent Total number of NRZ bits sent.
Bits Received Total number of NRZ Bits received.
Bit Errors Received Total number of bit errors received.
Bit Error Ratio This is the NRZ Bit Error Ratio. This attribute displays the Ratio of error bits to total bits
Number of Mismatched 0’s Total number of erroneous zeros received.
Number of Mismatched 1’s Total number of erroneous ones received.
Mismatched 0’s Ratio Ratio of erroneous zeros to received zeros.
Green indicates locked, which means that Rx identifies and syncs to PRBS
Red indicates not locked, which means that pattern is not recognized
transmitted, in the format 0.00E0. Note that it is possible for the LSB to be greater than the MSB BER because of mostly single bit errors. The total BER should be the same as that for the 8xPAM4 lanes.
Mismatched 1’s Ratio Ratio of erroneous ones to received ones.
Pattern Lock Lost Count Number of times pattern lock has been lost (equivalent to sync loss seconds in a BERT system).
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 33
3 Using the KiOS Interface for the N4891A Solution

FEC Statistics Page

The FEC statistics page displays the statistics for FEC Codewords and FEC Lanes. The port must be in FEC mode to display FEC statistics. Refer to Figure 18 and Figure 19 to view a sample FEC Codeword Stats page and FEC Lane Stats page, respectively.
The buttons shown for FEC statistics work in the same manner as that for BERT statistics. Refer to
Figure 15.
Figure 18 FEC Codeword statistics page
34 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Figure 19 FEC Lane statistics in 8x50GE mode
Using the KiOS Interface for the N4891A Solution 3
Figure 20 FEC-lane statistics in 4x100GE mode. The selected 100GE link (here 1st link on port 3) is highlighted.
The FEC Codewords and FEC Lanes buttons display respective statistics, which are described in Ta ble 9 ,
Tabl e 10 and Ta ble 11 . The Codewords All Ports button displays FEC statistics for all ports that are in
KP4 FEC mode. The statistics displayed by the Codewords All Ports button are illustrated in Figure 21.
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 35
3 Using the KiOS Interface for the N4891A Solution
Table 9 Statistic for FEC Totals
Statistic Count Rate
FEC Total Bit Errors Total number of bit errors in the codewords Rate at which bit errors occurred in the codewords
FEC Max Symbol Errors Maximum number of symbol errors in the codewords N/A
FEC Corrected Codewords Number of codewords that were successfully corrected Rate at which codewords were successfully corrected
FEC Total Codeword (TCw) Total number of codewords transmitted Rate at which codewords were transmitted
FEC Frame Loss Ratio Ratio of frames lost to frames transmitted N/A
Pre FEC Bit Error Ratio Ratio of error bits received (0 instead of 1 or 1 instead
FEC RX Clock PPM Offset PPM offset of the recovered receive clock from the
FEC RX Link Loss Number of times Rx link has been lost N/A
Bins Codewords (Cw) Rate % (TCw) Log10 (Cw) Bit Errors Max Avg
FEC Codewords with n Symbol Errors (n=0-15)
FEC Uncorrectable Codewords
FEC Uncorrectable Events
Number of codewords with n symbol errors received.
Number of codewords with errors that could not be corrected.
Number of uncorrectable codeword events.
Per IEEE 802.3bs, the N4891A has two FEC engines. If either FEC engine or both FEC engines detect an uncorrectable codeword at the same time, that counts as one event.
of 0) to total bits before FEC was applied
A400GE-QDD's internal reference clock
Table 10 Statistic for FEC Bins
Rate at which codewords with n symbol errors were received.
Rate at which codewords with errors that could not be corrected were received.
Rate at which uncorrected codewords events occurred.
Percent of all codewords received that had n symbol errors.
Logarithm to the power 10 of the number of codewords with n symbol errors received.
Rate at which error bits were received
N/A
Number of bit errors in codewords with n symbol errors received.
Maximum number of bit errors in a codeword with n symbol errors received.
Average number of bit errors in a codeword with n symbol errors received.
36 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Using the KiOS Interface for the N4891A Solution 3
Table 11 Statistic for FEC Lanes
Statistic Description
All Shows the lane groupings in 2x200GE, 4x100GE, 8x50GE (this column is not shown in 400GE mode).
Physical Lane Physical lane identifier.
PCS Lane Marker Lock Indicates if the received PCS lane has achieved alignment marker lock.
PCS Lane Marker Map Virtual lane (VL) number identified by the alignment marker. The VL number is only valid when the PCS Lane Marker Lock is green
Relative Lane Skew (ns) Lane skew in nanoseconds. Skew measurements are valid only when all lanes are locked with 16 unique lane markers. The first
PCS Lane Marker Error Count Number of incorrect PCS lane markers received while in PCS lane locked state.
FEC Symbol Error Count Number of FEC symbol errors.
FEC Corrected Bits Count Number of FEC bit errors that have been corrected.
FEC Symbol Error Ratio Ratio of FEC symbols with errors to total FEC symbols received.
FEC Corrected Bit Ratio Ratio of bits that were corrected to total bits received.
VL Lock Lost Indicates whether or not the virtual lane (VL) is locked to the alignment marker.
LSB = least significant bit in the PAM4 symbol
MSB = most significant bit in the PAM4 symbol
Green = locked
Red = not locked
(lane is locked).
virtual lane (VL) markers to arrive have a skew of 0. All other lane skews are relative to them.
Gray = locked
Yellow = lock previously lost, but is currently locked
Red = lock lost
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 37
3 Using the KiOS Interface for the N4891A Solution

eBERT Statistics

Figure 21 FEC Statistics displayed by Codewords All Ports button
Enhanced BERT (eBERT) is a suite of optional features which can be either enabled at manufacturing time or purchased and activated separately afterwards. To activate eBERT separately, you enter a token in the “Feature Activation” field.
The eBERT features are:
• Verbose PAM4 Symbol Errors: On the BERT statistics page, you can expand (+) the PAM4 symbol
error statistics to see the distribution of mismatched symbols.
• SSPRQ100/SSPRQ50 BERT Patterns: Patterns composed of a repeating PAM4 symbol sequence
and intended for optical Tx testing. SSPRQ patterns are stressful, but short enough to use for advanced analysis of equalization, jitter/noise analysis, etc. SSPRQ patterns are defined in IEEE802.3BS.
38 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Using the KiOS Interface for the N4891A Solution 3
• Burst Errors: Statistics on burst errors. Because the standard BER statistics show the average
error over time across all bits, instantaneous errors tend to be obscured. The Burst Errors statistics can help you find errors in bursty traffic. Burst errors are configured by parameters on the Port Settings page.
• BERT Inferred FEC: BERT Inferred FEC (BIF) is a feature that displays FEC statistics in real time
based on the BER errors.
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 39
3 Using the KiOS Interface for the N4891A Solution

CMIS

The Common Management Interface Specification (CMIS) page displays the register map for the transceivers installed in the N4891A ports. The KiOS currently supports CMIS versions 3.0, 4.0, and SFF 8636.
The controls on left side of the page select the pages in the register map. In the register map, if you select Read, the page reads the current register value. For the registers that include a field in the Write Hex column, you can enter a value, select Write, and change the register value. Selecting Refresh updates all the values on the page.
Figure 22 CMIS 3.0 interface
40 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Using the KiOS Interface for the N4891A Solution 3
Figure 23 CMIS 4.0 interface
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 41
3 Using the KiOS Interface for the N4891A Solution
Figure 24 CMIS SFF 8636 interface
Table 12 CMIS Attributes
RW RO = Read Only
Register Name Name assigned to Register
Addr Address assigned to the Register
Read A/H Value read from register in ASCII or hexadecimal
Read Binary Value read from register in binary
Read Updates address value display
Write Hex New hexadecimal value to be written to the register
Write Binary Binary expression of the new hexadecimal value to be written to the register
Write Writes value in the Write Hex field to the register
42 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
RW = Read/Write

Menu Options

Using the KiOS Interface for the N4891A Solution 3
The menu contains controls that affect the global operation of the software and the N4891A.
Figure 25 Accessing the Menu options

New tab

Test Automation

New Tab opens a duplicate copy of the KiOS software in a new tab.
You can use this feature to monitor multiple ports at the same time, or display multiple pages of statistics at the same time.
Using Test Automation, you can create tests that sample the BERT and FEC traffic that the N4891A is monitoring, and generate test reports that contain these results.
Each test belongs to a test group.
A test group is a set of tests that share certain characteristics, such as the mode they run in (BERT or FEC), the speeds they run at, or other common properties that they have in common.
A pre-configured group of FEC and BERT tests (named Default Tests) is included with the KiOS software. You can use these tests to perform general FEC or BERT tests, or you can use them as the basis for your own custom tests.
After you have configured the tests that you want, you select the tests that you want to run, the ports you want to run them on, and then start the tests. The tests will run until either the run time (a configuration parameter) expires or you manually stop the test.
During a test run, the Test Reports page displays the status of the tests. At the end of each individual test, KiOS adds the results to the test report, so you can view the results without waiting for the entire test run to end.
The test plan is the entire test configuration. It includes the test run time settings, the report settings, the test groups, and the all the tests in them. You can import and export the test plan as a single file.
The Test Reports page contains the controls to create, run, and manage the tests, and it shows the test status during a test run.
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3 Using the KiOS Interface for the N4891A Solution
NOTE

System Admin

The System Admin page displays details on the running condition of the N4891A chassis, such as temperatures and fan speeds, and details on the operating system. It also includes controls for the clock and target temperature, and for shutting down, restarting, or restoring the operating system on the N4891A chassis.
After license options are installed, the Options field in the Status table of the System Admin displays ‘4 Ports’ as 4P, ‘-KP4 option’ as FEC and ‘-SYC option’ as SYNC, and ‘-BRT option’ as EBERT.
To display the System Admin page, select Menu | System Admin.
44 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Using the KiOS Interface for the N4891A Solution 3
Figure 26 Interface for ‘System Admin’ (A400GE-QDD)
Figure 27 Interface for ‘System Admin’ (Linux OS)
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 45
3 Using the KiOS Interface for the N4891A Solution
Table 13 Attributes under System Settings in System Admin
System Controls Description
QSFP-DD Temperature Target This value sets the target temperature for the QSFP-DD transceivers. The fans will be adjusted to maintain this
Clock Source Source of the clock used by the N4891A. The Clock In Expected frequency is 166.015625 MHz.
Frequency Adjust If the N4891A is using its internal clock source, this parameter applies an offset (in terms of parts-per-million (ppm)
Clock Out Enables or disables the Clock Out signal.
Linux Settings
DHCP Enable Switch between DHCP automatic IP assignment or Static IP to manually set up the instrument IP parameters.
Restart Server, Restart Linux, Shutdown Linux Restart or shutdown the N4891A's operating system.
temperature.
Internal clock—The N4891A uses its internal clock
Clock In—A clock source attached the ‘Clock In’ port on the front panel of the N4891A is used
to the clock signal.
Restart—Restarts (reboots) the operating system.
Shutdown—Powers off the N4891A. To restart the N4891A chassis, you must physically power it on.

System Logs

The System Logs page displays all the log messages from the N4891A chassis in real time. You can also download the log files or delete log files that you no longer want.
To display the System Logs page, select Menu | System Logs.
Real Time Log messages
To display the log messages from the N4891A chassis, click Real Time Log.
Figure 28 System Logs (Real Time)
46 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Using the KiOS Interface for the N4891A Solution 3
Downloading System Logs
To download the log files from the KiOS: 1 On the System Logs page, select Download. 2 In the list of log files, click Download corresponding to the log that you want to download.
The log file is downloaded to your browser's default Download folder.
Deleting System Logs

Software Update

Figure 29 System Logs (Download and Delete)
To delete log files from the KiOS: 1 On the System Logs page, select Download. 2 For the log file that you want to delete, click X (delete), then click OK on the prompt to confirm.
• By default, the KiOS software automatically deletes log files that are more than 30 days old. To
delete log files at a different age, specify a new value for the Delete files older than [ ] days field. If you specify 0, all the logs files are deleted when the N4891A chassis boots.
• To delete all the log files immediately, click Delete Now.
The Software Update page enables you to update the application software installed on the N4891A.
There are three sources you can get updated software from:
Table 14 Source for updated software
Software source Description
Installed Software already installed on the N4891A chassis.
Local drive Software stored on the PC where your browser is running.
Cloud server Keysight's cloud server.
To display the Software Update page, select Menu | SOFTWARE UPDATE.
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3 Using the KiOS Interface for the N4891A Solution
Updating from installed software
Figure 30 Window for Software Update (from installed software)
To update from software already installed on the N4891A chassis: 1 On the Software Update page, click Installed. 2 For the version that you want to begin using, click Start. 3Click OK to confirm using the new version.
To delete an installed software package, select X (remove) for the package that you want to delete.
Updating from a local drive
Figure 31 Window for Software Update (from local drive)
To update from software stored on your PC's drive: 1 On the Software Update page, click Local Drive. 2Click Choose File, then select the software package (.deb) file from the local disk. 3 For the software file you selected, click Upload.
The software file is transferred from the PC to the N4891A. After the transfer is complete, the
N4891A then displays it in the list of installed software. 4Click Start to begin using the new software package.
48 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Using the KiOS Interface for the N4891A Solution 3
NOTE
CAUTION
Updating from the cloud server
Figure 32 Window for Software Update (from cloud server)
To update from the cloud server, the KiOS must have access to the Internet, and the firewall between it and the Internet must allow traffic on port 80.
To update from software stored on Keysight's cloud server: 1 On the Software Update page, click Cloud Server. 2 For the software file that you want to download, click Download, then click OK to confirm.
The KiOS downloads the software file, then displays it in the list of installed software. 3Click Start to begin using the new software package.

License Manager

The License Manager page enables you to manage the licenses installed on the N4891A device. The license enables the hardware warranty, and allows the KiOS to obtain software updates. A license for an N4891A is locked to a specific unit, and cannot be moved to another unit.
You must install a license before you can use the N4891A chassis.
To display the License Manager page, select Menu | License Manager.
If you perform a system restore, you will have to re-enter the license details when the N4891A chassis restarts. Ensure that you have the license details available before you perform a system restore.
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 49
3 Using the KiOS Interface for the N4891A Solution
NOTE
Figure 33 License Manager window
Adding a license
To add a license to the KiOS: 1 On the License Manager page, click the MyKeysight.com link at the top of the page. 2 Login to the Keysight website, and download your license file. 3 On the License Manager page, click Add New License. 4Click Choose File, then select the license file. 5Click OK to add the license file to the KiOS software.
After license options are installed, the Options field in the Status table of the SYSTEM ADMIN displays ‘4 Ports’ as 4P, ‘-KP4 option’ as FEC, ‘-SYC option’ as SYNC, and ‘-BRT option’ as EBERT.
License Manager Fields
Table 15 Fields in the License Manager window
License Manager fields
Feature Feature that license enables.
Description Description of licensed feature.
Version Version of licensed feature.
Expiration Date and time that license expires.
Type Type of license.
Count Number of licenses installed. This value is always 1.
Filename Name of license file.
50 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide

Help

Using the KiOS Interface for the N4891A Solution 3
Feature Activation
Feature Activation enables additional features on the KiOS. The base KiOS software configuration includes two functional ports and BERT functionality. Other features such as FEC functionality, enabling the two additional ports, or the ability to sync with an M8040A BERT analyzer require feature activation codes, which you can obtain from Keysight Licensing Management.
To enable a feature, you must enter an activation code in the Feature Activation section.
Activating a feature
To activate a feature: 1 On the Feature Activation page, enter the feature activation code in the field. 2Click Apply.
Help opens a page with link to the A400GE User Guide and REST API User Guide. Refer to these documents for information on the latest features and KiOS version.
Figure 34 Help page
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3 Using the KiOS Interface for the N4891A Solution
52 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution
User Guide

4 Testing Optical Transceivers

About Optical Transceivers / 54 Basic Functional Testing / 55
4 Testing Optical Transceivers

About Optical Transceivers

The N4891A test system is designed to support all QSFP-DD MSA-compliant optical transceivers up to Power Class 7 with 14 watts of power consumption. This is within the range of the N4891A’s capacity to power up the optical module in the port. For optical transceivers that require more power per port, contact Keysight Support for further information.
For optical transceiver modules, Keysight recommends the use of the Optical Defaults settings, which have been tested across a variety of vendor optics.
The transmit pre-emphasis settings shown in Table 16 are provided as a guide for establishing a baseline for optical transceiver support.
Table 16 Recommended N4891A transmit pre-emphasis settings
A400 Setting Value Unit
Pre-Cursor 2 0 dB
Pre-Cursor -1.1 dB
Driver Amplitude 478 mV
Post-Cursor 0 dB
Figure 35 KiOS Host QSFP-DD settings screen for optical transceivers (Optical defaults)
54 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide

Basic Functional Testing

Workflow

Procedure
1 Plug the transceiver under test (also referred to as the DUT) in one port of the N4891A and verify
on the “Landing” page that it is correctly recognized. 2 Connect the DUT in optical loopback or connect its optical interface with the corresponding
interface (refer to Case 2 shown in Figure 39) of the second reference transceiver plugged into a
different port. 3 Adjust the port settings:
i (Recommended) Start the functional testing in BERT mode. ii Adjust Host QSFP-DD settings according to the transceiver vendor recommendations or using
iii If you use a second transceiver as reference device, make sure both operate in the same mode.
4Activate the DUT:
i Navigate to the STATS page and verify whether the bits are transmitted and/or received. ii If the DUT does not transmit, check the Host QSFP-DD Settings page of the port it is plugged in
• If this does not help, check the Module State register in the CMIS page.
• Refer to “Troubleshooting” on page 74 if the link doesn’t turn green.
Testing Optical Transceivers 4
the Optical Defaults settings.
and set the parameter LPmode to “De-Assert”. Click Apply.
Figure 36 Verifying Module state in CMIS
5 Measure the Layer 1 BER performance. 6 Measure FLR and FEC margin:
i Change to KP4 FEC mode in the Host QSFP-DD settings. If you use a second transceiver as
reference device, make sure both operate in the same mode.
ii Click STATS to visualize the FLR and error per frame distribution (FEC margin) of both the DUT
and the reference transceiver.
IEEE 802.3 NRZ Compliance Test Application Getting Started 55
4 Testing Optical Transceivers
56 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution
User Guide

5 FEC-aware Receiver Testing

Hardware & Software Requirements / 58 Setup Configuration / 61 Setting PRBS Mode / 65 Setting FEC-aware Mode / 67 Receiver Compliance Testing / 70 Troubleshooting / 74
5 FEC-aware Receiver Testing
NOTE
NOTE

Hardware & Software Requirements

Tabl e 17 shows the required equipment for the different applications supported by the N4891A.
Refer to N4891A 400GBASE FEC-aware Receiver Test Solution Data Sheet for a complete configuration guide.
Table 17 Required equipment for N4891A-supported applications

N4891A options

Functional test BER Functional test FLR Compliance*
N4891A* Baseline Option -FEC Baseline Options -FEC, -SYNC
M8045A No No Options -0P3, -0G3,
QSFP-DD breakout adapters
Clock Cables No No Yes Yes
* For compliance testing, additional equipment may be required to generate and calibrate the stress lane. Please refer to the corresponding
Receiver Test solution Data Sheet documents.
No No Yes Yes
Multi-lane Rx Test
-0G4
Compliance* FEC-aware Rx Test
Options -0P3, -0G3,
-0G4, -0G9
The Ixia 400GE-QDD, with the same options as the N4891A, is also supported.
• N4891A-002 or N4891A-004 (2 or 4-port 400GE Layer1 BERT QSFP-DD test system)
• ‘-KP4 option’ and ‘-SYC option’ to run the Rx test in FEC-aware mode
As mentioned earlier, after license options are installed, the SYSTEM ADMIN displays ‘4 Ports’ as 4P, ‘-KP4 option’ as FEC and ‘-SYC option’ as
SYNC.
To verify if the mandatory options have been installed, click the menu icon on the right side corner of the GUI, click SYSTEM ADMIN, and check the Options field in the Status table.
Figure 37 Checking Options in the KiOS table
58 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide

M8070B requirements

• M8070B v 7.5 (released version) or later
• M807ADVB advanced measurement package plug-in is recommended

M8045A options

Striped FEC encoding
• M8045A-0G9 Forward Error Correction (FEC) Encoding, Module-wide License
• or M8045A-UG9
• M8045A-0P3 PAM-4 Encoding up to 32GBaud, Module-wide License
• or M8045A-UP3
BERT mode testing
• M8045A-0G3 Advanced Jitter Sources for Receiver Characterization, Module-wide License
• or M8045A-UG3
• M8045A-0G4 De-emphasis, Module-wide License
• or M8045A-UG4
FEC-aware Receiver Testing 5
For optical receiver testing at 53GBaud PAM4, such as, 400GBASE-DR4,

Accessories

QSFP-DD breakout adapters
RF Accessories
• You require either of the following licenses:
• M8045A-0P6 PAM-4 Encoding up to 64GBaud, Module-wide License or
• M8045A-UP6
• Refer to the Keysight N4917BSCB User Guide for the complete configuration of Optical Receiver Stress Test solution.
An HCB Tx adapter compatible with QSFP-DD is required to extract the 8x 50G differential lanes out of the QSPP-DD port used as the transmitter and bring them to the DUT evaluation board (EVB). Similarly, an HCB Rx adapter is necessary to take the eight 50G lanes from the DUT to the QSPP-DD port used as receiver (error detector, case 1 as shown in Figure 38). If the DUT is an optical module, the back-channel to the receiver can be achieved by using the DUT optical transmitter and using a reference transceiver of same PMD as an O/E (case 2 as shown in Figure 39).
Keysight recommends following HCB QFSP-DD Tx and Rx adapters:
• N4891A-810 QSFP-DD 400G HCB Tx Test Adapter
• N4891A-811 QSFP-DD 400G HCB Rx Test Adapter
Two coaxial cables with male SMA connectors are required to connect the clock and trigger ports of the M8045A and N4891A. In addition, 16 coaxial Adapters, 2.92mm or 3.5mm male-male (such as, Keysight 83059A) are required to connect the recommended QSFP-DD HCB-Tx and MCB.

Recommended Port setup

In order to limit the mechanical stress on the MCB and HCB adapters, Keysight recommends not to use adjacent ports on the N4891A chassis for the FEC-aware testing. Therefore, in this document, the following port configuration has been considered for testing:
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5 FEC-aware Receiver Testing
• Port 1 used as Tx (HCB Tx adapter)
• Port 4 used as RX (HCB Rx adapter or loopback module)
60 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide

Setup Configuration

CAUTION

Connection Setup

FEC-aware Receiver Testing 5
Complete all connections with the M8040A BERT and the N4891A
chassis powered off.
Figure 38 Case 1: FEC-aware connection setup for electrical receiver test
Figure 39 Case 2: FEC-aware connection setup for optical receiver test
Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide 61
5 FEC-aware Receiver Testing
NOTE

Procedure

1 Plug in the M8057A/B Remote Head connectors into Channel 1*.
2Connect Clock Out from N4891A to Ref Clk In on the M8045A. 3Connect Trigger Out from N4891A to Ctrl In A on the M8045A.
i Connect the P and N cables to the P and N on Channel 1. ii Connect the Power cable to the Remote Head connector.
* You may use Channel 2 (if you have the Dual Channel option on the M8045A). If you use Channel 2, connect Trigger Out from N4891A to Ctrl IN B on the M8045A.
Figure 40 Ports used on M8045A and N4891A for connection
4 Plug the HCB QSFP-DD Tx adapter into N4891A Port 1. 5 Plug the HCB QSFP-DD Rx adapter (Case 1 as shown in Figure 38) or the loopback module (Case
2 as shown in Figure 39) into N4891A Port 4.
6 Connect Tx and Rx adapter (if used) to the MCB. Quantity 16 (case 2 as shown in Figure 39) or 32
(case 1 as shown in Figure 38) male-to-male adapters (2.92 mm or 3.5 mm) are needed. Use Keysight 83059A or similar equipment.
7Connect the Data Out positive and Data Out negative (Out
outputs to the TX1+ and TX1- inputs of the MCB. 8 Connect the low speed interface connector from the MCB to the connector from the TX HCB. 9 Provide a power supply to the MCB. Set the voltage to +3.3V. Depending on the module, the
current consumption could go up to 4.5A. 10 Power up the N4891A chassis, the M8040A and the MCB.
The MCB module should be detected by the N4891A. If not, it may need to be reset. Refer to
“Troubleshooting” on page 74 for more information.
) of the Channel 1 Remote Head
62 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide
FEC-aware Receiver Testing 5
NOTE
For 100G-KP4, the FEC encoding is split into 4 PCS lanes (0,1,2,3) only. When a second pattern generator is available, it can provide a 26.5625 Gbaud PAM4 signal containing PCS (2,3) while PCS(0,1) are provided by the first pattern generator. In this case, a sync pulse is required on both the CTRL IN connectors to synchronize both the channels. This can be achieved by using a splitter to feed the Trigger Out of N4891A to both the M8045A CTRL IN connectors and then clicking on SYNC in the N4891A user interface.
Starting M8070B software in BERT with FEC mode
• On a Windows-based machine, click Start > Keysight M8070B.
• If the installed version of the M8070B is higher than 7.5, click Start > Keysight M8070B
• Select the FEC mode corresponding to your application (50G, 100G, 200G, 400G)
Figure 41 Starting 400G mode in M8070B (v7.5 or above)
Using Shared Clock Domain
Usually, the DUT requires all lanes to operate on the same clock domain. To achieve this, perform the following setup changes on the M8040A using the M8070B software (see Figure 42). The Shared Clock Domain might not be required for the PRBS mode or in 50GE FEC mode, where all 26GBaud PAM4 lanes can have a different clock domain (depends on the device under test).
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5 FEC-aware Receiver Testing
Figure 42 Configuring M8070B software for M8045A Pattern Generator
1Select Clk Gen and set Frequency to 26.5625 GHz (default). 2 Change the Source to Clock Multiplier. 3Set Multiplier to the minimum value (260). 4Click the arrow next to Reference Frequency to measure the exact reference clock frequency. A
5If the Clock Multiplier option is installed, retain Bandwidth to its default value (100 KHz). 6Set Multiplier to 160. This should result in Frequency being set to 26.5625 GHz. 7Select Ctrl In A and set Threshold to 350 mV. In case a second pattern generator is used in case of
value of 166.015625 MHz is expected; the actual measured value may differ a little. Alternatively,
set the Reference Frequency to 166.015625 MHz.
100G-KP4. (see Note on page 61)
a Reduce the threshold to 175 mV. b Adjust the Threshold of Ctrl In B, as well.
Setting up M8045A Pattern Generator
After configuring settings for the same clock domain on the M8070B software, perform the following steps to configure the Pattern Generator:
1 Verify Output settings by clicking the Modules view followed by clicking Data Out for Channel 1.
i Line Coding: PAM4, Gray coding, No pre-coder ii Amplifier: Output State is ON, AC, Non-Inverted, 350mV
2Set the Pattern to a PRBS sequence (such as, PRBS13Q). Note that the N4891A receiver does not
support SSPRQ pattern. 3Set Global Outputs of the M8070B to ON and uncheck the Enable Impairments check box.
64 Keysight N4891A 400GBASE FEC-Aware Rx Test Solution User Guide

Setting PRBS Mode

Loopback Configuration—BERT mode

Setting up N4891A
On the KiOS software: 1Set Port 1 and Port 4 in BERT mode. 2 Select the desired PRBS sequence for the Tx Pattern (such as, PRBS13Q) and verify that the
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PRBS expected on the Rx side is set to Auto-Detect.
Figure 43 Configuring BERT Patterns on KiOS
3Adjust Port 1 Host QSFP-DD equalizer settings.
Figure 44 Configuring Host QSFP-DD equalizer settings on KiOS
Valid settings of the QSFP-DD Host depend on the loopback connection (with optical or electrical loopback modules or with a Rx adapter). For optimum settings, selecting Electrical Defaults or Optical Defaults, as appropriate, is considered a good starting point. Refer to Tab le 1 8 in “Troubleshooting” on page 74.
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Checking BER on STATS View

To check BER for all lanes, click Port 4 (the Rx side) > STATS. All lane indicators should be green in color in the Pattern Lock column, if they are not turned on. Some lanes may show high BER.
Tip Open a second tab in the KiOS interface to view simultaneously the Port 1 and Port 4 configuration in
the corresponding tabs.
If there is a need to improve the BER on lanes 2 - 7, 1Click Port 1 > SETTINGS > Host QSFP-DD. 2 Adjust the pre and post tab de-emphasis of the individual lanes. 3 After each adjustment, click Clear Stats on the Port 4 STATS view to refresh the BER readings.
Figure 45 Example for Port 4 settings in KiOS
4 If there is a need to improve BER on lane 1,
• On the M8070B software, adjust the de-emphasis setting of the M8040A Channel 1 Data Out.
Suggested settings are:
Coefficient 1: -0.03
Coefficient 2: -0.05
Amplitude: 300 mV to –500 mV
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Setting FEC-aware Mode

NOTE

Loopback Configuration—KP4 FEC-aware mode

Setting up N4891A in KP4 mode
On the KiOS software: 1Set Port 1 and Port 4 in KP4 FEC mode. For each port, navigate to SETTINGS > Mode > KP4 FEC and
click Apply. 2 Check the stats on Port 4.
i Select the FEC Lanes view. All lanes should be locked (green) except the one coming from
M8040A.
Setting up M8040A in KP4 mode
On the M8070B software: 1 Select Memory Pattern for Channel 1 Data Out only. Click Factory > FEC >
IEEE_802_3cd_RS_544_514_Scrambled_Idle.
In the FEC-aware mode, an idle sequence is scrambled and FEC encoded in real time on both M8045A and N4891A. Alignment markers and lane numbering are included. In this setup, the FEC encoded signal from the M8045A pattern generator output is setup as lane 1 and contains the logical information of PCS lanes 0 and 1. This corresponds to Lane #1 of an N4891A port.
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The scrambled idle pattern is not supported by the M8040A error detector (M8046A) or the AWG product family. Therefore, only the M8045A pattern should be adjusted, as shown in
Figure 46.
Figure 46 Adjusting pattern on M8045A
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NOTE

Synchronizing with M8040A

1 In the KiOS interface, click SYNC to synchronize the FEC engines on both the N4891A and the
Figure 47 KiOS Sync button to synchronize FEC Engines
2 Check the status of all lanes on Port 4.
The steps required in this section are not required for (single-laned) 50G or 100G/53GBaud PAM4 mode.
M8040A. (This step might not be required for 50GE FEC mode if the DUT can handle individual
clock domains for the lanes.)
•The PCS Lane Marker Lock under Port 4 > STATS > FEC Lanes should be green for all lanes.
Figure 48 Status of all lanes on Port 4
• BER should be visible for all 16 PCS lanes (each electrical lane includes 2 PCS lanes – LSB and MSB). Note that it may take up to a minute for the digital equalizer of N4891A Rx port to adapt to the new lane. Refer to “Troubleshooting” on page 74.
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Figure 49 Sample FEC Lanes Stats for Port4
•Switch to FEC Codewords Stats view. Click Port 4 > STATS > FEC Codewords to view the FEC performance of the link including pre-FEC BER, post-FEC Frame Loss Ratio and FEC Codeword error distribution.
Figure 50 Sample FEC Codewords Stats for Port 4
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Receiver Compliance Testing

The N4891A solution enables the testing of digital receiver PHY chips with a 400GAUI-8 interface. The PHY chip can be tested using standalone (Case 2 shown in Figure 39) or embedded in an optical transmitter module (Case 1 shown in Figure 38). Stress signal conditioning is achieved by applying stress on one lane coming from the M8040A High Performance BERT in conjunction with the remaining unstressed lanes provided by the N4891A. Specific stress components that can be added by the M8040A are:
i Adjusting the de-emphasis cursors to emulate ISI or extensive pre-compensation. ii Injecting a jitter mix (Sinusoidal, Random, BUJ and so on). iii Injecting sinusoidal interference or random noise to the signal. To accomplish this, an
additional interference source and directional coupler are required.
Keysight Technologies provides several compliance solutions based on the M8040A High Performance BERT, such as:
• M809256PB OIF-CEI 56G Receiver Test Application
• M8091BSPA IEEE 802.3bs Receiver Test Pre-compliance Application
• N4917BSCB Optical Receiver Stress Test Application
Refer to the user guides for the respective applications for more information regarding the stress signal calibration procedures and equipment requirements.
In general, following is the procedure for device testing with the N4891A 400GBASE FEC-aware Receiver Test Solution:
1 Choose the appropriate compliance application. 2 Calibrate the M8040A ‘stressed eye’ signal. Note that additional equipment will be required for
this step such as a DCA-X/M Sampling Oscilloscope, Clock Recovery, Tunable Laser, Reference Transmitter, Optical Attenuator, ISI channel, and so on.
3 Apply the calibrated stress signal to the DUT lane under test, usually with valid unstressed
signals on the remaining lanes (N4891A can be used as a source for the other lanes).
4 Perform a jitter tolerance test, sensitivity test or, if required, both tests to ensure that the BER
target is met (such as, 2.4E-4 for optical; 1E-5 to 1E-6 for electrical).
5 Switch to FEC mode and verify that the Frame Loss Ratio (FLR) requirements are met.
For debugging and finding the limits of the DUT design, it can be useful to make further manual adjustments to the impairment sources, which are described further.
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Jitter Injection

Injecting random jitter on stress lane
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On the M8070B software: 1Select Channel 1 Data Out and expand Parameters on the right.
Figure 51 Selecting Channel 1 Data Out and Parameters
2Expand HF Jitter and scroll down to RJ settings. Set RJ State to On and apply a non-zero RJ
Amplitude (RMS), such as 55 mUI. This amplitude may cause a few uncorrectable FEC codeword errors to be generated. Change this value if required.
Figure 52 Setting RJ Parameters
3 Ensure that the Enable Impairments check box is checked to activate impairment sources.
Figure 53 Verifying Enable Impairments selection
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ISI Emulation
On the M8070B software: 1Select Channel 1 Data Out and select Deemphasis parameters on the right.
Figure 54 Adding Interference

Using the M8070B DUT Control Interface

The DUT Control Interface (DCI) feature allows you to control a DUT at well-defined positions within the measurements of the M8070B software. Similarly, it can be used to control the N4891A from within the M8070B software using Python scripts. This allows you to:
• Automatically synchronize the FEC engines of the N4891A and the M8045A at the beginning of a measurement.
• Read error statistics like BER or FLR from the N4891A.
• Use those statistics in Error Ratio and Jitter Tolerance Measurements.
DCI is part of the Advanced Measurement Package plug-in that requires the license “M8070ADVB-1xx”. For more information about DCI, refer to the M8000 Series Advanced
Measurement Package User Guide.
Testing 100G/
λ Optical Interfaces
Some optical transceivers modules use a gearbox to (mux/demux) multiplex two 50G electrical lanes into a 100G/
λ optical interface. Testing the receiver side of such an optical interface is possible in
PRBS mode as well as in 100G-KP4 mode.
PRBS mode
In CLKGen, set Multiplier to 320. This will result in Frequency being set to 53.125 GHz. The 53.125 Gbaud PRBSQ sequence will result in two 26.5625 Gbaud PRBSQ sequences after the demux, which can be accommodated by the N4891A or by the M8046A error detector.
100G-KP4 mode
In contrast to the other FEC encoding modes, the 100G-KP4 mode support a 53.125 GHz clock. The 53 Gbaud PAM4 signal generated on Pattern Generator 1 or Pattern Generator 2 includes all the 100G-KP4 PCS lanes (0,1,2,3) and corresponds to the two multiplexed 50G PAM4 tributaries of the 100GAUI-2 interface.
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Figure 55 Principle of 100G/λ FEC-aware testing
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Troubleshooting

Scenario 1: Link is not up in BERT mode

Symptoms: All lanes are down
1 If the DUT is an optical transceiver, check if it is powered on.
2 If device is in low power mode or not emitting a signal, reset the device in the following manner:
•Click Port 1 > Settings > Host QSFP-DD. Check the ModeState parameter at the bottom of the
page.
• Alternatively, you can check on the CMIS. Click Port 1 > CMIS > Refresh. Check the following
registers:
Lower Page 00 – Module State — Addr 3 – Check value xxxx011x in the Read Binary field
Here, x = don’t care. Also, regarding the four least significant bits,
001x = module low power state
010x = module power up state
011x = module ready state
•Click Port 1 > Settings > Host QSFP-DD and check the ModState value.
• The device may have to be turned on or set the LowPower mode to De-Assert. Removing and inserting the device (ModPrsL) virtually, might help.
•Check the Host QSFP-DD setting for difference in behavior with or without the adapter / DAC / optical module.
Table 18 Deemphasis settings for Optical module and DAC
Pre-Cursor (dB) Post-Cursor (dB) Drive Amplitude (mV)
Port 1 > Optical module (loopback) > Port 1 -1.1 0 330
Port 1 > Tx adapter + MCB > Optical module -1.5 -0.7 454-603
Port 1 > DAC > Port 4 -1.9 -0.7 895
Port 1 > Tx adapter + MCB + DAC > Port 4 -1.1 -3.2 991
3 Check that the Module Present Line (MPL) on both HCB Tx and HCB Rx Adapters is connected to
GND. Usually, the HCB Tx MPL is grounded through the MCB when the low speed interface is connected – if that is not the case, connect a wire from MPL to GND on the HCB Tx Adapter’s low speed connector. If the HCB Rx Adapter is also being used, it will be necessary to connect MPL to
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GND on its low speed connector also.
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Symptoms: Module does not emit when plugged into the MCB but works well when plugged into a port
There are four possible causes for this scenario:
• External 3.3V power supply to the MCB is not on, or cannot provide the required amount of current.
• The DUT has a squelch function and requires all lanes to provide a signal.
• Connect all the 8 lanes to the MCB.
• The signal amplitude is too low and de-emphasis is too weak after the Tx breakout + MCH channel.
• Adjust the amplitude and de-emphasis (see Tabl e 1 8)
• The DUT CDR cannot cope with different time-domain for the lanes:
• Share clock between BERT and N4891A (see “Using Shared Clock Domain" on page 63.
Symptoms: Some lanes are not turning green
If these lanes do not come from the BERT, then unplugging and plugging back the reference module (or Rx adapter) on the receiver port will force the equalizer initialization. Wait up to 2 minutes for all the lanes to turn green.
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Scenario 2: Link is not up in KP4 mode, BERT mode works as intended

Symptoms: Marker lock is green for all lanes expect for stress lane
Figure 56 Adding Interference
1 Deactivate impairments on the stress lane and make sure the amplitude is set properly
(300-400mV).
2Click Sync. 3 Force the adaptive equalizer of the QSFP-DD port used as receiver (Port 4) to restart adaption
process:
Port 4 > SETTINGS > Internal Loopback > Apply
Port 4 > SETTINGS > Normal > Apply
• Wait for up to a minute
Symptoms: Numerous burst errors in FEC mode, “VL Lock Lost” counter very high for stress lane
• Try to re-sync by clicking Sync
• Try the next point
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Symptoms: Detected input clock on the M8045A Ref Clock In differs (expected freq. is 166.015625 MHz)
There are two possible causes for this scenario: 1 Incorrect N4891A Output Clock
• In the KiOS software, click SYSTEM ADMIN from the menu options.
•Under Clock Source, choose Disable, then choose Enable. (See Figure 57).
•Click Apply.
• Check / measure the input frequency again. (See Figure 58).
Figure 57 Checking Expected and Detected Clock Frequency
Figure 58 Checking Input Frequency in M8070B software
2 Multiple incorrect default settings for the Clock.
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This information is subject to change without notice. © Keysight Technologies 2021 January 2021
www.keysight.com
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