Page 1
SCHEMATIC DIAGRAMS
INTEGRATED DIGITAL TERRESTRIAL/SATELLITE LCD TELEVISION
LT-19DB1BU/AX
DVD-ROM No.SML2009Q1
COPYRIGHT © 2009 Victor Company of Japan, Limited.
No.YA697<Rev.001>
2009/5
Page 2
LT-19DB1BU
/AX
STANDARD CIRCUIT DIAGRAM
NOTE ON USING CIRCUIT DIAGRAMS
1.SAFETY
The components identified by the symbol and shading are
critical for safety. For continued safety replace safety ciritical
components only with manufactures recommended parts.
2.SPECIFIED VOLTAGE AND WAVEFORM VALUES
The voltage and waveform values have been measured under the
following conditions.
(1)Input signal : Colour bar signal
(2)Setting positions of
each knob/button and
variable resistor
(3)Internal resistance of tester
(4)Oscilloscope sweeping time
(5)Voltage values
Since the voltage values of signal circuit vary to some extent
according to adjustments, use them as reference values.
: Original setting position
when shipped
: DC 20kΩ/V
: H
: V
: Othters
: All DC voltage values
20µs / div
5ms / div
Sweeping time is
specified
3.INDICATION OF PARTS SYMBOL [EXAMPLE]
In the PW board
: R1209
R209
Type
No indication
MM
PP
MPP
MF
TF
BP
TAN
(3)Coils
No unit
Others
(4)Power Supply
Respective voltage values are indicated
(5)Test point
: Test point
(6)Connecting method
: Ceramic capacitor
: Metalized mylar capacitor
: Polypropylene capacitor
: Metalized polypropylene capacitor
: Metalized film capacitor
: Thin film capacitor
: Bipolar electrolytic capacitor
: Tantalum capacitor
: [µH]
: As specified
: B1
: 9V
: Connector
: Receptacle
: Only test point display
: Wrapping or soldering
: B2 (12V
: 5V
)
4.INDICATIONS ON THE CIRCUIT DIAGRAM
(1)Resistors
Resistance value
No unit : [Ω]
K
M
Rated allowable power
No indication : 1/16 [W]
Others : As specified
Type
No indication
OMR
MFR
MPR
UNFR
FR
Composition resistor 1/2 [W] is specified as 1/2S or Comp.
(2)Capacitors
Capacitance value
1 or higher : [pF]
less than 1
Withstand voltage
No indication : DC50[V]
Others : DC withstand voltage [V]
AC indicated
Electrolytic Capacitors
47/50[Example]: Capacitance value [µF]/withstand voltage[V]
: [kΩ ]
: [MΩ ]
: Carbon resistor
: Oxide metal film resistor
: Metal film resistor
: Metal plate resistor
: Uninflammable resistor
: Fusible resistor
: [µF]
: AC withstand voltage [V]
(7)Ground symbol
: LIVE side ground
: ISOLATED(NEUTRAL) side ground
: EARTH ground
: DIGITAL ground
5.NOTE FOR REPAIRING SERVICE
This model's power circuit is partly different in the GND. The
difference of the GND is shown by the LIVE : ( ) side GND and the
ISOLATED(NEUTRAL) : ( ) side GND. Therefore, care must be
taken for the following points.
(1)Do not touch the LIVE side GND or the LIVE side GND and the
ISOLATED(NEUTRAL) side GND simultaneously. if the above
caution is not respected, an electric shock may be caused.
Therefore, make sure that the power cord is surely removed from
the receptacle when, for example, the chassis is pulled out.
(2)Do not short between the LIVE side GND and ISOLATED(NEUTRAL
side GND or never measure with a measuring apparatus measure
with a measuring apparatus ( oscilloscope, etc.) the LIVE side GND
and ISOLATED(NEUTRAL) side GND at the same time.
If the above precaution is not respected, a fuse or any parts will be broken.
Since the circuit diagram is a standard one, the circuit and
circuit constants may be subject to change for improvement
without any notice.
NOTE
Due improvement in performance, some part numbers show
in the circuit diagram may not agree with those indicated in
the part list.
When ordering parts, please use the numbers that appear
in the Parts List.
)
(No.YA697<Rev.001>)2-1
Page 3
CONTENTS
SEMICONDUCTOR SHAPES ......................................................................2-2
WIRING DIAGRAM .......................................................................................2-3
BLOCK DIAGRAM ........................................................................................2-5
CIRCUIT DIAGRAMS ...................................................................................2-7
MAIN PWB CIRCUIT DIAGRAM ................................................................................................................. 2-7
IR PWB CIRCUIT DIAGRAM .................................................................................................................... 2-63
KEY PWB CIRCUIT DIAGRAM................................................................................................................. 2-65
PATTERN DIAGRAMS .............................................................................. 2-67
MAIN PWB P ATTERN .............................................................................................................................. 2-67
IR PWB P ATTERN.................................................................................................................................... 2-71
KEY PWB P ATTERN ................................................................................................................................ 2-71
USING P.W. BOARD
P.W.B ASS㵭 Y name LT-19DB1BU/AX
MAIN P.W. BOARD
IR P.W. BOARD
KEY P.W. BOARD
HU-71100004
HU-72200001
HU-72200002
SEMICONDUCTOR SHAPES
TRANSISTOR
BOTTOM VIEW FRONT VIEW TOP VIEW
CHIP TR
E
C
B
ECB
IC
BOTTOM VIEW FRONT VIEW TOP VIEW
OUT
E
IN
IN OUT E
CHIP IC
B
(G)E(S)C(D)
TOP VIEW
1 N
1
ECB
ECB
1
1 N
C
BE
N
N
1
2-2(No.YA697<Rev.001>)
N
Page 4
WIRING DIAGRAM
LCD PANEL UNIT
LCD PANEL UNIT
[LCD CONTROL PWB]
TOP
TOP
KEY PWB
TOP
CN200
24
1
1
JP451
24
JP1
1
51
DIGITAL TUNER
(SATELLITE)
JP2
1
TOP
IR PWB
5
F100
250V/4A
CN100
L
JP2
1
6
JP3
1
N
4
JP4
JP761
1
DIGITAL TUNER
(TERRESTRIAL)
MAIN PWB
POWER UNIT
6
POWER CORD
SPEAKER(R) SPEAKER(L)
JP1
1
6
BLUE LED MODULE
2-4(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-3
Page 5
BLOCK DIAGRAM
SERVICE PORT
PC
RS232
KEY PWB
&
IR PWB
POWER UNIT
TXD/RXD
4Pin Con.
U831
ILX232
KEY_ADC1
KEY_ADC2
LED_B
LED_R
MOD2_ID
MOD1_ID
SCART_MUTE
SMPS_ON
PWM_DIM
A_DIM
BKLT_EN FLI_I2C0
AC_DETECT
P_PWM_DIM
P_A_DIM
P_BKLT_EN
+24V
+5V8STB
+5V
+12V
TA_A/RA_A
PD6 IR_IN
PA1
PA0
PA2
PA3
PA5
PA6
PD7
PB4
KIA7042AF
PD0,PD1
MICOM CTRL
TA_A/RA_A
U82
PB5,6,7,RESETn
LS
PC0,PC1
CLK IN/OUT
JTAG
Development Only
*
U321,U322
DDR2(333MHz/512Mbit)
U181
FLASH MEMORY
UART1_TXD/RXD
UART0_TXD/RXD
PC2
M_I2C FLI_I2C1
CEC_A
PB2
PA4
PA5
PC5
A_RESET
PC4
PC3
LPM_RST_N
JTAG
Header Header
DDRA[0:12]
/DDRDQ[0:31]
HOST_A[1:2]/HOST_D[0:7]
Y961
XTAL
INT_OUT WM0P
LS
Y81
XTAL
U113
EEPROM
UART1
UART0
CLK IN/OUT
I2C1
I2C0
EJTAG
DDR MEM
CTL. BUS
ROM MEM
CTL. BUS
U112
SCALER
PWM3
DFSYNC_IN_OUT_GPIO8
VGA_R,VGA_G,VGA_B
PWM2
PPWR
LVTX_ODD
LVTX_EVN
RESET_N
USB2.0 HOST
USB_PWREN
USB_FLAG
DVI_ARX
HDMIA_I2C
HDMIA_HPD
AHS, AVS
S0_SCL/SDA
AUD_IN_L3/R3
VXO_D11
SCART_FB
LBADC_IN4
A1P,B1P,C1P/SV1P
AUD_IN_L1/R1
AUD_OUT1R/L
AUD_OUT2R/L
PWM_DIM
A_DIM
BKLT_EN
RESETn_MAIN
SCART_FB_SEL
SCART_FB
SCART1_RO/LO
SCART2_RO/LO
USF-T
USB SWITCH
VGA_HS/VS
PC_RI/LI
PANEL_PWR
LVDS_OUT
LPM_RST_N
USB_HOST
U104
TMDS_A
HDMI_SCL/SDA
FLI_I2C1
HPDA
PC_R/G/B
U381
VIDEO
SWITCH
SCART_ID1
SCART1_R/G/B/CVBS
SCART1_RI/LI
U662
OP AMP
+5V
+5V_USB
PC
AUDIO
74HC14
HS/VS
VGA_SDA/SCL
EEPROM
SCART2_FB
SCART1_FB
SC1_R/L_OUT_O
SCART1_CVBSO
PANEL
USB IN
U551
HDMI SWITCH
P_PWM_DIM
P_A_DIM
P_BKLT_EN
PC IN
SCART1
+24V
TMDS 1
HPD1
TMDS 2
HPD2
CEC
CEC
EXT1
HDMI
HDMI
EXT4
EXT5
T+C TUNER
LNB_OUT
U921
RF_CVBS
SIF
U1021
Analog Tuner
TUNER0_I2C
IF+/-
CH_TER_RESET
TUNER_I/O_P_N
TUNER1_I2C
LNB_OUT
U961
DEMOD
U1081
DEMOD
&
A8293
FLI_I2C0
FLI_I2C0
CH_RESET 22K_TONE
TS0_D[0..7]
TS0_SYNC
TS0_VALID
TS0_CLK
TS1_CLK
TS1_SYNC
TS1_VALID
TS1_D[0..7]
TS0_SYNC
TS0_VALID
TS0_CLK
TS1_CLK
TS1_SYNC
TS1_VALID
JP221
CI SLOT
Buffer&SW
Buffer&SW
Buffer&SW
Buffer&SW
POD_CTL.
PPKT_CLK
PPKT__D[0..7]
PPKT__SYNC
PPKT_I_VAL
MOD_CLK
MOD_D[0..7]
MOD_SYNC
MOD_VAL
TS0_SEL
MUX_TSI_CLK
MUX_TSI_SYNC
MUX_TSI_VAL
TS0_SEL
TS1_SEL
MUX_TSI_D[0..7]
TS1_SEL
Buffer
Buffer
MUX_TSI_CLK
MUX_TSI_SYNC
MUX_TSI_VAL
MUX_TS_D0
STREAM_CLK
STREAM_D[0..7]
STREAM_SYNC
STREAM_VAL
TS_SEL
CH_TER_RESET
CH_RESET
TS_Parallel
Inputs
[POD]
VXO_D0
VXO_D1
VXO_D5
A3P,B3P,C3P
AUD_IN_L4/R4
AUD_IN_L5/R5
AUDIO_MUTE
AUD_MCLK1
AUDO_SPDIF_OUT
(No.YA697<Rev.001>)2-5 2-6(No.YA697<Rev.001>)
B4P,A4P
SV3P
SV4P
TNR_SIF
GPIO134
I2SA_BCLK
I2SA_WCLK
I2SA_DAT0
RF_CVBS
SIF
I2S_OUT
FLI_I2C1
A_RESET
YPbPr
Component_R/L
SVHS_Y/C
AV_CVBS
AL/AR_CVBS
HEADPHONE_ID
AUDO_MUTE
U761
Digital Audio
AMP
SPDIF
HP_L/R
AMP_R-
AMP_R+
AMP_L-
AMP_L+
OP AMP
SPEAKER(R)
SPEAKER(L)
DIGITAL AUDIO
HPO_L/R
EXT2
EXT3
HEADPHONE
Page 6
CIRCUIT DIAGRAMS
MAIN PWB CIRCUIT DIAGRAM (1/28) [DVB-T+C TUNER]
1
U921
FQD1116AME/BH
A A
RF PIN IN/OUT(OPTION)
1
2
RF IN
RF IN
ANT_PWR2GND3NC4RF_AGC5GND6VP_TUN_+5v
GND9NC10AS11SCL12SDA13REF14IF-AGC15DIF116DIF217WIF OUT/NC
7VT8
3
+5V IF192nd IF SOUND/LOW DIG IF1
2nd IF SOUND/LOW DIG IF2
18
20
21NC22
GND
GND
GND
GND
AS_IF23CVBS
24
4
25
26
27
28
IIC AS : Tuner : 0xC0h
Analog Demod : 0x86h
5
6
+5VT_ANT
L923
BLM18PG300SN1D
C939
220uF/16V/MVK/S
+5VTA
L921
BLM18PG300SN1D
B B
+5VTA
C C
C927
220uF/16V/MVK/S
L922
BLM18PG300SN1D
C931
220uF/16V/MVK/S
C922
104p/16V/1005
C925
104p/16V/1005
C929
104p/16V/1005
C923
102p/50V/1005
C926
102p/50V/1005
C930
102p/50V/1005
C935
OPEN-330p/1005
R944
331/F/1005
R929
121/F/1005
R948 000/1005
R949 000/1005
R932 000/1005
R933 000/1005
R934 000/1005
C936
OPEN-330p/1005
R926 000/1005
C932
OPEN_3R3p/50V/005
R950
OPEN-331
R928 750/F/1005
R952
OPEN-330/F/1005
R944 and R929 are located near by U921
R951
OPEN-331
IF0_NARROW-
IF0_NARROW+
TUNER0_AGC
RF_CVBS
C937
OPEN-220p/50V/1005
MAIN PWB
(26/28)
MAIN PWB (12/28)
C933
OPEN-104p/16V/1005
R947
330/1005
+5VTA +3V3DT
R930
562/1005
R943
562/1005
SIF
C934
220p/50V/1005
1
Q925
32
32
FDV301N_NL
1
MAIN PWB (12/28)
Q924
FDV301N_NL
TUNER0_SDA
TUNER0_SCL
MAIN PWB (26/28)
Antenna Power Short Protection Circuit
Antenna Current Limiting Circuit (100mA Limiting)
ANT_PWR_EN
HIGH ON
LOW
MAIN PWB (7/28)
D D
ANT_PWR_EN
ANT_PWR_CHK
IF ANT_PWR_CTRL is L
--> ANT_PWR_EN L
Fault Flag (Output):
Active-low, open-drain output.
Indicates overcurrent or
thermal shutdown conditions
+5V_ANT
OFF
R922 330/1005
R923 101/1005
+3V3DT
R924
103/1005
U922
1
EN
2
FLG
3
GND
NC4ILIM
POWER SW MIC2544-1YMM
+5VTA +5VT_ANT
8
OUT
7
IN
6
OUT
Current limit threshold is determined by
ILIMIT = 230V / RSET,
where : 154 < RSET < 2.29k
R927 222/1005
5
MAIN PWB ASS'Y (1/28)
[DVB-T+C TUNER]
HU-71100004
All location are from 921 to 960
1
2
3
4
5
6
lt-19db1bu_0514_24/30_0.0
2-8(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-7
Page 7
MAIN PWB CIRCUIT DIAGRAM (2/28) [QPSK TUNER]
5
D D
C C
MAIN PWB (27/28)
TUNER_Q_P
MAIN PWB (28/28)
TUNER_Q_N
LNB_OUT
MAIN PWB (28/28)
C1021
150p/50V/1005
C1025
150p/50V/1005
12
TUNER_AGC
R1023 101/1005
R1025 101/1005
4
D1021
OPEN-LNBTVS6-221S
C1022
OPEN-150p/50V/1005
C1026
OPEN-150p/50V/1005
+3.3V_RF-AMP
U1021
2
LNB-A
1
LNB-B
3
+3.3V_RF-AMP
9
AGC
5
QP
6
QN
3
DNBU12111IS(V)
XTAL-OUT
+3.3V_TUNER
GND13GND14GND15GND16SGND17SGND18SGND19SGND
SCL
SDA
20
2
11
10
12
4
R1021 000/1005
R1022 000/1005
+3.3V_TUNER
TUNER1_SCL
TUNER1_SDA
MAIN PWB (28/28)
1
* To be routed pattern without VIA Hole *
8
IP
7
IN
C1023
OPEN-150p/50V/1005
C1027
OPEN-150p/50V/1005
R1024 101/1005
R1026 101/1005
TUNER_I_P
C1024
150p/50V/1005
MAIN PWB (28/28)
TUNER_I_N
C1028
150p/50V/1005
B B
+3.3V_TUNER
C1034
220uF/16V/BLA/S
3
C1029
104p/16V/1005
U1022
RT9164
VIN
1
ADJ
VO
VO
+3.3V_RF-AMP +5V
2
4
R1027
201/F/1005
R1028
331/F/1005
C1030
226p/6.3V/2012
C1031
106p/10V/2012
L1021
BLM18PG300SN1D
C1032
106p/10V/2012
C1033
OPEN-104p/16V/1005
MAIN PWB ASS'Y (2/28)
A A
[QPSK TUNER]
HU-71100004
All location are from 1021 to 1050
5
4
3
2
1
lt-19db1bu_0514_26/30_0.0
(No.YA697<Rev.001>)2-9 2-10(No.YA697<Rev.001>)
Page 8
MAIN PWB CIRCUIT DIAGRAM (3/28) [Power & Interface Connectors]
5
JP1
SMW200-24C
1
D D
POWER UNIT
CN200
C C
KEY PWB
JP2
2
3
4
5
6
7
8
9
10
11
2mm
12
13
14
15
16
17
18
19
20
21
22
23
24
JP2
SMW250-05
2.5mm
5
4
3
2
1
R5 330/1005
R6 330/1005
R7 330/1005
SMPS_ON
KEY_ADC2
KEY_ADC1
AC_DETECT
BL_EN_O
ANA_DIM
PWM_DIM
MAIN PWB (5/28)
L1
BLM41PG600SN1L
L2
BLM41PG600SN1L
L3
BLM21PG600SN1D
MAIN PWB
(5/28),(19/28),(22/28)
MAIN PWB (13/28)
MAIN PWB (5/28)
IR
LEDR
+5VSTB
C8
104p/16V/1005
IR_IN
L4
BLM18PG300SN1D
JP3
SMW250-06
6
B B
IR PWB
JP1
5
4
2.5mm
3
2
1
4
C1
100uF/25V/BXE/S
C3
470uF/16V/MVK/S
100uF/25V/BXE/S
C6
PM_LED_Ctrl
MAIN PWB (5/28)
R18
Open_103/1005
Only SA1 Model
MAIN PWB (5/28)
C2
104p/50V
C4
104p/50V
C7
104p/50V
PM_LED
MAX.3A
+12V
MAX.3.5A
+5V
MAX.500mA
+5V4STB
Q6
1
Open_MMBT4401
23
LED_B
[+12V]
AMP : 1500mA
QPSK : 400mA
PANEL : 800mA
[+5V]
USB : 500mA
CAM : 500mA
PANEL : 1200mA(Option)
[+5.8V]
MICOM : 9mA
RS232 : 10mA
TUNER : 220mA
R17
Open_301/3216
L : ON
H : OFF
3
MAIN PWB (5/28)
MAIN PWB (5/28)
+5VSTB
R8
103/1005
1
+5VSTB
2 3
Q2
MMBT4403
R9
301/3216
LEDB
AM_LED_Ctrl
STBY_EN
R10
Open_103/1005
Only SA1 Model
Open_SMW200-12P
OPEN
+5VSTB
Power on : L
Power off : H
AM_LED
1
JP5
12
11
2mm
10
R1
472/1005
R3
103/1005
R15
Open_301/3216
Q4
Open_MMBT4401
23
9
8
7
6
5
4
3
2
1
2
+5VSTB
R2
102/1005
Q1
1
MMBT4401
23
MAIN PWB (5/28)
+5VSTB
Open_BLM18PG300SN1D
SMPS_ON
C5
OPEN-104p/16V/1005
Alarm_LED_Ctrl
C9
Open_104p/16V/1005
MAIN PWB
SPI_STR
SPI_CLK
AM_LED
PM_LED
Alarm_LED
CDS_OUT
IR
LEDB
LEDR
SMPS_ON
Only SA1 Model
+5VSTB
(5/28)
MAIN PWB (5/28)
Alarm_LED
R13
Open_103/1005
R19
Open_472/1005 L5
SPI_DIO
1
MAIN PWB (25/28)
R16
Open_301/3216
Q5
1
Open_MMBT4401
23
MAIN PWB
(5/28)
Only SA1 Model
JP4
53014-0410
1
2mm
BLUE LED
MODULE
A A
2
3
4
FRONT BLUE LED
LEDB
LED_R
L : ON
H : OFF
R12
103/1005
2 3
Q3
1
MMBT4403
R14
301/3216
MAIN PWB ASS'Y (3/28)
All location are from 1 to 20
LEDR
[Power and Interface Connectors]
HU-71100004
5
4
3
2
1
lt-19db1bu_0514_1/30_0.0
2-12(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-11
Page 9
MAIN PWB CIRCUIT DIAGRAM (4/28) [Power Regulation]
1
NORMAL POWER
+5V
A A
B B
106p/10V/2012
106p/16V/2012
C C
C21
106p/16V/2012
+3V3
C41
+3V3
C52
OPEN-104p/16V/1005
C23
106p/16V/2012
C28
OPEN-106p/16V/2012
C42
106p/10V/2012
C53
104p/16V/1005
C58
R21
104/1005
C48
104p/16V/1005
+5V
R33
103/1005
105p/16V/1005
C29
104p/16V/1005
104/F/1005
C59
R29
104/F/1005
R30
TP25
PCB_TP10
1
TP23
PCB_TP10
TP21
PCB_TP10
U21
MP2307
7
EN
8
SS
4
GND
Max.3A
1
4
7
6
10
C50
OPEN-106p/2012
U24
RT9018B25PSP
3
VIN
2
EN
4
VDD
8
GND
9
TAP
Max.3A
1
2
IN
9
U23
MP2121DQ
IN
IN
POK
EN/SYNC
VOUT
PGOOD
2
C22
103p/50V/1005
R42
000/1005
1
BS
3
SW
5
FB
6
COMP
GND_P
OPEN-561p/50V/1005
GND
GND
9
2
TP26
PCB_TP10
6
R1
7
ADJ
5
NC
R2
1
TP22
PCB_TP10
4.7uH/SPC7040-4R7/3.5A
1
D21
OPEN-SX34
C30
5
BS
3
SW
8
SW
1
FB
GND-PAD
11
R2
L21
243/F/1005
C27
332p/50V/1005
R24
562/1005
R39
000/1005
R31
304/F/1005
R32
6043/F/1005
R22
R2
C43
103p/50V/1005
R1
3
R1
R23
912/F/1005
C24
106p/10V/2012
C25
104p/16V/1005
VOUT = 0.925V * (1 + R1/R2)
TP24
PCB_TP10
L22
1
SPC6025-1R0M
C44
226p/6.3V/2012
BLM31PG601SN1
BLM31PG601SN1
C26
100uF/25V/BXE/S
C61
226p/6.3V/2012
+3V3
L16
L16
[Douglas Core]
+1V2
+1.2V,
Max.1634mA
check 1V2 ripple noise
C62
100uF/25V/BXE/S
+3.36V, Max.2.790A
4
STAND-BY POWER
+5V4STB
C31
106p/16V/2012
Open_104p/16V/1005
3V3 Power Branch
+3V3
+3V3_D
BLM18PG300SN1D
C46
104p/16V/1005
BLM18PG300SN1D
Vout=0.8V(R1+R2)/R2
1V8 Power Branch
+1V8
[Douglas DDR]
1
R34
753/F/1005 C56
R36
593/F/1005
C54
106p/10V/2012
R37
104/F/1005
+1.816V,
Max.781mA
C55
104p/16V/1005
+1V8
L25
BLM18PG300SN1D
104p/16V/1005
C32
5
L23
L24
TP29
PCB_TP10
1
VDDR_MEM
U22 RT9167-50PB
1
VIN
3
EN
2
GND
+3V3_A
C45 104p/16V/1005
C47 100uF/16V/MVK/S
+3V3H
C49 104p/16V/1005
C51 100uF/16V/MVK/S
C57
100uF/25V/BXE/S
5
VOUT
4
BP
104p/16V/1005
R35
102/F/1005
R38
102/F/1005
TP30
PCB_TP10
1
C69
DDR_VRF
C60
104p/16V/1005
6
C33
105p/16V/1005
+5VSTB
MAX 29mA
C34
104p/16V/1005
Vout=0.8V(R1+R2)/R2
U25
LD29150PT/P-PAK 5P
5
MAX 1.5A
TP28
PCB_TP10
1
R40
1692/F/1005
R41
103/F/1005
C66
103p/50V/1005
+3V3_D
C67
106p/10V/2012
+5.03V
MAX 642mA
C68
104p/16V/1005
MAIN PWB ASS'Y (4/28)
[Power Regulation]
HU-71100004
/INH1VIN2GND3VOUT4ADJ
TP27
+5V
D D
C63
106p/16V/2012
PCB_TP10
1
C64
104p/16V/1005
C65
OPEN-105p/16V/1005
GND
6
DGND GND_A
All location are from 21 to 80
1
2
3
4
5
6
lt-19db1bu_0514_2/30_0.0
(No.YA697<Rev.001>)2-13 2-14(No.YA697<Rev.001>)
Page 10
MAIN PWB CIRCUIT DIAGRAM (5/28) [MICRO CTRL]
5
+5VSTB +5VSTB
D D
C C
C81
104p/16V/1005
U81
KIA7042AF
VCC1GND2OUT3GND
4
12
34
S81
OPEN-JTP1127WEM
MAIN PWB (16/28), (18/28)
MAIN PWB (18/28)
MAIN PWB (3/28)
R81
103/1005
C82
104p/16V/1005
MAIN PWB (3/28)
MAIN PWB (23/28)
MAIN PWB (3/28)
MAIN PWB (19/28)
+5VSTB +5VSTB
B B
R104
R104
103/1005
103/1005
MOD1_ID MOD2_ID
R106
R106
OPEN-103/1005
OPEN-103/1005
System Reset
R82
101/1005
AM_LED_Ctrl
Alarm_LED_Ctrl
PM_LED_Ctrl
+5VSTB
RESETn
SPI_STR
SPI_CLK
CEC_A
CEC_O
STBY_EN
SPI_DIO
IR_IN
Scart_Mute
OPEN_103/1005
+5VSTB
R110
R110
OPEN-103/1005
OPEN-103/1005
RA
TA
R93
MOSI
MISO
SCK
MOD3_ID
R95 101/1005
R91 101/1005
4
+5VSTB
R83
OPEN_103/1005
R84 101/1005
+5VSTB
C87
OPEN-103p/50V/1005
3
C83
106p/16V/2012
+5VSTB +5VSTB
C84
104p/16V/1005
U82
5
VCC1
17
VCC2
38
VCC3
40
PB0 (XCK/T0)
41
PB1 (T1)
42
PB2 (AIN0/INT2)
43
PB3 (AIN1/OC0)
44
PB4 (SS)
1
PB5 (MOSI)
2
PB6 (MISO)
3
PB7 (SCK)
9
PD0 (RXD)
10
PD1 (TXD)
11
PD2 (INT0)
12
PD3 (INT1)
13
PD4 (OC1B)
14
PD5 (OC1A)
15
PD6 (ICP)
16
PD7 (OC2)
6
GND1
18
GND2
28
GND3
39
GND4
ATMEGA324P-20AU
C85
104p/16V/1005
(ADC0) PA0
(ADC1) PA1
(ADC2) PA2
(ADC3) PA3
(ADC4) PA4
(ADC5) PA5
(ADC6) PA6
(ADC7) PA7
(SCL) PC0
(SDA) PC1
(TCK) PC2
(TMS) PC3
(TDO) PC4
(TDI) PC5
(TOSC1) PC6
(TOSC2) PC7
RESETn
XTAL2
XTAL1
C86
104p/16V/1005
AVCC
AREF
27
37
36
35
34
33
32
31
30
29
19
20
21
22
23
24
25
26
4
7
8
Address:0xAA
MISO
SCK
RESETn
MOD3_ID
MOD2_ID
MOD1_ID
CDS_OUT
R89 330/1005
R90 330/1005
R94 101/1005
R92 000/1005
RESETn
R96 000/1005
16MHZ/20pF/SMD
C88
200p/50V/1005
1 2
JP81
HPH-DS06-02
12
34
56
KEY_ADC2
KEY_ADC1
LED_B
LED_R
MAIN PWB (3/28)
M_SCL
M_SDA
INT_OUT
M_RST_N
AC_DETECT
A_RESET
OPEN-160p/1005
C89
200p/50V/1005
2
+5VSTB +5VSTB
MOSI
MAIN PWB
(3/28)
MAIN PWB
M_SCL
M_SDA
(15/28)
MAIN PWB
(3/28),(19/28),(22/28)
MAIN PWB (22/28)
C92
1
223
Open_32.768kHz/12.5pF/SMD
+5VSTB
R87
272/1005
441
3
Y82
+3V3_A
R88
272/1005
32
32
INT_OUT
C93
OPEN-160p/1005
R97 162/1005 R97 162/1005
R98 162/1005 R98 162/1005
Q81
1
FDV301N_NL
Q82
FDV301N_NL
1
R102 103/1005 Y81
+5VSTB
FLI_SCL1
FLI_SDA1
1
KEY_ADC2
KEY_ADC1
C90
104p/16V/1005
C91
104p/16V/1005
MAIN PWB (6/28),(16/28),(22/28)
FLI_INT
R103
183/F/1005
+3V3_A
MAIN PWB
(6/28)
R105
R105
OPEN-103/1005
OPEN-103/1005
A A
R107
R107
103/1005
103/1005
R129
R129
103/1005
103/1005
MAIN PWB ASS'Y (5/28)
M_RST_N
L : Normal
H : Reset
R99
103/1005
R101
102/1005
1
23
R100
103/1005
Q83
MMBT4401
LPM_RST_N
[MICRO CTRL]
HU-71100004
All location are from 81 to 110
5
4
3
2
1
lt-19db1bu_0514_3/30_0.0
2-16(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-15
Page 11
MAIN PWB CIRCUIT DIAGRAM (6/28) [Douglas_USB,I2C,JTAG]
5
4
3
2
1
UART0 : PC Display Debug message
UART1 : G-Probe application run at PC & Serial command
I2C0 : FLI_SDA1 , FLI_SCL1 (Micom,eeprom,HDMI switch, Audio Amp)
D D
C C
B B
A A
I2C1 : FLI_SDA0 , FLI_SCL0 (Demode IC , LNB IC)
+3V3_A
(26/28),(27/28),(28/28)
MAIN PWB
MAIN PWB
(5/28),(16/28),(22/28)
MAIN PWB (23/28)
MAIN PWB (13/28)
MAIN PWB (9/28)
MAIN PWB (5/28)
FLI_SDA0
FLI_SCL0
FLI_SDA1
FLI_SCL1
UART1_RX
UART1_TX
C117
104p/16V/1005
C125
5R0p/50V/1005
R133
OPEN-153/1005
P_DIM
A_DIM
CI_PWR
FLI_INT
R128
622/F/1005
R113 222/1005
R115 222/1005
R116 222/1005
R117 222/1005
FLI_SDA0
FLI_SCL0
FLI_SDA1
FLI_SCL1
UART0_RX
UART0_TX
UART1_RX
UART1_TX
+3V3_A
OPEN-153/1005
R137
103/1005
L111
BLM18PG300SN1D
C118
47uF/16V/MVK/S
R134
+5V
R138
103/1005
R120 330/1005
R118 330/1005
R119 330/1005
R121 330/1005
TP116
PCB_TP08
TP113
PCB_TP08
C119
105p/16V/1005
L113
ACM2012H-900
4
C126
5R0p/50V/1005
R139
000/1005
2 1
3
R5523N USB HIGH-SIDE POWER SWITCH
1
1
USB_D0+
USB_D0-
C120
104p/16V/1005
C121
104p/16V/1005
OPEN-AVRL161A1R1NTB
OPEN-AVRL161A1R1NTB
1
EN
OUT
3
GND
FLG
U104
RV111
RV112
IN
U112G
&MPEG2_ONECHIP FLI10610H
D21
2WIRE_M1_SDA_UART2_TX
D20
2WIRE_M1_SCL_UART2_RX
F20
2WIRE_M0_SDA
E20
2WIRE_M0_SCL
A19
UART0_RXD
B19
UART0_TXD
A20
UART1_RXD
B20
UART1_TXD
C20
UART1_RTS
C19
UART1_CTS
A13
PWM3
B13
PWM2_GPIO6
C13
PWM1_GPIO5_/INT5
D13
PWM0_GPIO4_/INT4
C29
USB_FLAG
C28
USB_PWREN
AJ20
USBPHY_PADP
AH20
USBPHY_PADM
AG20
USBPHY_VRES
AG19
USB_AVDD33
AH19
USB_AVDD33
AF20
USB_AVDD33
AF19
USB_GND
AJ19
USB_GND
AD20
USB_GND
+5V_USB
+5V
C127
106p/16V/2012
5
4
2
L114
BLM21PG600SN1D
OTP_VDD33
RESET_N
REF_CLK
XTAL_IN
CLKOUT
OBUFC_CLK
EJ_RST_N
EJ_DINT
DFSYNC_IN_OUT_GPIO8
TESTMODE0
TESTMODE1
USB_AVDD12
JP112
KJA-UB-4-0004
1
VBUS
SGND
1
2
D-
2
3
D+
3
4
GND
SGND
4
C128
104p/16V/1005
TRST
TDI
TDO
TMS
TCK
5
6
A26
D23
A22
A23
E12
F21
B26
B27
A27
A28
B28
A29
B29
E13
C27
C26
AE20
C123
104p/16V/1005
+5V_USB
C129
100uF/25V/BXE/S
TP112
PCB_TP08
1
TP111
1
PCB_TP08
NVRAM_WP
TRST#
TDI
TDO
TMS
TCK
EJTAG_RST#
DINT
C112
OPEN-680p/1005
R122 000/1005
TP114
1
1
TP115
+3V3_A
PWR_/RESET
19.6608MHZ/
20PF/SX-1/SMD
C113
C113
270p/50V/1005
270p/50V/1005
PCB_TP08
PCB_TP08
L112
BLM18PG300SN1D
C124
106p/10V/2012
R111
OPEN-104/1005
R114
OPEN-104/1005
MAIN PWB (8/28)
Y111
12
R124 OPEN-000
BLT_EN
+1V2
MAIN PWB ASS'Y (6/28)
[Douglas_USB,I2C,JTAG]
U111
OPEN-ASM811REUSF-T
1
GND
2
RESET
Reset Threshole
: +3.08V
R112 000/1005 R112 000/1005
C114
C114
270p/50V/1005
270p/50V/1005
VCC
+3V3_A
+3V3_A
MAIN PWB (13/28)
+3V3_A
4
3
MR
R123 102/1005
PR111 103*4/1005
18
27
36
45
R126 102/1005
R127 103/1005
C115 200p/50V/1005
EEPROM
Address:0xA4/A5
12
34
U113
24LC256
1
A0
2
A1
3
A2
4
VSS
OPEN-JTP1127WEM
R125 200/1005
8
VCC
7
WP
6
SCL
5
SDA
S111
LPM_RST_N
JP111
OPEN-2110-DS14-G
1
2
3
4
5
6
7
8
9
10
11
12
13 14
MAIN PWB (5/28)
+3V3_A
EJTAG
+3V3_A +3V3_A
C122
104p/16V/1005
FLI_SCL1
FLI_SDA1
WP
Q111
MMBT4401
UART0 : Message
JP113
1
2mm
OPEN
2
3
4
OPEN-53014-0410
C116
104p/16V/1005
R131
103/1005
R132
103/1005
1
NVRAM_WP : H = Enable write
23
NVRAM_WP : L = Disable write
+5V
R135
472/1005
NVRAM_WP
R136
472/1005
UART0_TX
UART0_RX
All location are from 111 to 160
HU-71100004
5
4
3
2
1
lt-19db1bu_0514_4/30_0.0
(No.YA697<Rev.001>)2-17 2-18(No.YA697<Rev.001>)
Page 12
MAIN PWB CIRCUIT DIAGRAM (7/28) [Douglas I2S and FLEX ROM CONNECTOR]
5
+3V3_A
D D
MAIN PWB
(19/28)
MAIN PWB
SCART1_ID
SCART2_ID
(20/28)
C C
B B
MAIN PWB
L161
BLM18PG300SN1D
C161
106p/10V/2012
SCART1_ID
SCART2_ID
TP166
LBADC_IN1
LBADC_IN2
LBADC_IN3
LBADC_IN6
SCART1_ID
SCART2_ID
C165
103p/50V/1005
(8/28)
POD_CI
C162
104p/16V/1005
LBADC_IN1
LBADC_IN2
LBADC_IN3
LBADC_IN6
PCB_TP08
1
R175 103/1005
R176 103/1005
R177 103/1005
R178 103/1005
C166
103p/50V/1005
Model1_ID
Model2_ID
Model3_ID
Model4_ID
U112D
&MPEG2_ONECHIP FLI10610H
D24
LBADC_33
E23
LBADC_GND
C25
LBADC_IN1
C24
LBADC_IN2
B25
LBADC_IN3
B24
LBADC_IN4
A25
LBADC_IN5
A24
LBADC_IN6
F22
LBADC_RETURN
C21
IRDATA
U112F
&MPEG2_ONECHIP FLI10610H
A18
VXI_CLK
C18
VXI_DE
B18
VXI_VS
D18
VXI_HS
E19
VXI_D0
A17
VXI_D1
B17
VXI_D2
C17
VXI_D3
D17
VXI_D4
F17
VXI_D5
A16
VXI_D6
B16
VXI_D7
C16
VXI_D8
D16
VXI_D9
D19
VXI_D10
E16
VXI_D11
A15
VXI_D12
B15
VXI_D13
C15
VXI_D14
D15
VXI_D15
E15
VXI_D16
A14
VXI_D17
B14
VXI_D18/TS_ERR
C14
VXI_D19/DREQ_I
D14
VXI_D20/TS_VALID_O
E14
VXI_D21/TS_SYNC_O
E17
VXI_D22/TS_D_O
E18
VXI_D23/TS_CLK_O
4
AUDIN_I2S_BCLK
AUDIN_I2S_WCLK
AUDIN_I2S_DAT
AUD_MCLK0
AUD_MCLK1
AUDO_I2SA_BCLK
AUDO_I2SA_WCLK
AUDO_I2SA_DAT0
AUDO_I2SB_DAT1
AUDO_I2SB_DAT2
AUDO_I2SB_BCLK
AUDO_I2SB_WCLK
AUDIN_SPDIF_IN
AUDO_SPDIF_OUT
VXO_D0
VXO_D1
VXO_D2
VXO_D3
VXO_D4
VXO_D5
VXO_D6
VXO_D7
VXO_D8
VXO_D9
VXO_D10
VXO_D11
VXO_D12
VXO_D13
VXO_D14
VXO_D15
VXO_HS
VXO_VS
VXO_CLK
VXO_DE
AF15
AH16
AJ16
AE15
AE16
AF16
AG16
AH17
AJ17
AE17
AF17
AG17
AH18
AJ18
AD15
AE18
AF18
AG18
AD19
AE19
AC2
AB3
AA4
AC1
AB5
AB4
AC5
AC4
AD2
AE2
AC3
AD3
AA5
AD1
HEADPHONE_ID
R166 000/1005
HEADPHONE_ID
R167 000/1005
R179 000/1005
R165 000/1005
I2S_OUT_MCLK
I2S_OUT_CLK
I2S_OUT_WS
I2S_OUT_DAT
SPDIF_OUT
R162 103/1005
TS_SEL
CH_TER_RESET
HEADPHONE_ID
CH_RESET
POD_TER#
ANT_PWR_EN
ANT_PWR_CHK
SC1_SEL
SC_FB_SEL
PD_RESET
VGA_SW
3
MAIN PWB (22/28)
MAIN PWB (15/28)
+3V3_A
MAIN PWB (24/28)
MAIN PWB (26/28)
MAIN PWB (22/28)
MAIN PWB (28/28)
MAIN PWB (8/28)
MAIN PWB (1/28)
MAIN PWB (12/28)
MAIN PWB (16/28)
MAIN PWB (15/28)
MAIN PWB (15/28)
HOST_A[24..0]
MAIN PWB (8/28)
HOST_A1
HOST_A2
HOST_A3
HOST_A4
HOST_A5
HOST_A6
HOST_A7
HOST_A8
HOST_A9
HOST_A10
HOST_A11
HOST_A12
HOST_A13
HOST_A14
HOST_A15
HOST_A16
HOST_A17
HOST_A18
HOST_A19
HOST_A20
HOST_A22
HOST_A23
HOST_A24
DG_PE1
HOST_CS#
HOST_A21
HOST_CS0#
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
R1100
222/1005
OPEN-104p/16V/1005
C1100
TP1639 PCB_TP10
TP1643 PCB_TP10
TP1647 PCB_TP10
TP1651 PCB_TP10
TP1655 PCB_TP10
TP1659 PCB_TP10
TP1663 PCB_TP10
TP1667 PCB_TP10
TP1671 PCB_TP10
TP1675 PCB_TP10
TP1679 PCB_TP10
TP1683 PCB_TP10
TP1687 PCB_TP10
TP1691 PCB_TP10
TP1695 PCB_TP10
TP1699 PCB_TP10
TP1703 PCB_TP10
TP1707 PCB_TP10
TP1711 PCB_TP10
TP1715 PCB_TP10
TP1718 PCB_TP10
TP1720 PCB_TP10
TP1721 PCB_TP10
+5V +3V3_A
R1101
222/1005
Q1100
1
MMBT4401
23
To Bottum side
TP1640 PCB_TP10
TP1644 PCB_TP10
TP1648 PCB_TP10
TP1652 PCB_TP10
TP1656 PCB_TP10
TP1660 PCB_TP10
TP1664 PCB_TP10
TP1668 PCB_TP10
TP1672 PCB_TP10
TP1676 PCB_TP10
TP1680 PCB_TP10
TP1684 PCB_TP10
TP1688 PCB_TP10
TP1692 PCB_TP10
TP1696 PCB_TP10
TP1700 PCB_TP10
TP1704 PCB_TP10
TP1708 PCB_TP10
TP1712 PCB_TP10
TP1716 PCB_TP10
#CS_FLASH_DG
1
TP1631 PCB_TP10
1
TP1632 PCB_TP10
1
TP1633 PCB_TP10
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
#CS_FLASH_DG
HOST_D0
HOST_D1
HOST_D2
HOST_D3
HOST_D4
HOST_D5
HOST_D6
HOST_D7
HOST_D8
HOST_D9
HOST_D10
HOST_D11
HOST_D12
HOST_D13
HOST_D14
HOST_D15
#CS_FLASH_DG
DG_PE1
C1101
104p/16V/1005
C1102
106p/10V/2012
1
MAIN PWB (8/28)
MAIN PWB (8/28)
HOST_D[15..0]
+5V
+3V3_A
Model1_ID
R173 OPEN-103/1005
R170 OPEN-103/1005
R171 OPEN-103/1005
R172 OPEN-103/1005
A A
R163 103/1005
R164 103/1005
Model2_ID
R168 OPEN-103/1005
Model3_ID
Model4_ID
R169 OPEN-103/1005
MAIN PWB ASS'Y (7/28)
+3V3_A
POD_CI
All location are from 161 to 180
5
R174 103/1005 R174 103/1005
[Douglas I2S and FLEX ROM CONNECTOR]
HU-71100004
4
3
2
1
lt-19db1bu_0514_5/30_29/30_0.0
2-20(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-19
Page 13
MAIN PWB CIRCUIT DIAGRAM (8/28) [Douglas Flash & CI Interface]
5
U112C
&MPEG2_ONECHIP FLI10610H
Flash_WP#
D D
POD_DET#
POD_DAT_DIR
POD_A4
POD_A5
POD_A6
POD_A7
POD_A8
POD_A9
POD_A14
STREAM_CLK
STREAM_VAL
STREAM_SYNC
STREAM_D7
STREAM_D6
STREAM_D5
STREAM_D4
STREAM_D3
STREAM_D2
STREAM_D1
C C
CI_WAIT_N
MAIN PWB
(9/28)
CI_CD1_N
CI_CD2_N
CI_CE1_N
CI_IRQ_N CI_IOWR_N
CI_RESET
STREAM_D0
CI_WAIT_N
CI_CD1_N
CI_CD2_N
CI_CE1_N
CI_IRQ_N
CI_RESET
Bootstrap Pin Name
BSTRAP_BOOT_MODE
B B
BSTRAP_EXT_OSC
BSTRAP_16BIT_FLASH
BSTRAP_NAND_FLASH_EN
BSTRAP_PAGESIZE
BSTRAP_NAND_FLASH_DWIDTH
A A
BSTRAP_NOR_FLASH_SEL
W1
W2
W3
AD4
AD5
AE3
AF3
AF2
AG2
AF1
AG1
W5
W6
Y5
Y4
AB1
AA1
Y1
AB2
AA2
Y2
AA3
Y3
V3
V5
V4
AE4
W4
V2
V1
POD_HOST_A0
POD_HOST_A1
POD_HOST_A2
POD_HOST_A3
POD_HOST_A4
POD_HOST_A5
POD_HOST_A6
POD_HOST_A7
OOB_CTX
OOB_CRX
OOB_DRX
POD_DETEC_N
POD_DIR_N
POD_A4_CTX
POD_A5_ITX
POD_A6_ETX
POD_A7_QTX
POD_A8_CRX
POD_A9_DRX
POD_A14_MCLKO
POD_VS2_MCLKO
POD_BVD2_MOVAL
POD_BVD1_MOSTRT
POD_D15_MDO7
POD_D14_MDO6
POD_D13_MDO5
POD_D12_MDO4
POD_D11_MDO3
POD_D10_MDO2
POD_D9_MDO1
POD_D8_MDO0
POD_WAIT_N
POD_CD1
POD_CD2
POD_CE_1
POD_CE_2
POD_READY_IRQ_N
POD_RESET
Description
Pins POD_HOST_A[1:0] indicate on chip
hardware the host interface configuration
to use after hard reset:
A1;A0 = 00 = Function test, vendor mode.
A1;A0 = 01 = Function test, vendor mode.
A1;A0 = 10 = Boot from FLASH
A1;A0 = 11 = Boot from IROM
Pin POD_HOST_A2 indicates:
0 = Internal osc
1 = External osc
Pin POD_HOST_A3 indicates type of
memory for external boot FLASH.
0 = 8-bit FLASH
1 = 16-bit FLASH
Pin PODREG_HOST_A4 indicates type of
memory for external boot FLASH.
0 = NOR FLASH
1 = NAND FLASH
Pin POD_IOWR_HOST_A5 indicates page
size for off chip NAND FLASH.
0 = Small page NAND FLASH
1 = Large page NAND FLASH
Pin POD_IORD_HOST_A6 indicates data
width for NAND FLASH (used by IROM
boot s/w only).
0 = 8-bit NAND FLASH
1 = 16-bit NAND FLASH
Pin HOST_A[7] selects whether parallel
NOR flash or SPI flash is used for boot
when BSTRAP_BOOT_MODE=10 (IROM
bypass). Ignored if
BSTRAP_BOOT_MODE != 10.
0 = boot from parallel NOR flash
1 = boot from SPI flash
POD_HOST_D0/SPI_SDI
POD_HOST_D1
POD_HOST_D2
POD_HOST_D3
POD_HOST_D4
POD_HOST_D5
POD_HOST_D6
POD_HOST_D7
HOST_D8
HOST_D9
HOST_D10
HOST_D11
HOST_D12
HOST_D13
HOST_D14
HOST_D15
POD_HOST_A0
POD_HOST_A1
POD_HOST_A2/SPI_SDO
POD_HOST_A3/SPI_CLK
POD_REG_HOST_A4
POD_IOWR_HOST_A5
POD_IORD_HOST_A6
POD_WE_HOST_WR
HOST_A7
HOST_A8
HOST_A9
POD_HOST_A10
POD_HOST_A11
POD_HOST_A12
POD_HOST_A13
HOST_A14
HOST_A15
HOST_A16
HOST_A17
HOST_A18
HOST_A19
HOST_A20
HOST_A21
HOST_A22
HOST_A23
HOST_A24
POD_OE_HOST_RD
HOST_ACK
HOST_DEV_CS2_N
HOST_DEV_CS1_N
HOST_DEV_CS0_N
HOST_BOOT_CS_N
HOST_READY
AG7
AJ8
AG8
AE7
AH9
AF9
AJ10
AG10
AF7
AH8
AE8
AJ9
AG9
AE9
AH10
AF10
AJ15
AH15
AG15
AE14
AF14
AG14
AH14
AJ14
AE13
AF12
AG12
AH12
AJ12
AE11
AF11
AG11
AH11
AE10
AF13
AG13
AE12
AD13
AH13
AJ11
AD9
AJ13
AF8
AG3
AE5
AF4
AJ4
AG6
AH5
All location are from 181 to 220
5
4
+1V8
L26
HOST_D0
HOST_D1
HOST_D2
HOST_D3
HOST_D4
HOST_D5
HOST_D6
HOST_D7
HOST_D8
HOST_D9
HOST_D10
HOST_D11
HOST_D12
HOST_D13
HOST_D14
HOST_D15
HOST_A0
HOST_A1
HOST_A2
HOST_A3
HOST_A4
HOST_A5
HOST_A6
HOST_A7
HOST_A8
HOST_A9
HOST_A10
HOST_A11
HOST_A12
HOST_A13
HOST_A14
HOST_A15
HOST_A16
HOST_A17
HOST_A18
HOST_A19
HOST_A20
HOST_A21
HOST_A22
HOST_A23
HOST_A24
HOST_WE#
HOST_OE#
HOST_ACK
HOST_CS0#
HOST_CS#
HOST_RD
POD_DET#
HOST_CS#
HOST_RD
HOST_ACK
NOTE.
64 MBit FLASH : R203, R204, L26 OPEN
128 MBit FLASH : R204, L26 OPEN
256 MBit FLASH : L27 OPEN(P30 Series)
L26 OPEN (P33 Series)
R184 OPEN-103/1005
R183 472/1005
R205 103/1005
OPEN-BLM18PG300SN1D
+3V3_A
L27
BLM18PG300SN1D
HOST_A23
HOST_A24
PCB_TP08
MAIN PWB (7/28)
HOST_CS0#
HOST_CS#
STREAM_CLK
STREAM_VAL
STREAM_SYNC
MAIN PWB (7/28)
+3V3_A
BOOT STRAP SETTING
R187 103/1005
R189 OPEN-103/1005
R191 103/1005
R193 OPEN-103/1005
R195 103/1005
R197 103/1005
R199 OPEN-103/1005
R201 103/1005
4
HOST_A0
HOST_A1
HOST_A2
HOST_A3
HOST_A4
HOST_A5
HOST_A6
HOST_A7
C193
104p/16V/1005
HOST_A1
HOST_A2
HOST_A3
HOST_A4
HOST_A5
HOST_A6
HOST_A7
HOST_A8
HOST_A9
HOST_A10
HOST_A11
HOST_A12
HOST_A13
HOST_A14
HOST_A15
HOST_A16
HOST_A17
HOST_A18
HOST_A19
HOST_A20
HOST_A21
HOST_A22
R203 000/1005
R204 000/1005
TP186
1
Flash_WP#
HOST_A[24..0]
STREAM_D0
STREAM_D1
STREAM_D2
STREAM_D3
STREAM_D4
STREAM_D5
STREAM_D6
STREAM_D7
+3V3_D
C185
104p/16V/1005
+3V3_D
C186
104p/16V/1005
R188 OPEN-103/1005
R190 103/1005
R192 OPEN-103/1005
R194 103/1005
R196 OPEN-103/1005
R198 OPEN-103/1005
R200 103/1005
R202 OPEN-103/1005
C194
104p/16V/1005
A1
A1
B1
A2
C1
A3
D1
A4
D2
A5
A2
A6
C2
A7
A3
A8
B3
A9
C3
A10
D3
A11
C4
A12
A5
A13
B5
A14
C5
A15
D7
A16
D8
A17
A7
A18
B7
A19
C7
A20
C8
A21
A8
A22
G1
A23
H8
A24
B6
NC(A25)
H1
RFU1
G2
RFU2
F1
RFU3
E8
RFU4
B8
RFU5
A4
VPP
R206
472/F/1005
U185
SN74LVC244APWR
18
1Y1
16
1Y2
14
1Y3
12
1Y4
9
2Y1
7
2Y2
5
2Y3
3
2Y4
20
VCC
10
DGND
U187
SN74LVC244APWR
18
1Y1
16
1Y2
14
1Y3
12
1Y4
9
2Y1
7
2Y2
5
2Y3
3
2Y4
20
VCC
10
DGND
+3V3_A
3
H3
VCCA6VCC
VCCQD5VCCQD6VCCQ
VSSB2VSSH2VSSH4VSS
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
1G
2G
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
1G
2G
STREAM_D0
STREAM_D1
STREAM_D2
STREAM_D3
STREAM_D4
STREAM_D5
STREAM_D6
STREAM_D7
+3V3_D
C195
104p/16V/1005
3
U181
G4
PC28F256P33B85
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
CE
OE
WE
WP
ADV
CLK
RST
WAIT
H6
2
4
6
8
11
13
15
17
1
19
PPKT_CLK
2
PPKT_VAL
4
PPKT_SYNC
6
8
11
13
15
17
1
19
F2
E2
G3
E4
E5
G5
G6
H7
E1
E3
F3
F4
F5
H5
G7
E7
B4
F8
G8
C6
F6
E6
D4
F7
PPKT_D0
PPKT_D1
PPKT_D2
PPKT_D3
PPKT_D4
PPKT_D5
PPKT_D6
PPKT_D7
POD_CI
C181
104p/16V/1005
HOST_D0
HOST_D1
HOST_D2
HOST_D3
HOST_D4
HOST_D5
HOST_D6
HOST_D7
HOST_D8
HOST_D9
HOST_D10
HOST_D11
HOST_D12
HOST_D13
HOST_D14
HOST_D15
#CS_FLASH_DG
HOST_OE#
HOST_WE#
R207
330/1005
POD_CI
PPKT_CLK
PPKT_VAL
PPKT_SYNC
MUX_TSI_CLK
MUX_TSI_VAL
MUX_TSI_SYNC
POD_CI
POD_TER#
U188
SN74LVC244APWR
18
1Y1
16
1Y2
14
1Y3
12
1Y4
9
2Y1
7
2Y2
5
2Y3
3
2Y4
20
VCC
10
DGND
2
+3V3_A
C187
104p/16V/1005
C182
106p/10V/2012
HOST_D[15..0]
MAIN PWB (7/28)
C183
104p/16V/1005
+3V3_A
MAIN PWB (7/28)
#CS_FLASH_DG
R185
103/1005
CI_CE1_N
MAIN PWB (6/28)
PWR_/RESET
HOST_WE#
HOST_OE#
PPKT_D[7..0]
NOTE.
FREE CH : POD_TER# L , POD_DET# H
CI : POD_TER# H , POD_DET# L
MAIN PWB
(9/28)
MAIN PWB
(7/28)
2
1A1
4
1A2
6
1A3
8
1A4
11
2A1
13
2A2
15
2A3
17
2A4
1
1G
19
2G
MAIN PWB (9/28)
MAIN PWB
(24/28)
MAIN PWB
MUX_TSI_D0
MUX_TSI_D1
MUX_TSI_D2
MUX_TSI_D3
MUX_TSI_D4
MUX_TSI_D5
MUX_TSI_D6
MUX_TSI_D7
MUX_TSI_SYNC
(24/28)
MUX_TSI_CLK
MUX_TSI_VAL
POD_TER#
R208 330/1005
R209 330/1005
MUX_TSI_D0
MUX_TSI_D1
MUX_TSI_D2
MUX_TSI_D3
MUX_TSI_D4
MUX_TSI_D5
MUX_TSI_D6
MUX_TSI_D7
MAIN PWB ASS'Y (8/28)
[Douglas Flash & CI Interface]
HU-71100004
MAIN PWB (7/28)
2
HOST_D0
HOST_D1
HOST_D2
HOST_D3
HOST_D4
HOST_D5
HOST_D6
HOST_D7
+3V3_D
POD_A4
POD_A5
POD_A6
POD_A7
POD_A8
POD_A9
POD_A14
R210 OPEN-000/1005
POD_DET#
Flash_WP# WP#
R186
OPEN-000/1005
HOST_A0
HOST_A1
HOST_A2
HOST_A3
HOST_A10
HOST_A11
HOST_A12
HOST_A13
HOST_A4
HOST_A5
HOST_A6
MUX_TSI_CLK
MUX_TSI_VAL
MUX_TSI_SYNC
POD_DET#
MUX_TSI_D0
MUX_TSI_D1
MUX_TSI_D2
MUX_TSI_D3
MUX_TSI_D4
MUX_TSI_D5
MUX_TSI_D6
MUX_TSI_D7
POD_DET#
U182
SN74LVC245APWR
18
B0
17
B1
16
B2
15
B3
14
B4
13
B5
12
B6
11
B7
20
VCC
10
GND
U183
SN74LVC244APWR
2
1A1
4
1A2
6
1A3
8
1A4
11
2A1
13
2A2
15
2A3
17
2A4
1
1G
19
2G
U184
SN74LVT16244B
47
1A1
46
1A2
44
1A3
43
1A4
41
2A1
40
2A2
38
2A3
37
2A4
36
3A1
35
3A2
33
3A3
32
3A4
30
4A1
29
4A2
27
4A3
26
4A4
1
1G
48
2G
25
3G
24
4G
45
GND
39
GND
34
GND
28
GND
U186
SN74LVC244APWR
2
1A1
4
1A2
6
1A3
8
1A4
11
2A1
13
2A2
15
2A3
17
2A4
1
1G
19
2G
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
+5V
DGND
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
3Y1
3Y2
3Y3
3Y4
4Y1
4Y2
4Y3
4Y4
VCC
VCC
VCC
VCC
GND
GND
GND
GND
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
+5V
DGND
T/R
/OE
1
CI_D[7..0]
MAIN PWB (9/28)
CI_A[14..0]
CI_CE1_N#
MAIN PWB
(9/28)
MAIN PWB
(9/28)
C191
104p/16V/1005 R182 103/1005
C190
MDO_D[7..0]
MAIN PWB (9/28)
POD_DAT_DIR
POD_DET#
CI_A4
CI_A5
CI_A6
CI_A7
CI_A8
CI_A9
CI_A14
+3V3_D
C184
104p/16V/1005
CI_A0
CI_A1
CI_A2
CI_A3
CI_A10
CI_A11
CI_A12
CI_A13
MDO_CLK
MDO_VAL
MDO_SYNC
104p/16V/1005
C188
104p/16V/1005
MDO_D0
MDO_D1
MDO_D2
MDO_D3
MDO_D4
MDO_D5
MDO_D6
MDO_D7
+3V3_D
CI_D0
CI_D1
CI_D2
CI_D3
CI_D4
CI_D5
CI_D6
CI_D7
CI_WE_N
CI_OE_N
CI_REG_N
CI_IORD_N
MDO_CLK
MDO_VAL
MDO_SYNC
C189
104p/16V/1005
C192
104p/16V/1005
1
2
A0
3
A1
4
A2
5
A3
6
A4
7
A5
8
A6
9
A7
1
19
18
16
14
12
9
7
5
3
20
10
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
+3V3_D
7
18
31
42
4
10
15
21
18
16
14
12
9
7
5
3
20
10
(No.YA697<Rev.001>)2-21 2-22(No.YA697<Rev.001>)
lt-19db1bu_0514_6/30_0.0
Page 14
MAIN PWB CIRCUIT DIAGRAM (9/28) [CI Slot]
5
VCC_CI
R221
103/1005
R130
R239
000/1005
+3V3_A
D D
CI_CE1_N#
Open_000/1005
CI_CE1_N
CI_OE_N
MAIN PWB
(8/28)
C C
B B
CI_WE_N
CI_IRQ_N
CI_D[7..0]
CI_A[14..0]
VCC_CI
R223
103/1005
CI_D0
CI_D1
CI_D2
CI_D3
CI_D4
CI_D5
CI_D6
CI_D7
CI_A0
CI_A1
CI_A2
CI_A3
CI_A4
CI_A5
CI_A6
CI_A7
CI_A8
CI_A9
CI_A10
CI_A11
CI_A12
CI_A13
CI_A14
R224
103/1005
R225
103/1005 R229
CI_OE_N
VCC_CI
R233 103/1005
CI_D3
CI_D4
CI_D5
CI_D6
CI_D7
CI_A10
CI_A11
CI_A9
CI_A8
CI_A13
CI_A14
CI_WE_N
CI_IRQ_N
CI_MIVAL
CI_MCLKI
CI_A12
CI_A7
CI_A6
CI_A5
CI_A4
CI_A3
CI_A2
CI_A1
CI_A0
CI_D0
CI_D1
CI_D2
4
C221
104p/16V/1005
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
R222
121/5025
35
35
36
36
37
37
38
38
39
39
40
40
41
41
42
42
43
43
44
44
45
45
46
46
47
47
48
48
49
49
50
50
51
51
52
52
53
53
54
54
55
55
56
56
57
57
58
58
59
59
60
60
61
61
62
62
63
63
64
64
65
65
66
66
67
67
68
68
696970
70
JP221
A01C5A0045P1P00/1-SLOT
C222
104p/16V/1005
CI_CD1_N
CI_MDO_3
CI_MDO_4
CI_MDO_5
CI_MDO_6
CI_MDO_7
R232 103/1005
CI_IORD_N
CI_IOWR_N
CI_MISTART
CI_MDI_0
CI_MDI_1
CI_MDI_2
CI_MDI_3
CI_MDI_4
CI_MDI_5
CI_MDI_6
CI_MDI_7
CI_MCLKO
CI_RESET
CI_WAIT_N
CI_REG_N
CI_MOVAL
CI_MOSTART
CI_MDO_0
CI_MDO_1
CI_MDO_2
CI_CD2_N
+3V3_A +3V3_A VCC_CI
R226
103/1005
R227
103/1005
VCC_CI
VCC_CI
R238
103/1005
3
R228
103/1005
104/1005
104p/16V/1005
R230
103/1005
C229
R231
103/1005
CI_CD1_N
C228
104p/16V/1005
CI_IORD_N
CI_IOWR_N
CI_RESET
CI_WAIT_N
CI_REG_N
CI_CD2_N
MAIN PWB (8/28)
CI_MCLKO
2
TS INPUT
CI_MDI_0
CI_MDI_1
CI_MDI_2
CI_MDI_3
CI_MDI_4
CI_MDI_5
CI_MDI_6
CI_MDI_7
CI_MISTART
CI_MIVAL
CI_MCLKI MDO_CLK
PR221
18
330*4/1005
27
36
45
PR222
18
330*4/1005
27
36
45
PR223
18
330*4/1005
27
36
45
MDO_D0
MDO_D1
MDO_D2
MDO_D3
MDO_D4
MDO_D5
MDO_D6
MDO_D7
MDO_SYNC
MDO_VAL
TS OUTPUT
CI_MDO_0
CI_MDO_1
CI_MDO_2
CI_MDO_3
CI_MDO_4
CI_MDO_5
CI_MDO_6
CI_MDO_7
CI_MOSTART
CI_MOVAL
M_CLK
PR224
18
330*4/1005
27
36
45
PR225
18
330*4/1005
27
36
45
PR226
18
330*4/1005
27
36
45
PPKT_D0
PPKT_D1
PPKT_D2
PPKT_D3
PPKT_D4
PPKT_D5
PPKT_D6
PPKT_D7
PPKT_SYNC
PPKT_VAL
PPKT_CLK
These all of components must be located near Douglas
U221
OPEN-74HC14
R234 000/1005
M_CLK
R108
Open_000/1005
1
A1
2
O1
3
A2
4
O2
5
A3
6
O3
7
DGND
+5V
14
13
A6
12
O6
11
A5
10
O5
9
A4
8
O4
+3V3_A
1
MDO_D[7..0]
MDO_SYNC
MDO_VAL
MDO_CLK
PPKT_D[7..0]
PPKT_SYNC
PPKT_VAL
PPKT_CLK
R109
Open_000/1005
MAIN PWB
(8/28)
MAIN PWB
(8/28)
M_CLK
+5V
C223
C224
1
23
C224
Open-475p/16V/3216
Open-475p/16V/3216
Q221
Q221
IRLML6402TRPBF
IRLML6402TRPBF
C226
C226
106p/10V/2012
106p/10V/2012
Q222
Q222
MMBT4401
MMBT4401
2
1
3
R235
R235
472/1005
472/1005
C225
+3V3_A
A A
R236
R236
752/1005
752/1005
R237
MAIN PWB (6/28)
CI_PWR
R237
332/1005
332/1005
C225
Open-682p/50V/1005
Open-682p/50V/1005
C223
104p/16V/1005
104p/16V/1005
VCC_CI
C227
C227
106p/10V/2012
106p/10V/2012
MAIN PWB ASS'Y (9/28)
[CI Slot]
HU-71100004
All location are from 221 to 250
5
4
3
2
1
lt-19db1bu_0514_7/30_0.0
2-24(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-23
Page 15
MAIN PWB CIRCUIT DIAGRAM (10/28) [Douglas DDR Interface]
5
VDDR_MEM
D D
F25
F27
F29
H24
H27
H29
K25
K27
K29
M29
AF25
D25
SDDR_D0
SDDR_D1
SDDR_D2
SDDR_D3
SDDR_D4
SDDR_D5
SDDR_D6
SDDR_D7
SDDR_DM0
SDDR_DQS0
SDDR_DQS0#
SDDR_D8
SDDR_D9
SDDR_D10
SDDR_D11
SDDR_D12
SDDR_D13
SDDR_D14
SDDR_D15
C C
B B
SDDR_DM1
SDDR_DQS1
SDDR_DQS1#
SDDR_D16
SDDR_D17
SDDR_D18
SDDR_D19
SDDR_D20
SDDR_D21
SDDR_D22
SDDR_D23
SDDR_DM2
SDDR_DQS2
SDDR_DQS2#
SDDR_D24
SDDR_D25
SDDR_D26
SDDR_D27
SDDR_D28
SDDR_D29
SDDR_D30
SDDR_D31
SDDR_DM3
SDDR_DQS3
SDDR_DQS3#
C267
104p/16V/1005
F24
DDR_D0
M24
DDR_D1
J25
DDR_D2
K26
DDR_D3
M26
DDR_D4
E25
DDR_D5
L25
DDR_D6
F26
DDR_D7
K24
DDR_DM0
H25
DDR_DQS0
H26
DDR_DQS0_N
E29
DDR_D8
L29
DDR_D9
H28
DDR_D10
J29
DDR_D11
L27
DDR_D12
E27
DDR_D13
K28
DDR_D14
F28
DDR_D15
J27
DDR_DM1
G28
DDR_DQS1
G29
DDR_DQS1_N
Y24
DDR_D16
AF28
DDR_D17
AC25
DDR_D18
AD26
DDR_D19
AF26
DDR_D20
W25
DDR_D21
AE25
DDR_D22
Y26
DDR_D23
AD24
DDR_DM2
AB25
DDR_DQS2
AB26
DDR_DQS2_N
W29
DDR_D24
AE29
DDR_D25
AB28
DDR_D26
AC29
DDR_D27
AE27
DDR_D28
W27
DDR_D29
AD28
DDR_D30
Y28
DDR_D31
AC27
DDR_DM3
AA28
DDR_DQS3
AA29
DDR_DQS3_N
C268
104p/16V/1005
DDR_VDD
DDR_VDD
DDR_VDD
DDR_VDD
DDR_VDD
CVSS
CVSS
CVSS
CVSS
E24
E26
E28
G24
C270
104p/16V/1005
DDR_VDD
CVSS
G26
DDR_VDD
CVSS
G27
DDR_VDD
CVSS
J24
J26
N24
M25
DDR_VDD
DDR_VDD
DDR_VDD
DDR_VDD
DDR_VDD
&MPEG2_ONECHIP FLI10610H
CVSS
CVSS
CVSS
CVSS
CVSS
J28
L24
L26
L28
N27
C272
104p/16V/1005
P28
DDR_VDD
DDR_VDD
U112A
CVSS
CVSS
N28
R25
DDR_VDD
CVSS
P26
U25
DDR_VDD
CVSS
T24
V27
DDR_VDD
CVSS
T26
Y25
DDR_VDD
CVSS
V29
Y27
DDR_VDD
CVSS
W24
Y29
AB24
AB27
AB29
DDR_VDD
DDR_VDD
DDR_VDD
DDR_VDD
CVSS
CVSS
CVSS
CVSS
W26
W28
AA24
AA26
C274
104p/16V/1005
AD25
DDR_VDD
CVSS
AA27
AD27
AD29
DDR_VDD
CVSS
AC24
AC26
AF27
DDR_VDD
DDR_VDD
CVSS
CVSS
AC28
4
AF29
DDR_VDD
CVSS
AE24
D27
DDR_VDD
CVSS
AE26
104p/16V/1005
R24
G25
D29
DDR_VDD
DDR_VRF_ 1
DDR_VRF_ 0
DDRPLL_AVDD12
DDRPLL_AVDD33
DDRPLL_AGND
CVSS
CVSS
CVSS
D26
D28
AE28
C276
104p/16V/1005
VDDR_MEM
C252
102p/50V/1005
AA25
DDR_VDDI
DDR_VDDI
DDR_VRF_ 2
DLL_VAA0
DLL_VAA1
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_BA0
DDR_BA1
DDR_CAS_N
DDR_RAS_N
DDR_CS_N
DDR_WE_N
DDR_CK
DDR_CK_N
DDR_CKE
DDR_ODT
DDR_CAL
RPLL_AVDD12
RPLL_AGND
RPLL_AVDD33
RPLL_AGND
C251
104p/16V/1005
C253
F23
AD23
M28
V24
P27
U29
R26
U26
P25
T28
R27
V28
R29
T29
V25
R28
V26
U28
T27
P24
N26
N25
T25
P29
N29
U27
M27
U24
C23
D22
B22
B23
E22
E21
C22
104p/16V/1005
3
DDR_VRF
C254
105p/16V/1005
C255
226p/6.3V/2012
SDDR_A0
SDDR_A1
SDDR_A2
SDDR_A3
SDDR_A4
SDDR_A5
SDDR_A6
SDDR_A7
SDDR_A8
SDDR_A9
SDDR_A10
SDDR_A11
SDDR_A12
SDDR_BA0
SDDR_BA1
SDDR_CAS
SDDR_RAS
SDDR_CS
SDDR_WE
R262 100/F/1005 R255 100/1005
R263 100/F/1005
R276 103/F/1005
R265 103/1005
R268 2940/F/1005
C278
C256
103p/50V/1005
C280
104p/16V/1005
C257
103p/50V/1005
C260
103p/50V/1005
The CKE pull down is for power off
mode DDR self refresh
DDR_CKE
C263
103p/50V/1005
C265
103p/50V/1005
C282
104p/16V/1005
C258
226p/6.3V/2012
C261
103p/50V/1005
DDR_CLK
DDR_CLK_N
DDR_CKE
DDR_ODT
C264
103p/50V/1005
C266
103p/50V/1005
BLM18PG300SN1D
BLM18PG300SN1D
C284
104p/16V/1005
R251
+3V3_A
1R0/2012
C259
226p/6.3V/2012
R252
1R0/2012
C262
226p/6.3V/2012
MAIN PWB (11/28)
L251
L252
+1V2
+3V3_A
VDDR_MEM
SDDR_D2
SDDR_D0
SDDR_D7
SDDR_D5
SDDR_D4
SDDR_D1
SDDR_D3
SDDR_D6
SDDR_D15
SDDR_D8
SDDR_D13
SDDR_D10
SDDR_D11
SDDR_D12
SDDR_D9
SDDR_D14
SDDR_D18
SDDR_D16
SDDR_D23
SDDR_D21
SDDR_D17
SDDR_D22
SDDR_D20
SDDR_D19
SDDR_D31
SDDR_D29
SDDR_D24
SDDR_D26
SDDR_D27
SDDR_D28
SDDR_D25
SDDR_D30
SDDR_DM0
SDDR_DM1
SDDR_DM2
SDDR_DQS0
SDDR_DQS0#
SDDR_DQS1
SDDR_DQS1#
SDDR_DQS2
SDDR_DQS2#
SDDR_DQS3
SDDR_DQS3#
SDDR_A11
SDDR_A2
SDDR_A8
SDDR_A0
SDDR_A5
SDDR_A4
SDDR_A9
SDDR_A6
SDDR_A10
SDDR_A12
SDDR_A3
SDDR_A7
SDDR_A1
SDDR_BA0
SDDR_BA1
SDDR_RAS
SDDR_CAS
SDDR_CS
SDDR_WE
2
PR251 100*4/1005
PR252 100*4/1005
PR254 100*4/1005
R272 100/1005
R273 100/1005
PR257 100*4/1005
PR258 100*4/1005
PR260 100*4/1005
PR261 100*4/1005
R274 100/1005
R275 100/1005
PR262 100*4/1005
R253 100/1005
R257 100/1005
R264 100/1005
R269 100/1005
R254 100/1005
R259 100/1005
R261 100/1005
R266 100/1005
R267 100/1005
R270 100/1005
R271 100/1005
PR253 100*4/1005
PR255 100*4/1005
PR256 100*4/1005
R256 100/1005
R258 100/1005
R260 100/1005
PR259 100*4/1005
R277 100/1005
1
DDR_D[31:0]
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
4 5
3 6
2 7
1 8
DDR_D2
DDR_D0
DDR_D7
DDR_D5
DDR_D4
DDR_D1
DDR_D3
DDR_D6
DDR_D15
DDR_D8
DDR_D13
DDR_D10
DDR_D11
DDR_D12
DDR_D9
DDR_D14
DDR_D18
DDR_D16
DDR_D23
DDR_D21
DDR_D17
DDR_D22
DDR_D20
DDR_D19
DDR_D31
DDR_D29
DDR_D24
DDR_D26
DDR_D27
DDR_D28
DDR_D25
DDR_D30
DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3 SDDR_DM3
DDR_DQS0
DDR_DQS0#
DDR_DQS1
DDR_DQS1#
DDR_DQS2
DDR_DQS2#
DDR_DQS3
DDR_DQS3#
DDR_A11
DDR_A2
DDR_A8
DDR_A0
DDR_A5
DDR_A4
DDR_A9
DDR_A6
DDR_A10
DDR_A12
DDR_A3
DDR_A7
DDR_A1
DDR_BA0
DDR_BA1
DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DQS0
DDR_DQS0#
DDR_DQS1
DDR_DQS1#
DDR_DQS2
DDR_DQS2#
DDR_DQS3
DDR_DQS3#
DDR_A[12:0]
DDR_BA0
DDR_BA1
DDR_RAS
DDR_CAS
DDR_CS
DDR_WE
DDR_D[31:0]
MAIN PWB (11/28)
DDR_A[12:0]
MAIN PWB (11/28)
MAIN PWB
(11/28)
MAIN PWB
(11/28)
C269
104p/16V/1005
A A
C285
102p/50V/1005
C286
102p/50V/1005
C287
102p/50V/1005
C271
104p/16V/1005
C288
102p/50V/1005
C273
104p/16V/1005
C289
102p/50V/1005
C275
104p/16V/1005
C290
102p/50V/1005
C277
104p/16V/1005
C291
102p/50V/1005
C292
102p/50V/1005
C279
104p/16V/1005
C293
102p/50V/1005
C281
104p/16V/1005
C294
102p/50V/1005
C283
104p/16V/1005
C295
102p/50V/1005
C296
102p/50V/1005
MAIN PWB ASS'Y (10/28)
[Douglas DDR Interface]
HU-71100004
2
1
lt-19db1bu_0514_8/30_0.0
All location are from 251 to 320
C297
105p/16V/1005
5
4
C298
105p/16V/1005
3
C299
226p/6.3V/2012
C300
226p/6.3V/2012
(No.YA697<Rev.001>)2-25 2-26(No.YA697<Rev.001>)
Page 16
MAIN PWB CIRCUIT DIAGRAM (11/28) [DDR2 Memory]
5
DDR_A[12:0]
MAIN PWB
D D
C C
B B
(10/28)
MAIN PWB
(10/28)
DDR_D[31:0]
DDR_BA0
DDR_BA1
DDR_CLK
DDR_CLK_N
DDR_CKE
DDR_ODT
DDR_CS
DDR_RAS
DDR_CAS
DDR_WE
DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DQS0
DDR_DQS0#
DDR_DQS1
DDR_DQS1#
DDR_DQS2
DDR_DQS2#
DDR_DQS3#
DDR_DQS3
226p/6.3V/2012
VDDR_MEM
C331
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_BA0
DDR_BA1
DDR_CLK
DDR_CLK_N
DDR_CKE
DDR_ODT
DDR_CS
DDR_RAS
DDR_CAS
DDR_WE
DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DQS0
DDR_DQS0#
DDR_DQS1
DDR_DQS1#
DDR_DQS2
DDR_DQS2#
DDR_DQS3#
DDR_DQS3
226p/6.3V/2012
C333
VDDR_MEM
L321
BLM18PG300SN1D
C335
105p/16V/1005
4
C327
105p/16V/1005
3
VDDR_MEM
C321
104p/16V/1005
C323
U321
H5PS5162FFR-Y5
DDR_D0
DDR_D3
DDR_D7
DDR_D4
DDR_D1
DDR_D5
DDR_D6
DDR_D2
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
VDDR_MEM VDDR_MEM
C328
104p/16V/1005
C337
104p/16V/1005
G8
DQ0
G2
DQ1
H7
DQ2
H3
DQ3
H1
DQ4
H9
DQ5
F1
DQ6
F9
DQ7
C8
DQ8
C2
DQ9
D7
DQ10
D3
DQ11
D1
DQ12
D9
DQ13
B1
DQ14
B9
DQ15
A1
VDD
E1
VDD
J9
VDD
M9
VDD
R1
VDD
A9
VDDQ
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
VDDQ
E9
VDDQ
G1
VDDQ
G3
VDDQ
G7
VDDQ
G9
VDDQ
A3
VSS
E3
VSS
J3
VSS
N1
VSS
P9
VSS
B2
VSSQ
B8
VSSQ
A7
VSSQ
D2
VSSQ
D8
VSSQ
E7
VSSQ
F2
VSSQ
F8
VSSQ
H2
VSSQ
H8
VSSQ
J1
VDDL
J7
VSSDL
104p/16V/1005
C339
LDQS#/NU
UDQS#/NU
VREF
A10
A11
A12
BA0
BA1
CK#
CKE
ODT
CS#
RAS#
CAS#
WE#
LDQS
UDQS
LDM
UDM
RFU
RFU
RFU
NC
NC
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CK
J2
DDR_A0
M8
DDR_A1
M3
DDR_A2
M7
DDR_A3
N2
DDR_A4
N8
DDR_A5
N3
DDR_A6
N7
DDR_A7
P2
DDR_A8
P8
DDR_A9
P3
DDR_A10
M2
DDR_A11
P7
DDR_A12
R2
DDR_BA0
L2
DDR_BA1
L3
DDR_CLK
J8
DDR_CLK_N
K8
DDR_CKE
K2
DDR_ODT
K9
DDR_CS
L8
DDR_RAS
K7
DDR_CAS
L7
DDR_WE
K3
DDR_DQS0
F7
DDR_DQS1
B7
DDR_DM0
F3
DDR_DM1
B3
DDR_DQS0# DDR_DQS2#
E8
DDR_DQS1#
A8
L1
R3
R7
A2
E2
R8
C341
103p/50V/1005
102p/50V/1005
DDR_VRF
DDR_CLK
R321
201/1005
DDR_CLK_N
C343
473p/16V/1005
C324
226p/6.3V/2012
DDR_VRF
C325
226p/6.3V/2012
DDR_CLK
R322
201/1005
DDR_CLK_N
C345
473p/16V/1005
VDDR_MEM
C326
102p/50V/1005
2
C322
104p/16V/1005
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_BA0
DDR_BA1
DDR_CLK
DDR_CLK_N
DDR_CKE
DDR_ODT
DDR_CS
DDR_RAS
DDR_CAS
DDR_WE
DDR_DQS2
DDR_DQS3
DDR_DM2
DDR_DM3
DDR_DQS3#
U322
J2
VREF
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
J8
CK
K8
CK#
K2
CKE
K9
ODT
L8
CS#
K7
RAS#
L7
CAS#
K3
WE#
F7
LDQS
B7
UDQS
F3
LDM
B3
UDM
E8
LDQS#/NU
A8
UDQS#/NU
L1
RFU
R3
RFU
R7
RFU
A2
NC
E2
NC
R8
NC
H5PS5162FFR-Y5
333MHz/512Mbit(32Mx16) 333MHz/512Mbit(32Mx16)
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VDDL
VSSDL
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A3
E3
J3
N1
P9
B2
B8
A7
D2
D8
E7
F2
F8
H2
H8
J1
J7
DDR_D16
DDR_D20
DDR_D23
DDR_D17
DDR_D22
DDR_D21
DDR_D19
DDR_D18
DDR_D29
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D24
DDR_D30
DDR_D31
C329
104p/16V/1005
1
BLM18PG300SN1D
C330
105p/16V/1005
L322
VDDR_MEM
A A
VDDR_MEM
C346
226p/6.3V/2012
All location are from 321 to 380
5
C332
226p/6.3V/2012
226p/6.3V/2012
C347
226p/6.3V/2012
C348
C334
105p/16V/1005
C349
105p/16V/1005
C350
105p/16V/1005
C336
105p/16V/1005
C351
105p/16V/1005
4
C352
104p/16V/1005
C338
104p/16V/1005
C353
104p/16V/1005
C354
104p/16V/1005
C340
103p/50V/1005
C355
103p/50V/1005
C356
103p/50V/1005
C342
103p/50V/1005
C357
103p/50V/1005
3
C358
473p/16V/1005
C344
473p/16V/1005
C359
473p/16V/1005
C360
473p/16V/1005
MAIN PWB ASS'Y (11/28)
[DDR2 Memory]
HU-71100004
2
1
lt-19db1bu_0514_9/30_0.0
2-28(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-27
Page 17
MAIN PWB CIRCUIT DIAGRAM (12/28) [Douglas A/V Input]
5
R_GRA
G_GRA
B_GRA
A1P
A2P
A3P
A4P
B1P
B2P
B3P
B4P
C1P
C2P
C3P
C4P
SV1P
SV2P
SV3P
SV4P
SVN
AHS_ACS
AVS
SIF_IN
SIF_RTN
AUD_IN_L1
AUD_IN_R1
AUD_IN_L2
AUD_IN_R2
AUD_IN_L3
AUD_IN_R3
AUD_IN_L4
AUD_IN_R4
AUD_IN_L5
AUD_IN_R5
AUD_VREFP
AUD_VREFN
AUD_VCM
C384
104p/16V/1005
C386 104p/16V/1005
K1
C387 104p/16V/1005
J1
C388 104p/16V/1005
J2
C399 104p/16V/1005
C2
C400 104p/16V/1005
E2
C401 104p/16V/1005
G2
C402 104p/16V/1005
K3
C403 104p/16V/1005
D2
AN
C404 104p/16V/1005
B1
C405 104p/16V/1005
D1
C406 104p/16V/1005
G1
C407 104p/16V/1005
L2
C410 104p/16V/1005
F2
BN
C408 104p/16V/1005
C1
C411 104p/16V/1005
E1
C412 104p/16V/1005
H1
C409 104p/16V/1005
L1
C413 104p/16V/1005
H2
CN
C414 104p/16V/1005
D3
C415 104p/16V/1005
F3
C416 104p/16V/1005
H3
C420 104p/16V/1005
J3
C421 104p/16V/1005
K2
J6
H6
A12
B12
C423 104p/16V/1005
K6
C424 104p/16V/1005
M6
C425 105p/16V/1005
M3
C426 105p/16V/1005
M4
C427 105p/16V/1005
M1
C428 105p/16V/1005
M2
C429 105p/16V/1005
N5
C430 105p/16V/1005
M5
C431 105p/16V/1005
N3
C435 105p/16V/1005
N4
C436 OPEN-105p/16V/1005
N1
C437 OPEN-105p/16V/1005
N2
L3
L4
L5
L6
R441
200/1005
R439
OPEN-200/1005
R437
OPEN-200/1005
U383
OPEN-IDTVS330QG
1
TP385 PCB_TP08
C381
D D
C C
+1V2
C417
106p/10V/2012
+3V3_A
L384
BLM18PG300SN1D
C432
106p/10V/2012
B B
A A
103p/50V/1005
C418
104p/16V/1005
C433
104p/16V/1005
SC2_CVBS_OUT
104p/16V/1005
C434
104p/16V/1005
C382
103p/50V/1005
C419
SC_FB
MAIN PWB (19/22)
MAIN PWB (20/22)
C383
104p/16V/1005
U112B
&MPEG2_ONECHIP FLI10610H
E4
ADC_VDDA33
F4
ADC_VDDA33
G4
ADC_VDDA33
H4
ADC_VDDA33
K4
ADC_VDDA33
E3
ADC_GNDA
F1
ADC_GNDA
G3
ADC_GNDA
F5
ADC_GNDA
G5
ADC_GNDA
H5
ADC_GNDA
J5
ADC_GNDA
K5
ADC_GNDA
P6
AUD_AVDD12
R6
AUD_AVDD12
N6
AUD_AVSS12
2WIRE_S0_SCL
2WIRE_S0_SDA
G6
SCART_FB
T6
AUD_AVDD33
T5
AUD_AVDD33
P2
AUD_AVSS33
P1
AUD_AVSS33
J4
VOUT2
AUD_MONO_IN
FB1
FB2
4
L381
BLM18PG300SN1D
C385
106p/10V/2012
2
S1A
5
S1B
11
S1C
14
S1D
3
S2A
6
S2B
10
S2C
13
S2D
AUDI_L1
AUDI_R1
AUDI_L2
AUDI_R2
AUDI_L3
AUDI_R3
AUDI_L4
AUDI_R4
AUDI_L5
AUDI_R5
C443
104p/16V/1005
+5V
16
VCC
GND
8
+3V3_A
R381 200/1005
R382 200/1005
R383 200/1005
R384 200/1005
R385 OPEN-200/1005
R386 200/1005
R387 200/1005
R388 57R6/F/1005
R389 200/1005
R390 OPEN-200/1005
R391 200/1005
R392 200/1005
R394 57R6/F/1005
R395 200/1005
R396 OPEN-200/1005
R397 200/1005
R393 200/1005
R398 57R6/F/1005
R399 200/1005
R400 OPEN-200/1005
R401 200/1005
R402 200/1005
R403 57R6/F/1005
R405 200/1005
R406 57R6/F/1005
R408 103/1005
R409 103/1005
R410 103/1005
R411 103/1005
R412 103/1005
R413 103/1005
R414 103/1005
R415 103/1005
R416 OPEN-103/1005
R417 OPEN-103/1005
C444
106p/10V/2012
4
DA
7
DB
9
DC
12
DD
1
IN
15
EN
VDAC_OUT
C450
OPEN-104p/16V/1005
SC_FB
R440
OPEN-472/1005
RF_CVBS
R407
OPEN_102/1005
C441
104p/16V/1005
+3V3_A
PC_R
PC_G
PC_B
SCART1_G
SCART2_G
COMP_Y
SVHS_C
SCART1_B
SCART2_B
COMP_Pb
SVHS_Y
SCART1_R
SCART2_R
COMP_Pr
SCART1_CVBS
SCART2_CVBS
AV_CVBS
RF_CVBS
PC_HSYNC
PC_VSYNC
SIF
PC_LI
PC_RI
COMP_LI
COMP_RI
CVBS_LI
CVBS_RI
SCART1_LI
SCART1_RI
SCART2_LI
SCART2_RI
C442
106p/10V/2012
SC_FB_SEL
3
+3V3_D +1V2 +3V3_A
MAIN PWB (15/28)
MAIN PWB (19/28)
MAIN PWB (20/28)
MAIN PWB (21/28)
MAIN PWB (19/28)
MAIN PWB (20/28)
MAIN PWB (21/28)
MAIN PWB (19/28)
MAIN PWB (20/28)
MAIN PWB (21/28)
MAIN PWB (19/28)
MAIN PWB (20/28)
MAIN PWB (21/28)
MAIN PWB (1/28)
MAIN PWB (15/28)
MAIN PWB (1/28)
MAIN PWB (15/28)
MAIN PWB (21/28)
MAIN PWB (19/28)
MAIN PWB (20/28)
L385
BLM18PG300SN1D
MAIN PWB (7/28)
BLM18PG300SN1D
106p/10V/2012
+3V3_A
L382
C397
VDAC_OUT
R434 750/F/1005
104p/16V/1005
AUDI_L1
AUDI_R1
AUDI_L2
AUDI_R2
AUDI_L3
AUDI_R3
AUDI_L4
AUDI_R4
AUDI_L5
AUDI_R5
2Vrms
SC1_CVBS_OUT
SC2_CVBS_OUT
+5V
L386
BLM18PG300SN1D
C389
104p/16V/1005
U112I
&MPEG2_ONECHIP FLI10610H
TP382
PCB_TP08
TP383
PCB_TP08
C422
R422 392/1005
R423 392/1005
R424 392/1005
R425 392/1005
R426 392/1005
R427 392/1005
R428 392/1005
R429 392/1005
R430 OPEN-392/1005
R431 OPEN-392/1005
C438 106p/10V/2012
R419 OPEN-750/F/1005
C445 OPEN-106p/10V/2012
R421 OPEN-750/F/1005
C446
104p/16V/1005
C390
104p/16V/1005
1
AJ1
AH1
AJ3
AH3
1
AJ2
AH2
AG5
AH4
R404
182/F/1005
VDAC_OUT
RF_CVBS
C447
106p/10V/2012
2
C391
104p/16V/1005
VDAC_BU_P
VDAC_BU_N
VDAC_GY_YC_P
VDAC_GY_YC_N
VDAC_RV_P
VDAC_RV_N
VDAC_COMP
VDAC_RSET
1
2
3
4
Video 6dB Amplifier
1
L383
BLM18PG300SN1D
C398
106p/10V/2012
AF5
AF6
AE6
C392
104p/16V/1005
U4
U5
AD6
104p/16V/1005
C393
104p/16V/1005
U3
U2
C394
104p/16V/1005
C395
104p/16V/1005
C396
MAIN PWB (20/28)
MAIN PWB (19/28)
R1
R2
T3
T4
R3
R4
R5
R442 000/1005
T1
R443 000/1005
T2
AE1
1
SCART1_LO
SCART1_RO
SCART2_LO
SCART2_RO
TP381 PCB_TP08
HP_L_OUT
HP_R_OUT
HP_MUTE
MAIN PWB (22/28)
C449
104p/16V/1005
SC1_CVBS_OUT
4
DA
7
DB
9
DC
12
DD
1
IN
15
EN
+3V3_A
R438
472/1005
MAIN PWB (7/28)
SC1_SEL
VDAC_AVSS33
AD7
R435
200/1005
R436
200/1005
VDAC_VDD12
VDAC_AVDD33
VDAC_AVDD33
VDAC_AVDD33
VDAC_AVSS33
VDAC_VSS12
AC6
AG4
AUD_AVDD33
AUD_AVDD33
AUD_AVSS33
AUD_AVSS33
AUD_AVSS33
P3
P5
P4
2
S1A
5
S1B
11
S1C
14
S1D
3
S2A
6
S2B
10
S2C
13
S2D
AUD_AVDD33
AUD_OUT1_L
AUD_OUT1_R
AUD_HP_AVDD33
AUD_OUT2_L
AUD_OUT2_R
LS_OUT_SW
AUD_OUT_HP_L
AUD_OUT_HP_R
AUDIO_MUTE
AUD_HP_AVSS33
U1
+5V
U381
16
IDTVS330QG
VCC
GND
8
LS_OUT_L
LS_OUT_R
MAIN PWB (19/28)
U382
IN1
IN2
IN3
VCC
FMS6143
OUT1
OUT2
OUT3
GND
8
7
6
5
R418
000/1005
R420
OPEN-000/1005
C439
220uF/16V/MVK/S
C440
OPEN-220uF/16V/MVK/S
MAIN PWB (20/28)
SC1_CVBSO
SC2_CVBSO
MAIN PWB ASS'Y (12/28)
[Douglas A/V Input]
HU-71100004
All location are from 381 to 450
5
4
3
2
1
lt-19db1bu_0514_10/30_0.0
(No.YA697<Rev.001>)2-29 2-30(No.YA697<Rev.001>)
Page 18
MAIN PWB CIRCUIT DIAGRAM (13/28) [Douglas LVDS Interface]
5
L451
BLM18PG121SN1D
D D
C C
MAIN PWB (6/28)
+3V3_A
C451
106p/10V/2012
L452
BLM18PG121SN1D
C452
104p/16V/1005
C453
104p/16V/1005
U112E
&MPEG2_ONECHIP FLI10610H
AF24
LVTX_VDD33
AE22
LVTX_VDD33
AE21
LVTX_VDD33
AG26
LVTX_PLL_VDD33
AG27
LVTX_VSS
AD21
LVTX_VSS
AD22
LVTX_VSS
AE23
LVTX_VSS
R467
102/F/1005
PWM_DIM
LVTX_ODD_CH0N_DISP23
LVTX_ODD_CH0P_DISP22
LVTX_ODD_CH1N_DISP21
LVTX_ODD_CH1P_DISP20
LVTX_ODD_CH2N_DISP19
LVTX_ODD_CH2P_DISP18
LVTX_ODD_CLKN_DISP17
LVTX_ODD_CLKP_DISP16
LVTX_ODD_CH3N_DISP15
LVTX_ODD_CH3P_DISP14
LVTX_ODD_CH4N_DISP3
LVTX_ODD_CH4P_DISP2
LVTX_ODD_CH5N_DISPCLK
LVTX_ODD_CH5P_DISPDE
LVTX_EVN_CH0N_DISP13
LVTX_EVN_CH0P_DISP12
LVTX_EVN_CH1N_DISP11
LVTX_EVN_CH1P_DISP10
LVTX_EVN_CH2N_DISP9
LVTX_EVN_CH2P_DISP8
LVTX_EVN_CLKN_DISP7
LVTX_EVN_CLKP_DISP6
LVTX_EVN_CH3N_DISP5
LVTX_EVN_CH3P_DISP4
LVTX_EVN_CH4N_DISP1
LVTX_EVN_CH4P_DISP0
LVTX_EVN_CH5N_DISPVS
LVTX_EVN_CH5P_DISPHS
PBIAS
PPWR
PWM_DIM P_DIM
MAIN PWB (3/28)
4
AH29
AJ29
AH28
AJ28
AH27
AJ27
AH26
AJ26
AH25
AJ25
AH24
AJ24
AG29
AG28
AH23
AJ23
AF23
AG23
AH22
AJ22
AF22
AG22
AH21
AJ21
AF21
AG21
AG25
AG24
TP479 PCB_TP08
B21
A21
MAIN PWB (6/28)
R496 OPEN-33/1005
R497 OPEN-330/1005
R498 OPEN-330/1005
R499 OPEN-330/1005
R500 OPEN-330/1005
R501 OPEN-330/1005
R502 OPEN-330/1005
R503 OPEN-330/1005
R504 OPEN-330/1005
R505 OPEN-330/1005
R506 OPEN-330/1005
R507 OPEN-330/1005
R508 OPEN-330/1005
R509 OPEN-330/1005
R510 330/1005
R511 330/1005
R512 330/1005
R513 330/1005
R514 330/1005
R515 330/1005
R516 330/1005
R517 330/1005
R518 330/1005
R519 330/1005
R520 OPEN-330/1005
R521 OPEN-330/1005
R523 OPEN-330/1005
R527 OPEN-330/1005
1
A_DIM
TXA0TXA0+
TXA1TXA1+
TXA2TXA2+
TXACLKTXACLK+
TXA3TXA3+
TXA4-
TXA4+
TP461
TP463
TXB0TXB0+
TXB1TXB1+
TXB2TXB2+
TXBCLKTXBCLK+
TXB3TXB3+
TXB4-
TXB4+
TP475
TP477
PANEL_PWR
1
1
1
1
PCB_TP08
PCB_TP08
PCB_TP08
PCB_TP08
R459
102/1005
3
R492
OPEN-100/1005
R494
OPEN-100/1005
ANA_DIM
C454
106p/10V/2012
R493
OPEN-100/1005
R495
OPEN-100/1005
ANA_DIM
TXA0TXA0+
TXA1TXA1+
TXA2TXA2+
TXACLKTXACLK+
TXA3TXA3+
TXA4TXA4+
TXB0TXB0+
TXB1TXB1+
TXB2TXB2+
TXBCLKTXBCLK+
TXB3TXB3+
TXB4TXB4+
+12V_Module
MAIN PWB (3/28)
+5V_Module
TP481 PCB_TP15
TP455 PCB_TP10
1
TP458 PCB_TP10
1
TP471 PCB_TP10
1
TP472 PCB_TP10
1
TP480
1
2
1
PCB_TP15
TP451 PCB_TP10
1
TP456 PCB_TP10
1
TP452 PCB_TP10
1
TP457 PCB_TP10
1
TP453 PCB_TP10
1
TP454 PCB_TP10
1
TP459 PCB_TP10
1
TP460 PCB_TP10
1
TP462 PCB_TP10
1
TP464 PCB_TP10
1
TP465 PCB_TP10
1
TP466 PCB_TP10
1
TP467 PCB_TP10
1
TP468 PCB_TP10
1
TP469 PCB_TP10
1
TP470 PCB_TP10
1
TP473 PCB_TP10
1
TP474 PCB_TP10
1
TP476 PCB_TP10
1
TP478 PCB_TP10
1
+5V +5V
JP451
12530WS-51L2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
1
LCD PANEL UNIT
[LCD CONTROL PWB]
53
52
R457
B B
BLT_EN
+12V
L456
BLM31PG121SN1L
2
3
R469
MAIN PWB (6/28)
C460
475p/16V/3216
1
IRLML6402TRPBF
Q457
C463
104p/50V
+5V
PANEL CONTROL
Module Power
1
23
C456
104p/50V
Q454
MMBT4401
R463
472/1005
R462
472/1005
C457
475p/16V/3216
1
IRLML6402TRPBF
Q453
C455
106p/25V/3216
A A
R464
PANEL_PWR
103/1005
L453
BLM31PG121SN1L
2
3
C458
104p/50V
+5V_Module
C459
106p/25V/3216
106p/25V/3216
PANEL_PWR
PANEL CONTROL
Module Power
C462
C461
R470
103/1005
104p/50V
1
23
Q456
MMBT4401
472/1005
R471
472/1005
BLT_EN
Backlight on : L
Backlight off : H
+12V_Module
472/1005
C464
106p/25V/3216
R461
103/1005
MAIN PWB ASS'Y (13/28)
[Douglas LVDS Interface]
HU-71100004
1
23
R458
472/1005
Q452
MMBT4401
BL_EN_O
BL_EN_O
MAIN PWB (3/28)
All location are from 451 to 480
5
4
3
2
1
lt-19db1bu_0514_11/30_0.0
2-32(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-31
Page 19
MAIN PWB CIRCUIT DIAGRAM (14/28) [Douglas Power]
+1V2
5
U112K
4
3
2
1
&MPEG2_ONECHIP FLI10610H
D D
C C
B B
+3V3_A
L11
L12
L18
L19
M11
M12
M17
M18
M19
V11
V12
V13
V18
V19
W11
W12
W18
W19
W13
L17
F12
F13
F14
F15
F16
F18
F19
U6
V6
Y6
AA6
AB6
AD8
AD10
AD11
AD12
AD14
AD16
AD17
AD18
W17
W16
W15
W14
V17
V16
V15
V14
U19
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
L13
L14
L15
L16
M13
M14
M15
M16
N11
N12
N13
N14
N15
N16
N17
N18
N19
P11
P12
P13
P14
P15
P16
P17
P18
P19
R11
R12
R13
R14
R15
R16
R17
R18
R19
T11
T12
T13
T14
T15
T16
T17
T18
T19
U11
U12
U13
U14
U15
U16
U17
U18
C481
226p/6.3V/2012
C495
226p/6.3V/2012
+1V2
105p/16V/1005
+3V3_A
105p/16V/1005
105p/16V/1005
C482
105p/16V/1005
C496
MAIN PWB ASS'Y (14/28)
[Douglas Power]
HU-71100004
C483
105p/16V/1005
C497
105p/16V/1005
105p/16V/1005
C484
105p/16V/1005
C498
C485
C499
C487
104p/16V/1005
C486
104p/16V/1005
C501
104p/16V/1005
C500
104p/16V/1005
C488
104p/16V/1005
C502
104p/16V/1005
C489
104p/16V/1005
C503
104p/16V/1005
104p/16V/1005
C491
104p/16V/1005
C490
104p/16V/1005
C505
104p/16V/1005
C504
C493
104p/16V/1005
C494
104p/16V/1005
C492
104p/16V/1005
C507
104p/16V/1005
C508
104p/16V/1005
C506
104p/16V/1005
A A
All location are from 481 to 520
5
4
3
2
1
lt-19db1bu_0514_12/30_0.0
(No.YA697<Rev.001>)2-33 2-34(No.YA697<Rev.001>)
Page 20
MAIN PWB CIRCUIT DIAGRAM (15/28) [VGA INPUT & SPDIF]
5
L521
BLM18AG121SN1D
JP521
D D
C C
B B
D250FD015S116BY
15
8
14
7
13
6
12
5
11
4
10
3
9
2
1
16
17
C527
106p/10V/2012
U522
1
A0
2
A1
3
A2
4
VSS
AT24C08BN-10SU-2.7
PC_Audio
DET_PWR
C528
104p/16V/1005
8
VCC
7
WP
6
SCL
5
SDA
DDC_SCL
VSYNC1
HSYNC1
DDC_SDA
VGA_SCL
VGA_SDA
L522
BLM18AG121SN1D
L523
BLM18AG121SN1D
R540 000/1005
R541 000/1005
1
R531
472/F/1005
+5V
104p/16V/1005
RV523
SV060314B431N
4
D521
3
KDS226
1
D522
3
KDS226
1
D523
3
KDS226
1
C525
L524
BLM18PG121SN1D
R532
472/F/1005
2
2
2
1
3
2
DDC_SCL
DDC_SDA
RV524
SV060314B431N
3
PC_B
R522
750/F/1005
R525
750/F/1005 R526 000/1005
R528
750/F/1005
D524
DAN202K
R533
220/1005
C521
OPEN-100p/50V/1005
C523
OPEN-100p/50V/1005
C524
OPEN-100p/50V/1005
+5VSTB
MAIN PWB (7/28)
PC_G
PC_R
MAIN PWB (12/28)
+5V
R544 000/1005
R545 OPEN-000/1005
VGA_SW(H) : EEPROM<->Douglas
VGA_SW(L) : EEPROM<-->VGA
VGA_SW
R539
103/1005
R524
472/F/1005
HSYNC1
R529
472/F/1005
DET_POWER DET_PWR
1
RV521
SV060305E101N
RV522
SV060305E101N
DET_POWER
R538
472/1005
SW_ON
Q521
MMBT4401
23
C522
OPEN-102p/50V/1005
C526
OPEN-102p/50V/1005
2
U521A
14 7
OPEN-74HC14
12
+5V +5V
U521C
14 7
OPEN-74HC14
56
R530 000/1005
+5V
U521E
14 7
OPEN-74HC14
11 10
13 12
+5V +5V
U521B
14 7
OPEN-74HC14
34
14 7
U521D
98
OPEN-74HC14
+5V
U521F
14 7
OPEN-74HC14
PC_VSYNC VSYNC1
PC_HSYNC
+5V
1
PC_VSYNC
MAIN PWB
(12/28)
PC_HSYNC
C529
104p/16V/1005
2
JP522
THSE-0734T
JP523
RFT6112
A A
1
R
R
3
5
4
L
L
2
Vcc
Vin
GND
SH1
SH2
2
1
3
4
5
R535 4R7
R536 000/1005
C530
104p/16V/1005
R3L
+5V
SPDIF_OUT
L527
CIL10J1R8KNC
L528
CIL10J1R8KNC
MAIN PWB (7/28)
RV525
SV060314B431N
RV526
SV060314B431N
R534
224/1005
PC_RI
MAIN PWB
SW_ON
(12/28)
PC_LI M_SDA
R537
224/1005
VGA_SCL
VGA_SDA
11
10
14
15
9
6
4
U523
S1
S2
S3
E
1Z
2Z
3Z
HEF4053BT
VCC
1Y0
1Y1
2Y0
2Y1
3Y0
3Y1
VEE
GND
16
12
13
2
1
5
3
7
8
DET_POWER
M_SCL
R542 OPEN-000/1005
R543 OPEN-000/1005
DDC_SCL
DDC_SDA
MAIN PWB (5/28)
MAIN PWB (5/28)
MAIN PWB ASS'Y (15/28)
[VGA INPUT and SPDIF]
HU-71100004
All location are from 521 to 550
5
4
3
2
1
lt-19db1bu_0514_13/30_0.0
2-36(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-35
Page 21
MAIN PWB CIRCUIT DIAGRAM (16/28) [HDMI SWITCH]
5
4
3
2
1
TDA9996 4:1 HDMI Switch
U551
TDA9996
HPD1
D D
MAIN PWB (17/28)
C C
MAIN PWB (18/28)
B B
A A
HDMI1VCC
D1SDA
D1SCL
1CK-
1CK+
1D0-
1D0+
1D1-
1D1+
1D2-
1D2+
HPD2
HDMI2VCC
D2SDA
D2SCL
2CK-
2CK+
2D0-
2D0+
2D1-
2D1+
2D2-
2D2+
HPD3
HDMI3VCC
D3SDA
D3SCL
3CK-
3CK+
3D0-
3D0+
3D1-
3D1+
3D2-
3D2+
9
RXA_HPD
10
RXA_5V
11
RXA_DDC_DAT
12
RXA_DDC_CLK
13
RXA_CN
14
RXA_CP
16
RXA_D0N
17
RXA_D0P
19
RXA_D1N
20
RXA_D1P
22
RXA_D2N
23
RXA_D2P
28
RXB_HPD
29
RXB_5V
30
RXB_DDC_DAT
31
RXB_DDC_CLK
32
RXB_CN
33
RXB_CP
35
RXB_D0N
36
RXB_D0P
38
RXB_D1N
39
RXB_D1P
41
RXB_D2N
42
RXB_D2P
58
RXC_HPD
59
RXC_5V
60
RXC_DDC_DAT
61
RXC_DDC_CLK
62
RXC_CN
63
RXC_CP
65
RXC_D0N
66
RXC_D0P
68
RXC_D1N
69
RXC_D1P
71
RXC_D2N
72
RXC_D2P
76
RXD_HPD
77
RXD_5V
78
RXD_DDC_DAT
79
RXD_DDC_CLK
80
RXD_CN
81
RXD_CP
83
RXD_D0N
84
RXD_D0P
86
RXD_D1N
87
RXD_D1P
89
RXD_D2N
90
RXD_D2P
57
CEC
MAIN PWB ASS'Y (16/28)
[HDMI SWITCH]
I2C Address : 0xC0
TDA9996
OUT_DDC_DAT
OUT_DDC_CLK
OUT_CN
OUT_CP
OUT_D0N
OUT_D0P
OUT_D1N
OUT_D1P
OUT_D2N
OUT_D2P
I2C_SDA
I2C_SCL
R12K
INT_HP_CTRL
CDEC_STBY
CDEC_DDC
MODE
TEST
XTAL_OUT
XTAL_IN
VDDC_1V8
VDDC_1V8
VDDC_1V8
VDDC_1V8
VDDC_1V8
VDDH_1V8
VDDH_3V3
VDDH_3V3
VDDH_3V3
VDDH_3V3
VDDH_3V3
VDDH_3V3
VDDH_3V3
VDDH_3V3
VDDO_3V3
VDDC_3V3
VDDS_3V3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
6
5
3
2
100
99
97
96
94
93
49
50
74
53
54
44
47
48
PD
27
25
NC
52
51
8
24
45
91
95
75
15
21
34
40
64
70
82
88
4
46
55
1
7
18
26
37
43
56
67
73
85
92
98
R551 330/1005
R553 330/1005
R555 330/1005
R556 330/1005
R558 330/1005
R559 330/1005
R561 330/1005
R562 330/1005
R563 330/1005
R564 330/1005
R575 000/1005
R577 000/1005
R579 123/1005
C564 104p/16V/1005
C565 104p/16V/1005
R599 000/1005
PD_RESET
1
TP552
PCB_TP08
TP553
1
PCB_TP08
C569
104p/16V/1005
104p/16V/1005
C575
104p/16V/1005
106p/10V/2012
C570
+3V3_D
C587
AHDMI_SDA
AHDMI_SCL
ATXCATXC+
ATX0ATX0+
ATX1ATX1+
ATX2ATX2+
+3V3H
AHPD
C571
104p/16V/1005
C576
104p/16V/1005
C582
104p/16V/1005
TP554
PCB_TP10
1
FLI_SDA1
FLI_SCL1
MAIN PWB (7/28)
+5V
C590
104p/16V/1005
C572
104p/16V/1005
C577
104p/16V/1005
104p/16V/1005
U552
LD1117AL-ADJ
3
VIN
MAIN PWB
(5/28),(6/28),(22/28)
+1V8H
C573
106p/10V/2012
C578
104p/16V/1005
C583
TAP
ADJ
1
104p/16V/1005
TP555
PCB_TP10
2
VO
4
C584
1
+1V2
+3V3_A
C574
106p/10V/2012
L551
BLM18PG300SN1D
106p/10V/2012
L552
BLM18PG300SN1D
106p/10V/2012
MAIN PWB (5/28),(18/28)
C580
106p/10V/2012
C579
104p/16V/1005
C585
104p/16V/1005
R604
121/F/1005
R605
560/F/1005
C588
106p/10V/2012
C551
C558
+3V3H
C586
106p/10V/2012
+1V8H
+1.833V
C589
104p/16V/1005
+3V3H
C552
104p/16V/1005
C559
104p/16V/1005
ATXCATXC+
ATX0ATX0+
ATX1ATX1+
ATX2ATX2+
AHPD
AHDMI_SDA
AHDMI_SCL
CEC_A
R554 472/1005
R557 472/1005
R560 472/1005
C553
104p/16V/1005
C560
104p/16V/1005
R593 330/1005
R600
OPEN-000/1005
AHDMI_SDA
AHDMI_SCL
AHPD
C554
104p/16V/1005
C561
104p/16V/1005
U112J
&MPEG2_ONECHIP FLI10610H
A10
DVI_ARXCM
B10
DVI_ARXCP
A9
DVI_ARX0M
B9
DVI_ARX0P
A8
DVI_ARX1M
B8
DVI_ARX1P
A7
DVI_ARX2M
B7
DVI_ARX2P
B11
HDMI_AHPD
D12
2WIRE_S1_SDA
C12
2WIRE_S1_SCL
A11
HDMI_CEC
A6
DVI_BRXCM
B6
DVI_BRXCP
A5
DVI_BRX0M
B5
DVI_BRX0P
A4
DVI_BRX1M
B4
DVI_BRX1P
A3
DVI_BRX2M
B3
DVI_BRX2P
C11
HDMI_BHPD
E11
2WIRE_S2_SDA
D11
2WIRE_S2_SCL
C555
103p/50V/1005
C562
103p/50V/1005
HDMI_VDDA33
HDMI_VDDA33
HDMI_VDDA33
HDMI_VDDA33
HDMI_VDDA33
HDMI_VDD12
HDMI_VDD12
HDMI_VDD12
HDMI_VDD12
ADC_VDD12
ADC_VDD12
ADC_VDD12
ADC_GND12
ADC_GND12
ADC_GND12
HDMI_GNDA
HDMI_GNDA
HDMI_GNDA
HDMI_GNDA
HDMI_GNDA
HDMI_GNDA
HDMI_GNDA
HDMI_GNDA
HDMI_GNDA
C556
103p/50V/1005
C563
103p/50V/1005
DVI_REXT
C4
D5
D6
E6
E7
D9
D10
E8
E9
E10
A1
B2
C3
D4
E5
F6
A2
C5
C6
C7
C8
C9
C10
D7
D8
C557
103p/50V/1005
R590
2490/F/1005
All location are from 551 to 620
HU-71100004
5
4
3
2
1
lt-19db1bu_0514_14/30_0.0
(No.YA697<Rev.001>)2-37 2-38(No.YA697<Rev.001>)
Page 22
MAIN PWB CIRCUIT DIAGRAM (17/28) [REAR HDMI INPUT]
5
D D
4
3
2
1
HDMI1_INPUT HDMI2_INPUT
JP621
FW05050-21
18
16
14
12
22
23
24
25
26
C C
SH1
SH2
SH3
SH4
SH5
10
8
6
4
2
19
17
15
13
11
9
7
5
3
1
D2_SHIELD
D1_SHIELD
D0_SHIELD
CK_SHIELD
CE_REMOTE
DDC_CLK
DDC_DATA
FOOSUNG
D2+
D2-
D1+
D1-
D0+
D0-
CK+
CK-
GND
+5V
HP_DET
Dummy1
Dummy2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
NC
15
16
17
18
19
20
21
DDC1_SCL
DDC1_SDA
HDMI1_PWR
HP1_DET
R633
OPEN-102/1005
1D2+
1D21D1+
1D11D0+
1D01CK+
1CKHDMI_CEC HDMI_CEC
MAIN PWB (16/28)
22
23
24
MAIN PWB (18/28) MAIN PWB (18/28)
25
26
SH1
SH2
SH3
SH4
SH5
18
16
14
12
10
8
6
4
HPD1
MAIN PWB (16/28)
2
FOOSUNG
19
17
15
13
11
9
7
5
3
1
JP622
FW05050-21
D2+
D2_SHIELD
D1+
D1_SHIELD
D0+
D0_SHIELD
CK+
CK_SHIELD
CK-
CE_REMOTE
DDC_CLK
DDC_DATA
GND
+5V
HP_DET
Dummy1
Dummy2
D2-
D1-
D0-
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
TP621 PCB_TP10
1
DDC2_SCL
DDC2_SDA
HDMI2_PWR
HP2_DET
2D2+
2D22D1+
2D12D0+
2D02CK+
2CK-
R634
OPEN-102/1005
MAIN PWB (16/28)
HPD2
MAIN PWB (16/28)
L621
HDMI1_PWR
B B
DDC1_SCL
DDC1_SDA
R635 220/1005
R636 220/1005
BLM18PG300SN1D
C621
106p/16V/2012
HDMI1VCC HDMI2VCC
C622
104p/16V/1005
HDMI1VCC HDMI2VCC
R629
473/1005
R630
473/1005
D1SCL
D1SDA
D1SCL
D1SDA
MAIN PWB (16/28) MAIN PWB (16/28)
DDC2_SCL
HDMI2_PWR
R637 220/1005
R638 220/1005
L622
BLM18PG300SN1D
C623
106p/16V/2012
R631
473/1005
HDMI2VCC HDMI1VCC
C624
104p/16V/1005
R632
473/F/1005
D2SCL
D2SDA DDC2_SDA
D2SCL
D2SDA
MAIN PWB ASS'Y (17/28)
A A
[REAR HDMI INPUT]
HU-71100004
All location are from 621 to 650
5
4
3
2
1
lt-19db1bu_0514_15/30_0.0
2-40(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-39
Page 23
MAIN PWB CIRCUIT DIAGRAM (18/28) [SIDE HDMI INPUT]
5
D D
C C
HDMI3_INPUT
JP651
OPEN
23
SHIELD4
22
21
20
SHIELD3
SHIELD2
SHIELD1
CE_REMOTE
HP_DET
+5V
GND
DDC_DATA
DDC_CLK
CK-
CK_SHIELD
CK+
D0-
D0_SHIELD
D0+
D1-
D1_SHIELD
D1+
D2-
D2_SHIELD
D2+
19
HDMI3_PWR
18
17
DDC3_SDA
16
DDC3_SCL
15
14
NC
HDMI_CEC
13
12
11
10
9
8
7
6
5
4
3
2
1
4
R652 OPEN-102/1005
HPD3
HDMI_CEC
3CK-
3CK+
3D0-
3D0+
3D1-
3D1+
3D2-
3D2+
MAIN PWB (16/28)
MAIN PWB (17/28)
MAIN PWB (16/28)
3
TP1201
PCB_TP10
C1200
106p/16V/2012
1
C1201
104p/16V/1005
3
2
U1201
LD1117AL-ADJ
VO
VIN
TAP
ADJ
1
+3V5_STB
2
4
TP1202
PCB_TP10
1
R1201
111/F/1005
R1202
201/F/1005
C1202
106p/10V/2012
+3V5_STB +5VSTB
C1203
104p/16V/1005
1
R659
473/1005
1 2
D651
BAS316
Q652
BSS83
4
321
Q653
MMBT4401
+5VSTB
R657
683/F/1005
1
23
CEC_A HDMI_CEC
R660 101/1005
MAIN PWB (5/28),(16/28)
CEC_O
MAIN PWB (5/28)
HDMI3VCC
HDMI3_PWR
B B
DDC3_SCL
DDC3_SDA
A A
R656 OPEN-220/1005
R658 OPEN-220/1005
L651
OPEN-BLM18PG300SN1D
OPEN-106p/16V/2012
C651
R654
OPEN-473/1005
MAIN PWB ASS'Y (18/28)
HDMI3VCC
R655
OPEN-473/1005
HDMI3VCC
C653
OPEN-104p/16V/1005
D3SCL
D3SDA
MAIN PWB (16/28)
MAIN PWB (16/28)
MAIN PWB (17/28)
R653 220/1005
All location are from 651 to 660
[SIDE HDMI INPUT]
HU-71100004
5
4
3
2
1
lt-19db1bu_0514_16/30_0.0
(No.YA697<Rev.001>)2-41 2-42(No.YA697<Rev.001>)
Page 24
MAIN PWB CIRCUIT DIAGRAM (19/28) [SCART1]
5
JP661
D D
R/CHROMA
TSSM-0741-21(STRAIGHT)
8Pin(Function Select/Slow Switching)
9.5V ~ 12V --> 4:3 Mode
4.5V ~ 7V -->16:9 Mode
0V ~ 2V --> TV Mode
C C
16Pin(RGB Control/Fast Blanking)
1V ~ 3V -->RGB Mode
0V ~ 0.4V -->CVBS Mode
GND
CVBSI
C/LUMA
GND(R)
GND(V)
RGBC
GND(D)
GND(R)
DATA1
GREEN
DATA2
GND(G)
FNS
BLUE
AIL
GND(B)
GND(A)
AOL
AIR
AOR
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
SCART1_LO
SC1_RED
SC1_GREEN
SC1_BLUE
SC1_LI
SC1_LO
SC1_RI
SC1_RO
C671
10uF/16V/MVK/S
RV661
SV060305E101N
RV663
SV060305E101N
RV665
SV060314B431N
R682 153/F/1005
MAIN PWB (12/28)
SCART1_RO
C675
10uF/16V/MVK/S
R686 153/F/1005
4
R662
750/F/1005
R681
683/F/1005
OPAMP_P
R687
683/F/1005
R664 620/F/1005
R665 000/1005
R668 303/1005
C670
100p/50V/1005
2
-
3
+
6
-
5
+
C676
100p/50V/1005
8 4
U662
TL072CD
3
SC1_RED
SCART1_CVBS
2
RV662
SV060305E101N
R663
750/F/1005
C661
OPEN-331p/50V/1005
1
SCART1_R
MAIN PWB (12/28)
SC1_FB
R666
750/F/1005
SC1_CVBSO
SC1_GREEN
SC1_BLUE
RV664
SV060305E101N
R667
750/F/1005
C662
OPEN-331p/50V/1005
SCART1_G
SCART1_B
MAIN PWB
(12/28)
SCART1_ID
R669
103/1005
1
7
SCART Mode Detection
Attenuation = 10K/(10K+30K) = 0.25
C668
104p/50V
C669
106p/25V/3216
SC1_L_OUT_O
SC1_R_OUT_O
MAIN PWB (7/28)
L664
BLM18PG300SN1D
SC1_LO
+12V
RV669
SV060314B431N
L663
CIL21J1R8KNE
SC1_LI
SC1_RI
R683
224/1005
RV666
SV060305E101N
L661
CIL21J1R8KNE
RV667
SV060314B431N
L662
CIL21J1R8KNE
RV668
SV060314B431N
C672
102p/50V/1005
R680 101/1005
C667
10uF/16V/MVK/S
R670
750/F/1005
C664
102p/50V/1005
C665
102p/50V/1005
R674
224/1005
R677
224/1005
SC1_L_OUT_O
C663
OPEN-331p/50V/1005
SCART1_LI
SCART1_RI
SC1_RO
B B
+5VSTB
R689
(3/28),(5/28),(22/28)
MAIN PWB
MAIN PWB (5/28)
A A
AC_DETECT
Scart_Mute
473/1005
R694
103/1005
R688
103/1005
1
R690
103/1005
Q661
MMBT4401
23
1
MAIN PWB ASS'Y (19/28)
R691
103/1005
R695
103/1005
Q662
MMBT4401
23
Q663
2 3
MMBT4403
1
R692
102/1005
R693
102/1005
Scart2_Mute
MAIN PWB (20/28),(22/28)
2
KTD1304
13
Q664
2
[SCART1]
L665
CIL21J1R8KNE
RV670
SV060314B431N
Q665
KTD1304
13
R685
224/1005
C666
47uF/25V/BLA/S
+12V
C674
102p/50V/1005
R678
332/F/1005
OPAMP_P
R679
332/F/1005
R684 101/1005
C673
10uF/16V/MVK/S
OPAMP_P
R671
4021/F/1005
R675
162/F/1005
MAIN PWB (20/28)
SC1_FB
SC1_R_OUT_O
3
+
+
2
-
-
C678
104p/50V
+3V3_A +3V3_A
C677
8 4
1
U661A
LM393MX
R672
103/1005
104p/16V/1005
FB1
MAIN PWB (12/28)
Comparator for trigerring
on 0.94V Fast Blank Signal
HU-71100004
All location are from 661 to 700
5
4
3
2
1
lt-19db1bu_0514_17/30_0.0
2-44(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-43
Page 25
MAIN PWB CIRCUIT DIAGRAM (20/28) [SCART2]
5
8Pin(Function Select/Slow Switching)
9.5V ~ 12V --> 4:3 Mode
4.5V ~ 7V -->16:9 Mode
0V ~ 2V --> TV Mode
16Pin(RGB Control/Fast Blanking)
1V ~ 3V -->RGB Mode
0V ~ 0.4V -->CVBS Mode
D D
RV701
JP701 OPEN
R/CHROMA
C C
OPEN-10uF/16V/MVK/S
SCART2_LO
GND
CVBSI
C/LUMA
GND(R)
GND(V)
RGBC
GND(D)
GND(R)
DATA1
GREEN
DATA2
GND(G)
FNS
BLUE
AIL
GND(B)
GND(A)
AOL
AIR
AOR
C711
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
OPEN-153/F/1005
SC2_RED
SC2_GREEN
SC2_BLUE
SC2_LI
SC2_LO
SC2_RI
SC2_RO
R721
MAIN PWB (19/28)
OPEN-SV060305E101N
RV703
OPEN-SV060305E101N
RV705
OPEN-SV060314B431N
R719
OPEN-683/F/1005
OPAMP_P
C710
OPEN-100p/50V/1005
4
R702
OPEN-750/F/1005
R704 OPEN-720/F/1005
R705 OPEN-000/1005
R708 OPEN-303/1005
U663
OPEN-TL072CD
8 4
2
-
-
3
+
+
3
SC2_RED
SCART2_CVBS
SC2_GREEN
MAIN PWB (12/28)
SC2_CVBSO
SC2_FB
R706
OPEN-750/F/1005
SCART2_ID
R709
OPEN-103/1005
C707
OPEN-104p/50V
1
SC2_L_OUT_O
SCART Mode Detection
Attenuation = 10K/(10K+30K) = 0.25
L703
OPEN-BLM18PG300SN1D
C708
OPEN-106p/25V/3216
MAIN PWB (7/28)
+12V
SC2_BLUE
SC2_LI
SC2_RI
L701
OPEN-CIL21J1R8KNE
RV707
OPEN-SV060314B431N
L702
OPEN-CIL21J1R8KNE
RV708
OPEN-SV060314B431N
2
RV702
OPEN-SV060305E101N
RV704
OPEN-SV060305E101N
RV706
OPEN-SV060305E101N
R703
OPEN-750/F/1005
R707
OPEN-750/F/1005
R710
OPEN-750/F/1005
C704
OPEN-102p/50V/1005
C705
OPEN-102p/50V/1005
C701
OPEN-331p/50V/1005
C702
OPEN-331p/50V/1005
C703
OPEN-331p/50V/1005
R714
OPEN-224/1005
R717
OPEN-224/1005
SCART2_R
SCART2_G
SCART2_B
SCART2_LI
SCART2_RI
1
MAIN PWB
(12/28)
MAIN PWB
(12/28)
R724
SCART2_RO
B B
R712
OPEN-4021/F/1005
SC2_FB
A A
R715
OPEN-162/F/1005
C714
OPEN-10uF/16V/MVK/S
5
6
C716
OPEN-104p/50V
OPEN-153/F/1005
+3V3_A
8 4
+
+
7
-
-
U661B
LM393MX
Comparator for trigerring
on 0.94V Fast Blank Signal
R725
OPEN-683/F/1005
R713
OPEN-103/1005
FB2
MAIN PWB
(12/28)
C715
OPEN-100p/50V/1005
6
-
-
5
+
+
MAIN PWB
(19/28),(22/28)
7
Scart2_Mute
SC2_R_OUT_O
R730
OPEN-102/1005
R731
OPEN-102/1005
2
Q704
OPEN-KTD1304
13
Q705
2
OPEN-KTD1304
13
SC2_LO
SC2_RO
L704
OPEN-CIL21J1R8KNE
RV709
OPEN-SV060314B431N
L705
OPEN-CIL21J1R8KNE
RV710
OPEN-SV060314B431N
R718 OPEN-101/1005
R722 OPEN-101/1005
R720
OPEN-224/1005
R723
OPEN-224/1005
C709
OPEN102p/50V/1005
C713
OPEN-1
02p/50V/1005
C706
OPEN-10uF/16V/MVK/S
C712
OPEN-10uF/16V/MVK/S
MAIN PWB ASS'Y (20/28)
[SCART2]
HU-71100004
SC2_L_OUT_O
SC2_R_OUT_O
All location are from 701 to 740
5
4
3
2
1
lt-19db1bu_0514_18/30_0.0
(No.YA697<Rev.001>)2-45 2-46(No.YA697<Rev.001>)
Page 26
MAIN PWB CIRCUIT DIAGRAM (21/28) [Component In & Side A/V In]
5
D D
R741 OPEN-000/1005
Z741
ZMMC5V6
JP741
TPSS-0738-3(STRAIGHT)
Y
Pb
C C
Pr
1
2
3
4
5
6
7
8
9
1 2
R746 OPEN-000/1005
R749 OPEN-000/1005
Z742
ZMMC5V6
12
4
RV743
SV060305E101N
RV744
SV060305E101N
R743
750/F/1005
R748
750/F/1005
COMP_Y
COMP_Pb
COMP_Pr
MAIN PWB (12/28)
3
2
RV741
SV060305E101N
R744
750/F/1005
1
SVHS_C
MAIN PWB (12/28)
5
6
7
8
JP742
SGND
SGND
SGND
SGND
DUAE-9619
GND
GND
4
C
3
Y
1
2
RV742
SV060305E101N
R747
750/F/1005
SVHS_Y
R750
750/F/1005
JP743
IJBH3-SYNPH
CVBS
JP744
TPSE-0604-2
RED(R)
B B
White(L)
A A
1
2
3
4
5
L742
BLM11B470SB
L744
BLM11B470SB
RV747
SV060314B431N
RV748
SV060314B431N
R755
224/1005
R757
224/1005
COMP_RI
AL
AR
MAIN PWB (12/28)
COMP_LI
MAIN PWB ASS'Y (21/28)
1
2
3
4
5
6
7
8
9
RV745
SV060305E101N
L741
CIL21J1R8KNE
RV746
SV060314B431N
L743
CIL21J1R8KNE
RV749
SV060314B431N
C741
102p/50V/1005
C742
102p/50V/1005
R752
750/F/1005
R754
224/1005
R758
224/1005
AV_CVBS
CVBS_LI
CVBS_RI
MAIN PWB (12/28)
All location are from 741 to 760
[Component In and Side A/V In]
HU-71100004
5
4
3
2
1
lt-19db1bu_0514_19/30_0.0
2-48(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-47
Page 27
MAIN PWB CIRCUIT DIAGRAM (22/28) [Audio AMP & HP AMP]
1
MAIN AMP
+3V3_A
L761
C793
102p/50V/1005
R778
332/F/1005
U763
LD1117AL-ADJ
3
VIN
BLM18PG300SN1D
C772
106p/10V/2012
C778
104p/16V/1005
LFM
2
VO
4
TAP
ADJ
1
R779
121/F/1005
R780
560/F/1005
R767
472/1005
R770
472/1005
TP762
PCB_TP10
+1.833V
1
U762
OPEN-ELM7S08
1
A
2
B
3
GND
R773 000/1005
L764
BLM18PG300SN1D
L765
BLM18PG300SN1D
L766
BLM18PG300SN1D
C803
106p/10V/2012
VCC
MAIN PWB (3/28),(5/28),(19/28)
D D
MAIN PWB (7/22)
I2S_OUT_MCLK
AVDD_PLL
C C
B B
C791
101p/50V/1005
+3V3_A
C802
104p/16V/1005
TP763
PCB_TP10
1
2
C769
AMP_3.3V
103p/50V/1005
MAIN PWB (5/22)
5
A_RESET
4
Y
AVDD_PLL
C790
106p/10V/2012
DVDD_PLL
C796
106p/10V/2012
DVDD
C798
106p/10V/2012
C780
102p/50V/1005
C792
104p/16V/1005
C797
104p/16V/1005
C799
104p/16V/1005
MAIN PWB
(7/28)
MAIN PWB (5/28),(6/28),(16/28)
+12V
R761
3R3
R765
101/1005
AMP_3.3V
C785
104p/16V/1005
I2S_OUT_DAT
I2S_OUT_WS
I2S_OUT_CLK
FLI_SDA1
FLI_SCL1
AC_DETECT
C761
104p/50V
C773 223p/50V
C776 105p/25V
AVDD_PLL
DVDD_PLL
470uF/25V/BXE/S
C762
105p/50V/3216
LFM
R802 220/1005
R806 220/1005
R807 220/1005
AC_DETECT
C764
1
2
3
4
5
6
7
8
9
10
11
12
13
14
3
BST1A
VDR1A
/RESET
AD
VSS_IO
CLK_I
CLK_O
VDD_IO
DGND_PLL
AGND_PLL
LFM
AVDD_PLL
DVDD_PLL
VSS
55
57
PGND1A56PGND1A
PAD_GND
DVSS15DVDD16SDATA17WCK18BCK19SDA20SCL21PWM_3B/PWM_HP2
DVDD
R781 000/1005
R782 000/1005
C804 OPEN-330p/50V/1005
C805 OPEN-330p/50V/1005
R783 473/1005
C806 102p/50V/1005
R784 OPEN-000/1005
53
OUT1A54OUT1A
PVDD1A52PVDD1A51PVDD1B50PVDD1B
49
U761
AMP NTP-3000A
22
23
TP761
PCB_TP10
OUT1B48OUT1B
PWM_3A/PWM_HP1
4
C766
223p/50V
C767
105p/25V
47
45
PGND1B46PGND1B
PROTECT24FAULT25VDR2B26BST2B27PGND2B
1
C800
105p/25V
R801 OPEN-102/1005
Address:0x54
44
43
BST1B
VDR1B
VDR2A
BST2A
PGND2A
PGND2A
OUT2A
OUT2A
PVDD2A
PVDD2A
PVDD2B
PVDD2B
OUT2B
OUT2B
PGND2B
28
C801
223p/50V
R800
OPEN-102/1005
C819
OPEN-472p/50V/1005
NC
42
C777 105p/25V
41
C779 223p/50V
40
39
38
37
36
105p/50V/3216
35
34
33
32
31
30
29
C786
OPEN-MBRS130L3
OPEN-MBRS130L3
OPEN-MBRS130L3
+12V
C788
470uF/25V/BXE/S
C787
104p/50V
C820
OPEN-472p/50V/1005
5
D761
12
C768
391p/50V
C771
1 2
391p/50V
D762
D763
12
C783
391p/50V
1 2
C789
391p/50V
D764
OPEN-MBRS130L3
R804 OPEN-102/1005
R805 OPEN-102/1005
C821
OPEN-472p/50V/1005
R762
5R6/F
R768
5R6/F
R771
5R6/F
R776
5R6/F
AMP_RAMP_R+
AMP_LAMP_L+
L762
COIL(15UH)
AD-8580
34
12
L763
COIL(15UH)
AD-8580
34
12
HP_L_OUT
C822
OPEN-472p/50V/1005
JP761
SMW200-04
1
2mm
2mm
2
3
4
HP_R_OUT
104p/50V
C770
474p/50V/2012
C774
104p/50V
C781
104p/50V
C784
474p/50V/2012
C794
104p/50V
C765
SPEAKER
6
AMP_L+
C763
R763
103p/50V/1005
472
R764
3R3
R769
R766
472
3R3
C775
103p/50V/1005
AMP_LAMP_R+
C782
103p/50V/1005
R772
472
R774
3R3
R775
R777
3R3
472
C795
103p/50V/1005
AMP_R-
HEADPHONE AMP
+5V
C811
OPEN-103p/50V/1005
R789
OPEN-103/1005
R791
AC_DETECT
MAIN PWB (12/22)
HP_MUTE
A A
R809
OPEN-103/1005
OPEN-473/F/1005
OPEN-MMBT4401
+5VSTB
R797
OPEN-103/1005
1
Q764
OPEN-MMBT4401
23
1
Q762
1
Q761
OPEN-IRLML6402TRPBF
23
+5VSTB
R799
OPEN-102/1005
1
23
All location are from 761 to 830
1
R803
2
000/1005
3
R798
OPEN-103/1005
Q763
OPEN-MMBT4401
MAIN PWB (12/28)
R787
HP_L_OUT HEADPHONE_ID
HP_R_OUT
R808
000/1005
HP_R_OUT
2
C807
105p/25V
C815
105p/25V
R786
103/F/1005
C812
105p/25V
R792
103/F/1005
L769
BLM18PG300SN1D
U764
TPA6110A2DGN
1
BYPASS
2
GND
3
Shutdown
4
IN2-
R796
222/F/1005
MAIN PWB (19/28),(20/28)
3
IN1Vo1
VDD
Vo2
GND
9
C817
106p/10V/2012
8
7
6
5
Scart2_Mute
R785
473/F/1005
R795
473/F/1005
C818
105p/25V
C810 47uF/16V/MVK/S
C813 47uF/16V/MVK/S
R732
102/1005
R733
102/1005
2
13
2
4
KTD1304
R793
103/1005
Q706
Q707
KTD1304
13
HPO_L HP_L_OUT
HPO_R
R794
103/1005
220/1005
R790
220/1005
L767
CIL10J1R8KNC
C809
223p/16V/1005
L768
CIL10J1R8KNC
C814
223p/16V/1005
96
8
7
2
10
11
3
1
JP762
IJA03
5
4
MAIN PWB ASS'Y (22/28)
[Audio AMP and HP AMP]
HU-71100004
5
R788
000/1005
MAIN PWB (7/28)
6
lt-19db1bu_0514_20/30_0.0
(No.YA697<Rev.001>)2-49 2-50(No.YA697<Rev.001>)
Page 28
MAIN PWB CIRCUIT DIAGRAM (23/28) [RS232]
1
A A
TA
MAIN PWB (5/28)
RA
RA
C831
104p/50V
C834
2
3
4
5
6
JP831
THSE-0734T
1
R
R
3
5
4
L
L
2
11
10
12
9
1
3
4
5
U831
T1IN
T2IN
R1O
R2O
C1+
C1C2+
C2-
ILX232
T1O
T2O
R1IN
R2IN
VCC
GND
V+
14
7
13
8
16
15
2
6
V-
R831 101/1005
R832 101/1005
C832
104p/50V
+5VSTB
C833
106p/16V/2012
RV831
SV060314B431N
TXD_PC TA
RXD_PC
RV832
SV060314B431N
C835
104p/50V
104p/50V
B B
+5VSTB
C C
R834
472/1005
32
Q831
FDV301N_NL
32
Q832
TA
MICOM OTA Option
RA
R833
472/1005
R837 000/1005
R838 OPEN-000/1005
R839 OPEN-000/1005
R840 000/1005
FDV301N_NL
D D
+3V3_A +3V3_A
R835
1
472/1005
1
MAIN PWB ASS'Y (23/28)
R836
472/1005
UART1_TX
MAIN PWB (6/28)
UART1_RX
Douglas_UART
[RS232]
HU-71100004
All location are from 831 to 850
1
2
3
4
5
6
lt-19db1bu_0514_21/30_0.0
2-52(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-51
Page 29
MAIN PWB CIRCUIT DIAGRAM (24/28) [TS Switch]
1
A A
MAIN PWB (26/28)
TS0_DATA from TER
TS0_DATA[7..0]
TS0_DATA0
TS0_DATA1
TS0_DATA2
TS0_DATA3
TS0_DATA4
TS0_DATA5
TS0_DATA6
TS0_DATA7
SEL_TS0
TS1_DATA from SATELLITE
MAIN PWB (28/28)
B B
TS1_DATA[7..0]
TS1_DATA0
TS1_DATA1
TS1_DATA2
TS1_DATA3
TS1_DATA7
TS1_DATA6
TS1_DATA5
TS1_DATA4
SEL_TS1
2
U851
SN74LVC244APWR
2
1A1
4
1A2
6
1A3
8
1A4
11
2A1
13
2A2
15
2A3
17
2A4
1
1G
19
2G
U852
SN74LVC244APWR
2
1A1
4
1A2
6
1A3
8
1A4
11
2A1
13
2A2
15
2A3
17
2A4
1
1G
19
2G
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
+5V
DGND
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
+5V
DGND
3
4
5
6
DTT ONLY MODEL OPTION
TSI_D0
18
TSI_D1
16
TSI_D2
14
TSI_D3
12
TSI_D4
9
TSI_D5
7
TSI_D6
5
TSI_D7
3
20
10
18
16
14
12
9
7
5
3
20
10
+3V3_D
C851
104p/16V/1005
+3V3_D
C852
104p/16V/1005
R851 101/1005
R852 101/1005
R853 101/1005
R854 101/1005
R855 101/1005
R856 101/1005
R857 101/1005
R858 101/1005
MUX_TSI_D0
MUX_TSI_D1
MUX_TSI_D2
MUX_TSI_D3
MUX_TSI_D4
MUX_TSI_D5
MUX_TSI_D6
MUX_TSI_D7
MUX_TSI_D0
MUX_TSI_D1
MUX_TSI_D2
MUX_TSI_D3
MUX_TSI_D4
MUX_TSI_D5
MUX_TSI_D6
MUX_TSI_D7
MAIN PWB (8/28)
TS0_DATA0
TS0_DATA1
TS0_DATA2
TS0_DATA3
TS0_DATA4
TS0_DATA5
TS0_DATA6
TS0_DATA7
TS0_CLK
TS0_STR
TS0_VLD
PR851
OPEN-000*4/1005
PR852
OPEN-000*4/1005
PR853
OPEN-000*4/1005
TP851 PCB_TP08
TP852 PCB_TP08
TP853 PCB_TP08
TP854 PCB_TP08
45
36
27
18
45
36
27
18
45
36
27
18
1
1
1
1
AH7
AH6
AJ6
AJ7
AJ5
W3
W2
W1
TSI_D0
TSI_D1
TSI_D2
TSI_D3
TSI_D4
TSI_D5
TSI_D6
TSI_D7
TSI_CLK
TSI_SYNC
TSI_VAL
U112H
&MPEG2_ONECHIP FLI10610H
CDI_CLK
CDI_VALID
CDI_SYNC
CDI_D0
CDI_ERROR
OOB_DRX
OOB_CRX
OOB_CTX
U853
SN74LVC244APWR
TS0_CLK
MAIN PWB (26/28)
C C
D D
MAIN PWB (28/28)
TS0_STR
TS0_VLD
TS1_STR
TS1_VLD
TS1_CLK
SEL_TS0
SEL_TS1
2
1A1
4
1A2
6
1A3
8
1A4
11
2A1
13
2A2
15
2A3
17
2A4
1
1G
19
2G
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
+5V
DGND
TSI_CLK
18
TSI_SYNC
16
TSI_VAL
14
12
9
7
5
3
20
10
104p/16V/1005
+3V3_D +3V3_D
C853
R864
103/1005
23
1
Q851
MMBT4401
R866
103/1005
R861 100/1005
R862 100/1005
R863 100/1005
R865
472/1005
TS_SEL
MUX_TSI_CLK
MUX_TSI_SYNC
MUX_TSI_VAL
MAIN PWB (7/28)
MUX_TSI_CLK
MUX_TSI_SYNC
MUX_TSI_VAL
MAIN PWB (8/28)
MAIN PWB ASS'Y (24/28)
[TS Switch]
HU-71100004
All location are from 851 to 880
1
2
3
4
5
6
lt-19db1bu_0514_22/30_0.0
(No.YA697<Rev.001>)2-53 2-54(No.YA697<Rev.001>)
Page 30
MAIN PWB CIRCUIT DIAGRAM (25/28) [CHANNEL POWER]
1
A A
2
3
4
5
DVB-T+C POWER
QPSK POWER
U881
LD29150PT/P-PAK 5P
5
MAX 1.5A
TP765
PCB_TP08
1
R881
3092/F/1005
R883
103/F/1005
C885
101p/50V/1005
C886
106p/16V/2012
+5VTA
C890
104p/16V/1005
+5.03V
MAX 490mA
[TUNER : FQD1116]
ANT_PWR : 100mA
VP_TUN : 230mA
+5V_IF : 160mA
C884
106p/16V/2012
/INH1VIN2GND3VOUT4ADJ
C881
SMPS_ON
+5V4STB
TP764
PCB_TP10
C882
104p/16V/1005
1
MAIN PWB (3/28)
B B
106p/16V/2012
GND
6
C883
OPEN-105p/16V/1005
TP769
PCB_TP08
1
C888
104p/16V/1005
U882
LD1117AL-ADJ
3
VIN
TAP
ADJ
1
TP770
PCB_TP08
1
2
VO
4
R882
121/F/1005
R884
201/F/1005
C891
106p/10V/2012
+3V3_TS +5V
C892
104p/16V/1005
[DVB-T DEMOD : TDA10048]
+3V3DT : 78mA
+1V2DT : 82mA
TP766
PCB_TP08
+5V +1V2DT +3V3DT
C C
C897
104p/16V/1005
D D
1
U883
LD1117AL-ADJ
VIN3VO
TAP
ADJ
1
2
4
TP767
PCB_TP08
1
MAX 330mA
R885
121/F/1005
R887
201/F/1005
C898
106p/10V/2012
U884
LD1117AL-1.2/SOT-223
VIN3VO
C899
104p/16V/1005
TP768
PCB_TP08
1
2
4
TAP
ADJ
1
C895
226p/6.3V/2012
C896
104p/16V/1005
MAIN PWB ASS'Y (25/28)
TP771
PCB_TP08
+3V3_TS
1
U885
LD1117AL-ADJ
3
VIN
TAP
ADJ
1
TP772
PCB_TP08
2
VO
1
4
R886
121/F/1005
R888
560/F/1005
C893
226p/6.3V/2012
+1V8_CH
C894
104p/16V/1005
+1.833V
[CHANNEL POWER]
All location are from 881 to 920
HU-71100004
1
2
3
4
5
lt-19db1bu_0514_23/30_0.0
2-56(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-55
Page 31
MAIN PWB CIRCUIT DIAGRAM (26/28) [OFDM Demodulator]
1
+3V3DT
R961
A A
MAIN PWB
(1/28)
B B
TUNER0_AGC
IF0_NARROW-
R963
102/1005
C975
104p/16V/1005
C963 104p/16V/1005
OPEN-103/1005
Near By Tuner
MAIN PWB (1/28)
IF0_NARROW+
C C
MAIN PWB (1/28)
TUNER0_SDA
C964 104p/16V/1005
OPEN-150p/16V/1005
TUNER0_SCL
C976
+3V3DT
R972
183/1005
SMD Type(Sunny,30pF)
R974
183/1005
2
IF_AGC0
R966
101/1005
R964
101/1005
C977
OPEN-150p/16V/1005
C965 300p/50V/1005
C966 300p/50V/1005
SCLT0
SDAT0
Y961
16MHZ/20pF/SMD
VDDA_3V3
VDDD_3V3
VDDA_1V2
VDDDC_1V2
SDAT0
SCLT0
VDDA_3V3
3
VDDD_1V2
1
VDDA_3V3
2
VIM
3
VIP
4
VSSA_3V3
5
VDDD_3V3
6
VSSA_3V3
7
XIN
8
XOUT
9
VDDA_1V2
10
VSSA_1V2
11
VDDA_1V2
12
VDDDC_1V2
R973 000/1005
R975 000/1005
IF_AGC0
VDDD_3V3
VDDDC_1V2
44
45
46
47
48
49
GND
VSSD
VDDD_1V2
VDDD_3V3
VDDDC_1V2
VSSDC
TDA10048HN
*I2C Address : 0x10
VSSDC13VSSD14SDA_TUN15SCL_TUN16PSYNC/S_PSYNC
17
VDDD_3V3
4
+3V3DT
R962
472/1005
C962
104p/16V/1005
37
38
39
40
41
42
43
TDI
TCK
TDO
CLR_N
AGC_IF
AGC_TUN
U961
DEN/S_DEN18OCLK/S_OCLK
DO0/S_UCOR
DO1/S_DO21DO2/GPIO122DO3/GPIO223DO4/GPIO3
19
20
+1V2DT VDDA_1V2
L961
BLM18PG300SN1D
TMS
TRST_N
SCL
SDA
SADDR
GPIO0
VDDDC_1V2
VSSDC
VSSD
VDDD_3V3
DO7
DO6
DO5
24
CH_TER_RESET
36
35
34
33
R970 000/1005
32
31
30
29
28
27
26
25
VDDD_1V2 VDDDC_1V2 +3V3DT
R967 000/1005
R968 000/1005
R969 OPEN-103/1005
TT_DO7
TT_DO6
TT_DO5
TT_DO4
TT_DO3
TT_DO2
TT_DO1
TT_DO0
TT_OCLK
TT_DEN
TT_PSYNC
5
MAIN PWB (7/28)
FLI_SCL0
FLI_SAD1
VDDDC_1V2
VDDD_3V3
TT_OCLK
TT_DEN
TT_PSYNC
TT_DO7
TT_DO6
TT_DO5
TT_DO4
TT_DO3
TT_DO2
TT_DO1 TS0_DATA1
TT_DO0
FLI_SCL0
FLI_SDA0
+3V3DT
PR961
470*4/1005
PR962
470*4/1005
18
27
36
45
18
27
36
45
PR963
470*4/1005
+3V3DT
FLI_SCL0
FLI_SDA0
MAIN PWB (6/28),(27/28),(28/28)
4 5
3 6
2 7
1 8
TS0_DATA7
TS0_DATA6
TS0_DATA5
TS0_DATA4
TS0_DATA3
TS0_DATA2
TS0_DATA0
TS0_CLK
TS0_VLD
TS0_STR
TS0_DATA[7..0]
6
JP961
OPEN-53014-0410
1
2mm
2
3
4
MAIN PWB (24/28)
L962
BLM18PG300SN1D
D D
L964
BLM18PG300SN1D
C967
104p/16V/1005
PIN1 PIN5 PIN28 PIN46 PIN9 PIN48 PIN31 PIN12
C968
104p/16V/1005
C969
104p/16V/1005
C970
104p/16V/1005
L963
BLM18PG300SN1D
L965
BLM18PG300SN1D
C971
104p/16V/1005
C972
104p/16V/1005
C973
104p/16V/1005
C974
104p/16V/1005
MAIN PWB ASS'Y (26/28)
[OFDM Demodulator]
HU-71100004
All location are from 961 to 980
1
2
3
4
5
6
lt-19db1bu_0514_24/30_0.0
(No.YA697<Rev.001>)2-57 2-58(No.YA697<Rev.001>)
Page 32
C1085,1091,1092 are located near by U1081
MAIN PWB CIRCUIT DIAGRAM (27/28) [LNB Supply]
1
A A
2
3
4
5
6
C1085,1091,1092 are located near by U1081
+3V3_TS
R1081
OPEN-222/1005
MAIN PWB (28/28)
B B
MAIN PWB
(6/28),(26/28),(28/28)
MAIN PWB (28/28)
MAIN PWB
(6/28),(26/28),(28/28)
C C
22K_TONE
FLI_SDA0
LNBP_IRQ
FLI_SCL0
R1083 220/1005
R1085
000/1005
R1089
000/1005
C1091
224p/50V/2012
R1086
103/1005
+5V
C1081
103p/50V
4
5
EXTM
6
7
8
9
10
NC
GND
VREG
SDA
ADD
FLOAT
A8293SESTR-T
SCL
IRQ
12
11
3
TCAP
U1081
C1083
104p/50V/2012
2
1
GND
VCP
BOOST
LNB
GND
LX
VIN
NC
FLOAT
GND
15
14NC13
I2C Address :0x16
C1082
104p/50V/2012
D1081
SS14
C1085
474p/50V/2012
21
20
19
18
17
16
C1092
224p/50V/2012 R1090
C1084
100uF/50V/NXB
D1084
SS14
L1081
SPC12080-330M
D1083 US1M
102/6432
D1082
OPEN-SX34
C1094
474p/50V/2012
C1087
104p/50V
CIB21P260NE
C1088
100uF/50V/NXB
C1093
104p/50V/2012
L1082
D1085
SMDJ20A-101
12
+12V
C1090
104p/50V
LNB_OUT
MAIN PWB (2/28)
MAIN PWB ASS'Y (27/28)
D D
[LNB Supply]
HU-71100004
All location are from 1081 to 1100
1
2
3
4
5
6
lt-19db1bu_0514_27/30_0.0
2-60(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-59
Page 33
MAIN PWB CIRCUIT DIAGRAM (28/28) [QPSK Demodulator]
5
D D
TUNER_I_P
MAIN PWB (2/28)
C C
MAIN PWB (2/28)
MAIN PWB
(6/28),(26/28),(27/28)
MAIN PWB (7/28)
TUNER_I_N
TUNER_Q_P
TUNER_Q_N
TUNER1_SDA
TUNER1_SCL
TUNER_AGC
FLI_SDA0
FLI_SCL0
CH_RESET
R1052
102/1005
+3V3_TS
R1053
102/1005
R1054 330/1005
R1055 330/1005
R1056 301/1005
C1056
105p/16V/1005
R1060 000/1005
R1061 000/1005
+3V3_TS
R1063
472/1005
4
C1051 473p/16V/1005
C1052 473p/16V/1005
R1051 3092/F/1005
C1053 103p/50V/1005
64
I_P
63
I_N
62
Q_P
61
Q_N
54
TUNER_DATA
53
TUNER_CLK
55
TUNER_EN
51
52
33
38
37
36
35
34
11
12
AGCV
FILTERV
LD(GPIO0)
SER_DATA
SER_CLK
SER_ADD7
SER_ADD6
/RESET
XTAL_IN
XTAL_OUT
R1057
472/1005
+3V3_TS
R1064
105/1005
2
1
VCM
IREF
3
+3.3VA
59
3
AD_VAA
AD_VAA
AD_VDD
CX24123-11Z
+3V3_TS
20
IO_VDD
U1051
28
49
IO_VDD
IO_VDD
+1V8_CH +1.8VA
24
41
56
14
CORE_VDD
CORE_VDD
CORE_VDD
CORE_VDD
7
9
PLL_VAA
PLL_VDD
RS_DATA7
RS_DATA6
RS_DATA5
RS_DATA4
RS_DATA3
RS_DATA2
RS_DATA1
RE_DATA0
RE_CNTL1
RE_CNTL2
RS_CLK
DISEQC_IN
TRS
TMS
TD0
TD1
TCK
INTR_OD(GPIO1)
LNB_22K
LNB_DC(GPIO2)
ADC2CLK
2
TS1_DATA0
TS1_CLK
TS_DO7 TS1_DATA7
16
17
18
19
22
23
26
30
31
32
27
60
46
45
44
43
40
39
48
47
13
PR1051
TS_DO6
TS_DO5
TS_DO4
TS_DO3
TS_DO2
TS_DO1 TS1_DATA1
TS_DO0
TS_DEN
TS_PSYNC
TS_OCLK
18
470*4/1005
27
36
45
PR1052
18
470*4/1005
27
36
45
PR1053
470*4/1005
+3V3_TS +3V3_TS
R1058
472/1005
R1059
472/1005
C1054 OPEN-120p/50V/1005
C1055 OPEN-120p/50V/1005
TS1_DATA6
TS1_DATA5
TS1_DATA4
TS1_DATA3
TS1_DATA2
TS1_DATA0
TS1_VLD
4 5
TS1_STR
3 6
2 7
TS1_CLK
1 8
R1062 470/1005
TS1_DATA[7..0]
TS1_VLD
TS1_STR
TS1_CLK
LNBP_IRQ
22K_TONE
1
MAIN PWB (24/28)
MAIN PWB (27/28)
Y1051
10.111MHZ/12pF/SMD
B B
C1057
150p/50V/1005
+3V3_TS
C1070
106p/10V/2012
A A
L1051
BLM18PG300SN1D
+3.3VA
C1071
106p/10V/2012
+1V8_CH
L1052
BLM18PG300SN1D
+1.8VA
C1072
106p/10V/2012
C1059
473p/16V/1005
C1058
150p/50V/1005
C1060
473p/16V/1005
C1061
473p/16V/1005
AD_VSS_A1
AD_VSS_A2
PLL_VSS_A
4 5
8
58
VSS_IO_0
VSS_IO_1
21
29
VSS_CORE_1
VSS_CORE_2
VSS_IO_2
VSS_CORE_0
25
42
50
15
C1062
473p/16V/1005
VSS_CORE_3
AD_VSS_DIG
PLL_VSS_D
6
57
10
C1063
473p/16V/1005
C1064
473p/16V/1005
+3V3_TS +1V8_CH +1.8VA +3.3VA
C1065
104p/16V/1005
C1066
104p/16V/1005
C1067
104p/16V/1005
C1068
104p/16V/1005
C1069
104p/16V/1005
MAIN PWB ASS'Y (28/28)
[QPSK Demodulator]
HU-71100004
All location are from 1051 to 1080
5
4
3
2
1
lt-19db1bu_0514_28/30_0.0
(No.YA697<Rev.001>)2-61 2-62(No.YA697<Rev.001>)
Page 34
IR PWB CIRCUIT DIAGRAM
1
A A
MAIN PWB (3/28)
B B
JP3
JP1
6 7
5
8
4
3
1.25mm
2
1
12505WR-06A
TP1 TP10
1
TP2 TP10
TP4 TP10
TP3 TP10
1
1
1
2
L2 OPEN-000
L3 OPEN-000
R2
200
RED
+5VSTB
IR_OUT
3
4
5
ROM-N338THC1-5
U1
6
SIG1GND2Vcc3S4S
5
+5VSTB
R1
000/2012
000/2012
1 2
IR_OUT
RV1
SV060305E101N
C1
105p
C2
105p
C3
220uF/10V/TANTAL
SV060305E101N
C C
D D
RV2
D1 SLR124-WOS
IR PWB ASS'Y
HU-72200001
1
2
3
4
5
6
lt-19_26dx9_sub-02_0520_2/4_0.0
2-64(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-63
Page 35
KEY PWB CIRCUIT DIAGRAM
1
2
3
4
5
6
MAIN PWB (3/28)
JP2
JP2
6
5
1.25mm
7
4
3
2
A A
RV3
KEY1
OPEN-302/1005
R3
SV060305E101N
R5
271/F/1005
1
12505WR-05P
TP7
1
OPEN-302/1005
TV/AV
B B
R7
471/1005
S1
DHT-1105TABF
TP5
TP6
TP10
KEY2
R4
1
TP10
1
TP10
KEY2
KEY1
RV4
SV060305E101N
R6
271/F/1005
CH+
S2
DHT-1105TABF
R8
471/1005
R9
102/1005
MENU/OK
S3
DHT-1105TABF
R12
102/1005
DHT-1105TABF
CH-
S4
VOL-
S5
R11
272/1005
DHT-1105TABF
VOL+
S7
DHT-1105TABF
R13
272/1005
STANDBY
S6
DHT-1105TABF
KEY PWB ASS'Y
HU-72200002
C C
SW Setting Point Center Voltage Min Voltage Max Voltage ADC1
TV/AV
MENU/OK
D D
TV/AV/OK 0V~1.15V 0.750802139 0.654329977 0.85828112
Menu 1.16V~2.15V 1.644444444 1.457331095 1.846939486
VOL - 2.16V~3.25V 2.708982036 2.449990999 2.980406334
VOL-
VOL+
VOL + 3.26V 4.5V 3.822516556 3.532878942 4.117521838
SW Setting Point Center Voltage Min Voltage Max Voltage ADC2
CH + 0V~1.15V 0.750802139 0.654329977 0.85828112
CH+
CH - 1.16V~2.15V 1.644444444 1.457331095 1.846939486
CH-
Not Used 2.16V~3.25V 2.708982036 2.449990999 2.980406334
STANDBY
Power 3.26V 4.5V 3.822516556 3.532878942 4.117521838
1
2
3
4
5
6
lt-19_26dx9_sub-03_0520_3/4_0.0
(No.YA697<Rev.001>)2-65 2-66(No.YA697<Rev.001>)
Page 36
PATTERN DIAGRAMS
MAIN PWB PATTERN [SOLDER SIDE]
TOP
2-68(No.YA697<Rev.001>) (No.YA697<Rev.001>)2-67
Page 37
MAIN PWB PATTERN [PARTS SIDE]
TOP
(No.YA697<Rev.001>)2-69 2-70(No.YA697<Rev.001>)
Page 38
IR PWB PATTERN [SOLDER SIDE]
TOP
IR PWB PATTERN [PARTS SIDE]
TOP
KEY PWB PATTERN [SOLDER SIDE]
KEY PWB PATTERN [PARTS SIDE]
TOP
TOP
(No.YA697<Rev.001>)2-71
Page 39
Victor Company of Japan, Limited
Display Division 12, 3-chome, Moriya-cho, Kanagawa-ku, Yokohama-city, Kanagawa-prefecture, 221-8528, Japan
(No.YA697<Rev.001>)
Printed in Japan
VSE
Page 40
SERVICE MANUAL
INTEGRATED DIGITAL TERRESTRIAL/SATELLITE LCD TELEVISION
YA697<Rev.001> 2009 5SERVICE MANUAL
LT-19DB1BU/AX
COPYRIGHT © 2009 Victor Company of Japan, Limited
TABLE OF CONTENTS
1 PRECAUTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
2 SPECIFIC SERVICE INSTRUCTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
3 DISASSEMBLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
4 ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-13
5 TROUBLESHOOTING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-14
COPYRIGHT © 2009 Victor Company of Japan, Limited
No.YA697<Rev.001>
2009/5
Page 41
Items Contents
Dimensions ( W × H × D ) 47.0 cm × 36.70 cm × 16.0 cm [47.0 cm × 33.5 cm × 7.3 cm (Without stand)]
Mass 5.6 kg [4.8 kg (Without stand)]
Power Input AC220V - AC240 V, 50 Hz
Power Consumption 50 W (Standby: 0.7 W)
TV RF System Analog CCIR (B/G, I, D/K, L)
Digital DVB-T / DVB-S
Colour System PAL, SECAM, NTSC 3.58/4.43 [EXT only]
Stereo System NICAM (B/G, I, D/K, L), A2 (B/G, D/K)
Receiving
Frequency
Intermediate
Frequency
Colour Sub
Carrier Frequency
Teletext System Analog FLOF (Fastext), TOP
LCD panel 19-inch wide aspect (16 : 9)
Screen Size Diagonal : 48.0 cm (H: 40.8 cm × V: 25.5 cm)
Display Pixels Horizontal : 1366 dots × Vertical : 768 dots
Audio Power Output 3 W + 3 W
Speaker 3.0 cm × 11.0 cm, oval type × 2
Aerial terminal (VHF/UHF/BS) 75 Ω unbalanced, coaxial × 2
EXT-1 (Input/Output) 21-pin Euro connector (SCART socket ) × 1
EXT-3
(Input)
EXT-4
(Input)
EXT-5 / EXT-6
(Digital Input)
PC (RGB) Input Video D-sub 15 pin × 1
Digital Audio Optical Output Digital SPDIF × 1
Headphone 3.5 mm stereo mini jack × 1
Remote Control Unit RM-C2503 (AAA/R03 dry cell battery × 2)
Design & specifications are subject to change without notice.
Component Video
625p / 525p / 625i / 525i
Analog VHF: 45.25 MHz - 470MHz
UHF: 470 MHz - 855.25 MHz
CATV: 116MHz - 172MHz / 220MHz - 469MHz
Digital Terrestrial: 7 MHz ~ 858 MHz(UHF), 77.5MHz ~ 6.5MHz (VHF)
Satellite: 950 MHz - 2150 MHz
VIF 38.9MHz (B/G, I, D/K, L)
SIF 33.4MHz (5.5MHz:B/G)
32.9MHz (6.0MHz:I)
32.4MHz (6.5MHz:D/K)
PAL 4.43MHz
SECAM 4.40625MHz / 4.25MHz
NTSC 3.58MHz / 4.43MHz
Digital EBU TEXT
RCA pin jack × 3
750p / 1125i
S-Video Mini-DIN 4 pin × 1
Video / Audio HDMI 2-row 19pin connector × 2
Y: 1 V (p-p) (Sync signal: ±0.35V(p-p), 3-value sync.), 75Ω / Pb/Pr: ±0.35V(p-p), 75 Ω
Y: 1 V (p-p), Positive (Negative sync.), 75 Ω / Cb/Cr: 0.7V(p-p), 75 Ω
Audio 500 mV(rms) (-4dBs), high impedance, RCA pin jack × 2
Y: 1 V (p-p), Positive (Negative sync provided), 75 Ω
C: 0.286 V (p-p) (Burst signal), 75 Ω
Video 1V (p-p), Positive (Negative sync provided), 75 Ω , RCA pin jack × 1
Audio 500 mV (rms), High impedance, RCA pin jack × 2
(Digital-input terminal is not compatible with picture signals of personal computer)
• 576i(625i),576p(625p),480i(525i),480p(525p),720p(750p),1080i(1125i) signals are
available.
• All HDMI inputs support DVI video but only first HDMI input (EXT-5) supports DVI audio
through component audio input (EXT-2 or EXT-3).
R/G/B : 0.7 V (p-p), 75Ω
HD / VD : 1 V (p-p) to 5 V (p-p), high impedance
Audio 3.5 mm stereo mini jack × 1
1-2 (No.YA697<Rev.001>)
Page 42
SECTION 1
PRECAUTION
1.1 SAFETY PRECAUTIONS
(1) The design of this product contains special hardware,
many circuits and components specially for safety
purposes. For continued protection, no changes should be
made to the original design unless authorized in writing by
the manufacturer. Replacement parts must be identical to
those used in the original circuits. Service should be
performed by qualified personnel only.
(2) Alterations of the design or circuitry of the products should
not be made. Any design alterations or additions will void
the manufacturer's warranty and will further relieve the
manufacturer of responsibility for personal injury or
property damage resulting therefrom.
(3) Many electrical and mechanical parts in the products have
special safety-related characteristics. These
characteristics are often not evident from visual inspection
nor can the protection afforded by them necessarily be
obtained by using replacement components rated for
higher voltage, wattage, etc. Replacement parts which
have these special safety characteristics are identified in
the parts list of Service manual. Electrical components
having such features are identified by shading on the
schematics and by ( ) on the parts list in Service
manual. The use of a substitute replacement which does
not have the same safety characteristics as the
recommended replacement part shown in the parts list of
Service manual may cause shock, fire, or other hazards.
(4) Don't short between the LIVE side ground and
ISOLATED (NEUTRAL) side ground or EARTH side
ground when repairing.
Some model's power circuit is partly different in the GND.
The difference of the GND is shown by the LIVE : ( ) side
GND, the ISOLATED (NEUTRAL) : ( ) side GND and
EARTH : ( ) side GND.
Don't short between the LIVE side GND and ISOLATED
(NEUTRAL) side GND or EARTH side GND and never
measure the LIVE side GND and ISOLATED (NEUTRAL)
side GND or EARTH side GND at the same time with a
measuring apparatus (oscilloscope etc.). If above note will
not be kept, a fuse or any parts will be broken.
(5) When service is required, observe the original lead dress.
Extra precaution should be given to assure correct lead
dress in the high voltage circuit area. Where a short circuit
has occurred, those components that indicate evidence of
overheating should be replaced. Always use the
manufacturer's replacement components.
(6) Isolation Check (Safety for Electrical Shock Hazard)
After re-assembling the product, always perform an isolation check on the exposed metal parts of the cabinet (antenna terminals, video/audio input and output terminals,
Control knobs, metal cabinet, screw heads, earphone jack,
control shafts, etc.) to be sure the product is safe to operate
without danger of electrical shock.
a) Dielectric Strength Test
The isolation between the AC primary circuit and all metal
parts exposed to the user, particularly any exposed metal
part having a return path to the chassis should withstand a
voltage of 3000V AC (r.m.s.) for a period of one second. (.
. . . Withstand a voltage of 1100V AC (r.m.s.) to an appliance rated up to 120V, and 3000V AC (r.m.s.) to an appliance rated 200V or more, for a period of one second.)
This method of test requires a test equipment not generally
found in the service trade.
b) Leakage Current Check
Plug the AC line cord directly into the AC outlet (do not use
a line isolation transformer during this check.). Using a
"Leakage Current Tester", measure the leakage current
from each exposed metal part of the cabinet, particularly
any exposed metal part having a return path to the chassis,
to a known good earth ground (water pipe, etc.). Any leakage current must not exceed 0.5mA AC (r.m.s.).
However, in tropical area, this must not exceed 0.2mA AC
(r.m.s.).
Alternate Check Method
Plug the AC line cord directly into the AC outlet (do not
use a line isolation transformer during this check.). Use
an AC voltmeter having 1000Ω per volt or more
sensitivity in the following manner. Connect a 1500Ω
10W resistor paralleled by a 0.15µ F AC-type capacitor
between an exposed metal part and a known good earth
ground (water pipe, etc.). Measure the AC voltage
across the resistor with the AC voltmeter. Move the
resistor connection to each exposed metal part,
particularly any exposed metal part having a return path
to the chassis, and measure the AC voltage across the
resistor. Now, reverse the plug in the AC outlet and
repeat each measurement. Any voltage measured must
not exceed 0.75V AC (r.m.s.). This corresponds to
0.7mA AC (r.m.s.).
However, in tropical area, this must not exceed 0.35V
AC (r.m.s.). This corresponds to 0.3mA AC (r.m.s.).
AC VOLTMETER
(HAVING 1000 /V,
OR MORE SENSITIVITY)
0.15 F AC-TYPE
GOOD EARTH GROUND
1500 10W
PLACE THIS PROBE
ON EACH EXPOSED
ME TAL PAR T
(No.YA697<Rev.001>)1-3
Page 43
1.2 INSTALLATION
1.2.1 HEAT DISSIPATION
If the heat dissipation vent behind this unit is blocked, cooling
efficiency may deteriorate and temperature inside the unit will
rise. The temperature sensor that protects the unit will be
activated when internal temperature exceeds the pre-determined
level and power will be turned off automatically.Therefore,
please make sure pay attention not to block the heat dissipation
vent as well as the ventilation outlet behind the unit and ensure
that there is room for ventilation around it.
Ventilation hole
1.2.3 INSTALLATION REQUIREMENTS
Ensure that the minimal distance is maintained, as specified
below, between the unit with and the surrounding walls, as well
as the floor etc.Install the unit on stable flooring or stands.
200 mm
*Diagram differs from actual appearance.
1.2.2 NOTES ON HANDLING
When taking the unit out of a packing case, do not grasp the
upper part of the unit. If you take the unit out while grasping the
upper part, the LCD PANEL may be damaged because of a
pressure. Instead of grasping the upper part, put your hands on
the lower backside or sides of the unit.
150 mm 50
*Diagram differs from actual appearance.
mm
150 mm 50 mm
To ensure safety in an emergency such as an earthquake, and
to prevent accidents, ensure that measures are taken to prevent
the TV dropping or falling over.
It fixes in a band.
TV STAND
*Diagram differs from actual appearance.
1-4 (No.YA697<Rev.001>)
Page 44
1.3 HANDLING LCD PANEL
1.3.1 PRECAUTIONS FOR TRANSPORTATION
When transporting the unit, pressure exerted on the internal LCD
panel due to improper handling (such as tossing and dropping)
may cause damages even when the unit is carefully packed. To
prevent accidents from occurring during transportation, pay
careful attention before delivery, such as through explaining the
handling instructions to transporters.
Ensure that the following requirements are met during
transportation, as the LCD panel of this unit is made of glass and
therefore fragile:
(1) USE A SPECIAL PACKING CASE FOR THE LCD PANEL
When transporting the LCD panel of the unit, use a special
packing case (packing materials). A special packing case
is used when a LCD panel is supplied as a service spare
part.
(2) ATTACH PROTECTION SHEET TO THE FRONT
Since the front (display part) of the panel is vulnerable,
attach the protection sheet to the front of the LCD panel
before transportation. Protection sheet is used when a LCD
panel is supplied as a service spare part.
(3) AVOID VIBRATIONS AND IMPACTS
The unit may be broken if it is toppled sideways even when
properly packed. Continuous vibration may shift the gap of
the panel, and the unit may not be able to display images
properly. Ensure that the unit is carried by at least 2
persons and pay careful attention not to exert any vibration
or impact on it.
(4) DO NOT PLACE EQUIPMENT HORIZONTALLY
Ensure that it is placed upright and not horizontally during
transportation and storage as the LCD panel is very
vulnerable to lateral impacts and may break. During
transportation, ensure that the unit is loaded along the
traveling direction of the vehicle, and avoid stacking them
on one another. For storage, ensure that they are stacked
in 2 layers or less even when placed upright.
1.3.2 OPTICAL FILTER (ON THE FRONT OF THE LCD PANEL)
(1) Avoid placing the unit under direct sunlight over a
prolonged period of time. This may cause the optical filter
to deteriorate in quality and COLOUR.
(2) Clean the filter surface by wiping it softly and lightly with a
soft and lightly fuzz cloth (such as outing flannel).
(3) Do not use solvents such as benzene or thinner to wipe the
filter surface. This may cause the filter to deteriorate in
quality or the coating on the surface to come off. When
cleaning the filter, usually use the neutral detergent diluted
with water. When cleaning the dirty filter, use water-diluted
ethanol.
(4) Since the filter surface is fragile, do not scratch or hit it with
hard materials. Be careful enough not to touch the front
surface, especially when taking the unit out of the packing
case or during transportation.
1.3.3 PRECAUTIONS FOR REPLACEMENT OF EXTERIOR
PARTS
Take note of the following when replacing exterior parts (REAR
COVER, FRONT PANEL, etc.):
(1) Do not exert pressure on the front of the LCD panel (filter
surface). It may cause irregular COLOUR.
(2) Pay careful attention not to scratch or stain the front of the
LCD panel (filter surface) with hands.
(3) When replacing exterior parts, the front (LCD panel) should
be placed facing downward. Place a mat, etc. underneath
to avoid causing scratches to the front (filter surface).
(No.YA697<Rev.001>)1-5
Page 45
SECTION 2
SPECIFIC SERVICE INSTRUCTIONS
2.1 FEATURES
DIGITAL TUNER
This TV can receive both DVB-T (Digital terrestrial broadcasting),
DVB-S(Digital satellite broadcasting), and Analogue terrestrial
broadcasting.
HDMI INPUT
By connecting a HDMI compatible device, high definition
pictures can be displayed on your TV in their digital form.
2.2 21-PIN EURO CONNECTOR (SCART) : EXT-1 / EXT-2
Pin No. Signal designation Matching value EXT-1 EXT-2
1 AUDIO R output 500mV(rms) (Nominal), Low impedance Used (TV OUT) Used (LINE OUT)
2 AUDIO R input 500mV(rms) (Nominal), High impedance Used (R1) Used (R2)
3 AUDIO L output 500mV(rms) (Nominal), Low impedance Used (TV OUT) Used (LINE OUT)
4 AUDIO GND Used Used
5 GND (B) Used Used
6 AUDIO L input 500mV(rms) (Nominal), High impedance Used (L1) Used (L2)
7 B input 700mV
8 FUNCTION SW
(SLOW SW)
Low : 0V-3V
High : 8V-12V, High impedance
, 75Ω Used Not used
(B-W)
9 GND (G) Used Used
10 SCL Not used Used (SCL2)
11 G input 700mV
, 75Ω Used Not used
(B-W)
12 SDA Not used Used (SDA2)
13 GND (R) Used Used
14 GND (YS) Used Not used
15 R / C input R : 700mV
C : 300mV
(B-W)
(P-P)
, 75Ω
, 75Ω
16 Ys input (FAST SW) Low : 0V-0.4V, High : 1V-3V, 75Ω Used Not used
17 GND (VIDEO output) Used Used
18 GND (VIDEO input) Used Used
19 VIDEO output 1V
20 VIDEO / Y input 1V
(Negative sync), 75Ω Used (TV OUT) Used (LINE OUT)
(P-P)
(Negative sync), 75Ω Used Used
(P-P)
21 COMMON GND Used Used
PICTURE MODE
This function can adjust the picture settings automatically.
There are BRIGHT, STANDARD, SOFT and MANUAL in the
PICTURE MODE.
ZOOM
This function can change the screen size according to the
picture aspect ratio.
3D CINEMA SURROUND
You can enjoy sounds with a wider ambience.
Used Used
Used (R) Used (C2)
(P-P= Peak to Peak, B-W= Blanking to white peak)
[Pin assignment]
20 18 16 14 12 10 8 6 4 2
21 19 17 15 13 11 9 7 5 3 1
1-6 (No.YA697<Rev.001>)
Page 46
2.3 TECHNICAL INFORMATION
2.3.1 LCD PANEL
This unit uses the flat type LCD (Liquid Crystal Display) panel that occupies little space, instead of using the conventional
CRT(Cathode Ray Tube). This panel adopts "normally white" mode where the transmittance or reflective rate is maximum, and the
screen is white when no voltage is applied.
2.3.1.1 SPECIFICATIONS
The following table shows the specifications of this unit.
Item Specifications
Maximum dimensions ( W × H × D ) 430.37 mm × 254.60 mm × 16.5 mm
Weight 2.0 kg
Effective screen size Diagonal : 48.0 cm (H: 40.8 cm × V: 25.5 cm)
Aspect ratio 16 : 9
Drive device / system a-Si-TFT active matrix system
Resolution Horizontally 1366 × Vertically 768 × RGB < W-XGA > 3147264 dots in total
Pixel pitch (pixel size) Horizontally: 0.300 mm, Vertically: 0.300 mm
Displayed color 16777216 colors 256 colors for R G and B
Brightness 300 cd/m2
Contrast ratio 1000 : 1
Response time ( G to G ) less than 5 ms
View angle (Horizontally) 178°
View angle (Vertically) 178°
Surface polarizer Anti-Glare type Low reflective coat
Color filter Vertical stripe
Backlight Cold cathode fluorescent lamp
Power supply voltage in LCD 5 V
Panel interface system LVDS (Low Voltage Differential Signaling)
2.3.1.2 PIXEL FAULT
There are three pixel faults - bright fault , dark fault and flicker fault - that are respectively defined as follows.
BRIGHT FAULT
In this pixel fault, a cell that should not light originally is lighting on and off.
For checking this pixel fault, input ALL BLACK SCREEN and find out the cell that is lighting on and off.
DARK FAULT
In this pixel fault, a cell that should light originally is not lighting or lighting with the brightness twice as brighter as originally lighting.
For checking this pixel fault, input 100% of each R/G/B colour and find out the cell that is not lighting.
FLICKER FAULT
In the pixel fault, a cell that should light originally or not light originally is flashing on and off.
For checking this pixel fault, input ALL BLACK SCREEN signal or 100% of each RGB colour and find out the cell that is flashing on
and off.
(No.YA697<Rev.001>)1-7
Page 47
SECTION 3
DISASSEMBLY
3.1 CAUTION AT DISASSEMBLY
• Make sure that the power cord is disconnected from the outlet.
• Pay special attention not to break or damage the parts.
• Make sure that there is no bent or stain on the connectors before inserting, and firmly insert the connectors.
• Be sure to reattach the wire clamps removed during the procedure to the original positions. (Attaching the wire clamps in wrong
positions may affect the performance.)
REFERENCE:
When removing each board, remove the connector if necessary. The operation is easier if you write down the connection points
(connector numbers) of the connector. For connection of each board, refer to the "WIRING DIAGRAM" of the Standard Circuit
Diagram.
3.2 DISASSEMBLY PROCEDURE
3.2.1 REMOVING THE REAR COVER (Fig.3-1)
(1) Remove the 2 screws [A].
(2) Remove the CORD GUIDE.
(3) Remove the 4 screws [B] and 2 screws [C].
(4) Remove the REAR COVER.
3.2.2 REMOVING THE POWER UNIT (Fig.3-1)
• Remove the REAR COVER.
(1) Remove the 4 screws [D].
(2) Remove the POWER UNIT.
3.2.3 REMOVING THE MAIN PWB (Fig.3-1)
• Remove the REAR COVER.
(1) Remove the 2 screws [E].
(2) Remove the SIDE SHIELD.
(3) Remove the 6 screws [F].
(4) Remove the MAIN PWB.
3.2.4 REMOVING THE KEY PWB (Fig.3-1)
• Remove the REAR COVER.
(1) Remove the 2 screws [G].
(2) Remove the CONTROL BASE and KEY PWB together.
(3) Remove the 2 screws [H].
(4) Remove the KEY PWB from the CONTROL BASE.
3.2.5 REMOVING THE SPEAKER (Fig.3-1)
• Remove the REAR COVER.
(1) Remove the 4 screws [J].
(2) Remove the SPEAKER(L/R).
3.2.6 REMOVING THE IR PWB (Fig.3-1)
• Remove the REAR COVER.
(1) Remove the 1 screw [K].
(2) Remove the IR PWB.
3.2.7 REMOVING THE STAND (Fig.3-1)
• Remove the 2 screws [C] if the REAR COVER is not removed.
(1) Remove the 2 screws [L].
(2) Remove the STAND.
3.2.8 REMOVING THE BLUE LED MODULE (Fig.3-1)
• Remove the REAR COVER.
• Remove the STAND.
(1) Remove the 4 screws [M].
(2) Remove the FRONT BRACKET.
(3) Remove the BLUE LED MODULE.
3.2.9 REMOVING THE LCD PANEL UNIT (Fig.3-1)
• Remove the REAR COVER.
• Remove the STAND.
(1) Remove the 6 screws [N].
(2) Remove the MAIN SHIELD and LCD PANEL UNIT
together.
(3) Remove the 4 screws [P].
(4) Remove the LCD PANEL UNIT.
1-8 (No.YA697<Rev.001>)
Page 48
A
CORD GUIDE
E
B
C
D
POWER UNIT
REAR COVER
MAIN
SHEILD
SIDE SHIELD
F
N
MAIN PWB
P
L
M
FRONT BRACKET
STAND
N
CONTROL BASE
J
LCD PANEL
FRONT CABINET
BLUE LED MODULE
K
G
H
CONTROL KNOB
IR PWB
J
KEY PWB
Fig.3-1
(No.YA697<Rev.001>)1-9
Page 49
3.3 MEMORY IC REPLACEMENT
• This model uses the memory IC.
• This memory IC stores data for proper operation of the video and drive circuits.
• When replacing, be sure to use an IC containing this (initial value) data.
3.3.1 MEMORY IC REPLACEMENT PROCEDURE
1. Power off
Switch off the power and disconnect the power plug from the AC outlet.
2. Replace the memory IC
Be sure to use the memory IC written with the initial setting values.
3. Power on
Connect the power plug to the AC outlet and switch on the power.
4. Receiving channel setting
Refer to the OPERATING INSTRUCTIONS and set the receive channels (Channels Preset) as described.
5. User setting
Check the user setting items according to the given in page later. Where these do not agree, refer to the OPERATING
INSTRUCTIONS and set the items as described.
6. FACTORY MODE setting
Verify what to set in the FACTORY MODE, and set whatever is necessary.
3.3.2 FACTORY MODE SETTING
FACTORY MODE SCREEN SETTING ITEM
FACTORY MODE SCREEN
Factory Menu
ADC Calibration
White Balance
Miscellaneous
Engineering Menu
Panel Select xxxxxxxxxxx
Factry Default
Model Name : xxxxxx
Software Version : xxxxxx
OTA Loader Version : xxxxxx
MCU Version : xxxxxx
System Version : xxxxxx
Kernel Version : xxxxxx
Boot Loader Version : xxxxxx
Update Date : xxxxxx
Setting items Settings
ADC Calibration [Do not adjust]
White Balance Adjust
Miscellaneous [Do not adjust]
Engineering Menu [Do not adjust]
Panel Select [Do not adjust]
Factory Default ---
1-10 (No.YA697<Rev.001>)
Page 50
3.3.3 SETTINGS OF FACTORY SHIPMENT
3.3.3.1 BUTTON OPERATION 3.3.3.2 REMOTE CONTROL DIRECT OPERATION
Setting item Setting position
POWER Off
CHANNEL PR1
VOLUME 10
AV TV
3.3.3.3 REMOTE CONTROL MENU OPERATION
(1) Picture
Setting item Setting position
Mode Bright
Colour Temperature Cool
Noise Reduction Low
Fleshtone Off
24p Cinema On
(2) Sound
Setting item Setting position
Bass 0
Treble 0
Balance 0
Auto Volume Control Off
Digital Audio Output PCM
3D Cinema surround Off
TV Speaker On
(3) Installation
Setting item Setting item Setting position
Terrestrial Channel
Search
Satellite Channel
Search
Software Update ---
Edit Channel List ---
Edit Favourite List ---
Signal Detection ---
Antenna Power Off
Auto Channel
Numbering
Antenna Type LNB Only
Enable
Setting item Setting position
CHANNEL PR1
VOLUME 10
ZOOM AUTO
SUB POWER OFF
(4) Feature
Setting item Setting position
Language Setting Menu Language English
Audio Language German
Subtitle Language German
Subtitle Display Auto
Subtitle Font Variable
Audio Description Off
Time Setting Date --/--/20--
Local Time --:--
Sleep Timer Off
Power On Timer Off
Channel ---
Volume 20
Power Off Timer Off
Auto Shut Off Off
Parental Control Child Lock Disable
Maturity Rating View All
Change PIN Code ---
PC ---
Other Settings Zoom Auto
4 : 3 Aspect Setting Panoramic
OSD Transparency 30%
Blue Back Off
Power Lamp On
Control with HDMI On
(No.YA697<Rev.001>)1-11
Page 51
3.4 REPLACEMENT OF CHIP COMPONENT
3.4.1 CAUTIONS
(1) Avoid heating for more than 3 seconds.
(2) Do not rub the electrodes and the resist parts of the pattern.
(3) When removing a chip part, melt the solder adequately.
(4) Do not reuse a chip part after removing it.
3.4.2 SOLDERING IRON
(1) Use a high insulation soldering iron with a thin pointed end of it.
(2) A 30w soldering iron is recommended for easily removing parts.
3.4.3 REPLACEMENT STEPS
1. How to remove Chip parts
2. How to install Chip parts
[Resistors, capacitors, etc.]
(1) As shown in the figure, push the part with tweezers and
alternately melt the solder at each end.
(2) Shift with the tweezers and remove the chip part.
[Transistors, diodes, variable resistors, etc.]
(1) Apply extra solder to each lead.
SOLDER
SOLDER
[Resistors, capacitors, etc.]
(1) Apply solder to the pattern as indicated in the figure.
(2) Grasp the chip part with tweezers and place it on the
solder. Then heat and melt the solder at both ends of the
chip part.
[Transistors, diodes, variable resistors, etc.]
(1) Apply solder to the pattern as indicated in the figure.
(2) Grasp the chip part with tweezers and place it on the
solder.
(3) First solder lead A as indicated in the figure.
(2) As shown in the figure, push the part with tweezers and
alternately melt the solder at each lead. Shift and remove
the chip part.
NOTE :
After removing the part, remove remaining solder from the
pattern.
1-12 (No.YA697<Rev.001>)
A
B
C
(4) Then solder leads B and C.
A
B
C
Page 52
SECTION 4
ADJUSTMENT
4.1 ADJUSTMENT PREPARATION
(1) This TV is adjusted by using REMOTE CONTROL UNIT.
(2) The adjustment using the REMOTE CONTROL UNIT is made on the basis of the initial setting values. The setting values
which adjust the screen to the optimum condition can be different from the initial setting values.
(3) Make sure that connection is correctly made AC to AC power source.
(4) Turn on the power of the TV and measuring instruments for warming up for at least 30 minutes before starting adjustments.
(5) If the receive or input signal is not specified, use the most appropriate signal for adjustment.
(6) Never touch the parts (such as variable resistors, transformers and condensers) not shown in the adjustment items of this service
adjustment.
4.2 PRESET SETTING BEFORE ADJUSTMENTS
Unless otherwise specified in the adjustment items, preset the
following functions with the REMOTE CONTROL UNIT.
Setting item Settings position
Picture Mode Standard
Colour Temperature Normal
4.5 BASIC OPERATION OF FACTORY MODE
4.5.1 HOW TO ENTER THE FACTORY MODE
(1) Press [INFORMATION] key and [MUTING] key on the
remote control unit simultaneously to enter the FACTORY
MODE SCREEN. (Fig.4-1)
4.5.2 HOW TO EXIT THE FACTORY MODE
Press the [OK] key to exit the factory mode.
FACTORY MODE SCREEN
Factory Menu
ADC Calibration
White Balance
Miscellaneous
Engineering Menu
Panel Select xxxxxxxxxxx
Factry Default
Model Name : xxxxxx
Software Version : xxxxxx
OTA Loader Version : xxxxxx
MCU Version : xxxxxx
System Version : xxxxxx
Kernel Version : xxxxxx
Boot Loader Version : xxxxxx
Update Date : xxxxxx
4.3 MEASURING INSTRUMENT AND FIXTURES
• Signal generator (Pattern generator)[PAL]
• Remote control unit
4.4 ADJUSTMENT ITEMS
VIDEO CIRCUIT
• WHITE BALANCE adjustment
4.5.4 FACTORY MODE SELECT KEY LOCATION
[Function/ ] key
Scrolling up / down the
setting value.
[MUTING] key +
[INFORMATION] key
Enter The Factry Mode.
[FUNCTION / ] key
Select the setting item.
Fig.4-1
4.5.3 CHANGE AND MEMORY OF SETTING VALUE
SELECTION OF SETTING ITEM
• [FUNCTION / ] key.
For scrolling up / down the setting items.
• [FUNCTION / ] key.
For select the setting items.
CHANGE OF SETTING VALUE (DATA)
• [FUNCTION / ] key.
For scrolling up / down the setting values.
MEMORY OF SETTING VALUE (DATA)
The setting value will be stored automatically when release the
REMOTE CONTROL UNIT keys.
4.6 SETTING ITEM IN THE FACTORY MODE
(No.YA697<Rev.001>)1-13
Page 53
4.7 ADJUSTMENT PROCEDURE
4.7.1 VIDEO CIRCUIT
Item
WHITE
BALANCE
Measuring
instrument
Test point Adjustment part Description
Remote
control unit
Signal
generator
FACTORY MODE SCREEN
Factory Menu
ADC Calibration
White Balance
Miscellaneous
Engineering Menu
Panel Select xxxxxxxxxxx
Factry Default
Model Name : xxxxxx
Software Version : xxxxxx
OTA Loader Version : xxxxxx
MCU Version : xxxxxx
System Version : xxxxxx
Kernel Version : xxxxxx
Boot Loader Version : xxxxxx
Update Date : xxxxxx
WHITE BALANCE MODE
White Balance
Color Temp Normal
R XX
G XX
B XX
[White Balance]
Normal R
Normal G
Normal B
(1) Set COLOUR TEMP. to "Normal".
(2) Enter the FACTRY MODE.
(3) Press [ ] / [ ] key on the remote control unit
simultaneously to select the White balance.
(4) Press [ ] key on the remote control unit
simultaneously to enter White balnce mode.
(5) Receive a PAL 75% all white signal.
(6) Adjust the setting values of <Normal R> ,
<Normal G> and <Normal B> so that the
screen becomes maximum white.
NOTE:
When the normal mode is adjusted, other modes
(cool/ warm) are automatically adjusted.
SECTION 5
TROUBLESHOOTING
This service manual does not describe TROUBLESHOOTING.
Victor Company of Japan, Limited
Display Division 12, 3-chome, Moriya-cho, Kanagawa-ku, Yokohama-city, Kanagawa-prefecture, 221-8528, Japan
(No.YA697<Rev.001>)
Printed in Japan
VSE