JVC DR-MX1SUS Schematics
SCHEMATIC DIAGRAMS
DVD / HDD VIDEO RECORDER& VIDEO CASSETTE RECORDER
DR-MX1SUS
CD-ROM No.SML200411
CABLE/DBS
DVD
TV
STANDBY/ON
TV/
VHS
DVD
TV/CBL/DBS
VIDEO
TIMER
VHS HDD DVD
TV VOLUME
CH
AUX
CANCEL
MEMO/MARK
LIVE
PROGRAM
EDITDUBBING
TV MUTING
NAVIGATIONTOP MENU
ENTER
MENU
RETURN
NEXTPREVIOUS
SLOWSLOW PLAY/SELECT
CLEAR
PAUSEREC
STOP/
JUMP
REC MODE
DISPLAY
ON SCREEN
SET UP
REMAIN
AUDIO
SUBTITLE
ANGLE
LIVE CHECK
REC LINK
PROGRESSIVE
STANDBY/ ON
S-VIDEO VIDEO
(MONO)
HDD/DVD
SCAN
L…AUDIO…R
F…1
CH
VRS … HDD … DVD …
RAM/RW
VHS/HDD/DVD
DISPLAY
SELECT
VHS TIMER REC MODE
DV IN
DR-MX1SUS [D4VC21]
For disassembling and assembling of MECHANISM ASSEMBLY, refer to the SERVICE MANUAL No.86700(MECHANISM ASSEMBLY).
COPYRIGHT © 2004 Victor Company of Japan, Limited.
No.YD041SCH
2004/11
CHARTS AND DIAGRAMS
NOTES OF SCHEMATIC DIAGRAM
Safety precautions
The Components indentified by the symbol are
critical for safety. For continued safety, replace safety
critical components only with manufacturer's recommended parts.
1. Units of components on the schematic diagram
Unless otherwise specified.
1) All resistance values are in ohm. 1/6 W, 1/8 W (refer to
parts list).
Chip resistors are 1/16 W.
K: KΩ(1000Ω), M: MΩ (1000KΩ)
2) All capacitance values are in µF, (P: PF).
3) All inductance values are in µH, (m: mH).
4) All diodes are 1SS133, MA165 or 1N4148M (refer to parts
list).
Note: The Parts Number, value and rated voltage etc. in
the Schematic Diagram are for references only.
When replacing the parts, refer to the Parts List.
2. Indications of control voltage
AUX : Active at high.
AUX or AUX(L) : Active at low.
!
4. Voltage measurement
1) Regulator (DC/DC CONV) circuits
REC : Colour bar signal.
PB : Alignment tape (Colour bar).
— : Unmeasurable or unnecessary to measure.
2) Indication on schematic diagram
Voltage indications for REC and PB mode on the schematic diagram are as shown below.
REC mode
12 3
2.5
(5.0)
PB mode
1.8
PB and REC modes
(Voltage of PB and REC modes
are the same)
Note: If the voltages are not indicated on the schematic
diagram, refer to the voltage charts.
5. Signal path Symbols
The arrows indicate the signal path as follows.
NOTE : The arrow is DVC unique object.
Playback signal path
Playback and recording signal path
CIRCUIT BOARD NOTES
1. Foil and Component sides
1) Foil side (B side) :
Parts on the foil side seen from foil face (pattern face)
are indicated.
2) Component side (A side) :
Parts on the component side seen from component face
(parts face) indicated.
rts location are indicated by guide scale on the circuit board.
2. Parts location guides
Parts location are indicated by guide scale on the circuit board.
REF No.
IC101 B C 6 A
(A : Component side)
D : Discrete component)
B : Foil side
C : Chip component
Note: For general information in service manual, please
refer to the Service Manual of GENERAL INFORMATION Edition 4 No. 82054D (January 1994).
LOCATION
IC
Category : IC
Horizontal “A” zone
Vertical “6” zone
3. Interpreting Connector indications
1
2
Removable connector
3
1
2
Wire soldered directly on board
3
1
Non-removable Board connector
2
3
1
2
4
Board to Board
3
Connected pattern on board
The arrows indicate signal path
Note: For the destination of each signal and further line
connections that are cut off from the diagram,
refer to "BOARD INTERCONNECTIONS"
Recording signal path
(including E-E signal path)
Capstan servo path
Drum servo path
(Example)
R-Y
Playback R-Y signal path
Y
Recording Y signal path
6. Indication of the parts for adjustments
The parts for the adjustments are surrounded with the circle
as shown below.
7. Indication of the parts not mounted on the circuit board
“OPEN” is indicated by the parts not mounted on the circuit
board.
R216
OPEN
2-1 2-2
BOARD INTERCONNECTIONS
5
Page 2-37
SHEET 17
CN5301
Page 2-5
SHEET 1
CN5304
CN5001
CN5302
CN5303
CN5311
CN501
4
CN2601 CN8001
Page 2-39
SHEET 18
CN3001
CN5501
CN7104
CN7107CN7111
3
VIDEO SW Page 2-21 SHEET 9
VIDEO/N.AUDIO Page 2-23 SHEET 10
FMA/DEMOD Page 2-25 SHEET 11
AUDIO I/O Page 2-27 SHEET 12
SYSCON Page 2-29 SHEET 13
TUNER Page 2-31 SHEET 14
TERMINAL Page 2-33 SHEET 15
CN3901
CN3103
CN3103
2
CN2001
CN2002
CN1
CN3104
CN7201
Page 2-41
SHEET 19
REG Page 2-5 SHEET 1
CN7001 CN3102
FW7001CN7202
CN7002
Page 2-41
SHEET 19
VIDEO Page 2-43 SHEET 20
AUDIO AD/DA Page 2-45 SHEET 21
CN7103
Page 2-41
SHEET 19
1
CONNECTION Page 2-7 SHEET 2
VIDEO IF Page 2-9 SHEET 3
FLASH Page 2-11 SHEET 4
MEDIA PROCESSOR Page 2-13 SHEET 5
DDR SDRAM Page 2-15 SHEET 6
1394PHY Page 2-17 SHEET 7
ATAPI IF Page 2-19 SHEET 8
p10663001a_rev0
A
BCDEFG
2-3 2-4
SW.REG AND JUNCTION SCHEMATIC DIAGRAM
5
CN5001
!
!
4
3
DANGEROUS VOLTAGE
2
1
A
!
F5001
!
VA5001
GROUND POINT FOR
PRIMARY VOLTAGE
B5001
R5001
4.7M
!
SG5001
C5005
100p
C5001
0.068
R5107
C5105
470p
VA5003
!
LF5002
R5103
680k
C5002
C5104
D5104
0.022
470p
C5004
D5001
!
C5106
0.01
R5301
220
PC5101
C5003
D5103
!
R5101
R5109
47
68k
D5101
C5103
27
D5106
C5107
220p
!
R5302
4.7k
R5303
R5304
6.8k
1.5k
C5301
IC5301
C5302
0.033
0.15
R5306
3.9k
R5305
24k
!
IC5101
R5106
3.9k
680
R5108
0.27
BCD EFG
CN5305
CN5301
CN5302
CN5303
D3.3V
D2.5V
CN5502
SW5V[2]
D5V
CN5503
CN5504
V3.3V
GND
SW12V
SW-7V
-29V
DC[-]
DC[+]
HDD_P.SAVE[L]
NOT USED
MAIN(SYSCON)
CN5311
SHEET 13
FAN
HDD
VIDEO SHEET 20
AUDIO AD/DA
SHEET 21
TO DIGITAL
(VIDEO IF)
CN1003
SHEET 3
VIDEO SHEET 20
AUDIO AD/DA
SHEET 21
NOT USED
DVD
VIDEO SHEET 20
AUDIO AD/DA
SHEET 21
D5209
D5208
D5210
PG104RS
CP5301
1.5A
L5208
33
µ
C5211
180
Q5301
R5307
C5201
120
D5202
C5202
4.7
D5213
C5204
C5308
100
C5209
18
C5210
220
680
D5301
C5205
1200
µ
33
C5307
100
CP5302
2.0A
µ
!
R5326
47
R5325
15
D5203
D5205
D5204
D5207
D5212
L5207
C5208
1200
C5207
680
L5206
33
C5315
0.01
!
4.7k
B5305
B5302
C5203
680
C5206
1200
L5201
L5202
L5204
L5205
C5309
D5302
33m
33m
µ
33
33
C5316
47
C5304
100
C5303
100
C5305
100
µ
C5306
100
B5306
L5301
R5312
10k
D5304
C5310
2.2
Q5302
DTA144WKA
Q5306
Q5305
D5303
D5306
RK34
R5314
B5308
D5305
R5309
R5308
1k
1.2k
R5327
R5313
10k
C5311
100
470
B5307
C5312
100
Q5303
R5315
39
R5316
10k
B5303
Q5313
10k
R5317
Q5304
Q5307
1k
R5328
1k
D5307
1SS355
Q5315
Q5308
B5301
R5329
B5304
10k
Q5314
R5330
470
!
L5302
CN5304
CN5501
Q5506
R5505
2.2k
D5513
QUY160-100Y
L5501
B5502
Q5503
R5504
Q5505
B5503
(
1k
REG
Q5508
)
D5512
Q5510
R5511
10k
D5511
R5513
R5512 R5514
470 470
C5524
B5512
B5506
B5504
B5510
Q5509
10k
D5508
C5527
10
µ
10
µ
C5525
1
IC5501
C5501
1
IC5502
C5504
1
IC5503
C5507
1
IC5506
C5533
10
µ
C5519
C5517
C5518 C5520 5522
680 113.3k
C5503
470p
C5502
100
C5506
470p
C5505
100
C5509
470p
C5508
100
680
C5528
C5526
µ
10
R5501 R5503R5502
820 680
Q5504 Q5502
D5505
D5501
R5507 R5509
5.6k 12k
1k
C5513
1
D5502 D5503
R5508
IC5505
R5510
12k
Q5507
D5504
680
100
C5521
Q5501
1
C5514
C5531
10
µ
L5502
µ
33
C5523
µ
C5529
R5506
10
470
C
C5516
100
C5515
470p
C5534
B5509
C5532
10
µ
C5530
10
µ
470
B5501
D5214
D5201
!
T5001
C5102
4700p
C5101
100p
!
R5105
68
D5105
R5102
1.2k
R5104
1k
GROUND POINT FOR
SECONDARY VOLTAGE
D5211
p10652001a_rev0
SHEET 1
2-5 2-6
DIGITAL(CONNECTION) SCHEMATIC DIAGRAM
C603
C609
C612
C636
R643
1.2k
R646
1.2k
C613
C604
0.01
47p
C646
C654
K602
C605
SW5V_AVDD
R601
C614
0.01
0.1
B603
B605
B604
B606
330
ZP668
R602
ZP669
IC641
IC642
ZP672
ZP673
100
C606
100
ZP677
ZP678
ZP679
C647
C648
C655
C656
ZP680
ZP681
ZP682
ZP683
ZP684
ZP687
ZP688
ZP689
ZP690
ZP691
C668
ZP692
C669
ZP693
C670
ZP695
ZP697
C615
0.1
C657
C658
C627
0.1
C659
C660
C661
C637
C622
L602
C630
L604
C638
C662
C617
4.7
C618
0.01
R612
R617
C663
R610
1.2k
R615
1.2k
Q608
C664
4.7
0.01
R603
Q601
R604
Q607
1k
22
C665
R608
R609
39k
10k
C623
22p
C631
C666
C667
R605
68k
Q602
R614
1.2k
R619
1.2k
R620
Q605
C624
1k
C632
R606
5.6k
Q603
Q604
R622
220
Q606
R621
220
B602
22
B601
IC601
IC602
TL601
TL602
C625
C633
C634
C626
AL3.3V
AL2.5V
AD_V/Y_IN
AD_C_IN
A_VIDEO_SW
JCP8053_C_OUT
JCP8053_Y_OUT
JCP8053_CB_OUT
JCP8053_CR_OUT
KBUS_DATA_IN
KBUS_DATA_OUT
KBUS_CLK
HDD_SYNC_DET
KBUS_REQ
DIGI_RESET
AUDIO[-]
AL5.8V
AUDIO_OUT[L]
AUDIO_OUT[R]
AUDIO_IN[L]
AUDIO_IN[R]
DEC_Y_OUT
DEC_C_OUT
DEC_CB_OUT
DEC_CR_OUT
AL3.3V
AL2.5V
GND
AD_V/Y_IN
AD_C_IN
A_VIDEO_SW
JCP8053_C_OUT
JCP8053_Y_OUT
JCP8053_CB_OUT
JCP8053_CR_OUT
AL3.3V
AL2.5V
GND
KBUS_DATA_IN
KBUS_DATA_OUT
KBUS_CLK
HDD_SYNC_DET
KBUS_REQ
DIGI_RESET
AUDIO[-]
AL5.8V
AL3.3V
GND
AUDIO_OUT[L]
AUDIO_OUT[R]
AUDIO_IN[L]
AUDIO_IN[R]
AL5.8V
AL3.3V
AL2.5V
GND
DEC_Y_OUT
DEC_C_OUT
DEC_CB_OUT
DEC_CR_OUT
5
NOT USED
4
NOT USED
3
CN601
CN602
REG_AUDIO[-]
REG_SW5V
ZP656
ZP657
ZP658
ZP659
ZP660
ZP661
ZP662
ZP663
ZP664
ZP665
ZP686
ZP685 R607
ZP699
ZP698
ZP621
ZP622
ZP623
ZP624
ZP625
ZP626
ZP627
ZP628
ZP629
ZP630
ZP645
ZP646
ZP647
ZP648
ZP649
ZP650
ZP651
ZP652
ZP653
ZP654
ZP655
ZP631
ZP632
ZP633
ZP634
ZP635
ZP636
ZP637
ZP638
ZP639
ZP640
ZP641
ZP642
ZP643
ZP644
ZP666
ZP667
ZP700
REG_AL3.3V
REG_AL2.5V
GND
HDD_Y_OUT
HDD_C_OUT
HDD_CB_OUT
HDD_CR_OUT
2
ZP670
ZP671
ZP674
ZP675
ZP676
K601
C601
0.01 0.1 100
K603
K604
C607
0.01
K605
K606
C610
0.01
C641
0.1
R642
R645
C602
C608
0.1
C611
0.1
R641
1.2k
R644
1.2k
100
100
C644
L642
Q641
C645
C652
L644
Q642
C653
C616
C639 C640
100p 100p
1
p20303001a_rev0
SHEET 2
A
BCDEFG
2-7 2-8
DIGITAL(VIDEO/IF) SCHEMATIC DIAGRAM
VDDI1.8
DIGI3.3V
D2.5V
TO
K_BUS_OUT
K_BUS_IN
P_CTL[H]
SYS_RESET[L]
AI_D[0]
K_BUS_REQ
A_MUTE2[H]
K_BUS_CLK
CN1002
QGB2027L5-20X
D5.0V
AO_IEC958
V3.3V
CN1001
QGF2027L5-28X
AO_D[0]
SPI_CLK
AO_SCLK
SPI_MOSI
AO_MCLKO
A_DAC_CS
DAC_RST[L]
AO_FSYNC
DAC_CVBS_OUT
DAC_SY_OUT
DAC_SC_OUT
DAC_Y_OUT
DAC_PB_OUT
DAC_PR_OUT
D3.3V
D1.8V
GND
K1002
SHORT
K1003
SHORT
K1004
SHORT
K1005
SHORT
K1006
SHORT
K1007
SHORT
K1008
SHORT
K1009
SHORT
K1010
SHORT
GND
K1011
SHORT
K1012
SHORT
K1013
SHORT
K1014
SHORT
K1015
SHORT
SHORT
K1016
K1017
SHORT
K1018
SHORT
#
LC1004
NQR0415-002X
5
4
3
2
1
MEDIA PROCESSOR
MEDIA PROCESSER
SHEET 5
ATAPI IF SHEET 8
TO VIDEO
(JUNCTION)
CN7109
SHEET 20
MEDIA PROCESSOR
SHEET 5
TO VIDEO
(JUNCTION)
CN7108
SHEET 20
TO
SHEET5
TO
C1048
C1049
###
0.1
C1053
C1050
FROM SW.REG
CN5502
SHEET 1
D2.5V
D1.8V
D1.8V
B1008
LC1001
#
NQR0415-003X
#
C1078
/6.3
47
K1001
SHORT
#
B1007
LC1002
#
NQR0415-003X
C1066
47
D3.3V
C1079
/6.3
0.1
GND
CN1003
GND
QGA2001F2-06V
C1067
0.1
C1080
0.1
##
Q1001
DTC144WKA
UN221E
RT1N44HC
C1069
IC1002
HY57V161610ET-8
DQ14
DQ13
DQ14
SCLKCSSDIN
0Ω0Ω0Ω
R1015
R1013
UDQM
WE
CAS
RAS
DQ13
AP
A0
A1
A2
A3
DQ12
R1014
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ11
DQ12
0Ω
R1029
K4S161622H-TC80
VDD
DQ0
DQ1
VSSQ
DQ2
DQ3
VDDQ
DQ4
DQ5
VSSQ VSSQ
DQ6
DQ7
VDDQ VDDQ
LDQM
WE( L)
CAS( L)
RAS( L)
CS( L)
BA
A10/AP
A0
A1
A2
A3
VDD
DQ10
DQ9
DQ8
DQ9
DQ10
DQ11
0VDDI
TRST
TMS
TCK
0VDDE
C1005
0.1
VSS
DQ15
DQ15
DQ14
DQ14
VSSQ
DQ13
DQ13
DQ12
DQ12
VDDQ
DQ11
DQ10
DQ9
DQ8
N.C/RFU
UDQM
CLK
CKE
N.C
A9
A8
A7
A6
A5
A4
VSS
C1041
10
T
/6.3
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
TDO
TDI
0Ω
R1012
SDOUT
0VDDE
0VSS
0VSS
ADY_RL
ADYI
ADY_RH
ADY_AVDD1
VDDE
ADY_AVSS1
ADY_AVDD2
TL1091
R1060
C1007
0.1
DQ11
DQ10
DQ9
DQ8
DQ2
DQ1
DQ2
IC1001
JCP8059
ADY_AVSS2
0Ω
R1002
22k
TL1092
27M_SDRAM
A9
A8
A7
A6
A5
A4
DQ0
DQ0
DQ1
ADC_RL
ADCI
0.1
C1017
C1019
0.01
A9
0VDDE
0VDDI
ADC_RH
ADC_AVDD1
0.1
C1018
C1008 C1009
0.1 0.1
C1047
0.1
C1088
0.1
C1046
0.1
R1033
470
R1032
10k
AP
A9
A10
ADC_AVSS1
ADC_AVDD2
R1001
UDQM
LUDQM
ADC_AVSS2
220
_0.5%
22k
R1061
VSS
VSS
C1026C1030
0.10.1
TL1093
OPEN
C1022
VDDI
VDDE
A6A7A8
RST
D1001
AMUTE
1SS355
RA1005RA1003
RA1006
10k
A8A7A6
ANATST
R1009
10k
D1002
10k10k
0VDDE
0VDDI
1SS355
A3
0VSS
PLL_VSS
CLK
27M_8059
0Ω
R1018
R1010
OPEN
WE
RAS
CAS
A0A1A2
A4
A5
WEA2A1
A0
A5A4A3
VPD
PLL_RST
0Ω
R1072
OPEN OPEN
R1020 C1023
0VDDI
0VDDI
CAS
RAS
OUTH
VDOUT
CLKOSD
HDOUT
HDCVF
YSO3
YSO2
0VDDI
CSYNC
YSO1
YSO0
VDDE
0VSS
VDCVF
CSO3
CSO2
0VDDI
CSO1
RESVD
CSO0
MONI1
RESHD
MONI2
0VDDE
CSI6
CSI7
ZCNT
0VDDE
VDDI
CSI3
CSI4
CSI5
VDDI
CSI0
CSI1
CSI2
YSI5
YSI2
YSI6
INV
INH
0VSS
YSI1
YSI4
YSI7
YSI0 OUTV
VO_D[1]
VO_D[4]
VO_D[7]
VO_D[0]
TL1031
TL1032
TL1033
TL1034
YSO3
YSO2
VSS
TL1035
YSO1
C1020
YSO0
CSO3
CSO2
VSS
CSO1
CSO0
R1006
R1004
VSS
VO_D[14]
VO_D[15]
R1003
VO_D[11]
VO_D[12]
VO_D[13]
VSS
VO_D[8]
VO_D[9]
VO_D[10]
VO_D[5]
VO_D[2]
VO_D[6]
VO_D[3]
0.1
R1007
0
10k
C1015
0
0.1
R1005
10k
C1014
0.1
0
C1012
0.1
27M_VIDEO
YSO3
YSO2
YSO1
YSO0
CSO3
CSO2
CSO1
CSO0
R1019
R1017
RA1001
RA1002
0Ω
VI_D[9]
VI_D[8]
VI_D[7]
VI_D[6]
VI_D[5]
VI_D[4]
VI_D[3]
VI_D[2]
0W
VI_D[2-9]
VI_D[2-9]
VO_D[0-15]
0Ω
0
VO_D[0-15]
VIDEO_27M
VIDEO_MUTE[H]
VIDEO_RXD
VIDEO_RST[L]
SPI_MOSI
VIDEO_CS
SPI_CLK
480I[H]
TO
MEDIA PROCESSER
SHEET5
C1042
0.1
R1036
CR
1k
R1035
Q1002
0Ω
2SA1037AK/QR
R1037
100
_0.5%
#
C1070
R1039
CB
1k
R1038
Q1003
0Ω
2SA1037AK/QR
R1040
100
_0.5%
#
C1071
R1042
Y
1k
R1041
Q1004
0Ω
C1082
0.1
C1081
C1083
0.1
0.1
D5.0V
B1004
OPEN
L1004
µ
10
0.1
T
C1052
C1063
0.1
OPEN
##
R1034
10k
C1051
10
/6.3
2SA1037AK/QR
R1043
150
_0.5%
C1072
#
R1045
C
1k
R1044
Q1005
0Ω
2SA1037AK/QR
##
R1047
220
_0.5%
C1073
#
##
R1049
RY
1k
##
R1048
##
Q1006
0Ω
##
R1051
270
_0.5%
C1074
#
##
R1053
1k
RC
##
R1052
##
Q1007
0W
##
R1055
180
_0.5%
C1075
#
C1065
4.7
Q1009
R1056
2SC2412K/QRS
2.2k
R1057
Q1008
33
UMZ1N
R1059
470
R1062
OPEN
R1065
120
TL1098
TL1097
TL1099
D3.3V
K1020
NQR0129-002X
#
C1076
C1077
0.1
R1066
R1068
100
2.2k
_0.5%
Q1010
R1069
2SC2412K/QRS
2.2k
_0.5%
Q1011
2SC2412K/QRS
R1070
1.2k
_0.5%
C1098C1097
R1067
0.10.1
120
K1019
SHORT
C1095
/6.3
10
C1096
0.1
C1036
0.1
C1032
0.1
R1022
1.5k
_0.5%
C1038
C1039
C1060
C1090
R1050
1.5k
_0.5%
C1091
C1092
0.1
R1071
1.5k
_0.5%
NQR0415-002X
#
C1093
C1094
B1001
LC1003
R1021
_0.5%
0.1
0.1
0.1
0.1
0.1
R1054
_0.5%
3.3k
R1046
_0.5%
3.3k
RA1004
#
C1058
C1033
R1024
C1034
C1035
0.1
3.3k
0.1
T
C1004
/6.3
0.1
C1043
0.1
C1044
10k
0.1
0.1
2.7k
0.1
R1030
10k
R1031
10k
C1045
0.1
DQ15
DQ15
VC2
VC3
VC0
VC1
0VDDI
0VSS
DAY_COMP
DAY_VREF
DAY_AVSS1
DAY_VRO
_0.5%
DAY_AVDD1
DAYO
DAY_AVDD2
DAY_AVSS2
DACB_AVSS2
DACB_AVDD2
DACBO
DACB_AVDD1
0.1
DACB_COMP
DACB_AVSS1
DACR_AVSS1
0.1
DACR_COMP
DACR_AVDD1
DACRO
DACR_AVDD2
DACR_AVSS2
DARC_AVSS1
DARC_AVDD1
DARCO
DARYO
DARY_AVDD1
C1062
0.01
DARY_AVSS1
DARY_VREF
DARY_VRO
R1028
DACO
2.7k
_0.5%
DAC_AVDD1
DAC_AVSS1
DAC_VREF
DAC_VRO
R1027
0VDDI
2.7k
0VSS
BLK1
BLK2
BLK3 YSI3
SIMTST
T
C1003C1002C1001
0.11022
/6.3
p10612001a_rev0
SHEET 3
A
BCD EFG
2-9 2-10
DIGITAL(FLASH MEMORY) SCHEMATIC DIAGRAM
5
LH_AR[22]
LH_AR[21]
4
LH_AR[20]
#
#
#
R1216
100
B1203
B1202
B1204
R1225
10k
C1207
IC1203
0.1
SN74LVC373APW-X
LH_AR[22]
LH_AR[14]
IC1201
LH_AR[16]
LH_AR[15]
LH_AR[14]
LH_AR[13]
LH_AR[12]
LH_AR[11]
LH_AR[10]
LH_AR[9]
R1222
R1223
#
R1224
#
LH_AR[19]
LH_AR[18]
LH_AR[8]
LH_AR[7]
LH_AR[6]
LH_AR[5]
LH_AR[4]
LH_AR[3]
LH_AR[2]
LH_AR[1]
MBL16TM90TN
A15
A14
A13
A12
A11
A10
A9
A8
A21
A20
WE
0Ω
RESET
4.7k
ACC
4.7k
WP
A19
A18
A17
A7
A6
A5
A4
A3
A2
A1 A0
16Mbit
FLASH
MEMORY
VCCQ
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
A16
VSS
DQ7
DQ6
DQ5
DQ4
VCC
DQ3
DQ2
DQ9
DQ1
DQ8
DQ0
VSS
LH_AR[17]
MADD[21]
MADD[13]
MADD[20]
MADD[12]
MADD[19]
MADD[11]
MADD[18]
MADD[10]
MADD[17]
MADD[9]
MADD[16]
MADD[8]
MADD[15]
MADD[7]
MADD[14]
MADD[6]
OE
CE
R1226
4.7k
K1201
SHORT
C1203
C1204
47
0.1
/6.3
MADD[14]
MADD[15]
LH_AR[15]
LH_AR[16]
MADD[16]
MADD[17]
LH_AR[17]
LH_AR[6]
MADD[6]
MADD[7]
LH_AR[7]
LH_AR[8]
MADD[8]
MADD[9] MADD[10]
LH_AR[9]
C1206
0.1
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
IC1202
SN74LVC373APW-X
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
VCC
VCC
LH_AR[21]
Q7
MADD[21]
D7
MADD[20]
D6
LH_AR[20]
Q6
LH_AR[19]
Q5
MADD[19]
D5
MADD[18]
D4
LH_AR[18]
Q4
LE
LH_AR[13]
Q7
MADD[13]
D7
MADD[12]
D6
LH_AR[12]
Q6
LH_AR[11]
Q5
MADD[11]
D5
D4
LH_AR[10]
Q4
LE
3
MEDIA PROCESSOR
2
MEDIA PROCESSOR
1
TO
SHEET 5
TO
SHEET 5
MADD[22]
D3.3V
GND
UART2_RX
UART2_TX
CS[0]
CS[1]
E5_RESET[L]
MADD[1-5]
MADD[6-21]
DTACK[L]
WAIT[L]
ELINK_INT[L]
OE[L]/LDS[L]
UWE[L]/UDS[L]
RD/WR[L]
ALE
MADD[1-5]
MADD[6-21]
MADD[1]
MADD[2]
MADD[3]
MADD[4]
MADD[5]
R1217
R1218
R1219
R1220
R1221
TL1216
TL1215
B1205
R1227
R1228
B1206
#
C1208
OPEN
TL1217
#
B1207
OPEN
#
B1208
OPEN#
100
100
OPEN#
MADD[5]
MADD[4]
MADD[3]
MADD[2]
MADD[1]
MADD[21]
MADD[20]
MADD[19]
MADD[18]
MADD[17]
MADD[16]
MADD[15]
MADD[14]
MADD[13]
MADD[12]
MADD[11]
MADD[10]
MADD[9]
MADD[8]
MADD[7]
MADD[6]
GND
#
#
MADD[21]
LH_AR[1]
100
LH_AR[2]
100
LH_AR[3]
100
LH_AR[4]
100
LH_AR[5]
100
TL1227
MADD[12]
TL1226
MADD[11]
TL1225
MADD[10]
TL1224
MADD[9]
TL1223
MADD[8]
TL1222
MADD[7]
TL1221
MADD[6]
TL1220
MADD[20]
MADD[19]
MADD[18]
MADD[17]
MADD[16]
MADD[15]
MADD[14]
MADD[13]
MADD[12]
MADD[11]
MADD[10]
MADD[9]
MADD[8]
MADD[7]
MADD[6]
RA1201
10k
RA1202
10k
RA1203
10k
RA1204
10k
4.7k
R1229
D3.3VMADD[13]
4.7k
4.7k
R1230
R1231
CN1202
#
GND
UART2_CTS
UART2_RX
UART2_TX
UART2_RTS
CS_L[1]
ALE
RST[L]
MADD[5]
MADD[4]
MADD[3]
MADD[2]
MADD[1]
MADD[21]/MDT[15]
MADD[20]/MDT[14]
MADD[19]/MDT[13]
MADD[18]/MDT[12]
MADD[17]/MDT[11]
MADD[16]/MDT[10]
MADD[15]/MDT[9]
MADD[14]/MDT[8]
GND
MADD[13]/MDT[7]
MADD[12]/MDT[6]
MADD[11]/MDT[5]
MADD[10]/MDT[4]
MADD[9]/MDT[3]
MADD[8]/MDT[2]
MADD[7]/MDT[1]
MADD[6]/MDT[0]
DTACK[L]/WAIT[L]
MEDUSA_INT[L]
OE[L]/LDS[L]
UWE[L]/UDS[L]
RD/WR[L]
GND
NOT
USED
p20417001a_rev0
SHEET 4
A
BCDEFG
2-11 2-12
DIGITAL(MADIA PROCESSOR) SCHEMATIC DIAGRAM
1394PHY SHEET 7
5
4
3
2
TO VIDEO IF SHEET 3
1
TO VIDEO IF
SHEET 3
TO VIDEO IF
SHEET 3
TO VIDEO IF
SHEET 3
TO VIDEO IF
SHEET 3
TO 1394 PHY
SHEET 7
TO VIDEO IF
SHEET 3
TO VIDEO IF
SHEET 3
DDR SDRAM
SHEET 6
AO_D[0]
AO_SCLK
AO_FSYNC
AO_IEC958
AO_MCLKO
AI_D[0]
VIDEO_MUTE[H]
PHY_CNA
480I[H]
B1404
##
B1405
##
CLKI
TL1402
CLKX
TL1437
R1408
R1409
D3.3V
R1410
TL1407
R1411
R1412
R1413
VI_D[2]
VI_D[3]
VI_D[4]
VI_D[5]
VI_D[6]
VI_D[7]
VI_D[8]
VI_D[9]
R1414
V3.3V
K1407
SHORT
C1450
0.1
VI_D[2-9]
VO_D[0-15]
VIDEO_27M
DAC_CVBS_OUT
DAC_SY_OUT
DAC_SC_OUT
DAC_Y_OUT
DAC_PB_OUT
DAC_PR_OUT
V3.3V
PHY_DATA[0-7]
PHY_CTL[1]
PHY_CTL[0]
PHY_LREQ
PHY_LPS
PHY_LINK_ON
PHY_CLK
DIGI3.3V
D2.5V
D1.8V
GND
D5.0V
D1.8V
D2.5V K1405
DIGI3.3V
GND
D3.3V
VDDI1.8
GND
VI_D[2-9]
VO_D[0-15]
PHY_DATA[0-7]
D5.0V
GND
X1401
NAX0580-001X
C1401
C1408
0.1
R1402
0Ω
R1421
OPEN#
R1422
OPEN#
R1423
OPEN#
R1424
OPEN#
R1425
OPEN#
R1426
OPEN#
C1452
R1493
0Ω
C1453
K1408
SHORT
C1454
#
OPEN
VDDI1.8
C1455
C1456
#
OPEN
B1401
LC1401
OPEN#NQR0512-008x
C1402
0.10.1
B1402
#
OPEN
C1409
0.1
B1403
#
OPEN
C1405
0.1
/6.3
LC1402
NQR0512-008X
C1412
C1411
0.1
100 0.10.10.110
/6.3
LC1403
NQR0512-008X
C1413 C1414
47 0.1
/6.3
A
R1415
R1416
R1417
R1494
R1495
VO_D[0]
VO_D[1]
VO_D[2]
VO_D[3]
VO_D[4]
VO_D[5]
VO_D[6]
VO_D[7]
VO_D[8]
VO_D[9]
VO_D[10]
VO_D[11]
VO_D[12]
VO_D[13]
VO_D[14]
VO_D[15]
R1419
TL1412
TL1490
TL1491
R1420
R1485
R1486
R1487
R1488
R1489
R1490
0.1
0.1
0.1
R1491
1k
R1427
100
PHY_DATA[7]
PHY_DATA[6]
PHY_DATA[5]
PHY_DATA[4]
PHY_DATA[3]
PHY_DATA[2]
PHY_DATA[1]
PHY_DATA[0]
R1428
R1429
R1430
R1431
R1432
C1417
C1406
0.1
C1461
C1415
0.1
OPEN
C1416
0.1
C1473C1472C1471C1469C1468C1467C1466C1465C1464 C1470
0.10.10.10.10.10.10.10.10.1 0.1
BCD EFG
CLKO_DAC/GPIOExt[35]
1k
BYPASS_PLL
TL1403
EPD[L]
TL1404
RSTO[L]
10k
TCK
10k
TDI
100
TDO
10k
TMS
10k
TRST[L]
VI_D[0]
VI_D[1]
VI_D[2]
VI_D[3]
VI_D[4]
VI_D[5]
VI_D[6]
VI_D[7]
VI_D[8]
VI_D[9]
1k
VI_E[0]
1k
VI_VSYNC[0]
VI_CLK[0]
1k
VI_CLK[1]
1k
VI_VSYNC[1]/IvGPIOExt[45]
TL1489
VI_E[1]/IvGPIOExt[29]
10k
VO2_D[0]
10k
VO2_D[1]
TL1452
VO2_D[2]
TL1453
VO2_D[3]
TL1454
VO2_D[4]
TL1455
VO2_D[5]
TL1456
VO2_D[6]
TL1457
VO2_D[7]
TL1458
VO2_D[8]
TL1459
VO2_D[9]
VO_D[0]/IvGPIOExt[0]
VO_D[1]/IvGPIOExt[1]
RA1401
VO_D[2]/IvGPIOExt[2]
100
VO_D[3]/IvGPIOExt[3]
VO_D[4]/IvGPIOExt[4]
VO_D[5]/IvGPIOExt[5]
RA1402
VO_D[6]/IvGPIOExt[6]
100
VO_D[7]/IvGPIOExt[7]
VO_D[8]/IvGPIOExt[8]
VO_D[9]/IvGPIOExt[9]
RA1403
VO_D[10]/IvGPIOExt[10]
100
VO_D[11]/IvGPIOExt[11]
VO_D[12]/IvGPIOExt[12]
VO_D[13]/IvGPIOExt[13]
RA1404
VO_D[14]/IvGPIOExt[14]
100
VO_D[15]/IvGPIOExt[15]
100
VO_E/IvGPIOExt[30]
VO_ACTIVE
VO_HSYNC
VO_VSYNC
100
VO_CLK
OPEN#
DAC1_OUT
OPEN#
DAC2_OUT
OPEN#
DAC3_OUT
OPEN#
DAC4_OUT
OPEN#
DAC5_OUT
OPEN#
DAC6_OUT
DAC_DVSS_1
DAC_DVDD
DAC_VDD_0
DAC_VDD_3
D1402D1401
1SS3551SS355
DAC4_OUTB
DAC2_OUTB
USB_AVDD_0
USB_AVDD_1
USB_AGND_0
USB_AGND_1
TL1413
DPLUS_0
TL1414
DMINUS_0
TL1415
HOST_PO_0
HOST_OC_0
TL1417
DPLUS_1
TL1418
DMINUS_1
TL1419
HOST_PO_1/GPIOExt[43]
TL1420
HOST_OC_1/GPIOExt[44]
USB_48MHz/GPIOExt[36]
1394_PHY_DATA[7]
1394_PHY_DATA[6]
RA1405
1394_PHY_DATA[5]
100
1394_PHY_DATA[4]
1394_PHY_DATA[3]
1394_PHY_DATA[2]
RA1406
1394_PHY_DATA[1]
100
1394_PHY_DATA[0]
100
1394_PHY_CTL[1]
100
1394_PHY_CTL[0]
100
1394_LREQ
100
1394_LPS
1394_LINK_ON
1394_PHY_CLK
OPEN#
VDD_15
VDDP_09
VDD_14
VDDP_10
C1425C1424C1423
0.10.10.1
VDD_00
VDD_30
VDD_23
TO DDR SDRAM
SHEET 6
1394PHY SHEET 7
VDDP_01
VDDP_02
VDDP_03
VDDP_04
VDDP_21
VDDP_20
VDDP_19
VDDP_19A
T
T
C1418
0.1
0.1
C1463
0.1
C1475
C1474
0.10.1
C1420C1404
C1419
OPEN
/6.3
SSTL2_VDD
T
/6.3
K1401
SHORT
T
T
OPEN
/6.3
VDDP_08A
C1422
C1421
0.10.11047
C1430C1429C1428C1427
C1439
C1438C1437C1436C1434 C1435
0.10.10.110
0.1
SDRAM_A[14-17]
SDRAM_A[14-17]
SDRAM_CLK_L[1]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
SDRAM_CLK[0]
SDRAM_WE_L
SDRAM_CKE
0Ω
0Ω
100
100
100
R1478
R1479
R1480
R1481
AI_D[0]
AI_SCLK
AO_MCLKO
AI_FSYNC
AI2_D/GPIO[7]
AI_D[1]/GPIO[6]
VDD25_02
VDD25_08
VDD25_03
VDD25_04
VDD25_05
VDD25_06
K1402
SHORT
K1403
SHORT
K1404
#
#
TO FLASHMEMORY
SHEET 4
ATAPI SHEET 8
100
R1476
R1477
TL1434
AO_IEC958
A2_FSYNC/GPIOExt[34]
AO_MCLKI/GPIOExt[33]
BIAS_5V01
BIAS_5V00
C1442
0.1
C1444
0.1
C1445
0.1
GND
D5.0V
D3.3V
100
OPEN
R1483
R1482
AI_MCLKO
AI_MCLKI/GPIOExt[32]
VDD_01
VDD_02
VDD25_00
VDD_03
VDD_09
VDD_08
VDD25_01
GND
D3.3V
SSTL2_VDD
100
R1475
TL1432
TL1433
AO2_D[0]
AO_FSYNC
A2_SCLK/GPIOExt[31]
AVDD_2
AVDD_1
AVDD_0
C1446
0.1
100
100
R1474
R1473
TL1438
TL1439
K1406
SHORT
AO_SCLK
AVDD_3
AO_D[3]
XTALVDD
AO_D[2]
TL1440
SDRAM_CLK_L[1]
AO_D[1]
AO_D[0]
SDRAM_VREF
SDRAM_CLK_L[1]
XTALVSS
AGND_2
AGND_1
AGND_3
AGND_0
SDRAM_CLK_L[0]
SDRAM_CLK[1]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
DMN8652-B0
GROUND
SDRAM_WE_L
SDRAM_CLK[0]
SDRAM_WE[L]
SDRAM_CLK[0]
GROUND
GROUND
SDRAM_RAS_L
SDRAM_CKE
SDRAM_CKE
IC1401
GROUND
SDRAM_A[17]
SDRAM_CAS_L
SDRAM_CAS[L]
SDRAM_RAS[L]
GROUND
GROUND
SDRAM_A[16]
SDRAM_A[16]
SDRAM_A[17]
GROUND
GROUND
SDRAM_A[15]
SDRAM_A[14]
SDRAM_A[15]
GROUND
SDRAM_A[13]
SDRAM_A[13]
SDRAM_A[14]
GROUND
GROUND
SDRAM_A[12]
SDRAM_A[11]
SDRAM_A[12]
GROUND
SDRAM_A[10]
SDRAM_A[9]
SDRAM_A[11]
SDRAM_A[10]
GROUND
GROUND
SDRAM_A[8]
SDRAM_A[9]
GROUND
SDRAM_A[7]
SDRAM_A[7]
SDRAM_A[8]
GROUND
GROUND
SDRAM_A[6]
SDRAM_A[5]
SDRAM_A[4]
SDRAM_A[3]
SDRAM_A[3]
SDRAM_A[6]
SDRAM_A[5]
SDRAM_A[4]
GROUND
GROUND
GROUND
GROUND
##
CN1405
TO VIDEO
(JUNCTION)
CN7105
SHEET 20
SDRAM_A[2]
SDRAM_A[1]
SDRAM_A[1]
SDRAM_A[2]
GROUND
GROUND
JLIP_RX
QGF1016F2-04W
SDRAM_A[0]
SDRAM_DQM[3]
SDRAM_A[0]
GROUND
GND
SDRAM_DQS[3]
SDRAM_DQ[31]
SDRAM_DQS[3]
SDRAM_DQM[3]
GROUND
GROUND
D3.3V
JLIP_TX
SDRAM_DQ[29]
SDRAM_DQ[30]
SDRAM_DQ[31]
SDRAM_DQ[30]
GROUND
GROUND
#
CN1404
SDRAM_DQ[27]
SDRAM_DQ[28]
SDRAM_DQ[29]
SDRAM_DQ[28]
GROUND
GROUND
D3.3V
QGF2001F2-04V
SDRAM_DQ[25]
SDRAM_DQ[26]
SDRAM_DQ[26]
SDRAM_DQ[27]
GROUND
GROUND
GND
JLIP_TX
SDRAM_DQM[2]
SDRAM_DQ[24]
SDRAM_DQ[25]
SDRAM_DQ[24]
GROUND
GROUND
JLIP_RX
SDRAM_DQS[2]
SDRAM_DQ[23]
SDRAM_DQM[2]
SDRAM_DQS[2]
GROUND
GROUND
SDRAM_DQ[21]
SDRAM_DQ[22]
SDRAM_DQ[22]
SDRAM_DQ[23]
GROUND
GROUND
QGF1016C2-04W
CN1403
#
NOT
USED
SDRAM_DQ[19]
SDRAM_DQ[20]
SDRAM_DQ[21]
SDRAM_DQ[19]
SDRAM_DQ[20]
VREF
REFVSS
1.18k
R1401
TL1493
TL1494
TL1495
RX
TX
GND
SDRAM_DQ[17]
SDRAM_DQ[18]
SDRAM_DQ[18]
REFVDD
_1%
0.1
0.01
C1447
C1448
D5.0V
SDRAM_DQS[1]
SDRAM_DQM[1]
SDRAM_DQ[16]
SDRAM_DQM[1]
SDRAM_DQS[1]
SDRAM_DQ[16]
SDRAM_DQ[17]
SIO_IRTX2
SIO_IRRX/GPIOExt[39]
SIO_IRTX1/GPIOExt[40]
TL1436
TL1492
A_MUTE2[H]
VIDEO_RST[L]
TO
VIDEO IF
SHEET 3
SDRAM_DQ[13]
SDRAM_DQ[14]
SDRAM_DQ[15]
SDRAM_DQ[14]
SDRAM_DQ[13]
SDRAM_DQ[15]
SIO_UART2_RX/GPIOExt[37]
SIO_SDA
SIO_SCL
TL1441
TL1442
SPI_CLK
SPI_MOSI
SDRAM_DQ[8]
SDRAM_DQ[9]
SDRAM_DQ[10]
SDRAM_DQ[11]
SDRAM_DQ[12]
SDRAM_DQ[9]
SDRAM_DQ[12]
SDRAM_DQ[11]
SDRAM_DQ[10]
SIO_UART2_TX/GPIOExt[38]
SIO_UART2_RTS
SIO_UART2_CTS
SIO_UART1_RX
100
100
R1434
R1435
TL1422
OPEN
R1492
D3.3V
JLIP_TX
QGA2001C2-04V
##
CN1402
NOT
USED
SDRAM_DQ[6]
SDRAM_DQ[7]
SDRAM_DQM[0]
SDRAM_DQS[0]
SDRAM_DQ[7]
SDRAM_DQ[6]
SDRAM_DQ[8]
SDRAM_DQS[0]
SDRAM_DQM[0]
SIO_UART1_TX
SIO_UART1_RTS/GPIOExt[41]
SIO_UART1_CTS/GPIOExt[42]
SIO_SPI_MOSI
SIO_SPI_MISO
100
0Ω
R1436
R1437
TL1423
TL1424
GND
JRIP_RX
SDRAM_DQ[0]
SDRAM_DQ[1]
SDRAM_DQ[2]
SDRAM_DQ[3]
SDRAM_DQ[4]
SDRAM_DQ[5]
SDRAM_DQ[0]
SDRAM_DQ[5]
SDRAM_DQ[3]
SDRAM_DQ[2]
SDRAM_DQ[4]
SDRAM_DQ[1]
SIO_SPI_CS[0]/GPIOExt[24]
SIO_SPI_CS[1]/GPIOExt[25]
SIO_SPI_CS[2]
SIO_SPI_CS[3]
SIO_SPI_CLK
100
100
100
TL1448
R1438
R1440
R1439
TL1425
SPI_CLK
SPI_MOSI
A_DAC_CS
VIDEO_CS
VIDEO_RXD
TO VIDEO IF
SHEET 3
SN74HCT08APW
IC1404
LDS[L]/OE[L]
UDS[L]/UWE[L]
GPIO[4] /PCMCIA_IOW[L]
GPIO[5] /PCMCIA_IOR[L]
WR[L]/LWE[L]
MADDR[21]/MDATA[15]
MADDR[20]/MDATA[14]
MADDR[19]/MDATA[13]
MADDR[18]/MDATA[12]
MADDR[17]/MDATA[11]
MADDR[16]/MDATA[10]
MADDR[15]/MDATA[9]
MADDR[14]/MDATA[8]
MADDR[13]/MDATA[7]
MADDR[12]/MDATA[6]
MADDR[11]/MDATA[5]
MADDR[10]/MDATA[4]
MADDR[9]/MDATA[3]
MADDR[8]/MDATA[2]
MADDR[7]/MDATA[1]
MADDR[6]/MDATA[0]
ATAPI_ADDR[0]
ATAPI_ADDR[1]
ATAPI_ADDR[2]
ATAPI_ADDR[3]
ATAPI_ADDR[4]
ATAPI_DATA[15]
ATAPI_DATA[14]
ATAPI_DATA[13]
ATAPI_DATA[12]
ATAPI_DATA[11]
ATAPI_DATA[10]
ATAPI_DATA[9]
ATAPI_DATA[8]
ATAPI_DATA[7]
ATAPI_DATA[6]
ATAPI_DATA[5]
ATAPI_DATA[4]
ATAPI_DATA[3]
ATAPI_DATA[2]
ATAPI_DATA[1]
ATAPI_DATA[0]
ATAPI_RESET
ATAPI_DMAACK[L]
ATAPI_DMARQ
ATAPI_IORDY
ATAPI_INTRQ
ATAPI_DIOR[L]
ATAPI_DIOW[L]
ATAPI2_RESET
ATAPI2_DMAACK[L]
ATAPI2_DMARQ
ATAPI2_IORDY
ATAPI2_INTRQ
ATAPI2_DIOR[L]
ATAPI2_DIOW[L]
ATAPI2_ADDR[0]
ATAPI2_ADDR[1]
ATAPI2_ADDR[2]
ATAPI2_ADDR[3]
ATAPI2_ADDR[4]
ATAPI2_DATA[15]
ATAPI2_DATA[14]
ATAPI2_DATA[13]
ATAPI2_DATA[12]
ATAPI2_DATA[11]
ATAPI2_DATA[10]
ATAPI2_DATA[9]
ATAPI2_DATA[8]
ATAPI2_DATA[7]
ATAPI2_DATA[6]
ATAPI2_DATA[5]
ATAPI2_DATA[4]
ATAPI2_DATA[3]
ATAPI2_DATA[2]
ATAPI2_DATA[1]
ATAPI2_DATA[0]
CS0_8BIT
DTACK[L]
MADDR[26]
MADDR[25]
MADDR[24]
MADDR[23]
MADDR[22]
MADDR[5]
MADDR[4]
MADDR[3]
MADDR[2]
MADDR[1]
RST[L]
MCONFIG
GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
WAIT[L]
R1471
100
ALE
R1469
R1468
R1467
R1466
R1465
TL1486
TL1485
R1462
R1461
R1460
R1459
R1458
TL1484
CS[5]
TL1483
CS[4]
TL1482
CS[3]
TL1481
CS[2]
R1453
CS[1]
R1452
CS[0]
TL1480
TL1479
TL1478
TL1477
R1451
R1450
RA1411
100
RA1410
100
RA1409
100
RA1408
100
RA1407
100
R1472R1470
0Ω1k
C1459
1k
100
100
100
100
100
100
100
100
100
100
100
100
100
R1441
10k
CS[1]
CS[0]
MADD[22]
MADD[5]
MADD[4]
MADD[3]
MADD[2]
MADD[1]
MADD[21]
MADD[20]
MADD[19]
MADD[18]
MADD[17]
MADD[16]
MADD[15]
MADD[14]
MADD[13]
MADD[12]
MADD[11]
MADD[10]
MADD[9]
MADD[8]
MADD[7]
MADD[6]
ATA_ADD[0]
ATA_ADD[1]
ATA_ADD[2]
ATA_ADD[3]
ATA_ADD[4]
ATA_DAT[15]
ATA_DAT[14]
ATA_DAT[13]
ATA_DAT[12]
ATA_DAT[11]
ATA_DAT[10]
ATA_DAT[9]
ATA_DAT[8]
ATA_DAT[7]
ATA_DAT[6]
ATA_DAT[5]
ATA_DAT[4]
ATA_DAT[3]
ATA_DAT[2]
ATA_DAT[1]
ATA2_ADD[0]
ATA2_ADD[1]
ATA2_ADD[2]
ATA2_ADD[3]
ATA2_ADD[4]
ATA2_DAT[15]
ATA2_DAT[14]
ATA2_DAT[13]
ATA2_DAT[12]
ATA2_DAT[11]
ATA2_DAT[10]
ATA2_DAT[9]
ATA2_DAT[8]
ATA2_DAT[7]
ATA2_DAT[6]
ATA2_DAT[5]
ATA2_DAT[4]
ATA2_DAT[3]
ATA2_DAT[2]
ATA2_DAT[1]
ATA2_DAT[0]
S1401
C1458C1457
0.10.1
SN74LV08APW
IC1405
OPEN
D1403
1SS355
SDRAM_RAS_L
SDRAM_CAS_L
SDRAM_DQM[0-3]
SDRAM_DQS[0-3]
SDRAM_A[0-13]
SDRAM_DQ[16-31]
SDRAM_DQ[0-15]
MADD[1-5]
MADD[6-21]
ATA_ADD[0-4]
ATA_DAT[0-15]ATA_DAT[0]
ATA2_DAT[0-15]
4.7k
4.7k
R1443
R1444
SDRAM_VREF
SDRAM_CLK_L[1]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
SDRAM_CLK[0]
TO
SDRAM_WE_L
DDR SDRAM
SDRAM_CKE
SDRAM_RAS_L
SHEET 6
SDRAM_CAS_L
SDRAM_DQM[0-3]
SDRAM_DQS[0-3]
SDRAM_A[0-13]
SDRAM_DQ[16-31]
SDRAM_DQ[0-15]
ALE
OE[L]/LDS[L]
UWE[L]/UDS[L]
ELINK_INT[L]
RD/WR[L]
TO
WAIT[L]
DTACK[L]
FLASH MEMORY
CS[1]
SHEET 4
CS[0]
MADD[22]
MADD[1-5]
MADD[6-21]
/MDT[0-15]
TO 1394PHY
PHY_RESET[L]
SHEET 7
ATA_ADD[0-4]
ATA_DAT[0-15]
ATA_RESET
ATA_DMAACK[L]
ATA_DMARQ
ATA_IORDY
ATA_INTRQ
ATA_DIOR[L]
ATA_DIOW[L]
TO ATAPI
ATA2_RESET
SHEET 8
ATA2_DMAACK[L]
ATA2_DMARQ
ATA2_IORDY
ATA2_INTRQ
ATA2_DIOR[L]
ATA2_DIOW[L]
ATA2_ADD[0-4]
ATA2_DAT[0-15]
R1445
R1446
R1447
R1448
R1449
DAC_RST[L]
100
K_BUS_CLK
100
K_BUS_REQ
SYS_RESET[L]
K_BUS_OUT
K_BUS_IN
E5_RESET[L]
UART2_TX
UART2_RX
TO VIDEO IF
SHEET 3
TO
FLASH MEMORY
SHEET 4
100
100
100
p10613001a_rev0
SHEET 5
2-13 2-14
DIGITAL(DDR SDRAM) SCHEMATIC DIAGRAM
5
4
3
2
MEDIA PROCESSOR
TO
SHEET 5
D3.3V
SSTL2_VDD
SDRAM_DQ[0-15]
SDRAM_DQ[16-31]
SDRAM_A[0-17]
SDRAM_CKE
SDRAM_RAS_L
SDRAM_CAS_L
SDRAM_WE_L
SDRAM_DQM[0]
SDRAM_DQM[1]
SDRAM_DQM[2]
SDRAM_DQM[3]
SDRAM_DQS[0]
SDRAM_DQS[1]
SDRAM_DQS[2]
SDRAM_DQS[3]
SDRAM_CLK[0]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
SDRAM_CLK_L[1]
SDRAM_VREF
IC1603 IC1604
IC1603IC1603 IC1604IC1603
SDRAM_DQ[0]
RA1609
SDRAM_DQ[1]
SDRAM_DQ[2]
SDRAM_DQ[3]
SDRAM_DQ[4]
SDRAM_DQ[5]
SDRAM_DQ[6]
SDRAM_DQ[7]
SDRAM_DQ[8]
SDRAM_DQ[9]
SDRAM_DQ[10]
SDRAM_DQ[11]
SDRAM_DQ[12]
SDRAM_DQ[13]
SDRAM_DQ[14]
SDRAM_DQ[15]
SDRAM_DQ[16]
SDRAM_DQ[17]
SDRAM_DQ[18]
SDRAM_DQ[19]
SDRAM_DQ[20]
SDRAM_DQ[21]
SDRAM_DQ[22]
SDRAM_DQ[23]
SDRAM_DQ[24]
SDRAM_DQ[25]
SDRAM_DQ[26]
SDRAM_DQ[27]
SDRAM_DQ[28]
SDRAM_DQ[29]
SDRAM_DQ[30]
SDRAM_DQ[31]
IC1701
PQ015YZ01Z
K1702
SHORT
C1703 C1704
0.1 100
/6.3
K1701
SHORT
C1701
0.1
D3.3V
SSTL2_VDD
GND
GND
SDRAM_DQ[0-15]
SDRAM_DQ[16-31]
SDRAM_A[0-17]
SDRAM_CKE
SDRAM_RAS_L
SDRAM_CAS_L
SDRAM_WE_L
SDRAM_DQM[0]
SDRAM_DQM[1]
SDRAM_DQM[2]
SDRAM_DQM[3]
SDRAM_DQS[0]
SDRAM_DQS[1]
SDRAM_DQS[2]
SDRAM_DQS[3]
SDRAM_CLK[0]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
SDRAM_CLK_L[1]
SDRAM_VREF
C1653
OPEN
C1654
0.1
C1702
/6.3
R1701 R1702
270 1k
C1710
C1708
/6.3
/6.3
47
47
T
T
OS
R1705
C1707
100
0.1
R1703
2.2k
_0.5%
R1704
2.2k
_0.5%
OPEN
C1705
OPEN
C1706
C1709
OPEN
C1645
OPEN
0.1
C1646
0.1
22
RA1610
22
RA1611
22
RA1612
22
RA1613
22
RA1614
22
RA1615
22
RA1616
22
SDRAM_A[0]
RA1625
SDRAM_A[1]
22
SDRAM_A[2]
SDRAM_A[3]
SDRAM_A[4]
RA1626
SDRAM_A[6]
22
SDRAM_A[8]
SDRAM_A[11]
SDRAM_A[5]
RA1627
SDRAM_A[7]
22
SDRAM_A[9]
SDRAM_A[12]
SDRAM_A[10]
RA1628
SDRAM_A[15]
22
SDRAM_A[14]
SDRAM_A[13]
SDRAM_A[16]
SDRAM_A[17]
SDRAM_CKE
SDRAM_RAS_L
SDRAM_CAS_L
SDRAM_WE_L
R1641
R1642
R1601
R1602
R1603
R1604
RA1629
100
RA1630
100
RA1631
100
RA1632
100
R1643
R1644
R1605
R1606
R1607
R1608
SDRAM_DQM[0]
SDRAM_DQM[1] DDR_A[5]
SDRAM_DQM[2]
SDRAM_DQM[3]
SDRAM_DQS[0]
SDRAM_DQS[1]
SDRAM_DQS[2]
SDRAM_DQS[3]
SDRAM_CLK[0]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
SDRAM_CLK_L[1]
R1653
R1654
R1655
R1656
R1657
R1658
R1659
R1660
R1613
R1614
R1615
R1616
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]
DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]
DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[6]
DDR_A[8]
DDR_A[11]
DDR_A[5]
DDR_A[7]
DDR_A[9]
DDR_A[12]
DDR_A[10]
DDR_BA[1]
DDR_BA[0]
DDR_CS[1]
22
DDR_CS[0]
22
22
DDR_CKE
22
DDR_RAS_L
22
DDR_CAS_L
22
DDR_WE_L
DDR_A[10]
DDR_BA[1]
DDR_BA[0]
100
100
100
100
100
100
22
DDR_DQM[0]
22
DDR_DQM[1]
22
DDR_DQM[2]
22
DDR_DQM[3]
22
DDR_DQS[0]
22
DDR_DQS[1]
22
DDR_DQS[2]
22
DDR_DQS[3]
22
DDR_CLK[0]
22
DDR_CLK[1]
22
DDR_CLK_L[0]
22
DDR_CLK_L[1]
DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
DDR_A[6]
DDR_A[7]
DDR_A[8]
DDR_A[9]
DDR_A[11]
DDR_A[12]
DDR_CKE
DDR_RAS_L
DDR_CAS_L
DDR_WE_L
RA1617
100
RA1618
100
RA1619
100
RA1620
100
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]
C1649 C1651 C1643
OPEN
C1641 C1650
C1642
0.1
0.1
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQS[0]
DDR_DQM[0]
DDR_WE_L
DDR_CAS_L
DDR_RAS_L
DDR_BA[0]
DDR_BA[1]
DDR_A[10]
DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_DQ[15]
DDR_DQ[14]
DDR_DQ[13]
DDR_DQ[12]
DDR_DQ[11]
DDR_DQ[10]
DDR_DQ[9]
DDR_DQS[1]
DDR_DQM[1]
DDR_WE_L
DDR_CAS_L
DDR_RAS_L
DDR_BA[0]
DDR_BA[1]
DDR_A[10]
DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
R1620
R1618
R1619
0.1
R1617
C1626
0.1
C1621
0.1
C1622
0.1
C1623
0.1
100
C1627
0.1
100
C1628
C1610
0.1
C1605
0.1
C1606
0.1
C1607
0.1
100
C1611
0.1
100
C1612
HY5DU561622CT-J
VDD
VSS
DDR_DQ[15]
D15
D0
VDDQ
VSSQ
DDR_DQ[14]
D14
D1
D2
VSSQ
D3
D4
VDDQ
D5
D6
VSSQ
D7
NC
VDDQ
LDQS
NC
VDD
DNU
LDM
WE
CAS
RAS
CS
NC
BA0
BA1
A10/AP
A0
A1
A2
A3
VDD
0.1
0.1
OS
OPEN
C1603
IC1601IC1601
IC1601
IC1601
HY5DU561622CT-J
VDD
D0
VDDQ
D1
D2
VSSQ
D3
D4
VDDQ
D5
D6
VSSQ
D7
NC
VDDQ
LDQS
NC
VDD
DNU
LDM
WE
CAS
RAS
CS
NC
BA0
BA1
A10/AP
A0
A1
A2
A3
VDD
C1601 C1602
DDR_DQ[13]
D13
C1625
0.1
VDDQ
DDR_DQ[12]
D12
DDR_DQ[11]
D11
VSSQ
DDR_DQ[10]
D10
DDR_DQ[9]
D9
C1624
0.1
VDDQ
DDR_DQ[8]
D8
NC
VSSQ
DDR_DQS[1]
UDQS
NC
VREF
VSS
UDM
CK
CK
CKE
NC
A12
A11
A9
A8
A7
A6
A5
A4
VSS
VSS
D15
VSSQ
D14
D13
VDDQ
D12
D11
VSSQ
D10
D9
VDDQ
D8
NC
VSSQ
UDQS
NC
VREF
VSS
UDM
CK
CK
CKE
NC
A12
A11
A9
A8
A7
A6
A5
A4
VSS
OS
/4 /4
220 220
DDR_DQM[1]
DDR_CKE
DDR_A[12]
DDR_A[11]
DDR_A[9]
DDR_A[8]
DDR_A[7]
DDR_A[6]
DDR_A[5]
DDR_A[4]
C1609
0.1
C1608
0.1
DDR_DQS[0]
DDR_DQM[0]
DDR_CLK_L[1]
DDR_CLK[1]
C1659
OPEN
C1660
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7] DDR_DQ[24]DDR_DQ[8]
C1655
OPEN
C1656
0.1
DDR_CKE
DDR_A[12]
DDR_A[11]
DDR_A[9]
DDR_A[8]
DDR_A[7]
DDR_A[6]
DDR_A[5]
DDR_A[4]
0.1
R1622
R1621
RA1621
RA1622
RA1623
RA1624
R1629
R1630
100
100
100
100
100
100
OPEN
C1652
DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]
0.1
100
100
OPEN
DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQS[2]
C1644
DDR_DQM[2]
DDR_WE_L
DDR_CAS_L
DDR_RAS_L
DDR_BA[0]
DDR_BA[1]
DDR_A[10]
DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_DQ[31]
DDR_DQ[30]
DDR_DQ[29]
DDR_DQ[28]
DDR_DQ[27]
DDR_DQ[26]
DDR_DQ[25]
DDR_DQS[3]
DDR_DQM[3]
DDR_WE_L
DDR_CAS_L
DDR_RAS_L
DDR_BA[0]
DDR_BA[1]
DDR_A[10]
DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
R1626
R1624
R1625
0.1
R1623
C1634
0.1
C1629
0.1
C1630
0.1
C1631
0.1
100
C1635
0.1
100
C1636
0.1
C1618
0.1
C1613
0.1
C1614
0.1
C1615
0.1
100
C1619
0.1
100
C1620
0.1
IC1604IC1604
HY5DU561622CT-J
VDD
D0
VDDQ
D1
D2
VSSQ
D3
D4
VDDQ
D5
D6
VSSQ
D7
NC
VDDQ
LDQS
NC
VDD
DNU
LDM
WE
CAS
RAS
CS
NC
BA0
BA1
A10/AP
A0
A1
A2
A3
VDD
C1604
IC1602
IC1602IC1602IC1602
HY5DU561622CT-J
VDD
D0
VDDQ
D1
D2
VSSQ
D3
D4
VDDQ
D5
D6
VSSQ
D7
NC
VDDQ
LDQS
NC
VDD
DNU
LDM
WE
CAS
RAS
CS
NC
BA0
BA1
A10/AP
A0
A1
A2
A3
VDD
OPEN
VSSQ
VDDQ
VSSQ
VDDQ
VSSQ
UDQS
VREF
OS
VSSQ
VDDQ
VSSQ
VDDQ
VSSQ
UDQS
VREF
OS
VSS
DDR_DQ[31]
D15
DDR_DQ[30]
D14
DDR_DQ[29]
D13
C1633
0.1
DDR_DQ[28]
D12
DDR_DQ[27]
D11
DDR_DQ[26]
D10
DDR_DQ[25]
D9
C1632
0.1
DDR_DQ[24]
D8
NC
DDR_DQS[3]
DDR_DQM[3]
DDR_CLK_L[0]
DDR_CLK[0]
DDR_CKE
DDR_A[12]
DDR_A[11]
DDR_A[9]
DDR_A[8]
DDR_A[7]
DDR_A[6]
DDR_A[5]
DDR_A[4]
DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
C1617
0.1
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
C1616
0.1
DDR_DQ[23]
DDR_DQS[2]
DDR_DQM[2]
DDR_CKE
DDR_A[12]
DDR_A[11]
DDR_A[9]
DDR_A[8]
DDR_A[7]
DDR_A[6]
DDR_A[4]
C1661
OPEN
C1662
C1657
OPEN
C1658
0.1
0.1
R1628
R1627
R1631
R1632
100
100
100
100
NC
VSS
UDM
CK
CK
CKE
NC
A12
A11
A9
A8
A7
A6
A5
A4
VSS
VSS
D15
D14
D13
D12
D11
D10
D9
D8
NC
NC
VSS
UDM
CK
CK
CKE
NC
A12
A11
A9
A8
A7
A6
A5
A4
VSS
1
p10614001a_rev0
SHEET 6
A
BCDEFG
2-15 2-16
DIGITAL(1394 PHY) SCHEMATIC DIAGRAM
5
4
#
C1813
OPEN
X1801
NAX0551-001X
NAX0666-001X
IC1801
TSB41AB2PAP
12p
C1809
12p
C1808
SHORT
#
C1805
0.1
#
SHORT
10
µ
C1810
OPEN
K1801
C1807
0.1
R1820
10k
0Ω
R1822
#
B1801B1802
L1801L1802 C1804
10
µ
0.1
D3.3V
C1803C1806
/6.3/6.3
1010
#
C1814
OPEN
MEDIA PROCESSOR
3
2
TO
SHEET 5
D3.3V
PHY_RESET[L]
PHY_LREQ
PHY_CLK
PHY_CNA
PHY_CTL[0]
PHY_CTL[1]
PHY_DATA[0-7]
PHY_LPS
PHY_LINK_ON
GND
PHY_DATA[0-7]
R1801
R1802
PHY_DATA[0]
PHY_DATA[1]
PHY_DATA[2]
PHY_DATA[3]
PHY_DATA[4]
PHY_DATA[5]
PHY_DATA[6]
PHY_DATA[7]
RA1801
10k
0Ω
0Ω
RA1802
10k
10k
R1803
10k
R1804
XO
DGND
DGND
DGND
DGND
DVDD
C/LKON
R1808 R1807
#
LREQ
SYSCLK
CNA
CTL0
CTL1
D0
D1
D2
D3
D4
D5
D6
D7
PD
LPS
NC AGND
0Ω
R1805
OPEN
R1806
#
DVDD
PC0
10k
OPEN
PC1
XI
PC2
10k
R1809
PLLGND
ISO
PLLGND
CPS
390k
0.1
R1810
C1811
NC
PLLVDD
DVDD
DVDD
NC
TESTM
R1812
OPEN
1k
R1821
R1811
RESET
BRIDGE
0Ω
AVDD
AVDD
TEST0
AVDD
AGND
TPBIAS0
AVDD
0.1
C1812
AGND
AGND
AVDD
AGND
TPA0+
TPA0-
TPB0+
TPB0-
AGND
NC
NC
NC
NC
NC
R1
R0
R1819
750
_0.5%
R1818
5.6k
_0.5%
565656
R1813
1
C1801
R1814
R1815
270p
C1802
565.1k
R1816R1817
T1801T1801T1801T1801T1801T1801T1801T1801
NQR0444-001XNQR0444-001XNQR0444-001XNQR0444-001XNQR0444-001XNQR0444-001XNQR0444-001XNQR0444-001X
TPA+
TPA-
TPB+
TPB-
GND
CN1801
QGB2027L1-10X
TO VIDEO
(JUNCTION)
CN7121
SHEET 20
1
p30124001a_rev0
SHEET 7
A
BCD EFG
2-17 2-18
DIGITAL(ATAPI IF) SCHEMATIC DIAGRAM
5
MEDIA_PROCESSOR
4
3
MEDIA_PROCESSOR
2
MEDIA_PROCESSOR
1
SHEET 5
TO VIDEO/IF
SHEET 3
SHEET 5
SHEET 5
TO
TO
ATA2_RESET
ATA2_DAT[0-15]
ATA2_DMARQ
ATA2_IORDY
ATA2_INTRQ
ATA2_DIOW[L]
ATA2_DIOR[L]
ATA2_DMAACK[L]
ATA2_ADD[0-4]
D5.0V
D3.3V
P_CTL[H]
ATA_RESET
ATA_DAT[0-15]
ATA_DMARQ
ATA_IORDY
ATA_INTRQ
ATA_DIOW[L]
ATA_DIOR[L]
ATA_DMAACK[L]
ATA_ADD[0-4]
ATA2_DAT[0-15]
ATA2_ADD[0-4]
D5.0V
D3.3V
GND
GND
ATA_DAT[0-15]
ATA_ADD[0-4]
4.7k
R2203
R2201
10k
ATA_DAT[7]
ATA_DAT[8]
ATA_DAT[6]
ATA_DAT[9]
ATA_DAT[5]
ATA_DAT[10]
ATA_DAT[4]
ATA_DAT[11]
ATA_DAT[3]
ATA_DAT[12]
ATA_DAT[2]
ATA_DAT[13]
ATA_DAT[1]
ATA_DAT[14]
ATA_DAT[0]
ATA_DAT[15]
ATA_DAT[7]
ATA_DAT[8]
ATA_DAT[6]
ATA_DAT[9]
ATA_DAT[5]
ATA_DAT[10]
ATA_DAT[4]
ATA_DAT[11]
ATA_DAT[3]
ATA_DAT[12]
ATA_DAT[2]
ATA_DAT[13]
ATA_DAT[1]
ATA_DAT[14]
ATA_DAT[0]
ATA_DAT[15]
ATA_ADD[0]
ATA_ADD[1]
ATA_ADD[2]
ATA_ADD[3]
ATA_ADD[4]
#
C2201
R2202
5.6k
#
SN74CBTLV16210
IC2101
NC
ATA2_DAT[7]
ATA2_DAT[8]
ATA2_DAT[6]
ATA2_DAT[9]
ATA2_DAT[5]
ATA2_DAT[10]
ATA2_DAT[4]
ATA2_DAT[11]
ATA2_DAT[3]
ATA2_DAT[12]
#
RA2201
OPEN
#
RA2202
OPEN
#
RA2203
OPEN
#
RA2204
OPEN
#
RA2205
OPEN
#
SN74CBTD16210
IC2201
NC
1A1
1A2
1A3
1A4
1A5
1A6
GND
1A7
1A8
1A9
1A10
2A1
2A2
VCC
0.1
2A3
GND GND
2A4
2A5
2A6
2A7
2A8
2A9
2A10
#
C2202
#
IC2202
NC
A1
A2
A3
A4
A5
A6
A7
A8
GND
0.1
SN74CBT3245A
VCC
1OE
2OE
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
1B9
1B10
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
2B9
2B10
OE
B1
B2
B3
B4
B5
B6
B7
B8
ATA_DAT[7]
ATA_DAT[8]
ATA_DAT[6]
ATA_DAT[9]
ATA_DAT[5]
ATA_DAT[10]
ATA_DAT[4]
ATA_DAT[11]
ATA_DAT[3]
ATA_DAT[12]
ATA_DAT[2]
ATA_DAT[13]
ATA_DAT[1]
ATA_DAT[14]
ATA_DAT[0]
ATA_DAT[15]
#
Q2201
DTC144WUA-X
#
R2217
22k
ATA_ADD[0]
ATA_ADD[1]
ATA_ADD[2]
ATA_ADD[3]
ATA_ADD[4]
R2101 R2102 R2103
4.7k 10k 5.6k
#
RA2206
OPEN
#
RA2207
OPEN
ATA2_DAT[2]
#
C2102
ATA2_DAT[13]
ATA2_DAT[1]
ATA2_DAT[14]
ATA2_DAT[0]
ATA2_DAT[15]
ATA2_ADD[1]
ATA2_ADD[0]
ATA2_ADD[2]
ATA2_ADD[3]
ATA2_ADD[4]
0.1
1A1
1A2
1A3
1A4
1A5
1A6
GND
1A7
1A8
1A9
1A10
2A1
2A2
VCC
2A3
GND GND
2A4
2A5
2A6
2A7
2A8
2A9
2A10
C2101
#
#
SN74CBTLV3245
IC2102
NC
A1
A2
A3
A4
A5
A6
A7
A8
GND
1OE
2OE
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
1B9
1B10
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
2B9
2B10
0.1
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
ATA_DAT[7]
ATA_DAT[8]
ATA_DAT[6]
ATA_DAT[9]
ATA_DAT[5]
ATA_DAT[10]
ATA_DAT[4]
ATA_DAT[11]
ATA_DAT[3]
ATA_DAT[12]
ATA_DAT[2]
ATA_DAT[13]
ATA_DAT[1]
ATA_DAT[14]
ATA_DAT[0]
ATA_DAT[15]
R2205
R2206
R2207
R2208
R2209
R2210
R2211
R2212
R2213
R2214
R2215
R2204
R2104
R2105
R2106
R2107
R2108
R2109
R2110
R2111
R2112
R2113
R2114
R2115
33
K2101
RA2101
K2102
33
K2103
K2104
K2105
K2106
RA2102
33
K2107
K2108
K2109
K2110
RA2103
33
K2111
K2112
K2113
K2114
RA2104
33
K2115
K2116
82
22
22
82
22
82
33
K2117
33
K2118
33
K2119
33
K2120
33
K2121
#
#
R2116
33
RA2208
33
RA2209
33
RA2210
33
RA2211
33
82
22
22
82
22
82
33
33
33
33
33
D2101
220
K2201
K2202
K2203
K2204
K2205
K2206
K2207
K2208
K2209
K2210
K2211
K2212
K2213
K2214
K2215
K2216
K2217
K2218
K2219
K2220
K2221
##
D2201R2216
220
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
CN2101
QGF0539C1-40W
RSTATA
GND
HD_AT[7]
HD_AT[8]
HD_AT[6]
HD_AT[9]
HD_AT[5]
HD_AT[10]
HD_AT[4]
HD_AT[11]
HD_AT[3]
HD_AT[12]
HD_AT[2]
HD_AT[13]
HD_AT[1]
HD_AT[14]
HD_AT[0]
HD_AT[15]
GND
TO
DMARQ
HDD unit
GND
DIOW
GND
DIOR
GND
IORDY
CAB_SEL
DMACK
GND
INT_ATA
ATA_A1
ATA_A0
ATA_A2
CS1FX
CS3FX
GND
RSTATA
GND
HD_AT[7]
HD_AT[8]
HD_AT[6]
HD_AT[9]
HD_AT[5]
HD_AT[10]
HD_AT[4]
HD_AT[11]
HD_AT[3]
HD_AT[12]
HD_AT[2]
HD_AT[13]
HD_AT[1]
HD_AT[14]
HD_AT[0]
HD_AT[15]
GND
TO
DMARQ
DVD-RAM
GND
DIOW
DRIVE
GND
DIOR
GND
IORDY
CAB_SEL
DMACK
GND
INT_ATA
ATA_A1
ATA_A0
ATA_A2
CS1FX
CS3FX
GND
CN2201
QGF0539C1-40W
p20418001a_rev0
SHEET 8
A
BCDEFG
2-19 2-20
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