Intel LXD972M User Manual

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Intel® LXD972M Transceiver

Demo Board (Board Rev A1)

Preliminary User’s Guide

October 2004

Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.

Intel may make changes to specifications and product descriptions at any time, without notice.

Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

The Intel® LXD972M Transceiver Demo Board (Board Rev A1) may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com.

Intel and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.

*Other names and brands may be claimed as the property of others.

Copyright © 2004, Intel Corporation.

2

Preliminary User’s Guide

Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

 

 

 

 

Contents

Contents

 

 

 

 

 

1.0

Introduction

......................................................................................................................................

5

 

1.1

About this Demo Board Kit ...................................................................................................

5

 

1.2

Related ..............................................................................................................Documents

5

 

1.3

Features ............................................................................of Intel® LXD972M Demo Board

6

2.0 Using the Intel .........................................................................................® LXD972M Demo Board

7

 

2.1

Equipment .....................................................................................................Requirements

7

 

2.2

Typical ................................................................................................................Test Setup

8

 

2.3

Quick ..........................................................................................................-Start Checklists

9

 

2.4

Configurations.....................................................................................................................

11

 

 

2.4.1 ..........................Optional Test Setup, Using Two Intel® LXD972M Demo Boards

11

 

 

2.4.2 .................................................Power Supply Voltage Source and Clock Options

12

 

 

2.4.3 ..................................................................................

MDIO Configuration Options

13

 

 

2.4.4 ....................................................................................

LED Configuration Options

13

 

 

2.4.5 .............................................................................CFG Pin Configuration Options

14

 

2.5

JTAG ..............................................................................................................Test Signals

14

3.0 Intel® LXD972M ....................................................................................Demo Board Schematics

15

4.0

Bill of Materials ..............................................................................................................................

20

Figures

 

 

 

1

Typical Test .......................................................................................................................Setup

8

2

Intel® LXD972M ................................................................................Transceiver Demo Board

10

3

Optional Test ...................................................................................................................Setup

11

4

Schematic: ......................................Intel® LXD972M Transceiver Demo Board Power Control

16

5

Schematic: .................................................Intel® LXD972M Transceiver Demo Board MII Port

17

6

Schematic: ..................................Intel® LXD972M Transceiver Demo Board Twisted-Pair Port

18

7

Schematic: ........................................Intel® LXD972M Transceiver Demo Board Configuration

19

Tables

 

 

 

1

Related Documents ......................................................................................................................

5

2

Quick-Start ....................................................................................Checklist for Jumper Settings

9

3

Quick-Start .....................................................................................Checklist for Switch Settings

9

4

Power Supply .....................................................................Voltage Source Connector Options

12

5

Magnetic Center .....................................................-Tap Voltage Source Configuration Options

12

6

Analog Power ................................................................Supply (VCCA) Configuration Options

12

7

Clock Configuration .......................................................................................................Options

13

8

MDIO Configuration .......................................................................................................Options

13

9

Jumper Configuration ......................................................................Settings for LED/CFG Pins

14

10

JTAG Test ...................................................................................................Signal Descriptions

14

11

Bill of Materials ...........................................................................................................................

20

Preliminary User’s Guide

3

Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Contents

Revision History

Revision Number 002

Revision Date: October 2004

Page

Description

5Section 1.1, “About this Demo Board Kit”. Text added.

6Section 1.3, “Features of Intel® LXD972M Demo Board”. Text changed.

7Section 2.1, “Equipment Requirements”. Text changed. Section 2.3, “Quick-Start Checklists”. Text changed.

Text changed in Table 2 “Quick-Start Checklist for Jumper Settings”.

9

Text changed in Table 3 “Quick-Start Checklist for Switch Settings”. Figure 2 “Intel® LXD972M Transceiver Demo Board” changed.

Section 2.4.2, “Power Supply Voltage Source and Clock Options”.

12

Text changed in Table 4 “Power Supply Voltage Source Connector Options” changed.

Section 2.4.3, “MDIO Configuration Options”. Text changed.

13

Text changed in Table 4 “Power Supply Voltage Source Connector Options” changed.

13Section 2.4.4, “LED Configuration Options”. Text changed.

14Section 2.4.5, “CFG Pin Configuration Options”. Text changed and new table added.

15Section 3.0, “Intel® LXD972M Demo Board Schematics”. Schematics changed.

20 Section 4.0, “Bill of Materials”. Text in Table 11 “Bill of Materials” changed.

Revision Number 001

Revision Date: July 2004

Page

Description

Initial release.

4

Preliminary User’s Guide

Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

1.0Introduction

This document describes the typical hardware set-up procedures for the Intel® LXD972M Transceiver Demo Board (called hereafter the LXD972M Demo Board). The LXD972M Demo Board is a platform for evaluation of the Intel LXT972M Single-Port 10/100 Mbps PHY Transceiver (called hereafter the LXT972M Transceiver).

The LXD972M Demo Board allows system designers to test the following:

10 Mbps and 100 Mbps link performance

Auto-negotiation

Register functionality

The LXD972M Demo Board requires only a single 3.3V power supply.

1.1About this Demo Board Kit

This Demo Board kit includes the following:

LXD972M Demo Board

Intel® LXD972M Transceiver Demo Board (Board Rev A1) User’s Guide

1.2Related Documents

Table 1 lists related documentation.

Table 1. Related Documents

Document

Document Number

 

 

Intel® LXT972M Single-Port 10/100 Mbps PHY Transceiver Datasheet

302875

Intel® LXT971A, LXT972A, LXT972M Single-Port 10/100 Mbps PHY Transceivers

249354

Specification Update

 

 

 

Preliminary User’s Guide

5

Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

1.3Features of Intel® LXD972M Demo Board

3.3V operation, with option for 2.5V I/O voltage

Low power consumption (300 mW typical)

Quick setup and clear visibility of application settings for complete system demonstration

Auto-negotiation protocol compliant. Compatible with systems not supporting autonegotiation.

LED indicators for major functions

JTAG boundary scan port

Configurable through MDIO port or hardware jumpers

Standard half-duplex or full-duplex operation at 10 Mbps or 100 Mbps

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Preliminary User’s Guide

Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

2.0Using the Intel® LXD972M Demo Board

This document includes information on the following items concerning using the LXD972M Demo Board:

Section 2.1, “Equipment Requirements” on page 7

Section 2.2, “Typical Test Setup” on page 8

Section 2.3, “Quick-Start Checklists” on page 9

Section 2.4, “Configurations” on page 11

Section 2.5, “JTAG Test Signals” on page 14

Chapter 3.0, “Intel® LXD972M Demo Board Schematics”

Chapter 4.0, “Bill of Materials”

2.1Equipment Requirements

The LXD972M Demo Board is populated with all components needed for twisted-pair evaluation. However, the following additional equipment is also required:

SmartBits Advanced Multi-port Performance Test Box configured with firmware version 4.39 or newer

PC with Smart Windows (version 6.0 or newer) installed

One MII Cable (male to male)

One external NIC card

One Category 5 Unshielded Twisted-Pair (UTP) crossover cable

External power supply

Preliminary User’s Guide

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Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

2.2Typical Test Setup

Figure 1 shows a typical test setup for standard operation of the LXD972M Demo Board.

The LXD972M Demo Board plugs into a SmartBits Advanced Performance Test Box through a standard 40-pin MII cable (not included with the LXD972M Demo Board). The LXD972M Demo Board RJ-45 jack connects to the RJ-45 card in the SmartBits test box through a Twisted-Pair cable. Operation can be set for evaluation of 10 Mbps, 100 Mbps, and auto-negotiation capabilities.

Figure 1. Typical Test Setup

 

Computer with

 

Smart Windows

SmartBits

 

Advanced Multi-port

RS-232

Performance

 

Tester

 

RJ-45 Card

MII

or

Cards

External NIC Cards

 

 

MII Cables

 

MII

 

Connectors

Twisted Pair

LXD972M

Crossover

LXT972M

Cable

 

B3570-03

8

Preliminary User’s Guide

Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

2.3Quick-Start Checklists

Use the quick-start checklists in this section to set up the LXD972M Demo Board, shown in Figure 2, “Intel® LXD972M Transceiver Demo Board” on page 10.

The following quick-start setup procedure sets all ports to the default condition, which includes Auto-Negotiation enabled, advertising dual-speed, and full-duplex/half-duplex capabilities.

1.Set the jumpers as listed in Table 2.

The following jumpers are defined as follows: LED1 has the functionality of LED/CFG1, LED2 has the functionality of LED/CFG2, and CFG has the functionality of LED/CFG3 as defined by the LXT972M Transceiver datasheet.

2.Set SW1 switches as listed in Table 3.

3.Connect the MII port of the LXD972M Demo Board to the Smartbits test box through the MII connector/cable. A male-to-male cable is required to interface the Smartbits test box to the LXD972M Demo Board and is available from Newark* (.5m cable - Newark 91F9746).

4.Connect the twisted-pair port through a Twisted-Pair crossover cable to the RJ-45 card in the SmartBits test box.

5.Power up the Smartbits test box.

6.When the LXD972M Demo Board is configured according to desired test settings, apply the desired power connections per Table 4 options in Section 2.4.2, “Power Supply Voltage Source and Clock Options” on page 12 and press Reset switch S2.

7.Proceed with testing.

Table 2. Quick-Start Checklist for Jumper Settings

Jumper

Label

Setting

Configuration

 

 

 

 

 

JP1,

LED1,

 

 

"Sets Port Configuration to 111 for Auto-Negotiation,

JP2,

LED2,

Pins 1, 2

Jumper

10/100 Mbps, Full-Duplex. For details, see Section

JP3

CFG

 

 

2.4.5, “CFG Pin Configuration Options” on page 14.

 

 

 

 

 

JP12

VCCA

Jumpered

Routes power from VCCD connector (BN4) through

JP12 to the VCCA input.

 

 

 

 

 

 

 

 

 

JP16

MDIO

Pins 2, 3

Jumper

Routes MDIO through MII 40-pin Connector P1.

 

 

 

 

 

JP17

MDC

Pins 2, 3

Jumper

Routes MDC through MII 40-pin Connector P1.

 

 

 

 

 

 

 

Pins 1, 2

Open

Disables output of clock oscillator Y2.

JP18

Clock Select

 

 

 

Pins 3, 4

Jumper

Connects crystal across XI and XO to enable Y1.

 

 

 

 

Pins 5, 6

Jumper

 

 

 

 

 

 

 

 

JP19

Reset

Pins 1,2

Jumper

Connects reset button

 

 

 

 

 

Table 3. Quick-Start Checklist for Switch Settings

 

Switch / Label

Setting

Configuration

 

 

 

 

SW1-1

/ ID EN

Off

Not applicable for LXT972M Transceiver.

 

 

 

 

SW1-2

/ ADDR0

Off

Sets ADDR0 = 0 (“Off” position)

 

 

 

 

SW1-3

/ ADDR1

Off

Sets ADDR1 = 0 (“Off” position)

 

 

 

 

SW1-4

/ LINKHOLD / RBIAS

Off

Not applicable for LXT972M Transceiver.

 

 

 

 

Preliminary User’s Guide

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Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

Figure 2. Intel® LXD972M Transceiver Demo Board

SILKSCREEN TOP

BOARD ID

SERIAL #

B3798-001

Note: In Figure 2, the format of the Board ID on the LXD972M Transceiver Demo Board can be either one of the following:

For leaded: LXD972M Rev.A1

For lead-free: LXD972MLF Rev.A1

In Figure 2, the format of the Serial Number on the LXD972M Transceiver Demo Board can be either one of the following:

For leaded: 972M-xxxx-A1

For lead-free: 972MLF-xxxx-A1

10

Preliminary User’s Guide

Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

2.4Configurations

2.4.1Optional Test Setup, Using Two Intel® LXD972M Demo Boards

Figure 3 shows an optional test setup using two LXD972M Demo Boards. Each Demo Board plugs into a SmartBits Advanced Performance Test Box through standard 40-pin MII cables. The two LXD972M Demo Boards are linked through a Twisted-Pair crossover cable connected to the RJ-45 jack on each board. Operation can be set for evaluation of 10 Mbps, 100 Mbps, and autonegotiation capabilities.

Figure 3. Optional Test Setup

 

Computer with

 

Smart Windows

SmartBits

 

Advanced Multi-port

RS-232

Performance

 

Tester

 

 

MII

 

Cards

MII Cable

 

MII

MII

Connector

Connector

LXD972M

LXD972M

LXT972M

LXT972M

RJ-45

RJ-45

Twisted-Pair

 

Crossover

B3572-05

Cable

Preliminary User’s Guide

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Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

2.4.2Power Supply Voltage Source and Clock Options

Table 4 lists banana lead power connectors (BNn) for the LXD972M Demo Board. For details on the power supplies, see the schematic in Chapter 3.0, “Intel® LXD972M Demo Board Schematics”.

Table 4. Power Supply Voltage Source Connector Options

Reference

Signal

Supply Description

Designators

 

 

 

 

 

BN1

VCC

+3.3V.

For components on the LXD972M Demo Board other than LXT972M Transceiver.

 

 

 

 

 

BN2

GND

Ground

 

 

 

BN3

VCCIO

+3.3V or +2.5V.

I/O voltage for the LXT972M Transceiver.

 

 

 

 

 

 

 

+3.3V.

BN4

VCCD

LXT972M digital power. If JP12 jumper is on, analog power is provided for the

 

 

LXT972M Transceiver.

 

 

 

Table 5 lists internal and external jumper settings to configure the power supply source for the transmit magnetic center-tap voltage.

Table 5. Magnetic Center-Tap Voltage Source Configuration Options

Desired

Setting

Description

Power Supply Source

 

 

 

 

 

3.3V Power Supply from

Jumper

Use Jumper JP4 to apply 3.3V power from VCCA for center-tap

VCCA

JP4

operation.

 

 

 

Alternate Power Supply

Open

Use Jumper JP4 to supply either 2.5V or 3.3V power supply for

JP4

center-tap operation. Connect the power supply to pin 2 of JP4.

 

 

 

 

Table 6 lists the LXT972M Demo Board analog power supply (VCCA) configuration options.

Table 6. Analog Power Supply (VCCA) Configuration Options

 

Desired

Setting

 

Description

Configuration

 

 

 

 

 

 

 

 

 

3.3V Power

Jumper

Use Jumper JP12 to route power from the VCCD Power Connector

 

Supply to VCCA

JP12

(BN4) through JP12 to the VCCA input of the LXT972M Transceiver.

 

 

 

 

 

Analog

External Power

Open

1.

Remove jumper from JP12 to disable for VCCA input.

 

2.

Apply external power from an alternate power supply through

 

Supply to VCCA

JP12

 

pin 2 of JP12. For power supply requirements, see the LXT972M

 

 

 

 

Transceiver datasheet.

 

 

 

 

 

12

Preliminary User’s Guide

Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

Table 7 lists clock configuration options.

Table 7. Clock Configuration Options

Desired

JP18 Settings

Description

Configuration

 

 

 

 

 

 

 

 

Pins 11, 2

Open

Remove jumper from pins 1 and 2 to disable the clock oscillator Y2

Enable Crystal

 

 

output.

 

 

 

Oscillator Y1

Pins 3, 4

Jumper

Place a jumper on pins 3 and 4 and pins 5 and 6, which connects a

 

 

 

Pins 5, 6

crystal across XI and XO to enable Y1.

 

 

 

 

 

 

 

 

 

 

Pins 1, 2

Jumper

Place a jumper on pins 1 and 2, which enables the output of clock

Enable Clock

 

 

oscillator Y2.

 

 

 

Oscillator Y2

Pins 3, 4

Open

Remove jumper from pins 3 and 4, and remove jumper from pins 5

 

 

 

Pins 5, 6

and 6, which disables a crystal connection across XI and XO to Y1.

 

 

 

 

 

 

 

 

 

1. Pin 1 is located on the lower-right corner of JP18.

 

 

 

 

2.4.3MDIO Configuration Options

The default configuration of the MDIO and MDC signals is to route the MDIO through the MII connector to the SmartBits Test Box by installing jumpers JP16 and JP17.

Note: The RJ-11 feature is not supported. As a result, do not jumper the MDIO and MDC signals to the RJ-11 connector.

Table 8 lists the desired MDIO configuration settings.

Table 8. MDIO Configuration Options

Desired Configuration

Jumper

Setting

Description

 

 

 

 

 

Route MDIO and MDC

JP16

Jumper

Pins 2, 3

Routes MDIO through 40-pin MII Connector P1

 

 

 

 

through MII

JP17

Jumper

Pins 2, 3

Routes MDC through 40-pin MII Connector P1

 

 

 

 

 

 

Route MDIO and MDC

JP16

Jumper

Pins 1, 2

Routes MDIO through RJ-11 Connector J2

 

 

 

 

through RJ-11

JP17

Jumper

Pins 1, 2

Routes MDC through RJ-11 Connector J2

 

 

 

 

 

 

2.4.4LED Configuration Options

The LXD972M Demo Board provides three programmable LEDs. Each LED can display one of several available status conditions as selected by the LED Configuration Register (Address 20). Programmable LEDs (LED/CFG1, LED/CFG2, LED/CFG3) are set in default mode and are programmable with the MDIO pin. Register address 20 also provides optional LED pulse stretching up to 100 ms. Register bits 20.3:2 select one of three possible stretch times. (For details, see the LXT972M Transceiver datasheet.)

Note: The active LED state is determined by the CFG pin function. When the LED/CFG pin is pulled High, the LED becomes active Low. When the LED/CFG pin is pulled Low, the LED becomes active High.

Preliminary User’s Guide

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Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

2.4.5CFG Pin Configuration Options

Three control jumpers pull the associated port configuration pins High or Low to select the desired mode (auto-negotiation, speed, and duplex). When auto-negotiation is enabled with LED/CFG1 (JP1) = 1, then LED/CFG2 (JP2), and LED/CFG3 (JP3) are used to configure default advertising characteristics of the LXD972M Demo Board. The desired modes and jumper configuration settings are listed in Table 9. For specific register definitions and functions, see the LXT972M Transceiver datasheet.

Table 9. Jumper Configuration Settings for LED/CFG Pins

 

Mode

 

 

 

Jumper Settings

 

 

 

 

 

 

 

 

 

 

 

 

Auto-

 

 

 

JP1

JP2

 

JP3

 

Speed

Duplex

LED/CFG1

LED/CFG2

LED/CFG3

Negotiation

 

 

 

 

Setting

Setting

Setting

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10

Half

 

Pins 2 & 3

 

Pins 2 & 3

 

Pins 2 & 3

 

 

 

 

 

 

 

 

 

Disabled

 

Full

 

Pins 2 & 3

 

Pins 2 & 3

 

Pins 1 & 2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

100

Half

 

Pins 2 & 3

 

Pins 1 & 2

 

Pins 2 & 3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Full

 

Pins 2 & 3

 

Pins 1 & 2

 

Pins 1 & 2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Half

Jumper

Pins 1 & 2

Jumper

Pins 2 & 3

Jumper

Pins 2 & 3

 

 

100

 

 

 

 

 

 

 

 

 

Full /

 

Pins 1 & 2

 

Pins 2 & 3

 

Pins 1 & 2

 

 

 

 

 

 

 

 

 

Half

 

 

 

Enabled

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Half

 

Pins 1 & 2

 

Pins 1 & 2

 

Pins 2 & 3

 

 

 

 

 

 

 

 

10/100

 

 

 

 

 

 

 

 

 

Full /

 

Pins 1 & 2

 

Pins 1 & 2

 

Pins 1 & 2

 

 

 

 

 

 

 

 

 

Half

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2.5JTAG Test Signals

The boundary scan test port is accessed through JP14 for board level testing. Table 10 lists the JTAG test signal descriptions.

Table 10. JTAG Test Signal Descriptions

JP14 Pin

Symbol

Description

Number

 

 

 

 

 

1

TRST_L

Test Reset. Test reset input sourced by testing device.

 

 

 

3

TCK

Test Clock. Test clock input sourced by testing device.

 

 

 

5

TMS

Test Mode Select.

 

 

 

7

TDO

Test Data Output. Test data driven with respect to the falling edge of TCK.

 

 

 

8

TDI

Test Data Input. Test data sampled with respect to the rising edge of TCK.

 

 

 

14

Preliminary User’s Guide

Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

3.0Intel® LXD972M Demo Board Schematics

This section includes schematics for the LXD972M Demo Board:

Figure 4, “Schematic: Intel® LXD972M Transceiver Demo Board Power Control” on page 16

Figure 5, “Schematic: Intel® LXD972M Transceiver Demo Board MII Port” on page 17

Figure 6, “Schematic: Intel® LXD972M Transceiver Demo Board Twisted-Pair Port” on page 18

Figure 7, “Schematic: Intel® LXD972M Transceiver Demo Board Configuration” on page 19

Note: Page 1 of 5 of the schematics is not included (the title page of the schematics).

Preliminary User’s Guide

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Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

16

303125 Number: Document 002 Number: Revision 2004 22, October Date: Revision

Guide User’s Preliminary

4

3

2

1

A

B

C

D

E

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCCA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCCIO

VCCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R58

R60

R61

R62

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4.7k

4.7k

4.7k

4.7k

 

 

 

VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

SW1

 

 

 

4

 

 

 

 

 

VCCIO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

U2A

6 29

39

16

 

 

 

 

 

 

 

ADDR0

1

 

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

7

 

 

 

 

 

JTAG PORT

 

 

 

 

 

 

 

 

 

 

 

 

TP39

TP40

 

 

 

 

 

 

 

 

 

 

 

R65

 

 

 

 

VCCIO VCCIO

VCCD

VCCA

 

 

 

 

 

ADDR1

3

 

6

 

 

 

 

 

 

 

 

 

 

 

 

 

1

1

 

 

 

 

 

 

 

 

 

JP14

 

 

 

 

100K

 

 

 

 

 

 

 

 

 

 

4

 

5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

1

 

 

 

TRST

 

23

TRST

 

 

 

NC

7

 

 

 

 

 

 

 

SW DIP-4

 

 

 

 

 

 

 

 

 

TCK

 

22

 

 

 

8

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

4

 

3

 

 

 

 

TCK

 

 

 

NC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TMS

 

21

 

 

 

10

 

 

 

 

VCCIO

 

 

 

 

 

 

 

 

 

6

 

5

 

 

 

 

TMS

 

 

 

ADDR0

 

 

 

 

TP34

 

 

 

 

 

 

 

 

 

 

 

 

TDO

 

20

 

 

 

11

 

 

 

 

 

 

 

 

 

 

 

 

 

8

 

7

 

 

 

 

TDO

 

 

 

ADDR1

 

 

 

 

 

 

 

TP35

 

 

 

 

 

 

 

 

 

TDI

 

19

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

HEADER 4X2

 

 

 

 

TDI

 

 

 

 

 

 

 

 

 

R66

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X C53

 

 

 

4.7k

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LXT972M_LQFP48C

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MDIO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MDIO

31

 

 

 

 

 

MDC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

32

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MDC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R82

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JP18

 

 

 

 

 

 

 

3

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

2

 

 

 

1

2

XIN

 

 

X

 

 

 

 

 

 

 

 

 

 

 

 

 

RESET

REFCLK/XI

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

 

 

 

 

 

 

 

 

 

 

 

D1

R67

 

 

 

 

 

 

 

 

 

 

 

 

XO

 

 

 

5

6

 

 

 

 

 

JP16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TP36

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10K

 

 

 

 

 

 

 

 

 

 

 

 

R73

 

 

HEADER 3X2

 

 

 

 

 

1

 

 

1N914

 

 

 

 

 

 

JP19

24

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

CE/TEST0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MDIO

 

 

 

 

 

 

 

 

 

 

25

 

 

RBIAS

12

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

U5A

 

 

U5B

1

2-pin

GNDIO/TEST1

 

 

 

 

 

 

 

Y1

 

 

 

J2

 

R68

 

 

 

 

 

 

 

 

X

LXT972M: R73

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

3

 

MDIO_1

 

 

 

 

 

 

 

 

RESET

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

2

3

4

 

 

GNDIO GNDIO GNDIO

 

 

 

 

 

 

 

 

 

 

 

 

 

74LVX14

 

 

GNDD

GNDA

 

 

 

NOT POPULATED

 

 

 

IN

4

 

 

 

 

 

 

 

74LVX14

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AND C53 ARE

 

25MHz

 

 

 

2

 

 

 

100

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R69

 

 

 

 

 

 

 

 

3

HEADER 3_1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

S2

+ C31

 

 

 

 

 

 

 

 

 

 

 

 

 

 

22.1K 1%

 

 

 

 

 

 

 

 

5

 

 

 

 

 

 

 

 

 

GND

 

 

5 9 30

38

13

 

 

 

 

 

 

C32

C33

 

 

6

JP17

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RESET

10uF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

18pF 25V

18pF 25V

RJ11

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R83

50 1%

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

GND

 

 

GND

3

 

MDC_1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

HEADER 3_1

 

 

 

VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCCD

 

 

 

 

 

 

 

 

 

 

VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

 

 

MDC

 

LXT972M: 3.3V

BN1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JP12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCCIO

+

C34

+ C36

 

 

 

 

 

 

 

 

 

 

 

 

2-pin

 

POWER

 

D2

 

 

 

 

 

 

VCCIO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LED

 

 

 

 

 

 

10uF

100uF

 

 

 

 

 

 

 

 

 

 

 

 

FB4

 

 

 

 

 

 

 

LXT972M: 2.5V/3.3V

BN3

 

 

 

 

 

VCCIO

 

 

 

 

 

VCCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FERRITE

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

+

C54

+ C55

 

 

 

 

 

 

 

 

 

 

 

VCCA

 

 

 

R72

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

220

 

 

 

 

 

VCCD

 

 

 

 

VCCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LXT972M: 3.3V

BN4

 

 

 

10uF

100uF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C3

C4

 

C10

 

C12

C51

C52

 

C6

C7

 

GND

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.1uF

.001uF

0.1uF

.001uF

0.1uF

.001uF

 

0.1uF

.001uF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

+ C56 +

C57

 

 

 

 

 

 

 

 

 

 

 

 

Intel Corporation

 

 

 

1

 

 

 

 

 

 

 

 

10uF

100uF

 

 

 

 

 

 

 

 

 

 

 

 

9750 Goethe Road

 

 

 

 

 

GND

BN2

 

 

 

 

 

 

 

GND

 

 

 

 

 

GND

 

 

GND

 

Sacramento, CA 95827

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Title

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LXD972M LQFP48C DV/DEMO

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

Size

 

Document Number

 

 

Rev

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X=DO NOT INSTALL

B

 

Intel(R) LXD972M Transceiver Demo Board CONTROL/POWER

A1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Date:

 

Monday, September 20, 2004

Sheet 2

of

5

 

A

 

 

 

 

 

 

B

 

 

 

 

 

C

 

 

 

 

 

 

D

 

 

 

 

E

 

 

IntelSchematic: .4 Figure

Intel

®

Transceiver LXD972M

®

Board Demo

LXD972M

Transceiver

Rev (Board

Demo

A1)

Control Power Board

 

22, October Date: Revision

303125 Number: Document 002 Number: Revision

User’s Preliminary

2004

 

Guide

17

 

A

B

C

D

E

 

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

 

 

VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C14

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.1uF

 

 

 

 

 

 

TP15

 

TP16

TP17

TP18

TP19

TP20

TP21

TP22

 

 

 

 

 

 

MDC_1

 

 

 

 

 

 

GND

 

 

 

VCC

 

 

 

 

 

 

 

 

 

 

 

MDIO_1

 

 

 

 

 

 

 

 

 

 

20

SN74LVC244A

 

1

 

1

1

1

1

1

1

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

U1

 

 

 

 

 

 

 

 

 

 

 

 

R23

50 1%

 

 

 

 

 

 

R3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

P1

 

 

 

 

18

1Y3

VCC

1A3

2

 

 

 

 

 

 

 

 

 

 

 

 

TP41

TP42

TP43

 

 

 

 

R27

50 1%

 

 

12

8

R0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R24

50 1%

 

 

16

1Y1

 

1A1

4

R2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R25

50 1%

 

 

14

1Y2

 

1A2

6

R1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R29

50 1%

 

 

3

1Y4

 

1A4

17

RV

 

 

 

 

 

 

 

 

 

R26

 

 

 

 

 

 

 

 

 

 

 

 

2Y4

 

2A4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

21

1

 

R31

50 1%

 

 

5

 

15

RC

 

 

 

 

 

 

 

 

R28

 

 

 

1

1

1

 

 

22

2

 

R33

50 1%

 

 

7

2Y3

 

2A3

13

RE

 

 

 

 

 

 

 

R30

 

22

U2B

 

 

 

 

 

 

 

 

 

2Y2

 

2A2

 

 

 

 

 

 

 

22

 

 

 

 

 

 

 

23

3

 

R35

50 1%

 

 

9

 

11

TC

 

 

 

 

 

 

 

R32

 

 

 

 

 

 

 

 

24

4

 

 

 

 

 

 

 

2Y1

 

2A1

 

 

 

 

 

 

 

R34

 

22

 

33

RXD3

LED/CFG3

26

 

LED/CFG3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

22

 

 

 

 

25

5

 

 

 

 

 

 

 

 

GND

1G

1

 

 

 

 

 

 

R36

 

 

34

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RXD2

 

 

 

 

 

 

26

6

 

 

 

 

 

 

 

 

19

 

 

 

 

R37

 

22

 

 

 

35

 

27

 

LED/CFG2

3

 

 

 

 

 

 

 

 

 

2G

 

 

 

R38

 

22

 

 

 

RXD1

LED/CFG2

 

 

27

7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

22

 

 

 

 

 

36

RXD0

 

 

 

3

 

 

28

8

 

 

 

 

 

 

 

 

10

 

 

GND

 

 

22

 

 

 

 

 

 

37

RX_DV

LED/CFG1

28

 

LED/CFG1

 

 

29

9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

40

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RX_CLK

 

 

 

 

 

 

30

10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

41

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

RX_ER

 

 

 

 

 

 

31

11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

32

12

R40

50 1%

 

 

 

 

 

 

 

 

TN

 

 

 

 

 

 

 

 

 

 

42

TX_CLK

TPFIP

17

 

TPFIP

 

 

33

13

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

43

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TX_EN

 

 

 

 

 

 

34

14

R41

50 1%

 

 

 

 

 

 

 

 

T0

 

 

 

 

 

 

 

 

 

 

44

 

18

 

TPFIN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TXD0

TPFIN

 

 

 

35

15

R42

50 1%

 

 

 

 

 

 

 

 

T1

 

 

 

 

 

 

 

 

 

 

45

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TXD1

 

 

 

 

 

 

36

16

R43

50 1%

 

 

 

 

 

 

 

 

T2

 

 

 

 

 

 

 

 

 

 

46

 

14

 

TPFOP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TXD2

TPFOP0

 

 

 

37

17

R44

50 1%

 

 

 

 

 

 

 

 

T3

 

 

 

 

 

 

 

 

 

 

47

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R45

22

TXD3

 

 

 

 

 

 

38

18

 

 

 

 

 

 

 

 

 

 

CL

 

 

 

 

 

 

 

 

48

 

15

 

TPFON

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

COL

TPFON0

 

 

 

39

19

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CRS

 

 

 

 

 

 

40

20

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CR

 

 

 

 

 

 

 

 

R48

22

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SN74LVC244A

 

 

 

 

 

 

 

 

 

LXT972M_LQFP48C

 

 

 

 

 

 

 

 

 

 

 

U3

20

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

MII 40 PIN

 

 

 

 

 

 

 

 

 

 

 

TP24

TP25

TP26

TP27

TP28

TP29

TP30

 

 

 

R77 R78 R79 R80 R81

 

 

 

 

 

 

 

 

R47

50 1%

16

1Y2

VCC

1A2

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R46

50 1%

18

1Y1

 

 

1A1

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

14

1Y3

 

 

1A3

6

 

 

1

1

1

1

1

1

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

12

1Y4

 

 

1A4

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

 

 

17

 

 

 

 

 

 

 

 

 

 

 

 

X X X X X

 

 

 

 

 

 

 

 

 

 

 

 

2Y4

 

 

2A4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5

 

 

15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2Y3

 

 

2A3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7

 

 

13

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

 

2Y2

 

 

2A2

VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

9

 

 

11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

2Y1

 

 

2A1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C15

 

 

 

GND

2G

1

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

19

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1G

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.1uF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

10

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

Intel Corporation

 

 

 

1

 

 

 

 

 

 

9750 Goethe Road

 

 

 

 

 

 

 

 

 

 

Sacramento, CA 95827

 

 

 

 

 

 

 

X=DO NOT INSTALL

 

 

 

 

 

 

 

 

 

 

 

 

Title

LXD972M LQFP48C DV/DEMO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Size

Document Number

 

 

Rev

 

 

 

 

 

 

 

B

Intel(R) LXD972M Transceiver Demo Board MII PORT

 

A1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Date:

Monday, September 20, 2004

Sheet 3 of

5

 

 

 

A

B

 

C

D

 

 

E

 

 

 

.5 Figure

 

Intel Schematic:

 

®

 

LXD972M

Intel

PortMIIBoardDemoTransceiver

DemoTransceiverLXD972M

 

®

 

A1) Rev (Board Board

 

 

 

18

 

A

 

 

 

 

B

 

C

 

 

 

D

 

 

 

 

 

 

E

 

 

 

IntelSchematic:.6 Figure

Intel

 

 

 

 

 

|

+

|

+

 

 

 

 

 

 

 

 

 

|

+

|

+

 

 

2

 

 

TransceiverLXD972M

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

®

 

 

 

 

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

 

DIFF TP

DIFF TP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DTP1

 

 

 

 

DTP2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C43

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TPFIP

 

 

 

 

 

 

 

 

 

 

 

 

 

DIFF TP

DIFF TP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

270pF

 

TP PORT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R4

 

 

 

 

 

DTP3

 

 

 

 

DTP4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50 1%

T1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

J1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C17

 

16

1

 

 

 

 

 

 

 

 

 

IP

 

1

 

 

 

BoardDemo

 

 

 

 

 

 

 

 

 

0.01uF

 

 

 

 

 

 

 

 

 

 

 

 

IN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

®

 

 

 

 

 

 

 

 

 

GND

R5

15

2

 

 

 

 

 

 

 

 

 

OP

 

3

 

 

 

 

 

 

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

 

 

 

 

 

 

 

 

 

 

14

3

 

 

 

 

 

 

 

 

 

 

 

4

 

LXD972M

 

 

 

 

TPFON

 

 

 

 

 

50 1%

 

 

 

 

 

 

 

 

 

ON

 

5

 

 

 

 

 

 

 

 

 

 

 

Halo TG110-S050N5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C44

 

 

 

 

 

 

 

 

 

 

 

 

6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TPFIN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

 

 

 

 

 

 

 

 

 

 

 

 

 

270pF

 

11

6

 

 

 

 

 

 

 

 

 

 

 

RJ45

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10

7

R6

 

R7

R8

R9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TPFOP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50 1%

50 1%

50 1%

50 1%

 

 

 

 

 

 

 

 

 

Transceiver

Rev(Board

 

 

 

 

 

 

 

 

 

 

 

FB5

C59

C48

R12

 

R13

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C47

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JP4

FERRITE

0.001uF 2KV

0.001uF 2KV

50 1%

50 1%

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCCA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JUMPER 1X1

 

C58

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

TX CT VOLTAGE SET

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

C49

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.01uF

0.001uF 2KV

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C18

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.001uF 2KV

 

 

 

 

 

 

 

 

 

 

Demo

A1)

 

 

 

 

 

 

 

 

 

 

 

GND

0.001uF 2KV

 

 

 

 

 

 

 

 

 

 

 

 

 

 

200422,OctoberDate:Revision

002Number:Revision

303125Number:Document

GuideUser’sPreliminary

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Board

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Intel Corporation

 

 

 

 

1

PortPair-Twisted

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9750 Goethe Road

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Sacramento, CA 95827

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Title

LXD972M LQFP48C DV/DEMO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Size

Document Number

 

 

 

Rev

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B

Intel(R) LXD972M Transceiver Demo Board TP PORT

 

A1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Date:

Monday, September 20, 2004

Sheet

4

of

5

 

 

 

 

 

 

 

A

 

 

 

 

B

 

C

 

 

 

D

 

 

 

 

 

 

E

 

 

 

 

 

200422,OctoberDate: Revision

002Number: Revision

303125Number: Document

GuideUser’sPreliminary

 

A

 

B

 

 

 

 

 

C

 

1

1

1

 

 

E

 

 

 

 

 

Schematic:.7 Figure

 

 

 

 

 

 

 

 

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

 

 

 

 

DISTRIBUTE, LABEL AS "GND"

 

 

 

 

 

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TP2

TP3

TP4

TP5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LED1

 

 

 

 

 

 

 

 

 

 

Intel

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCCIO

 

 

 

 

 

 

®

 

 

 

 

 

3

 

 

 

 

 

 

 

 

 

 

D3

 

 

 

 

 

 

 

 

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LXD972M

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

R2

 

 

1

 

 

 

 

 

 

 

Intel

 

 

 

 

 

 

 

 

 

 

 

 

 

LED

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JP1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TP38

 

 

 

R1

LED

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

 

 

 

 

 

LED/CFG1

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

180

LED

 

 

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D4

 

HEADER 3 PIN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FB3

 

FB6

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FERRITE

 

X

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LED2

 

 

 

VCCIO

 

 

 

 

 

 

ConfigurationBoardDemoTransceiver

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

D5

 

 

 

 

 

 

 

 

 

BoardDemoTransceiverLXD972M

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JP2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C50

C16

 

 

Y2

 

 

LED/CFG2

 

 

 

 

2

 

 

 

 

 

 

 

 

®

 

 

 

 

 

 

0.1uF

0.1uF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TP37

 

 

 

 

 

 

 

LED

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCCX

 

 

 

 

 

180

 

 

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

XIN

 

14

VCC

NC

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

HEADER 3 PIN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D6

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

2

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R74

R70

 

 

 

 

 

 

 

CFG

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCCIO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

OUT

GND

7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

50 1%

 

 

 

 

 

 

 

 

 

JP3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R75

 

25MHzCRYSTAL OSC

GND

 

LED

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R3

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C37

J3

SMB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LED/CFG3

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

20pF

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LED

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

3

 

 

 

 

 

180

 

 

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R76

 

5

 

 

 

 

 

 

D8

 

HEADER 3 PIN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

50 1%

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

Intel Corporation

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9750 Goethe Road

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Sacramento, CA 95827

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Title

LXD972M LQFP48C DV/DEMO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X=DO NOT INSTALL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Size

Document Number

 

 

 

 

Rev

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B Intel(R) LXD972M Transceiver CAPS, LED CONFIG., MISC.

 

A1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Date:

Monday, September 20, 2004

Sheet

5

of

5

 

 

 

 

 

 

 

 

 

A

 

B

 

 

 

 

 

C

 

D

 

 

 

 

E

 

 

 

 

 

 

 

 

 

 

19

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A1) Rev (Board

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

4.0Bill of Materials

Table 11 lists the bill of materials for the LXD972M Demo Board Rev A1.

Table 11. Bill of Materials

(Sheet 1 of 3)

 

 

 

 

 

 

 

 

 

 

 

Board Reference

 

Description

Manufacturer

Part Number

Quantity

 

Designator

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BN1-4

 

CONN BANANA NUT

EF JOHNSON

108-0740-001

4

 

 

SILVER (BANANA_NUT)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C1, C2, C5, C8, C9, C11,

 

LABELS NOT USED IN SCHEMATIC.

 

 

 

C13, C38-C42, C45, C46

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C3, C6, C10, C14-16,

 

HEADER 3X1 (SIP\3P)

BERG

08055C104KATMA

8

 

C50-51

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C4, C7, C12, C52

 

HEADER 4X2

BERG

ECU-V1H102JCX

4

 

 

(HEADER2X4)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C17, C49

 

CAP 0.01uF X7R 10%

AVX

08055C103KATMA

2

 

 

(0805)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C53 (NOT INSTALLED)

 

NOT INSTALLED

 

X

1

 

 

 

 

 

 

 

 

C18, C47-48, C58-59

 

CAP 1000pF 20% 2KV X7R

AVX

1812GC102KAT1A

5

 

 

(1812)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C31, C34, C54, C56

 

CAP 10uF 6.3V TANT

PANASONIC

ECS-TOJY106R

4

 

 

(CASEA)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C32-33

 

CAP 18pF 50V 5% (0805)

PANASONIC

ECU-V1H180JCN

2

 

 

 

 

 

 

 

 

C36, C55, C57

 

CAP 100uF 6.3V (CASED)

PANASONIC

ECE-V0JA101P

3

 

 

 

 

 

 

 

 

C37

 

CAP 20PF 50V 5% (1206)

PANASONIC

ECU-V1H200JCM

1

 

 

 

 

 

 

 

 

C43-44

 

CAP 270pF NPO (1206)

AVX

12061A271JATTA

2

 

 

 

 

 

 

 

 

D1

 

DIODE RECTIFIER DL4001

DIODES INC.

DL4001-13

1

 

 

1A 50V MELF SMD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DIODE LED GREEN SS

 

 

 

 

D2-D8

 

TYPE LOW CUR SMD

PANASONIC

LNJ308G8LRA

7

 

 

 

(LED\SMD\SS)

 

 

 

 

 

 

 

 

 

 

 

DTP1-4, JP4, JP12, JP19

 

HEADER 2X1 (SIP\2P)

BERG

68000-240-2

7

 

 

 

 

 

 

 

 

FB1, FB2

 

LABELS NOT USED IN SCHEMATIC.

 

 

 

 

 

 

 

 

 

 

 

 

FBEAD 60 OHM@100MHZ

 

 

 

 

FB3-5

 

0.10OHM@DC 1.5A (1210)

STEWARD

MI1210K600R-00

3

 

 

 

(BEAD3225)

 

 

 

 

 

 

 

 

 

 

 

FB6 (NOT INSTALLED)

 

NOT INSTALLED

 

X

1

 

 

 

 

 

 

 

 

J1

 

CONN MOD JACK 8-8

AMP

555164-1

1

 

 

LOW PROFILE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CONN MOD JACK 6-6

 

 

 

 

J2

 

RJ11 UNSHIELDED

CORCOM

RJ11-6L-B

1

 

 

 

BLOCK RJ11-6L-B

 

 

 

 

 

 

 

 

 

 

 

J3

 

CONN SMB VERTICAL PC

JOHNSON

131-3711-201

1

 

 

MOUNT (SMB\SM)

COMPONENTS

 

 

 

 

 

 

 

 

 

 

 

 

20

 

 

 

 

Preliminary User’s Guide

Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

Table 11. Bill of Materials (Sheet 2 of 3)

Board Reference

Description

Manufacturer

Part Number

Quantity

Designator

 

 

 

 

 

 

 

 

 

JP5-JP11, JP13, JP15

LABELS NOT USED IN SCHEMATIC.

 

 

 

 

 

 

 

JP1-3, JP16-17

HEADER 3X1 (SIP\3P)

BERG

68000-240-3

5

 

 

 

 

 

JP14

HEADER 4X2

BERG

C9192-280-4

1

(HEADER2X4)

 

 

 

 

 

 

 

 

 

JP18

HEADER 3X2

BERG

C9192-280-3

1

 

 

 

 

 

P1

CONN MII 40 PIN FEMALE

AMP

787171-4

1

R/A (CON40F\RT\4ROW)

 

 

 

 

 

 

 

 

 

R1-3

RES 182 OHM 1/8W 1%

PANASONIC

ERJ-8ENF1820V

3

(1206) SMD

 

 

 

 

 

 

 

 

 

R4-9, R12-13, R23-25,

 

 

 

 

R27, R29, R31, R33, R35,

RES 49.9 1/8W 1% (1206)

PANASONIC

ERJ-8ENF49R9V

27

R40-44, R46-47, R70,

 

 

 

 

R76, R82, R83

 

 

 

 

 

 

 

 

 

R26, R28, R30, R32, R34,

RES 22 OHM 1/8W 1%

YAGEO AMERICA

9C08052A22R0FK

10

R36-38, R45, R48

(0805)

HFT

 

 

 

 

 

 

 

R58, R60-62, R66

RES 4.7K 1/8W 5% (1206)

PANASONIC

ERJ-8GEYJ472V

5

 

 

 

 

 

R65

RES 100K 1/8W 1% (1206)

PANASONIC

ERJ-8ENF1003V

1

SMD

 

 

 

 

 

 

 

 

 

 

RES 10K 1/8W 1% (1206)

 

 

 

R67

NOTE: R3 is shown as 180

PANASONIC

ERJ-8ENF1002V

1

Ohm resistor in

 

 

 

 

 

schematic.

 

 

 

 

 

 

 

 

R68

RES 100 OHM 1/8W 1%

PANASONIC

ERJ-8ENF1000V

1

(1206)

 

 

 

 

 

 

 

 

 

R69

RES 22.1K 1/8W 1% (1206)

PANASONIC

ERJ-8ENF2212V

1

 

 

 

 

 

R72

RES 220 OHM 1/8W 5%

PANASONIC

ERJ-8GEYJ221V

1

(1206)

 

 

 

 

 

 

 

 

 

R73, R75, R77-R82 (NOT

NOT INSTALLED

 

X

8

INSTALLED)

 

 

 

 

 

 

 

 

 

 

R10, R11, R14-22, R39,

LABELS NOT USED IN SCHEMATIC.

 

 

R49-57, R59, R63-64, R71

 

 

 

 

 

 

 

R74

RES 0 OHM 1/8W 5%

PANASONIC

ERJ-8GEY0R00V

1

(1206) SMD

 

 

 

 

 

 

 

 

 

 

SWITCH PB MOM KEY J-

C&K

 

 

S2

LEAD SMD

KT11P2JM

1

COMPONENTS

 

(SWITCH\RESET\SM)

 

 

 

 

 

 

 

 

 

 

 

 

SWITCH DIP 4 POS THRU

 

 

 

SW1

HOLE SEALED BLACK

AMP

4-435166-9

1

 

(SWITCH\8)

 

 

 

 

 

 

 

 

T1

IC XFMR TG110-S050N2

HALO

TG110-S050N2

1

16 PIN SOIC

 

 

 

 

 

 

 

 

 

TP2-5, TP15-22, TP24-30,

HEADER 1X1

BERG

68000-240-1

29

TP34-43

 

 

 

 

 

 

 

 

 

Preliminary User’s Guide

21

Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004

Intel® LXD972M Transceiver Demo Board (Board Rev A1)

 

 

Table 11. Bill of Materials

(Sheet 3 of 3)

 

 

 

 

 

 

 

 

 

 

 

Board Reference

 

Description

Manufacturer

Part Number

Quantity

 

Designator

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TP1, TP6-14, TP23,

 

LABELS NOT USED IN SCHEMATIC.

 

 

 

TP31-33

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IC LOGIC 74LVC244 LOW

TEXAS

 

 

 

U1, U3

 

VOLTAGE BUFFER 20 PIN

SN74LVC244ADW

2

 

 

INSTRUMENTS

 

 

 

SOIC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

U2

 

IC PHY LXT977/LXT972M

INTEL

LXT977/LXT972M

1

 

 

DUAL PORT (LQFP48C)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

U4

 

LABELS NOT USED IN SCHEMATIC.

 

 

 

 

 

 

 

 

 

 

 

 

IC LOGIC 74LVX14 HEX

 

 

 

 

U5

 

SCHMITT TRIG INV 14 PIN

TOSHIBA

TC74LVX14FN

1

 

 

 

SOIC

 

 

 

 

 

 

 

 

 

 

 

Y1

 

CRYSTAL 25.000MHZ

CTS

MP250

1

 

 

(HC49)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Y2

 

OSC 25.000MHZ FULL

CTS

MX045-25.0000

1

 

 

SIZE ( )

 

 

 

 

 

 

 

 

 

 

 

 

 

22

Preliminary User’s Guide

Document Number: 303125

Revision Number: 002

Revision Date: October 22, 2004