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®
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5Section 1.1, “About this Demo Board Kit”. Text added.
6Section 1.3, “Features of Intel
7Section 2.1, “Equipment Requirements”. Text changed.
Section 2.3, “Quick-Start Checklists”. Text changed.
Text changed in Table 2 “Quick-Start Checklist for Jumper Settings”.
9
Text changed in Table 3 “Quick-Start Checklist for Switch Settings”.
Figu re 2 “Intel
12
13
13Section 2.4.4, “LED Co nfiguration Opt ions”. Text changed.
14Section 2.4.5, “CFG Pin Configuration Options”. Text change d and new t able added.
15Section 3.0, “Intel
20Section 4.0, “Bill of M aterial s”. Text in Table 11 “Bill of Materials” ch anged.
Section 2.4.2 , “Power Supply Voltage Source and Cloc k Options” .
Text changed in Table 4 “Power Supply Voltage Source Connecto r Options” changed.
Section 2.4.3, “MDIO Configuration Options”. Text changed.
Text changed in Table 4 “Power Supply Voltage Source Connecto r Options” changed.
This document describes the typical hardware set-up procedures for the Intel® LXD972M
Transce iver Demo Board (called hereafter the LXD972M Demo Board). The LXD972M Demo
Board is a platform for evaluation of the Intel LXT972M Single-Port 10/100 Mbps PHY
Transceiv er (c al le d he re af t er th e LX T 9 72 M Trans c ei ve r ) .
The LXD972M Demo Board allows syste m designers to test the following:
• 10 Mbps and 100 Mbps link perform ance
• Auto-negotiation
• Register func tionality
The LXD972M Demo Board requires only a single 3.3V power supply.
This document i ncl udes infor mati on on the fol lowi ng ite ms conc erni ng usi ng the LXD972M Demo
Board:
• Section 2.1, “Equipment Requirements ” on page 7
• Section 2.2, “Typical T est Setup” on page 8
• Section 2.3, “Quick-Start Checklists” on page 9
• Section 2.4, “Configurations” on page 11
• Section 2.5, “JTAG Test Signals” on page 14
• Chapter 3.0, “Intel
• Chapter 4.0, “Bill of Materials”
2.1Equipment Requirements
The LXD972M Demo Board is populated with all components needed for twisted-pair evaluation.
However, the following additi onal equipment is also requ ired:
®
LXD972M Demo Boa rd Schematics”
• SmartBits Advanced Multi-port Performance Test Box configured with firmware version 4.39
or newer
• PC with Smart Windows (version 6.0 or newer) insta lled
• One MII C ab l e (male to mal e)
• One external NIC card
• One Category 5 Unshielded Twisted-Pair (UTP) crossover cable
Figure 1 shows a typical tes t setup for standard operation of the LXD972M Demo Board.
The LXD972M Demo Board plugs int o a Smar tBits Advanced Performan ce Test Box through a
standard 40- pin MII cable (not included with the LXD972M Demo Board). The LXD972M Demo
Board RJ-45 jack connects to the RJ-45 card in the SmartBits test box through a Twisted-Pair
cable. Operation can be set for eva luation of 10 Mbps, 100 Mbps, and auto-negotia tion capabilities.
Use the quick-st art checklis t s in this s ecti on to s et up the LXD972M Demo Bo ard, shown in Figure
2, “Intel
®
LXD972M Transceiver Demo Board” on page 10.
The following quick-start setup procedure sets all ports to the default condition, which includes
Auto-Negotiation enabled, advertising dual-speed, and full-duplex/half-duplex capabilities.
1. Set the ju mpers a s li st ed in Table 2.
The following jumpers are defined as follows: LED1 has the func tionality of LED/CFG1,
LED2 has the functio nality of LED/CFG2, and CFG has the func tionality of LED/CFG3 as
defined by the LXT972M Transceiver datasheet.
2. Set SW1 switch es as listed in Table 3.
3. Connect the MII port of the LXD972M Demo Board to the Sm artbits test box through the MII
connector/cable. A male-to-male cable is required to interface the Smartbits test box to the
LXD972M Demo Board and is available from Newark* (.5m cable - Newark 91F9746).
4. Connect the twisted-pair port through a Twisted-Pair crossover cable to the RJ-45 card in the
SmartBits te st box.
5. Power up the Smar tbits test box.
6. When the LXD972M Demo Board is configured according to desired test se ttings, apply the
desired power c onnect ions p er Table 4 options in Sect ion 2. 4.2 , “ Power Supply Voltage So urce
and Clock Options ” on page 12 and press Rese t switch S2.
7. Proc eed with testing.
Table 2. Quick-Start Checklist for Jumper Settings
JumperLabelSettingConfiguration
JP1,
JP2,
JP12VCCAJumpered
JP16MDI OPins 2, 3Jumper Ro utes MDIO t hrough MII 40-pin Connector P1.
JP17MDCPi ns 2, 3Jumper Routes M DC throug h M II 40-pin Connector P1.
2.4.1Optional Test Setup, Using Two Intel® LXD972M Demo Boards
Figure 3 shows an option al test setu p using t wo L XD972M Demo Boards. E ach Demo Bo ard p lugs
into a SmartBit s Adva nce d P erformance Test Box through standard 40-pin MII cables. The two
LXD972M Demo Boards a re linke d th rough a Twisted-Pair crossove r cabl e conne cted t o the RJ -45
jack on each board. Operation can be set for evaluation of 10 Mbps, 100 Mbps, and autonegotiation capabilities.
2.4.2Power Supply Voltage Source and Clock Options
Table 4 lists banana lead power connectors (BNn) for the LXD97 2M Demo Board. For details on
the power supplies, see the schematic in Chapter 3.0, “Intel
®
LXD972M Demo Board
Schematics”.
Table 4. Power Supply V oltage Source Connector Options
Reference
Designators
BN1VCC
BN2GNDGround
BN3VCCIO
BN4VCCD
SignalSupply Description
+3.3V.
For components on the LXD972M D em o Board other than LXT972M Transceiver.
+3.3V or +2.5V.
I/O voltage for the LXT972M Transceiver.
+3.3V.
LXT972M digital pow er. If JP12 jum per is on, analog power is provided for the
LXT972M Transceiver .
Table 5 lists internal and external jumper settings to configure the power supply source for the
transm i t mag n etic ce nter -t ap v ol ta g e.
Table 5. Magnetic Center-Tap Voltage Source Configuration Options
Desired
Power Supply Source
3.3V Power Supply from
VCCA
Alternate Power Supply
SettingDescription
Jum per
JP4
Op en
JP4
Use Jumper JP4 to apply 3.3V power fr om VCCA for center-tap
operation.
Use Jumper JP4 to supply either 2.5V or 3.3V power supply for
cente r-tap operation. Connec t the power supply to pin 2 of JP4.
Table 6 lists the LXT972M Demo Board analog power supply (VCCA) configuration options.
Table 6. Analog Power Supply (VCCA) Configuration Options
Analog
Desired
Configuration
3.3V Power
Supply to VCCA
External Power
Supply to VCCA
SettingDescription
Jumper
JP12
Open
JP12
Use Jumper JP12 to route power from the VCCD Power Connector
(BN4) t hrough JP 12 to the VCCA input of the LXT972M Transceiver.
1. Remov e jum p er fr om JP1 2 to di sable for V CC A inp ut.
2. Apply ex te r na l power from an alterna t e po w er supply th ro ugh
pin 2 of JP12. For power supply requir ements, see t he LXT972M
Transceiver datas heet.
1. Pin 1 is located on the lower-right corner of JP18.
JP18 Set tingsDescription
1
, 2Open
Pins 1
Pins 3, 4
Pins 5, 6
Pins 1, 2Jumper
Pins 3, 4
Pins 5, 6
Jumper
Open
Remove jumper f rom pins 1 and 2 to disable the clock oscillator Y2
output.
Place a jumper on pins 3 and 4 and pins 5 and 6, which connects a
crystal across XI and XO to enable Y1.
Place a jumper on pins 1 and 2, which enables the output of clock
oscillator Y2.
Remov e jumper from pin s 3 and 4, and remove ju m per from pins 5
and 6, which disables a crystal connection across XI and XO to Y1.
2.4.3MDIO Configuration Options
The default configuration of the MDIO and MDC signals is to route the MDIO through the MII
connector to the SmartBits Test Box by installing jumpers JP16 and JP17.
Note: The RJ-11 feature is not supported. As a resu lt, do not jumper the MDIO and MDC signals to the
RJ-11 connec to r.
Table 8 lists the desired MDIO configura tion settings.
T able 8. MDIO Configuration Options
Desired ConfigurationJumperSetti ngDescr iption
Route MDIO and MD C
through MII
Route MDIO and MD C
through RJ-11
JP16Jumper P ins 2, 3Routes MD IO throug h 40-pin MI I Connec tor P1
JP17Jumper Pins 2, 3Routes MDC through 40-pin MII Connector P1
JP16Jumper Pins 1, 2Routes MDIO through RJ-11 Connector J2
JP17Jumper Pins 1, 2Routes MDC through RJ-11 Connector J2
2.4.4LED Configuration Options
The LXD972M Demo Board provides three programmable LEDs. Each LED can display one of
several avail able status condit ions as selected by the LED Configuration Register (Address 20).
Programmable LEDs (LED/CFG1, LED/CFG2, LED/CFG3) are set in default mode and are
programmable with the MDIO pin. Register address 20 als o provides optional LED puls e
stretching up to 100 ms. Register bits 20.3: 2 select one of three possible st retch times. (For details,
see the LXT972M Tran sc eiver da ta sh eet.)
Note: The active LED state is det erm ined by the CFG pin functio n. When the LED/CFG pin is pulled
High, the LED becomes act ive Low. When the LED/CFG pin is pulled Low, the LED becomes
active High.
Three control jumpers pull the associ ated port configuration pins High or Low to select the des ired
mode (auto-negotiation, speed, and duplex). When auto-negotiation is enabled with LED/CFG1
(JP1) = 1, then LED/CFG2 (JP 2), and LED/CFG3 (JP3) are used to configure default advertising
characteristics of the LXD972M Demo Board. The de si red modes and jumper configuration
settings ar e listed in Table 9. For specific register defi nitions and functions, see the LXT972M
Transceiver datasheet.
Table 9. Jumper Configuration Settings for LED/CFG Pins
The boundary scan test port is accessed through JP14 for board level testing. Table 10 lists the
JTAG test signal descriptio ns.
Table 10. JTAG T est Signal Descriptions
JP14 Pin
Number
SymbolDescription
LED/CFG1
Jumper
JP1
Setting
Pins 2 & 3
Jumper
Pins 1 & 2Pins 2 & 3Pins 1 & 2
Pins 1 & 2Pins 1 & 2Pins 1 & 2
JP2
LED/CFG2
Setting
Pins 2 & 3
Jumper
JP3
LED/CFG3
Setting
Pins 2 & 3
1TRST_LTest Reset. Test reset input sou rced by te sting device.
3TCK
5TMS
7TDO
8TDI
T est Clock. Test clock input sourced by testing device.
Test Mode Select.
Test Data Output. Test data driven with respect to the falling edge of TCK.
Test Data Input. Test data sampled with respect to the rising edge of TCK.