Intel LXD381 User Manual
LXD381 — Evaluation Board for
Octal E1 Applications
Developer Manual
January 2001
As of January 15, 2001, this document replaces the Level One document Order Number: 249213-001
LXD381 — Evaluation Board for Octal E1 Applications User Guide.
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The LXD381 may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current
characterized errata are available on request.
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LXD381 — Evaluation Board for Octal E1 Applications Developer Manual
Contents
1.0 General Description .................................................................................................. 5
1.1 Features ................................................................................................................ 5
2.0 Evaluation Board Set-Up......................................................................................... 7
2.1 LXD381 Packing List .............................................................................................7
2.2 Equipment Requirements ......................................................................................7
2.3 Power Connections ............................................................................................... 7
2.4 Loopback Mode Selection.....................................................................................7
2.5 Receive Polarity Selection.....................................................................................8
2.6 Output Enable Selection........................................................................................ 8
2.7 Unused Switches...................................................................................................8
2.8 Back-End Interface Connection.............................................................................8
2.9 Line Interface Connection ..................................................................................... 9
2.10 Line Interface Circuit ............................................................................................. 9
2.11 Board Protection....................................................................................................9
3.0 Evaluation Board Schematics.............................................................................10
Figures
Tables
1 LXD381 Evaluation Board.....................................................................................6
2 S2 Factory Switch Settings ................................................................................... 8
3 Typical Back-End Connector.................................................................................9
4 Evaluation Board Schematic — Data/Control .....................................................10
5 Evaluation Board Schematic — Digital I/O.......................................................... 11
6 Evaluation Board Schematic — Analog 1 ...........................................................12
7 Evaluation Board Schematic — Analog 2 ...........................................................13
1 LOOP0 - 7 Switch Settings....................................................................................7
LXD381 — Evaluation Board for Octal E1 Applications Developer Manual iii
Evaluation Board for Octal E1 Applications — LXD381
1.0 General Description
The LXD381 evaluation board is a versatile tool for engineers designing E1 short haul applications
using the LXT381.
The evaluation board operates in Hardware mode only. All device and channel controls are set
using jumper blocks and DIP switches.
The board provides banana jacks for both power and line interface connections. Connectors are
provided for each framer or back-end ASIC interface. An E1 pattern generator/analyzer may be
used to provide external signals for evaluation.
1.1 Features
• Hardware controllable
• ZIF LQFP socket for easy swapping of LXT381
• Banana jacks for power and line interfaces
• 10-pin connectors for framer/ASIC interface
• Socketed termination components for easy experimentation
• Built-in overvoltage protection for line interface and power supply
Developer Manual 5
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