Thermal/Mechanical Specifications and Design Guidelines
April 2011
®
Document Number: 324973-001
Notice: This document contains information on products in the design phase of development. The information here is subject to change without
notice. Do not finalize a design with this information.
Legal Lines and Disclaimers
NFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED,
BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS
PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER,
AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING
LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY
PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving,
life sustaining, critical control or safety systems, or in nuclear facility applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel
reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future
changes to them.
The processor, chipset and LGA1155 socket may contain design defects or errors known as errata which may cause the product to
deviate from published specifications. Current characterized errata are available on request.Contact your local Intel sales office or
your distributor to obtain the latest specifications and before placing your product order.
Requires a system with Intel® Turbo Boost Technology capability. Consult your PC manufacturer. Performance varies depending
on hardware, software and system configuration. For more information, visit http://www.intel.com/technology/turboboost
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an order number and are referenced in this document, or other Intel literature may be obtained
by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com.
Intel, Xeon and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States
and other countries.
*Other names and brands may be claimed as the property of others.
4-7ILM Cover and PnP Cover Interference ................................................................. 35
5-1Flow Chart of Knowledge-Based Reliability Evaluation Methodology .......................... 40
6-1Thermal Test Vehicle Thermal Profile for Intel
6-2Thermal Test Vehicle Thermal Profile for Intel
6-3Thermal Test Vehicle Thermal Profile for Intel
6-4Thermal Test Vehicle Thermal Profile for Intel
6-5Thermal Test Vehicle Thermal Profile for
Intel® Xeon® Processor E3-1200 (95W) with Integrated Graphics ............................ 48
6-6TTV Case Temperature (TCASE) Measurement Location .......................................... 54
6-7Frequency and Voltage Ordering.......................................................................... 56
6-8Package Power Control....................................................................................... 61
8-1Comparison of Case Temperature vs. Sensor Based Specification............................. 66
6-2Thermal Test Vehicle Thermal Profile for Intel
6-3Thermal Test Vehicle Thermal Profile for Intel
6-4Thermal Test Vehicle Thermal Profile for Intel
6-5Thermal Test Vehicle Thermal Profile for Intel
6-6Thermal Test Vehicle Thermal Profile for
Intel
®
Xeon® Processor E3-1200 (95W) with Integrated Graphics ............................ 48
6-7Thermal Solution Performance above TCONTROL for the
A-4LGA1155 Socket and ILM Components ................................................................. 93
A-5Supplier Contact Information .............................................................................. 94
B-1Mechanical Drawing List ..................................................................................... 95
C-1Mechanical Drawing List ................................................................................... 115
D-1Mechanical Drawing List ................................................................................... 121
®
Xeon® Processor E3-1280 (95W) ....... 43
®
Xeon® Processor E3-1200 (80W) ....... 45
®
Xeon® Processor E3-1260L (45W) ..... 46
®
Xeon® Processor E3-1220L (20W) .... 47
CONTROL
.......................................... 72
Thermal/Mechanical Specifications and Design Guideline7
Revision History
Document NumberDescriptionDate
324973-001• Initial release of the document. April 2011
§
8Thermal/Mechanical Specifications and Design Guideline
Introduction
1Introduction
This document is intended to provide guidelines for design of thermal and mechanical
solution. Meanwhile thermal and mechanical specifications for the processor and
associated socket are included.
The components described in this document include:
• The thermal and mechanical specifications for the following Intel® server/
workstation processors:
—Intel® Xeon® processor E3-1200 product family
• The LGA1155 socket and the Independent Loading Mechanism (ILM) and back
plate.
• The collaboration/reference design thermal solution (heatsink) for the processors
and associated retention hardware.
®
The Intel
specifications. When required for clarity this document will use:
•Intel® Xeon® processor E3-1280 (95W)
•Intel® Xeon® processor E3-1200 (80W)
•Intel
•Intel® Xeon® processor E3-1260L (45W)
•Intel® Xeon® processor E3-1220L (20W)
Xeon® Processor E3-1200 product family has the different thermal
®
Xeon® processor E3-1200 series (95W) with integrated graphics
Note:When the information is applicable to all products the this document will use
“processor” or “processors” to simplify the document.
Thermal/Mechanical Specifications and Design Guidelines9
1.1References
Material and concepts available in the following documents may be beneficial when
reading this document.
Table 1-1.Reference Documents
Intel® Xeon® Processor E3-1200 Family Data Sheet Volume Onehttp://
Intel® Xeon® Processor E3-1200 Family Datasheet Volume Twohttp://
Intel® Xeon® Processor E3-1200 Family Specification Update http://
BypassBypass is the area between a passive heatsink and any object that can act to form a duct. For this
CTECoefficient of Thermal Expansion. The relative rate a material expands during a thermal event.
DTSDigital Thermal Sensor reports a relative die temperature as an offset from TCC activation temperature.
FSCFan Speed Control
IHSIntegrated Heat Spreader: a component of the processor package used to enhance the thermal
ILMIndependent Loading Mechanism provides the force needed to seat the 1155-LGA land package onto the
PCHPlatform Controller Hub. The PCH is connected to the processor via the Direct Media Interface (DMI) and
LGA1155 socketThe processor mates with the system board through this surface mount, 1155-land socket.
PECIThe Platform Environment Control Interface (PECI) is a one-wire interface that provides a communication
Ψ
CA
Ψ
CS
Ψ
SA
T
CASE or TC
example, it can be expressed as a dimension away from the outside dimension of the fins to the nearest
surface.
performance of the package. Component thermal solutions interface with the processor at the IHS surface.
socket contacts.
®
Flexible Display Interface (Intel® FDI).
Intel
channel between Intel processor and chipset components to external monitoring devices.
Case-to-ambient thermal characterization parameter (psi). A measure of thermal solution performance
using total package power. Defined as (T
be specified for Ψ measurements.
Case-to-sink thermal characterization parameter. A measure of thermal interface material performance
using total package power. Defined as (T
Sink-to-ambient thermal characterization parameter. A measure of heatsink thermal performance using
total package power. Defined as (T
The case temperature of the processor, measured at the geometric center of the topside of the TTV IHS.
– TLA) / Total Package Power.
S
– TLA) / Total Package Power. The heat source should always
CASE
– TS) / Total Package Power.
CASE
10Thermal/Mechanical Specifications and Design Guidelines
Introduction
Table 1-2.Terms and Descriptions (Sheet 2 of 2)
TermDescription
T
CASE_MAX
TCCThermal Control Circuit: Thermal monitor uses the TCC to reduce the die temperature by using clock
T
CONTROL
TDPThermal Design Power: Thermal solution should be designed to dissipate this target power level. TDP is not
Thermal MonitorA power reduction feature designed to decrease temperature after the processor has reached its maximum
Thermal ProfileLine that defines case temperature specification of the TTV at a given power level.
TIMThermal Interface Material: The thermally conductive compound between the heatsink and the processor
TTVThermal Test Vehicle. A mechanically equivalent package that contains a resistive heater in the die to
T
LA
T
SA
The maximum case temperature as specified in a component specification.
modulation and/or operating frequency and input voltage adjustment when the die temperature is very
near its operating limits.
Tcontrol is a static value that is below the TCC activation temperature and used as a trigger point for fan
speed control. When DTS > Tcontrol, the processor must comply to the TTV thermal profile.
the maximum power that the processor can dissipate.
operating temperature.
case. This material fills the air gaps and voids, and enhances the transfer of the heat from the processor
case to the heatsink.
evaluate thermal solutions.
The measured ambient temperature locally surrounding the processor. The ambient temperature should be
measured just upstream of a passive heatsink or at the fan inlet for an active heatsink.
The system ambient air temperature external to a system chassis. This temperature is usually measured
at the chassis air inlets.
§
Thermal/Mechanical Specifications and Design Guidelines11
Introduction
12Thermal/Mechanical Specifications and Design Guidelines
Package Mechanical & Storage Specifications
IHS
Substrate
System Board
Capacitors
Core (die)
TIM
LGA1155 Socket
2Package Mechanical & Storage
Specifications
2.1Package Mechanical Specifications
The processor is packaged in a Flip-Chip Land Grid Array package that interfaces with
the motherboard via the LGA1155 socket. The package consists of a processor
mounted on a substrate land-carrier. An integrated heat spreader (IHS) is attached to
the package substrate and core and serves as the mating surface for processor thermal
solutions, such as a heatsink. Figure 2-1 shows a sketch of the processor package
components and how they are assembled together. Refer to Chapter 3 and Chapter 4
for complete details on the LGA1155 socket.
The package components shown in Figure 2-1 include the following:
1. Integrated Heat Spreader (IHS)
2. Thermal Interface Material (TIM)
3. Processor core (die)
4. Package substrate
5. Capacitors
Figure 2-1. Processor Package Assembly Sketch
Note:
1.Socket and motherboard are included for reference and are not part of processor package.
2.For clarity the ILM not shown.
Thermal/Mechanical Specifications and Design Guidelines13
2.1.1Package Mechanical Drawing
37.5
37.5
Figure 2-2 shows the basic package layout and dimensions. The detailed package
mechanical drawings are in Appendix D. The drawings include dimensions necessary to
design a thermal solution for the processor. These dimensions include:
1. Package reference with tolerances (total height, length, width, and so on)
2. IHS parallelism and tilt
3. Land dimensions
4. Top-side and back-side component keep-out dimensions
5. Reference datums
6. All drawing dimensions are in mm.
Figure 2-2. Package View
Package Mechanical & Storage Specifications
2.1.2Processor Component Keep-Out Zones
The processor may contain components on the substrate that define component keepout zone requirements. A thermal and mechanical solution design must not intrude into
the required keep-out zones. Decoupling capacitors are typically mounted to either the
topside or land-side of the package substrate. See Figure B-3 and Figure B-4 for keepout zones. The location and quantity of package capacitors may change due to
manufacturing efficiencies but will remain within the component keep-in. This keep-in
zone includes solder paste and is a post reflow maximum height for the components.
14Thermal/Mechanical Specifications and Design Guidelines
Package Mechanical & Storage Specifications
2.1.3Package Loading Specifications
Ta b le 2 - 1 provides dynamic and static load specifications for the processor package.
These mechanical maximum load limits should not be exceeded during heatsink
assembly, shipping conditions, or standard use condition. Also, any mechanical system
or component testing should not exceed the maximum limits. The processor package
substrate should not be used as a mechanical reference or load-bearing surface for
.
Table 2-1.Processor Loading Specifications
thermal and mechanical solution.
ParameterMinimumMaximumNotes
Static Compressive Load-600 N [135 lbf]1, 2, 3
Dynamic Compressive Load-712 N [160 lbf ] 1, 3, 4
Notes:
1.These specifications apply to uniform compressive loading in a direction normal to the processor IHS.
2.This is the maximum static force that can be applied by the heatsink and retention solution to maintain the
heatsink and processor interface.
3.These specifications are based on limited testing for design characterization. Loading limits are for the
package only and do not include the limits of the processor socket.
4.Dynamic loading is defined as an 50g shock load, 2X Dynamic Acceleration Factor with a 500g maximum
thermal solution.
2.1.4Package Handling Guidelines
Ta b le 2 - 2 includes a list of guidelines on package handling in terms of recommended
maximum loading on the processor IHS relative to a fixed substrate. These package
handling loads may be experienced during heatsink removal.
Table 2-2.Package Handling Guidelines
ParameterMaximum RecommendedNotes
Shear311 N [70 lbf]1, 4
Tensile111 N [25 lbf]2, 4
Torque3.95 N-m [35 lbf-in]3, 4
Notes:
1.A shear load is defined as a load applied to the IHS in a direction parallel to the IHS top surface.
2.A tensile load is defined as a pulling load applied to the IHS in a direction normal to the IHS surface.
3.A torque load is defined as a twisting load applied to the IHS in an axis of rotation normal to the IHS top
surface.
4.These guidelines are based on limited testing for design characterization.
2.1.5Package Insertion Specifications
The processor can be inserted into and removed from an LGA1155 socket 15 times. The
socket should meet the LGA1155 socket requirements detailed in Chapter 5.
2.1.6Processor Mass Specification
The typical mass of the processor is 21.5 g (0.76 oz). This mass [weight] includes all
the components that are included in the package.
Thermal/Mechanical Specifications and Design Guidelines15
2.1.7Processor Materials
Sample (QDF):
GRP1LINE1: i{M}{C}YY
GRP1LINE2: INTEL CONFIDENTIAL
GRP1LINE3: QDF ES SPEED
GRP1LINE4: COUNTRY OF ORIGIN
GRP1LINE5: {FPO} {e4}
Production (SSPEC):
GRP1LINE1: i{M}{C}YY
GRP1LINE2: BRAND PROC#
GRP1LINE3: SSPEC SPEED
GRP1LINE4: COUNTRY OF ORIGIN
GRP1LINE5: {FPO} {e4}
Package Mechanical & Storage Specifications
Tab l e 2- 3 lists some of the package components and associated materials.
Figure 2-3 shows the topside markings on the processor. This diagram is to aid in the
identification of the processor.
Figure 2-3. Processor Top-Side Markings
GRP1LINE1
GRP1LINE2
GRP1LINE3
GRP1LINE4
GRP1LINE5
S/N
16Thermal/Mechanical Specifications and Design Guidelines
Package Mechanical & Storage Specifications
AY
AV
AT
AP
AM
AK
AH
AF
AD
AB
Y
V
T
P
M
K
H
F
D
B
AW
AU
AR
AN
AL
AJ
AG
AE
AC
AA
W
U
N
R
K
J
G
E
C
A
1357911 13 15 17 19 21 2325 27 29 31
33 35 37 39
2 4 6 8 101214 1618202224 26283032
34 36 38 40
2.1.9Processor Land Coordinates
.
Figure 2-4. Processor Package Lands Coordinates
Thermal/Mechanical Specifications and Design Guidelines17
Figure 2-4 shows the bottom view of the processor package.
Package Mechanical & Storage Specifications
2.2Processor Storage Specifications
Tab l e 2- 4 includes a list of the specifications for device storage in terms of maximum
and minimum temperatures and relative humidity. These conditions should not be
.
Table 2-4.Storage Conditions
exceeded in storage or transportation.
Parameter DescriptionMinMaxNotes
T
ABSOLUTESTORAGE
T
SUSTAINEDSTORAGE
RH
SUSTAINEDSTORAGE
TIME
SUSTAINEDSTORAGE
Notes:
1.Refers to a component device that is not assembled in a board or socket that is not to be electrically
connected to a voltage reference or I/O signals.
2.Specified temperatures are based on data collected. Exceptions for surface mount reflow are specified in by
applicable JEDEC standard Non-adherence may affect processor reliability.
3.T
ABSOLUTESTORAGE
moisture barrier bags or desiccant.
4.Intel branded board products are certified to meet the following temperature and humidity limits that are
given as an example only (Non-Operating Temperature Limit: -40 °C to 70 °C, Humidity: 50% to 90%,
non-condensing with a maximum wet bulb of 28 °C). Post board attach storage temperature limits are not
specified for non-Intel branded boards.
5.The JEDEC, J-JSTD-020 moisture level rating and associated handling practices apply to all moisture
sensitive devices removed from the moisture barrier bag.
6.Nominal temperature and humidity conditions and durations are given and tested within the constraints
imposed by T
The non-operating device storage temperature.
Damage (latent or otherwise) may occur when
subjected to for any length of time.
The ambient storage temperature limit (in
shipping media) for a sustained period of time.
The maximum device storage relative humidity
for a sustained period of time.
A prolonged or extended period of time; typically
associated with customer shelf life.
applies to the unassembled component only and does not apply to the shipping media,
SUSTAINED STORAGE
and customer shelf life in applicable intel box and bags.
-55 °C125 °C1, 2, 3
-5 °C40 °C4, 5
60% @ 24 °C5, 6
0
Months6 Months
6
§
18Thermal/Mechanical Specifications and Design Guidelines
LGA1155 Socket
3LGA1155 Socket
This chapter describes a surface mount, LGA (Land Grid Array) socket intended for the
processors. The socket provides I/O, power and ground contacts. The socket contains
1155 contacts arrayed about a cavity in the center of the socket with lead-free solder
balls for surface mounting on the motherboard.
The contacts are arranged in two opposing L-shaped patterns within the grid array. The
grid array is 40 x 40 with 24 x 16 grid depopulation in the center of the array and
selective depopulation elsewhere.
The socket must be compatible with the package (processor) and the Independent
Loading Mechanism (ILM). The ILM design includes a back plate which is integral to
having a uniform load on the socket solder joints. Socket loading specifications are
listed in Chapter 5.
Figure 3-1. LGA1155 Socket with Pick and Place Cover
Thermal/Mechanical Specifications and Design Guidelines19
Figure 3-2. LGA1155 Socket Contact Numbering (Top View of Socket)
A C E G J L N R U W AA AC AE AG AJ AL AN AR AU AW
B D F H K M P T V Y AB AD AF AH AK AM AP AT AV AY
1
3
7
5
9
11
15
13
17
19
23
21
25
27
29
2
8
4
6
10
16
12
14
18
24
20
22
26
28
30
15
11
13
17
23
19
21
25
31
27
29
33
39
35
37
32
14
12
16
18
22
20
24
26
30
28
34
38
36
40
LGA1155 Socket
3.1Board Layout
The land pattern for the LGA1155 socket is 36 mils X 36 mils (X by Y) within each of the
two L-shaped sections. Note that there is no round-off (conversion) error between
20Thermal/Mechanical Specifications and Design Guidelines
socket pitch (0.9144 mm) and board pitch (36 mil) as these values are equivalent. The
two L-sections are offset by 0.9144 mm (36 mil) in the x direction and 3.114 mm
(122.6 mil) in the y direction, see Figure 3-3. This was to achieve a common package
land to PCB land offset which ensures a single PCB layout for socket designs from the
multiple vendors.
LGA1155 Socket
AC EGJL NR U W AA AC AE AG AJ AL AN AR AU AW
B D FHK M PTV Y AB AD AF AH AK AM AP AT AV AY
1
3
7
5
9
11
15
13
17
19
23
21
25
27
29
2
8
4
6
10
16
12
14
18
24
20
22
26
28
30
32
15
11
14
12
13
16
17
23
19
18
22
20
21
24
25
31
27
26
30
28
29
33
39
35
34
38
36
37
40
B D FH K M PT V Y AB AD AF AH AK AM AP AT AV AY
A C EGJL NRU W AA AC AE AG AJ AL AN AR AU AW
122.6 mi l (3.1 144mm )
36mil (0.9144 mm )
Figure 3-3. LGA1155 Socket Land Pattern (Top View of Board)
Thermal/Mechanical Specifications and Design Guidelines21
LGA1155 Socket
Load plate
Frame
Load Lever
BackPlate
Shoulder
Screw
Load plate
Frame
Load Lever
Back Plate
Shoulder
Screw
3.1.1Suggested Silkscreen Marking for Socket Identification
Intel is recommending that customers mark the socket name approximately where
shown in Figure 3-4.
Figure 3-4. Suggested Board Marking
3.2Attachment to Motherboard
The socket is attached to the motherboard by 1155 solder balls. There are no additional
external methods (that is, screw, extra solder, adhesive, and so on) to attach the
socket.
As indicated in Figure 3-1, the Independent Loading Mechanism (ILM) is not present
during the attach (reflow) process.
Figure 3-5. Attachment to Motherboard
22Thermal/Mechanical Specifications and Design Guidelines
LGA1155 Socket
3.3Socket Components
The socket has two main components, the socket body and Pick and Place (PnP) cover,
and is delivered as a single integral assembly. Refer to Appendix C for detailed
drawings.
3.3.1Socket Body Housing
The housing material is thermoplastic or equivalent with UL 94 V-0 flame rating capable
of withstanding 260 °C for 40 seconds which is compatible with typical reflow/rework
profiles. The socket coefficient of thermal expansion (in the XY plane), and creep
properties, must be such that the integrity of the socket is maintained for the
conditions listed in Chapter 5.
The color of the housing will be dark as compared to the solder balls to provide the
contrast needed for pick and place vision systems.
3.3.2Solder Balls
A total of 1155 solder balls corresponding to the contacts are on the bottom of the
socket for surface mounting with the motherboard. The socket solder ball has the
following characteristics:
• Lead free SAC (SnAgCu) 305 solder alloy with a silver (Ag) content between 3%
and 4% and a melting temperature of approximately 217 °C. The alloy is
compatible with immersion silver (ImAg) and Organic Solderability Protectant
(OSP) motherboard surface finishes and a SAC alloy solder paste.
• Solder ball diameter 0.6 mm ± 0.02 mm, before attaching to the socket lead.
The co-planarity (profile) and true position requirements are defined in Appendix C.
3.3.3Contacts
Base material for the contacts is high strength copper alloy.
For the area on socket contacts where processor lands will mate, there is a 0.381 μm
[15 μinches] minimum gold plating over 1.27 μm [50 μinches] minimum nickel
underplate.
No contamination by solder in the contact area is allowed during solder reflow.
3.3.4Pick and Place Cover
The cover provides a planar surface for vacuum pick up used to place components in
the Surface Mount Technology (SMT) manufacturing line. The cover remains on the
socket during reflow to help prevent contamination during reflow. The cover can
withstand 260 °C for 40 seconds (typical reflow/rework profile) and the conditions
listed in Chapter 5 without degrading.
As indicated in Figure 3-6, the cover remains on the socket during ILM installation, and
should remain on whenever possible to help prevent damage to the socket contacts.
Thermal/Mechanical Specifications and Design Guidelines23
Cover retention must be sufficient to support the socket weight during lifting,
Pick & Place Cover
Pin 1
ILM Installation
Pick & Place Cover
Pin 1
ILM Installation
translation, and placement (board manufacturing), and during board and system
shipping and handling. PnP Cover should only be removed with tools, to prevent the
cover from falling into the contacts.
The socket vendors have a common interface on the socket body where the PnP cover
attaches to the socket body. This should allow the PnP covers to be compatible between
socket suppliers.
As indicated in Figure 3-6, a Pin 1 indicator on the cover provides a visual reference for
proper orientation with the socket.
Figure 3-6. Pick and Place Cover
LGA1155 Socket
3.4Package Installation / Removal
24Thermal/Mechanical Specifications and Design Guidelines
As indicated in Figure 3-7, access is provided to facilitate manual installation and
removal of the package.
To assist in package orientation and alignment with the socket:
• The package Pin1 triangle and the socket Pin1 chamfer provide visual reference for
proper orientation.
• The package substrate has orientation notches along two opposing edges of the
package, offset from the centerline. The socket has two corresponding orientation
posts to physically prevent mis-orientation of the package. These orientation
features also provide initial rough alignment of package to socket.
• The socket has alignment walls at the four corners to provide final alignment of the
package.
LGA1155 Socket
Pin 1
Chamfer
Package
Pin 1
Indicator
Alignment
Post
(2 Places)
Finger/Tool
Access
(2 Pla ces)
Orientation
Notch
(2 Place s)
.
Figure 3-7. Package Installation / Removal Features
3.4.1Socket Standoffs and Package Seating Plane
Standoffs on the bottom of the socket base establish the minimum socket height after
solder reflow and are specified in Appendix C.
Similarly, a seating plane on the topside of the socket establishes the minimum
package height. See Section 5.2 for the calculated IHS height above the motherboard.
3.5Durability
The socket must withstand 20 cycles of processor insertion and removal. The max
chain contact resistance from Tab l e 5- 4 must be met when mated in the 1st and
20th cycles.
The socket Pick and Place cover must withstand 15 cycles of insertion and removal.
3.6Markings
There are three markings on the socket:
• LGA1155: Font type is Helvetica Bold - minimum 6 point (2.125 mm). This mark
will also appear on the pick and place cap.
• Manufacturer's insignia (font size at supplier's discretion).
• Lot identification code (allows traceability of manufacturing date and location).
Thermal/Mechanical Specifications and Design Guidelines25
All markings must withstand 260 °C for 40 seconds (typical reflow/rework profile)
without degrading, and must be visible after the socket is mounted on the
motherboard.
LGA1155 and the manufacturer's insignia are molded or laser marked on the side wall.
3.7Component Insertion Forces
Any actuation must meet or exceed SEMI S8-95 Safety Guidelines for Ergonomics/
Human Factors Engineering of Semiconductor Manufacturing Equipment, example Table
R2-7 (Maximum Grip Forces). The socket must be designed so that it requires no force
to insert the package into the socket.
3.8Socket Size
Socket information needed for motherboard design is given in Appendix C.
This information should be used in conjunction with the reference motherboard keepout drawings provided in Appendix B to ensure compatibility with the reference thermal
mechanical components.
LGA1155 Socket
§
26Thermal/Mechanical Specifications and Design Guidelines
Independent Loading Mechanism (ILM)
4Independent Loading
Mechanism (ILM)
The ILM has two critical functions: deliver the force to seat the processor onto the
socket contacts and distribute the resulting compressive load evenly through the socket
solder joints.
The mechanical design of the ILM is integral to the overall functionality of the LGA1155
socket. Intel performs detailed studies on integration of processor package, socket and
ILM as a system. These studies directly impact the design of the ILM. The Intel
reference ILM will be “build to print” from Intel controlled drawings. Intel recommends
using the Intel Reference ILM. Custom non-Intel ILM designs do not benefit from Intel's
detailed studies and may not incorporate critical design parameters.
Note:There is a single ILM design for the LGA1155 socket and LGA1156 socket.
4.1Design Concept
The ILM consists of two assemblies that will be procured as a set from the enabled
vendors. These two components are ILM assembly and back plate. To secure the two
assemblies, two types of fasteners are required a pair (2) of standard 6-32 thread
screws and a custom 6-32 thread shoulder screw. The reference design incorporates a
T-20 Torx head fastener. The Torx head fastener was chosen to ensure end users do not
inadvertently remove the ILM assembly and for consistency with the LGA1366 socket
ILM. The Torx head fastener is also less susceptible to driver slippage. Once assembled
the ILM is not required to be removed to install / remove the motherboard from a
chassis.
4.1.1ILM Assembly Design Overview
The ILM assembly consists of 4 major pieces: ILM cover, load lever, load plate and the
hinge frame assembly.
All of the pieces in the ILM assembly except the hinge frame and the screws used to
attach the back plate are fabricated from stainless steel. The hinge frame is plated. The
frame provides the hinge locations for the load lever and load plate. An insulator is preapplied to the bottom surface of the hinge frame.
The ILM assembly design ensures that once assembled to the back plate the only
features touching the board are the shoulder screw and the insulated hinge frame
assembly. The nominal gap of the load plate to the board is ~1 mm.
When closed the load plate applies two point loads onto the IHS at the “dimpled”
features shown in Figure 4-1. The reaction force from closing the load plate is
transmitted to the hinge frame assembly and through the fasteners to the back plate.
Some of the load is passed through the socket body to the board inducing a slight
compression on the solder joints.
A pin 1 indicator will be marked on the ILM assembly.
Thermal/Mechanical Specifications and Design Guidelines27
Figure 4-1. ILM Assembly with Installed Processor
Fasteners
Load
Lever
Load
Plate
Hinge /
Frame
Assy
Shoulder Screw
Pin 1 Indicator
Fasteners
Load
Lever
Load
Plate
Hinge /
Frame
Assy
Shoulder Screw
Pin 1 Indicator
Independent Loading Mechanism (ILM)
4.1.2ILM Back Plate Design Overview
The back plate is a flat steel back plate with pierced and extruded features for ILM
attach. A clearance hole is located at the center of the plate to allow access to test
points and backside capacitors if required. An insulator is pre-applied. A notch is placed
in one corner to assist in orienting the back plate during assembly.
Note:The Server ILM back plate is different from the Desktop design. Since Server
secondary-side clearance of 3.0 mm [0.118 inch] is generally available for leads and
backside components, so Server ILM back plate is designed with 1.8 mm thickness and
2.2 mm entire height including punch protrusion length.
Caution:Intel does NOT recommend using the server back plate for high-volume desktop
applications at this time as the server back plate test conditions cover a limited
envelope. Back plates and screws are similar in appearance. To prevent mixing,
different levels of differentiation between server and desktop back plate and screws
have been implemented.
For ILM back plate, three levels of differentiation have been implemented:
• Unique part numbers, please refer to part numbers listed in Appendix A.
• Desktop ILM back plate to use black lettering for marking versus server ILM back
plate to use yellow lettering for marking.
• Desktop ILM back plate using marking “115XDBP” versus server ILM back plate
using marking “115XSBP”.
Note:When reworking a BGA component or the socket that the heatsink, battery, ILM and
ILM Back Plate are removed prior to rework. The ILM back plate should also be
removed when reworking through hole mounted components in a mini-wave or solder
pot). The maximum temperature for the pre-applied insulator on the ILM is
approximately 106 °C.
28Thermal/Mechanical Specifications and Design Guidelines
Independent Loading Mechanism (ILM)
Die Cut
Insulator
Pierced & Extruded
Thread Features
Assembly
Orientation Feature
Die Cut
Insulator
Pierced & Extruded
Thread Features
Assembly
Orientation
Feature
Figure 4-2. Back Plate
4.1.3Shoulder Screw and Fasteners Design Overview
Note:The reference design incorporates a T-20 Torx head fastener. The Torx head fastener
The shoulder screw is fabricated from carbonized steel rod. The shoulder height and
diameter are integral to the mechanical performance of the ILM. The diameter provides
alignment of the load plate. The height of the shoulder ensures the proper loading of
the IHS to seat the processor on the socket contacts. The design assumes the shoulder
screw has a minimum yield strength of 235 MPa.
A dimensioned drawing of the shoulder screw is available for local sourcing of this
component. Please refer to Figure B-18 for the custom 6-32 thread shoulder screw
drawing.
The standard fasteners can be sourced locally. The design assumes this fastener has a
minimum yield strength of 235 MPa. Please refer to Figure B-19 for the standard 6-32
thread fasteners drawing.
The screws for Server ILM are different from Desktop design. The length of Server ILM
screws are shorter than the Desktop screw length to satisfy Server secondary-side
clearance limitation. Server ILM back plate to use black nickel plated screws, whereas
desktop ILM back plate to use clear plated screws. Unique part numbers, please refer
to Appendix A.
was chosen to ensure end users do not inadvertently remove the ILM assembly and for
consistency with the LGA1366 socket ILM.
Thermal/Mechanical Specifications and Design Guidelines29
Figure 4-3. Shoulder Screw
Shoulder
6-32 thread
Cap
Independent Loading Mechanism (ILM)
4.2Assembly of ILM to a Motherboard
The ILM design allows a bottoms up assembly of the components to the board. See
Figure 4-4 for step by step assembly sequence.
1. Place the back plate in a fixture. The motherboard is aligned with the fixture.
2. Install the shoulder screw in the single hole near Pin 1 of the socket. Torque to a
minimum and recommended 8 inch-pounds, but not to exceed 10 inch-pounds.
3. Align and place the ILM assembly over the socket.
4. Install two (2) 6-32 fasteners. Torque to a minimum and recommended 8 inchpounds, but not to exceed 10 inch-pounds.
The thread length of the shoulder screw accommodates a nominal board thicknesses of
0.062”.
30Thermal/Mechanical Specifications and Design Guidelines
Independent Loading Mechanism (ILM)
Step 1Step 2
Step 3
Step 4
Step 1Step 2
Step 3
Step 4
Step 1Step 2
Step 3
Step 4
.
Figure 4-4. ILM Assembly
Note:Here ILM assembly shown in figure is without ILM cover preinstalled.
As indicated in Figure 4-5, the shoulder screw, socket protrusion and ILM key features
Thermal/Mechanical Specifications and Design Guidelines31
prevent 180 degree rotation of ILM cover assembly with respect to socket. The result is
a specific Pin 1 orientation with respect to ILM lever.
Figure 4-5. Pin1 and ILM Lever
Alignment
Features
Load plate not
shown for
clarity
Pin 1
Shoulder
Screw
Load
Lever
Independent Loading Mechanism (ILM)
4.3ILM Interchangeability
ILM assembly and ILM back plate built from the Intel controlled drawings are intended
to be interchangeable. Interchangeability is defined as an ILM from Vendor A will
demonstrate acceptable manufacturability and reliability with a socket body from
Vendor A, B or C. ILM assembly and ILM back plate from all vendors are also
interchangeable.
The ILM are an integral part of the socket validation testing. ILMs from each vendor will
be matrix tested with the socket bodies from each of the current vendors. The tests
would include: manufacturability, bake and thermal cycling.
See Appendix A for vendor part numbers that were tested.
Note:ILMs that are not compliant to the Intel controlled ILM drawings can not be assured to
be interchangeable.
4.4Markings
There are four markings on the ILM:
• 115XLM: Font type is Helvetica Bold - minimum 6 point (2.125 mm).
• Manufacturer's insignia (font size at supplier's discretion).
• Lot identification code (allows traceability of manufacturing date and location).
• Pin 1 indicator on the load plate.
All markings must be visible after the ILM is assembled on the motherboard.
115XLM and the manufacturer's insignia can be ink stamped or laser marked on the
side wall.
32Thermal/Mechanical Specifications and Design Guidelines
Independent Loading Mechanism (ILM)
4.5ILM Cover
Intel has developed an ILM Cover that will snap onto the ILM for the LGA115x socket
family. The ILM cover is intended to reduce the potential for socket contact damage
from operator and customer fingers being close to the socket contacts to remove or
install the pick and place cap. The ILM Cover concept is shown in Figure 4-6.
The ILM Cover is intended to be used in place of the pick and place cover once the ILM
is assembled to the motherboard. The ILM will be offered with the ILM Cover pre
assembled as well as offered as a discrete component.
ILM Cover features:
• Pre-assembled by the ILM vendors to the ILM load plate. It will also be offered as a
discrete component.
• The ILM cover will pop off if a processor is installed in the socket, and the ILM
Cover and ILM are from the same manufacturer.
• ILM Cover can be installed while the ILM is open.
• Maintain compatibility between validated ILM vendors for LGA115x socket, with the
exception noted below
• The ILM cover for the LGA115x socket will have a flammability rating of V-2 per UL
60950-1.
1
.
Note:The ILM Cover pop off feature is not supported if the ILM Covers are interchanged on
different vendor’s ILMs.
Thermal/Mechanical Specifications and Design Guidelines33
Figure 4-6. ILM Cover
Step 3: Close ILM
Step 1: PnP Cover installed
during ILM assembly
Step 2: Remove PnP Cover
Independent Loading Mechanism (ILM)
As indicated in Figure 4-6, the pick and place cover should remain installed during ILM
assembly to the motherboard. After assembly, the pick and place cover is removed,
and the ILM mechanism (with the ILM cover installed) closed to protect the contacts.
The ILM Cover is designed to pop off if the pick and place cover is accidentally left in
place and the ILM closed with the ILM Cover installed. This is shown in Figure 4-7.
34Thermal/Mechanical Specifications and Design Guidelines
Independent Loading Mechanism (ILM)
Figure 4-7. ILM Cover and PnP Cover Interference
As indicated in Figure 4-7, the pick and place cover cannot remain in place and used in
conjunction with the ILM Cover. The ILM Cover is designed to interfere and pop off if
the pick and place cover is unintentionally left in place. The ILM cover will also interfere
and pop off if the ILM is closed with a processor in place in the socket.
§
Thermal/Mechanical Specifications and Design Guidelines35
Independent Loading Mechanism (ILM)
36Thermal/Mechanical Specifications and Design Guidelines
LGA1155 Socket and ILM Electrical, Mechanical and Environmental Specifications
5LGA1155 Socket and ILM
Electrical, Mechanical and
Environmental Specifications
This chapter describes the electrical, mechanical and environmental specifications for
the LGA1155 socket and the Independent Loading Mechanism.
5.1Component Mass
Table 5-1.Socket Component Mass
ComponentMass
Socket Body, Contacts and PnP Cover10 g
ILM Cover29 g
ILM Back Plate38 g
5.2Package/Socket Stackup Height
Ta b le 5 - 2 provides the stackup height of a processor in the 1155-land LGA package and
LGA1155 socket with the ILM closed and the processor fully seated in the socket.
Table 5-2.1155-land Package and LGA1155 Socket Stackup Height
ComponentStackup HeightNote
Integrated Stackup Height
From Top of Board to Top of IHS
Socket Nominal Seating Plane Height 3.4 ± 0.2 mm1
Package Nominal Thickness (lands to top of IHS)4.381 ± 0.269 mm1
Notes:
1.This data is provided for information only, and should be derived from: (a) the height of the socket seating
plane above the motherboard after reflow, given in Appendix C, (b) the height of the package, from the
package seating plane to the top of the IHS, and accounting for its nominal variation and tolerances that
are given in the corresponding processor data sheet.
2.The integrated stackup height value is a RSS calculation based on current and planned processors that will
use the ILM design.
(mm)
7.781 ± 0.335 mm2
Thermal/Mechanical Specifications and Design Guidelines37
LGA1155 Socket and ILM Electrical, Mechanical and Environmental Specifications
5.3Loading Specifications
The socket will be tested against the conditions listed in Chapter 11 with heatsink and
the ILM attached, under the loading conditions outlined in this section.
Tab l e 5- 3 provides load specifications for the LGA1155 socket with the ILM installed.
The maximum limits should not be exceeded during heatsink assembly, shipping
conditions, or standard use condition. Exceeding these limits during test may result in
component failure. The socket body should not be used as a mechanical reference or
load-bearing surface for thermal solutions.
Table 5-3.Socket & ILM Mechanical Specifications
ParameterMinMaxNotes
ILM static compressive load on processor IHS311 N [70 lbf]600 N [135 lbf]3, 4, 7, 8
Heatsink static compressive load0 N [0 lbf]222 N [50 lbf]1, 2, 3
Pick & Place cover insertion forceN/A10.2 N [2.3 lbf]-
Pick & Place cover removal force2.2N [0.5 lbf]7.56 N [1.7 lbf]9
Load lever actuation forceN/A20.9 N [4.7 lbf] in the
Maximum heatsink massN/A500g10
311 N [70 lbf]822 N [185 lbf]3, 4, 7, 8
N/A712 N [160 lbf ] 1, 3, 5, 6
vertical direction
10.2 N [2.3 lbf] in the
lateral direction.
-
Notes:
1.These specifications apply to uniform compressive loading in a direction perpendicular to the IHS top
surface.
2.This is the minimum and maximum static force that can be applied by the heatsink and it’s retention
solution to maintain the heatsink to IHS interface. This does not imply the Intel reference TIM is validated
to these limits.
3.Loading limits are for the LGA1155 socket.
4.This minimum limit defines the static compressive force required to electrically seat the processor onto the
socket contacts. The minimum load is a beginning of life load.
5.Dynamic loading is defined as a load a 4.3 m/s [170 in/s] minimum velocity change average load
superimposed on the static load requirement.
6.Test condition used a heatsink mass of 500 gm [1.102 lb.] with 50 g acceleration (table input) and an
assumed 2X Dynamic Acceleration Factor (DAF). The dynamic portion of this specification in the product
application can have flexibility in specific values. The ultimate product of mass times acceleration plus static
heatsink load should not exceed this limit.
7.The maximum BOL value and must not be exceeded at any point in the product life.
8.The minimum value is a beginning of life loading requirement based on load degradation over time.
9.The maximum removal force is the flick up removal upwards thumb force (measured at 45o), not
applicable to SMT operation for system assembly. Only the minimum removal force is applicable to vertical
removal in SMT operation for system assembly.
10. The maximum heatsink mass includes the heatsink, screws, springs, rings and cups. This mass limit is
evaluated using the heatsink attach to the PCB.
5.4Electrical Requirements
LGA1155 socket electrical requirements are measured from the socket-seating plane of
the processor to the component side of the socket PCB to which it is attached. All
specifications are maximum values (unless otherwise stated) for a single socket
contact, but includes effects of adjacent contacts where indicated.
38Thermal/Mechanical Specifications and Design Guidelines
LGA1155 Socket and ILM Electrical, Mechanical and Environmental Specifications
Table 5-4.Electrical Requirements for LGA1155 Socket
ParameterValueComment
The inductance calculated for two contacts,
Mated loop inductance, Loop<3.6 nH
Socket Average Contact Resistance
(EOL)
Max Individual Contact Resistance
(EOL)
Bulk Resistance Increase ≤
Dielectric Withstand Voltage360 Volts RMS
Insulation Resistance800 MΩ
19 mOhm
100 mOhm
3 mΩ
considering one forward conductor and one
return conductor. These values must be satisfied
at the worst-case height of the socket.
The socket average contact resistance target is
calculated from the following equation:
sum (Ni X LLCRi) / sum (Ni)
• LLCRi is the chain resistance defined as the
resistance of each chain minus resistance of
shorting bars divided by number of lands in
the daisy chain.
• Ni is the number of contacts within a chain.
• I is the number of daisy chain, ranging from
1 to 119 (total number of daisy chains).
The specification listed is at room temperature
and has to be satisfied at all time.
The specification listed is at room temperature
and has to be satisfied at all time.
Socket Contact Resistance:
the socket contact, solderball, and interface
resistance to the interposer land; gaps included.
The bulk resistance increase per contact from
25°C to 100°C.
The resistance of
5.5Environmental Requirements
Design, including materials, shall be consistent with the manufacture of units that meet
the following environmental reference points.
The reliability targets in this section are based on the expected field use environment
for these products. The test sequence for new sockets will be developed using the
knowledge-based reliability evaluation methodology, which is acceleration factor
dependent. A simplified process flow of this methodology can be seen in Figure 5-1.
Thermal/Mechanical Specifications and Design Guidelines39
LGA1155 Socket and ILM Electrical, Mechanical and Environmental Specifications
Establish the
market/expected use
environment for the
technology
Develop Speculative
stress conditions based on
historical data, content
experts, and literature
search
Perform stressing to
validate accelerated
stressing assumptions and
determine acceleration
factors
Freeze stressing
requirements and perform
additional data turns
Figure 5-1. Flow Chart of Knowledge-Based Reliability Evaluation Methodology
A detailed description of this methodology can be found at: ftp://download.intel.com/
technology/itj/q32000/pdf/reliability.pdf.
§
40Thermal/Mechanical Specifications and Design Guidelines
Thermal Specifications
6Thermal Specifications
The processor requires a thermal solution to maintain temperatures within its operating
limits. Any attempt to operate the processor outside these operating limits may result
in permanent damage to the processor and potentially other components within the
system. Maintaining the proper thermal environment is key to reliable, long-term
system operation.
A complete solution includes both component and system level thermal management
features. Component level thermal solutions can include active or passive heatsinks
attached to the processor integrated heat spreader (IHS).
This chapter provides data necessary for developing a complete thermal solution. For
more information on a thermal solution design, please refer to Chapter 9.
6.1Thermal Specifications
To allow the optimal operation and long-term reliability of Intel processor-based
systems, the processor must remain within the minimum and maximum case
temperature (T
Thermal solutions not designed to provide this level of thermal capability may affect the
long-term reliability of the processor and system. For more details on thermal solution
design, please refer to the Chapter 9.
) specifications as defined by the applicable thermal profile.
CASE
The processors implement a methodology for managing processor temperatures which
is intended to support acoustic noise reduction through fan speed control and to assure
processor reliability. Selection of the appropriate fan speed is based on the relative
temperature data reported by the processor’s Digital Temperature Sensor (DTS). The
DTS can be read via the Platform Environment Control Interface (PECI) as described in
Chapter 7. Alternatively, when PECI is monitored by the PCH, the processor
temperature can be read from the PCH via the SMBUS protocol defined in Embedded Controller Support Provided by Platform Controller Hub (PCH). The temperature
reported over PECI i s always a negat ive value and represents a delta below the onset of
thermal control circuit (TCC) activation, as indicated by PROCHOT# (see Section 6.2,
Processor Thermal Features). Systems that implement fan speed control must be
designed to use this data. Systems that do not alter the fan speed only need to ensure
the case temperature meets the thermal profile specifications.
A single integer change in the PECI value corresponds to approximately 1 °C change in
processor temperature. Although each processors DTS is factory calibrated, the
accuracy of the DTS will vary from part to part and may also vary slightly with
temperature and voltage. In general, each integer change in PECI should equal a
temperature change between 0.9 °C and 1.1 °C.
Analysis indicates that real applications are unlikely to cause the processor to consume
maximum power dissipation for sustained time periods. Intel recommends that
complete thermal solution designs target the Thermal Design Power (TDP), instead of
the maximum processor power consumption. The Adaptive Thermal Monitor feature is
intended to help protect the processor in the event that an application exceeds the TDP
recommendation for a sustained time period. For more details on this feature, refer to
Thermal/Mechanical Specifications and Design Guidelines41
Section 6.2. To ensure maximum flexibility for future processors, systems should be
designed to the Thermal Solution Capability guidelines, even if a processor with lower
power dissipation is currently planned.
Table 6-1.Processor Thermal Specifications
Thermal Specifications
Max
Power
ProductGuidelines
®
®
Xeon
Intel
Processor E3-
2011D28225.595
8
Package
C1E
1,2,6
(W)
1280 (95W)
®
Xeon®
Intel
processor E3-
2011D28225.580
1200 (80W)
®
Xeon®
Intel
processor E3-
2011B20125.545
1260L (45W)
®
Xeon®
Intel
processor E3-
2011A1810520
1220L (20W)
®
Xeon®
Intel
processor E31200 (95W)
with integrated
graphics
Notes:
1.The package C-state power is the worst case power in the system configured as follows:
- Memory configured for DDR3 1333 and populated with 2 DIMM per channel.
- DMI and PCIe links are at L1.
2.Specification at Tj of 50 °C and minimum voltage loadline.
3.Specification at Tj of 35 °C and minimum voltage loadline.
4.These values are specified at V
Systems must be designed to ensure the processor is not to be subjected to any static V
combination wherein V
the datasheet.
5.Thermal Design Power (TDP) should be used for processor thermal solution design targets. TDP is not the
maximum power that the processor can dissipate. TDP is measured at DTS = -1.
TDP is achieved with the Memory configured for DDR3 1333 and 2 DIMMs per channel.
6.Not 100% tested. Specified by design characterization.
7.When the Multi-monitor feature is enabled (running 4 displays simultaneously) there could be corner cases
with additional system thermal impact on the SA and VCCP rails ≤1.5W (maximum of 1.5W measured on
16 lane PCIe card). The integrator should perform additional thermal validation with Multi-monitor enabled
to ensure thermal compliance.
8.Guidelines provide a design target for meeting all planned processor frequency requirements. For more
detailed definition, please refer to latest processor Datasheet.
2011D28225.595
CC_MAX
exceeds V
CCP
CCP_MAX
and V
Max
Power
Package
C3
1,2,6
(W)
Max
Power
Package
C6
1,3,6
(W)
TTV
Thermal
Design
Power
4,5,7
(W)
Min T
(°C)
CASE
5
for all other voltage rails for all processor frequencies.
NOM
at specified I
. Please refer to the loadline specifications in
CCP
and ICC
CC
Maximum
TTV TCASE
(°C)
Figure 6-1
&Tab l e 6- 2
Figure 6-2&
Tab l e 6-3
Figure 6-3&
Tab l e 6-4
Figure 6-4&
Tab l e 6-5
Figure 6-5&
Tab l e 6-6
42Thermal/Mechanical Specifications and Design Guidelines
Figure 6-4. Thermal Test Vehicle Thermal Profile for Intel® Xeon® Processor E3-1220L
(20W)
Notes:
1.Please refer to Tab le 6 -5 for discrete points that constitute the thermal profile.
2.Refer to Chapter 9 and Chapter 11 for system and environmental implementation details.
Table 6-5.Thermal Test Vehicle Thermal Profile for Intel® Xeon® Processor E3-1220L
(20W)
Power (W)T
068.51273.9
269.41474.8
470.31675.7
671.21876.6
872.12077.5
1073.0
CASE_MAX
(°C)Power (W)T
CASE_MAX
(°C)
Thermal/Mechanical Specifications and Design Guidelines47
Thermal Specifications
6.1.5Intel® Xeon® Processor E3-1200 (95W) with Integrated
Graphics Thermal Profile
Figure 6-5. Thermal Test Vehicle Thermal Profile for
Intel
®
Xeon® Processor E3-1200 (95W) with Integrated Graphics
Notes:
1.Please refer to Tabl e 6- 6 for discrete points that constitute the thermal profile.
2.Refer to Chapter 11 for system and environmental implementation details.
Table 6-6.Thermal Test Vehicle Thermal Profile for
Intel
®
Xeon® Processor E3-1200 (95W) with Integrated Graphics
(Sheet 1 of 2)
Power (W)T
045.15059.6
245.75260.2
446.35460.8
646.85661.3
847.45861.9
1048.06062.5
1248.66263.1
1449.26463.7
1649.76664.2
1850.36864.8
2050.97065.4
2251.57266.0
48Thermal/Mechanical Specifications and Design Guidelines
CASE_MAX
(°C)Power (W)T
CASE_MAX
(°C)
Thermal Specifications
Table 6-6.Thermal Test Vehicle Thermal Profile for
Intel
®
Xeon® Processor E3-1200 (95W) with Integrated Graphics
(Sheet 2 of 2)
Power (W)T
2452.17466.6
2652.67667.1
2853.27867.7
3053.88068.3
3254.48268.9
3455.08469.5
3655.58670.0
3856.18870.6
4056.79071.2
4257.39271.8
4457.99472.4
4658.49572.6
4859.0
CASE_MAX
(°C)Pow er (W)T
CASE_MAX
6.1.6Processor Specification for Operation Where Digital
Thermal Sensor Exceeds T
During operation, when the DTS value is greater than T
algorithm must drive the fan speed to meet or exceed the target thermal solution
performance (Ψ
• Ta b le 6 -7 for the Intel® Xeon® Processor E3-1280 (95W)
• Ta b le 6 -8 for theIntel
• Ta b le 6 -9 for the Intel® Xeon® processor E3-1260L (45W)
• Ta b le 6 -1 0 for the Intel® Xeon® processor E3-1220L (20W)
• Ta b le 6 -1 1 for the Intel
) shown in below tables:
CA
®
Xeon® processor E3-1200 (80W)
®
Xeon® processor E3-1200 (95W) with integrated graphics
CONTROL
CONTROL
, the fan speed control
(°C)
To get the full acoustic benefit of the DTS specification, ambient temperature
monitoring is necessary.
Table 6-7.Thermal Solution Performance abov e T
Thermal/Mechanical Specifications and Design Guidelines49
Intel
®
Xeon® Processor E3-1280 (95W) (Sheet 1 of 2)
T
1
AMBIENT
45.10.3000.300
44.00.3200.312
43.00.3370.322
42.00.3550.333
41.00.3730.343
40.00.3910.354
39.00.4090.364
38.00.4270.375
DTS = T
CONTROL
Ψ
at
CA
CONTROL
for the
2
Ψ
at
CA
DTS = -1
3
Thermal Specifications
Table 6-7.Thermal Solution Performance above T
Intel
®
Xeon® Processor E3-1280 (95W) (Sheet 2 of 2)
T
AMBIENT
1
Ψ
DTS = T
37.00.4450.385
36.00.4620.396
35.00.4800.406
34.00.4980.417
33.00.5160.427
32.00.5340.438
31.00.5520.448
30.00.5690.459
29.00.5870.469
28.00.6050.480
27.00.6230.491
26.00.6410.501
25.00.6590.512
24.00.6760.522
23.00.6940.533
22.00.7120.543
21.00.7300.554
20.00.7480.564
CONTROL
at
CA
CONTROL
for the
2
Ψ
at
CA
DTS = -1
3
Notes:
1.The ambient temperature is measured at the inlet to the processor thermal solution.
2.This column can be expressed as a function of T
3.This column can be expressed as a function of T
Table 6-8.Thermal Solution Performance above T
Intel
= 0.30 + (45.1 - T
Y
CA
= 0.30 + (45.1 - T
Y
CA
®
Xeon® Processor E3-1200 (80W) (Sheet 1 of 2)
AMBIENT
1
T
AMBIENT
AMBIENT
) x 0.0178
) x 0.0105
AMBIENT
AMBIENT
Ψ
DTS = T
45.10.3000.300
44.00.3230.314
43.00.3440.326
42.00.3660.339
41.00.3870.351
40.00.4080.364
39.00.4290.376
38.00.4500.389
37.00.4720.401
36.00.4930.414
35.00.5140.426
34.00.5350.439
33.00.5560.451
by the following equation:
by the following equation:
CONTROL
at
CA
CONTROL
for the
2
Ψ
at
CA
DTS = -1
3
50Thermal/Mechanical Specifications and Design Guidelines
Thermal Specifications
Table 6-8.Thermal Solution Performance abov e T
Intel
®
Xeon® Processor E3-1200 (80W) (Sheet 2 of 2)
T
AMBIENT
1
Ψ
DTS = T
32.00.5780.464
31.00.5990.476
30.00.6200.489
29.00.6410.501
28.00.6620.514
27.00.6830.526
26.00.7050.539
25.00.7260.551
24.00.7470.564
23.00.7680.576
22.00.7890.589
21.00.8110.601
20.00.8320.614
Notes:
1.The ambient temperature is measured at the inlet to the processor thermal solution.
2.This column can be expressed as a function of T
Y
= 0.3 + (45.1 - T
CA
3.This column can be expressed as a function of T
= 0.3 + (45.1 - T
Y
CA
AMBIENT
AMBIENT
) x 0.0212
) x 0.0125
AMBIENT
AMBIENT
CONTROL
at
CA
CONTROL
for the
2
by the following equation:
by the following equation:
Ψ
at
CA
DTS = -1
3
Table 6-9.Thermal Solution Performance abov e T
Intel
®
Xeon® Processor E3-1260L (45W) (Sheet 1 of 2)
T
AMBIENT
1
Ψ
DTS = T
45.10.3000.300
44.00.3410.324
43.00.3790.347
42.00.4170.369
41.00.4540.391
40.00.4920.413
39.00.5300.436
38.00.5670.458
37.00.6050.480
36.00.6430.502
35.00.6800.524
34.00.7180.547
33.00.7560.569
32.00.7930.591
31.00.8310.613
30.00.8690.636
29.00.9060.658
28.00.9440.680
CONTROL
at
CA
CONTROL
for the
2
Ψ
at
CA
DTS = -1
3
Thermal/Mechanical Specifications and Design Guidelines51
Thermal Specifications
Table 6-9.Thermal Solution Performance above T
Intel
®
Xeon® Processor E3-1260L (45W) (Sheet 2 of 2)
T
AMBIENT
1
Ψ
DTS = T
27.00.9820.702
26.01.0190.724
25.01.0570.747
24.01.0950.769
23.01.1320.791
22.01.1700.813
21.01.2080.836
20.01.2450.858
Notes:
1.The ambient temperature is measured at the inlet to the processor thermal solution.
2.This column can be expressed as a function of T
3.This column can be expressed as a function of T
Table 6-10. Thermal Solution Performance above T
Intel
= 0.3 + (45.1 - T
Y
CA
Y
= 0.3+ (45.1 - T
CA
®
Xeon® Processor E3-1220L (20W) (Sheet 1 of 2)
AMBIENT
1
T
AMBIENT
AMBIENT
) x 0.0377
) x 0.0222
AMBIENT
AMBIENT
Ψ
DTS = T
50.02.0181.375
49.02.1031.425
48.02.1871.475
47.02.2721.525
46.02.3571.575
45.02.4421.625
44.02.5261.675
43.02.6111.725
42.02.6961.775
41.02.7811.825
40.02.8651.875
39.02.9501.925
38.03.0351.975
37.03.1192.025
36.03.2042.075
35.03.2892.125
34.03.3742.175
33.03.4582.225
32.03.5432.275
31.03.6282.325
30.03.7132.375
29.03.7972.425
CONTROL
at
CA
CONTROL
for the
2
by the following equation:
by the following equation:
CONTROL
at
CA
CONTROL
for the
2
Ψ
at
CA
DTS = -1
Ψ
at
CA
DTS = -1
3
3
52Thermal/Mechanical Specifications and Design Guidelines
Thermal Specifications
Table 6-10. Thermal Solution Performance above T
Intel
®
Xeon® Processor E3-1220L (20W) (Sheet 2 of 2)
T
AMBIENT
1
Ψ
DTS = T
28.03.8822.475
27.03.9672.525
26.04.0522.575
25.04.1362.625
Notes:
1.The ambient temperature is measured at the inlet to the processor thermal solution.
2.This column can be expressed as a function of T
Y
= 0.45+ (68.5 - T
CA
3.This column can be expressed as a function of T
= 0.45 + (68.5 - T
Y
CA
Table 6-11. Thermal Solution Performance above T
Intel
®
Xeon® Processor E3-1200 (95W) with Integrated Graphics
AMBIENT
1
T
AMBIENT
AMBIENT
) x 0.0847
) x 0.05
AMBIENT
AMBIENT
Ψ
DTS = T
45.10.2900.289
44.00.3100.301
43.00.3280.312
42.00.3460.322
41.00.3640.333
40.00.3830.343
39.00.4010.354
38.00.4190.364
37.00.4370.375
36.00.4550.385
35.00.4730.396
34.00.4910.406
33.00.5100.417
32.00.5280.427
31.00.5460.438
30.00.5640.448
29.00.5820.459
28.00.6000.469
27.00.6180.480
26.00.6370.491
25.00.6550.501
24.00.6730.512
23.00.6910.522
22.00.7090.533
21.00.7270.543
20.00.7460.554
CONTROL
at
CA
CONTROL
for the
2
by the following equation:
by the following equation:
CONTROL
at
CA
CONTROL
for the
2
Ψ
at
CA
DTS = -1
Ψ
at
CA
DTS = -1
3
3
Thermal/Mechanical Specifications and Design Guidelines53
6.1.7Thermal Metrology
37.5
37.5
Measure T
CASE
at
the geometric
center of the
package
Thermal Specifications
The maximum TTV case temperatures (T
appropriate TTV thermal profile earlier in this chapter. The TTV T
geometric top center of the TTV integrated heat spreader (IHS). Figure 6-6 illustrates
the location where T
temperature measurements should be made. See Figure B-17
CASE
for drawing showing the thermocouple attach to the TTV package.
Figure 6-6. TTV Case Temperature (T
CASE-MAX
) Measurement Location
CASE
) can be derived from the data in the
is measured at the
CASE
Note:The following supplier can machine the groove and attach a thermocouple to the IHS.
The supplier is listed below as a convenience to Intel’s general customers and the list
may be subject to change without notice. THERM-X OF CALIFORNIA Inc, 3200
Investment Blvd., Hayward, Ca 94545. Ernesto B Valencia +1-510-441-7566 Ext. 242
ernestov@therm-x.com. The vendor part number is XTMS1565.
6.2Processor Thermal Features
6.2.1Processor Temperature
A new feature in the processors is a software readable field in the
IA32_TEMPERATURE_TARGET register that contains the minimum temperature at
which the TCC will be activated and PROCHOT# will be asserted. The TCC activation
temperature is calibrated on a part-by-part basis and normal factory variation may
result in the actual TCC activation temperature being higher than the value listed in the
register. TCC activation temperatures may change based on processor stepping,
6.2.2Adaptive Thermal Monitor
frequency or manufacturing efficiencies.
The Adaptive Thermal Monitor feature provides an enhanced method for controlling the
processor temperature when the processor silicon exceeds the Thermal Control Circuit
(TCC) activation temperature. Adaptive Thermal Monitor uses TCC activation to reduce
processor power via a combination of methods. The first method (Frequency/VID
54Thermal/Mechanical Specifications and Design Guidelines
Thermal Specifications
control, similar to Thermal Monitor 2 (TM2) in previous generation processors) involves
the processor reducing its operating frequency (via the core ratio multiplier) and input
voltage (via the VID signals). This combination of lower frequency and VID results in a
reduction of the processor power consumption. The second method (clock modulation,
known as Thermal Monitor 1 or TM1 in previous generation processors) reduces power
consumption by modulating (starting and stopping) the internal processor core clocks.
The processor intelligently selects the appropriate TCC method to use on a dynamic
basis. BIOS is not required to select a specific method (as with previous-generation
processors supporting TM1 or TM2). The temperature at which Adaptive Thermal
Monitor activates the Thermal Control Circuit is factory calibrated and is not user
configurable. Snooping and interrupt processing are performed in the normal manner
while the TCC is active.
When the TCC activation temperature is reached, the processor will initiate TM2 in
attempt to reduce its temperature. If TM2 is unable to reduce the processor
temperature, then TM1 will be also be activated. TM1 and TM2 will work together
(clocks will be modulated at the lowest frequency ratio) to reduce power dissipation
and temperature.
With a properly designed and characterized thermal solution, it is anticipated that the
TCC would only be activated for very short periods of time when running the most
power intensive applications. The processor performance impact due to these brief
periods of TCC activation is expected to be so minor that it would be immeasurable. An
under-designed thermal solution that is not able to prevent excessive activation of the
TCC in the anticipated ambient environment may cause a noticeable performance loss,
and in some cases may result in a T
temperature and may affect the long-term reliability of the processor. In addition, a
thermal solution that is significantly under-designed may not be capable of cooling the
processor even when the TCC is active continuously. Refer to the appropriate Thermal
Mechanical Design Guidelines for information on designing a compliant thermal
solution.
that exceeds the specified maximum
CASE
The Thermal Monitor does not require any additional hardware, software drivers, or
interrupt handling routines. The following sections provide more details on the different
TCC mechanisms used by the processor.
6.2.2.1Frequency/VID Control
When the Digital Temperature Sensor (DTS) reaches a value of 0 (DTS temperatures
reported via PECI may not equal zero when PROCHOT# is activated, see
Section 6.2.2.5 for further details), the TCC will be activated and the PROCHOT# signal
will be asserted. This indicates the processors' temperature has met or exceeded the
factory calibrated trip temperature and it will take action to reduce the temperature.
Upon activation of the TCC, the processor will stop the core clocks, reduce the core
ratio multiplier by 1 ratio and restart the clocks. All processor activity stops during this
frequency transition which occurs within 2 us. Once the clocks have been restarted at
the new lower frequency, processor activity resumes while the voltage requested by the
VID lines is stepped down to the minimum possible for the particular frequency.
Running the processor at the lower frequency and voltage will reduce power
consumption and should allow the processor to cool off. If after 1ms the processor is
still too hot (the temperature has not dropped below the TCC activation point, DTS still
= 0 and PROCHOT is still active), then a second frequency and voltage transition will
Thermal/Mechanical Specifications and Design Guidelines55
take place. This sequence of temperature checking and Frequency/VID reduction will
Temperatu re
f
MAX
f
1
f
2
VIDf
MAX
VID
Frequency
VIDf
2
VIDf
1
PROCHOT#
Temperatu re
f
MAX
f
1
f
2
VIDf
MAX
VID
Frequency
VIDf
2
VIDf
1
PROCHOT#
continue until either the minimum frequency has been reached or the processor
temperature has dropped below the TCC activation point.
If the processor temperature remains above the TCC activation point even after the
minimum frequency has been reached, then clock modulation (described below) at that
minimum frequency will be initiated.
There is no end user software or hardware mechanism to initiate this automated TCC
activation behavior.
A small amount of hysteresis has been included to prevent rapid active/inactive
transitions of the TCC when the processor temperature is near the TCC activation
temperature. Once the temperature has dropped below the trip temperature, and the
hysteresis timer has expired, the operating frequency and voltage transition back to
the normal system operating point via the intermediate VID/frequency points.
Transition of the VID code will occur first, to insure proper operation as the frequency is
increased. Refer to Figure 6-7 for an illustration of this ordering.
Figure 6-7. Frequency and Voltage Ordering
Thermal Specifications
6.2.2.2Clock Modulation
Clock modulation is a second method of thermal control available to the processor.
Clock modulation is performed by rapidly turning the clocks off and on at a duty cycle
that should reduce power dissipation by about 50% (typically a 30-50% duty cycle).
Clocks often will not be off for more than 32 microseconds when the TCC is active.
Cycle times are independent of processor frequency. The duty cycle for the TCC, when
56Thermal/Mechanical Specifications and Design Guidelines
activated by the Thermal Monitor, is factory configured and cannot be modified.
It is possible for software to initiate clock modulation with configurable duty cycles.
Thermal Specifications
A small amount of hysteresis has been included to prevent rapid active/inactive
transitions of the TCC when the processor temperature is near its maximum operating
temperature. Once the temperature has dropped below the maximum operating
temperature, and the hysteresis timer has expired, the TCC goes inactive and clock
modulation ceases.
6.2.2.3Immediate Transition to combined TM1 and TM2
As mentioned above, when the TCC is activated the processor will sequentially step
down the ratio multipliers and VIDs in an attempt to reduce the silicon temperature. If
the temperature continues to increase and exceeds the TCC activation temperature by
o
approximately 5
C before the lowest ratio/VID combination has been reached, then
the processor will immediately transition to the combined TM1/TM2 condition. The
processor will remain in this state until the temperature has dropped below the TCC
activation point. Once below the TCC activation temperature, TM1 will be discontinued
and TM2 will be exited by stepping up to the appropriate ratio/VID state.
6.2.2.4Critical Temperature Flag
If TM2 is unable to reduce the processor temperature, then TM1 will be also be
activated. TM1 and TM2 will then work together to reduce power dissipation and
temperature. It is expected that only a catastrophic thermal solution failure would
create a situation where both TM1 and TM2 are active.
If TM1 and TM2 have both been active for greater than 20ms and the processor
temperature has not dropped below the TCC activation point, then the Critical
Temperature Flag in the IA32_THERM_STATUS MSR will be set. This flag is an indicator
of a catastrophic thermal solution failure and that the processor cannot reduce its
temperature. Unless immediate action is taken to resolve the failure, the processor will
probably reach the Thermtrip temperature (see Section 6.2.3 Thermtrip Signal) within
a short time. In order to prevent possible permanent silicon damage, Intel
recommends removing power from the processor within ½ second of the Critical
Temperature Flag being set.
6.2.2.5PROCHOT# Signal
An external signal, PROCHOT# (processor hot), is asserted when the processor core
temperature has exceeded its specification. If Adaptive Thermal Monitor is enabled
(note it must be enabled for the processor to be operating within specification), the
TCC will be active when PROCHOT# is asserted.
The processor can be configured to generate an interrupt upon the assertion or deassertion of PROCHOT#.
Although the PROCHOT# signal is an output by default, it may be configured as bidirectional. When configured in bi-directional mode, it is either an output indicating the
processor has exceeded its TCC activation temperature or it can be driven from an
external source (such as, a voltage regulator) to activate the TCC. The ability to
activate the TCC via PROCHOT# can provide a means for thermal protection of system
components.
As an output, PROCHOT# (Processor Hot) will go active when the processor
temperature monitoring sensor detects that one or more cores has reached its
maximum safe operating temperature. This indicates that the processor Thermal
Control Circuit (TCC) has been activated, if enabled. As an input, assertion of
PROCHOT# by the system will activate the TCC for all cores. TCC activation when
PROCHOT# is asserted by the system will result in the processor immediately
Thermal/Mechanical Specifications and Design Guidelines57
transitioning to the minimum frequency and corresponding voltage (using Freq/VID
control). Clock modulation is not activated in this case. The TCC will remain active until
the system de-asserts PROCHOT#.
Use of PROCHOT# in bi-directional mode can allow VR thermal designs to target
maximum sustained current instead of maximum current. Systems should still provide
proper cooling for the VR, and rely on PROCHOT# only as a backup in case of system
cooling failure. The system thermal design should allow the power delivery circuitry to
operate within its temperature specification even while the processor is operating at its
Thermal Design Power.
6.2.3THERMTRIP# Signal
Regardless of whether or not Adaptive Thermal Monitor is enabled, in the event of a
catastrophic cooling failure, the processor will automatically shut down when the silicon
has reached an elevated temperature (refer to the THERMTRIP# definition in the EDS).
At this point, the THERMTRIP# signal will go active and stay active as described in the
EDS. THERMTRIP# activation is independent of processor activity. If THERMTRIP# is
asserted, processor core voltage (V
in EDS. The temperature at which THERMTRIP# asserts is not user configurable and is
not software visible.
Thermal Specifications
) must be removed within the timeframe defined
CC
6.3Intel® Turbo Boost Technology
Intel® Turbo Boost Technology is a feature that allows the processor to
opportunistically and automatically run faster than its rated operating core and/or
render clock frequency when there is sufficient power headroom, and the product is
within specified temperature and current limits. The Intel
feature is designed to increase performance of both multi-threaded and singlethreaded workloads. The processor supports a Turbo mode where the processor can
utilize the thermal capacitance associated with the package and run at power levels
higher than TDP power for short durations. This improves the system responsiveness
for short, bursty usage conditions. The turbo feature needs to be properly enabled by
BIOS for the processor to operate with maximum performance. Since the turbo feature
is configurable and dependent on many platform design limits outside of the processor
control, the maximum performance cannot be guaranteed.
Turbo Mode availability is independent of the number of active cores; however, the
Turbo Mode frequency is dynamic and dependent on the instantaneous application
power load, the number of active cores, user configurable settings, operating
environment and system design. Intel
on all SKUs.
®
Turbo Boost Technology may not be available
6.3.1Intel® Turbo Boost Technology Frequency
The processor’s rated frequency assumes that all execution cores are running an
application at the Thermal Design Power (TDP). However, under typical operation, not
all cores are active. Therefore most applications are consuming less than the TDP at the
rated frequency. To take advantage of the available TDP headroom, the active cores can
increase their operating frequency.
®
Turbo Boost Technology
To determine the highest performance frequency amongst active cores, the processor
takes the following into consideration:
58Thermal/Mechanical Specifications and Design Guidelines
Thermal Specifications
• The number of cores operating in the C0 state.
• The estimated current consumption.
• The estimated power consumption.
•The temperature.
Any of these factors can affect the maximum frequency for a given workload. If the
power, current, or thermal limit is reached, the processor will automatically reduce the
frequency to stay with its TDP limit.
Note:Intel Turbo Boost Technology processor frequencies are only active if the operating
system is requesting the P0 state.
6.3.2Intel® Turbo Boost Technology Graphics Frequency
Graphics render frequency is selected by the processor dynamically based on the
graphics workload demand. The processor can optimize both processor and integrated
graphics performance through managing total package power. For the integrated
graphics, this could mean an increase in the render core frequency (above its base
frequency) and increased graphics performance. In addition, the processor core can
increase its frequency higher than it would without power sharing.
®
Enabling Intel
processor core and the graphics render frequency within the specified package power
levels. Compared with previous generation products, Intel® Turbo Boost Technology
will increase the ratio of application power to TDP. Thus, thermal solutions and platform
cooling that are designed to less than thermal design guidance might experience
thermal and performance issues since more applications will tend to run at the
maximum power limit for significant periods of time.
Turbo Boost Technology will maximize the performance of the
6.4Thermal Considerations
Intel Turbo Boost Technology allows processor cores and Processor Graphics cores to
run faster than the baseline frequency. During a turbo event, the processor can exceed
its TDP power for brief periods. Turbo is invoked opportunistically and automatically as
long as the processor is conforming to its temperature, power delivery, and current
specification limits. Thus, thermal solutions and platform cooling that are designed to
be less than thermal design guidance may experience thermal and performance issues
since more applications will tend to run at or near the maximum power limit for
significant periods of time.
Thermal/Mechanical Specifications and Design Guidelines59
Thermal Specifications
6.4.1Intel® Turbo Boost Technology Power Control and
Reporting
When operating in the turbo mode, the processor will monitor its own power and adjust
the turbo frequency to maintain the average power within limits over a thermally
significant time period. The package, processor core, and graphic core powers are
estimated using architectural counters and do not rely on any input from the platform.
The behavior of turbo is dictated by the following controls that are accessible using
MSR, MMIO, or PECI interfaces:
• POWER_LIMIT_1: TURBO_POWER_LIMIT, MSR 610h, bits 14:0. This value sets
the exponentially weighted moving average power limit over a long time period.
This is normally aligned to the TDP of the part and steady-state cooling capability of
the thermal solution. This limit may be set lower than TDP, real-time, for specific
needs, such as responding to a thermal event. If set lower than TDP, the processor
may not be able to honor this limit for all workloads since this control only applies
in the turbo frequency range; a very high powered application may exceed
POWER_LIMIT_1, even at non-turbo frequencies. The default value is the TDP for
the SKU.
• POWER_LIMIT_1_TIME: TURBO _POWER_LIMIT, MSR 610h, bits 23:17. This
value is a time parameter that adjusts the algorithm behavior. The exponentially
weighted moving average turbo algorithm will use this parameter to maintain time
averaged power at or below POWER_LIMIT_1.
• POWER_LIMIT_2: TURBO_POWER_LIMIT, MSR 610h, bits 46:32. This value
establishes the upper power limit of turbo operation above TDP, primarily for
platform power supply considerations. Power may exceed this limit for up to
10 mS. The default for this limit is 1.25 x TDP.
The following considerations and limitations apply to the power monitoring feature:
• Calibration applies to the processor family and is not conducted on a part-by-part
basis. Therefore, some difference between actual and reported power may be
observed.
• Power monitoring is calibrated with a variety of common, realistic workloads near
Tj_max. Workloads with power characteristic markedly different from those used
during the calibration process or lower temperatures may result in increased
differences between actual and estimated power.
• In the event an uncharacterized workload or power “virus” application were to
result in exceeding programmed power limits, the processor Thermal Control
Circuitry (TCC) will protect the processor when properly enabled. Adaptive Thermal
Monitor must be enabled for the processor to remain within specification.
Illustration of Intel Turbo Boost Technology power control is shown in the following
sections and figures. Multiple controls operate simultaneously allowing for
customization for multiple system thermal and power limitations. These controls allow
for turbo optimizations within system constraints.
60Thermal/Mechanical Specifications and Design Guidelines
Thermal Specifications
System Thermal Response Time
Turbo Algorithm Response Time
6.4.2Package Power Control
The package power control allows for customization to implement optimal turbo within
platform power delivery and package thermal solution limitations.
Figure 6-8. Package Power Control
6.4.3Power Plane Control
The processor core and graphics core power plane controls allow for customization to
implement optimal turbo within voltage regulator thermal limitations. It is possible to
use these power plane controls to protect the voltage regulator from overheating due
to extended high currents. Power limiting per plane cannot be guaranteed below 1
second and accuracy cannot be guaranteed in all usages. This function is similar to the
package level long duration window control.
6.4.4Turbo Time Parameter
'Turbo Time Parameter' is a mathematical parameter (units in seconds) that controls
the processor turbo algorithm using an exponentially weighted moving average of
energy usage. During a maximum power turbo event of about 1.25 x TDP, the
processor could sustain Power_Limit_2 for up to approximately 1.5 the Turbo Time
Parameter. If the power value is changed during runtime, it may take a period of time
(possibly up to approximately 3 to 5 times the ‘Turbo Time Parameter’, depending on
the magnitude of the change and other factors) for the algorithm to settle at the new
control limits.
§
Thermal/Mechanical Specifications and Design Guidelines61
Thermal Specifications
62Thermal/Mechanical Specifications and Design Guidelines
PECI Interface
7PECI Interface
7.1Platform Environment Control Interface (PECI)
7.1.1Introduction
PECI uses a single wire for self-clocking and data transfer. The bus requires no
additional control lines. The physical layer is a self-clocked one-wire bus that begins
each bit with a driven, rising edge from an idle level near zero volts. The duration of the
signal driven high depends on whether the bit value is a logic ‘0’ or logic ‘1’. PECI also
includes variable data transfer rate established with every message. In this way, it is
highly flexible even though underlying logic is simple.
The interface design was optimized for interfacing to Intel processors in both single
processor and multiple processor environments. The single wire interface provides low
board routing overhead for the multiple load connections in the congested routing area
near the processor and chipset components. Bus speed, error checking, and low
protocol overhead provides adequate link bandwidth and reliability to transfer critical
device operating conditions and configuration information.
The PECI bus offers:
• A wide speed range from 2 Kbps to 2 Mbps
• CRC check byte used to efficiently and atomically confirm accurate data delivery
• Synchronization at the beginning of every message minimizes device timing
accuracy requirements.
For single processor temperature monitoring and fan speed control management
purposes, the PECI 3.0 commands that are commonly implemented includes Ping(),
GetDIB(), GetTemp(), T
command can be implemented by utilizing the RdPkgConfig() command.
CONTROL
and TjMax(TCC) read. The T
7.1.1.1Fan Speed Control with Digital Thermal Sensor
Processor fan speed control is managed by comparing DTS temperature data against
the processor-specific value stored in the static variable, T
temperature data is less than T
speed of the thermal solution fan. This remains the same as with the previous guidance
for fan speed control. Please refer to Section 6.1.6 for guidance where the DTS
temperature data exceeds T
The DTS temperature data is delivered over PECI, in response to a GetTemp()
command, and reported as a relative value to TCC activation target. The temperature
data reported over PECI is always a negative value and represents a delta below the
onset of thermal control circuit (TCC) activation, as indicated by the PROCHOT# signal.
Therefore, as the temperature approaches TCC activation, the value approaches zero
degrees.
CONTROL
CONTROL
, the fan speed control algorithm can reduce the
.
CONTROL
CONTROL
and TCC read
. When the DTS
§
Thermal/Mechanical Specifications and Design Guidelines63
PECI Interface
64Thermal/Mechanical Specifications and Design Guidelines
Sensor Based Thermal Specification Design Guidance
8Sensor Based Thermal
Specification Design Guidance
The sensor based thermal specification presents opportunities for the system designer
to optimize the acoustics and simplify thermal validation. The sensor based
specification utilizes the Digital Thermal Sensor information accessed via the PECI
interface.
This chapter will review thermal solution design options, fan speed control design
guidance & implementation options and suggestions on validation both with the TTV
and the live die in a shipping system.
Note:A new fan speed control implementation scheme is called DTS 1.1 introduced in
Section 8.4.1.
8.1Sensor Based Specification Overview (DTS 1.0)
Create a thermal specification that meets the following requirements:
• Use Digital Thermal Sensor (DTS) for real-time thermal specification compliance.
• Single point of reference for thermal specification compliance over all operating
conditions.
• Does not required measuring processor power and case temperature during
functional system thermal validation.
• Opportunity for acoustic benefits for DTS values between T
Thermal specifications based on the processor case temperature have some notable
gaps to optimal acoustic design. When the ambient temperature is less than the
maximum design point, the fan speed control system (FSC) will over cool the processor.
The FSC has no feedback mechanism to detect this over cooling, this is shown in the
top half of Figure 8-1.
The sensor based specification will allow the FSC to be operated at the maximum
allowable silicon temperature or T
acoustics for operation above T
for the measured ambient. This will provide optimal
J
CONTROL
. See lower half of Figure 8-1.
CONTROL
and -1.
Thermal/Mechanical Specifications and Design Guidelines65
Sensor Based Thermal Specification Design Guidance
Power
Sensor Based Specification (DTS Temp)
TDP
Tcontrol
Ta = 30 C
Ψ-ca = 0.564
Ψ-ca = 0.448
Power
Current Specification (Case T emp)
TDP
Tcontrol
Ta = 45.1 °C
Ta = 30 °C
Ψ-ca = 0.292
Power
Sensor Based Specification (DTS Temp)
TDP
Tcontrol
Ta = 30 C
Ψ-ca = 0.564
Ψ-ca = 0.448
Power
Current Specification (Case T emp)
TDP
Tcontrol
Ta = 45.1 °C
Ta = 30 °C
Ψ-ca = 0.292
Figure 8-1. Comparison of Case Temperature vs. Sensor Based Specification
66Thermal/Mechanical Specifications and Design Guidelines
Sensor Based Thermal Specification Design Guidance
8.2Sensor Based Thermal Specification
The sensor based thermal specification consists of two parts. The first is a thermal
profile that defines the maximum TTV T
thermal profile defines the boundary conditions for validation of the thermal solution.
as a function of TTV power dissipation. The
CASE
The second part is a defined thermal solution performance (Ψ
DTS value as reported over the PECI bus when DTS is greater than T
) as a function of the
CA
CONTROL
. This
defines the operational limits for the processor using the TTV validated thermal
solution.
8.2.1TTV Thermal Profile
For the sensor based specification, the only reference made to a case temperature
measurement is on the TTV. Functional thermal validation will not require the user to
apply a thermocouple to the processor package or measure processor power.
Note:All functional compliance testing will be based on fan speed response to the reported
DTS values above T
will be necessary.
A knowledge of the system boundary conditions is necessary to perform the heatsink
validation. Section 8.3.1 will provide more detail on defining the boundary conditions.
The TTV is placed in the socket and powered to the recommended value to simulate the
TDP condition. See Figure 8-2 for an example of the Intel
(95W) TTV thermal profile.
Figure 8-2. Intel
CONTROL
®
Xeon® Processor E3-1280 (95W) TTV Thermal Profile
. As a result, no conversion of TTV T
®
Xeon® processor E3-1280
to processor T
CASE
CASE
Thermal/Mechanical Specifications and Design Guidelines67
Sensor Based Thermal Specification Design Guidance
Note:This graph is provided as a reference, the complete thermal specification is in
Chapter 6.
8.2.2Specification When DTS value is Greater than T
The product specification provides a table of ΨCA values at DTS = T
DTS = -1 as a function of T
AMBIENT
(inlet to heatsink). Between these two defined
points, a linear interpolation can be done for any DTS value reported by the processor.
The fan speed control algorithm has enough information using only the DTS value and
T
AMBIENT
to command the thermal solution to provide just enough cooling to keep the
part on the thermal profile.
In the prior thermal specifications this region, DTS values greater than T
defined by the processor thermal profile. This required the user to estimate the
processor power and case temperature. Neither of these two data points are accessible
in real time for the fan speed control system. As a result, the designer had to assume
the worst case T
AMBIENT
and drive the fans to accommodate that boundary condition.
CONTROL
8.3Thermal Solution Design Process
Thermal solution design guidance for this specification is the same as with previous
products. The initial design needs to take into account the target market and overall
product requirements for the system. This can be broken down into several steps:
• Boundary condition definition
• Thermal design / modelling
•Thermal testing.
CONTROL
and
CONTROL
, was
8.3.1Boundary Condition Definition
Using the knowledge of the system boundary conditions (such as inlet air temperature,
acoustic requirements, cost, design for manufacturing, package and socket mechanical
specifications and chassis environmental test limits) the designer can make informed
thermal solution design decisions.
For the thermal boundary conditions for system are as follows:
•T
EXTERNAL
•T
RISE
•T
AMBIENT
Based on the system boundary conditions, the designer can select a T
to use in thermal modelling. The assumption of a T
the required Ψ
assumed T
Note:If the assumed T
thermal solution performance may not be sufficient to meet the product requirements.
The results may be excessive noise from fans having to operate at a speed higher than
intended. In the worst case this can lead to performance loss with excessive activation
of the Thermal Control Circuit (TCC).
= 35 °C. This is typical of a maximum system operating environment
= 5 °C.
= 40 °C (T
needed to meet TTV T
CA
AMBIENT
AMBIENT
AMBIENT
can utilize a design with a higher ΨCA, which can have a lower cost.
is inappropriate for the intended system environment, the
= T
EXTERNAL
CASEMAX
+ T
RISE
)
AMBIENT
AMBIENT
and ΨCA
has a significant impact on
at TDP. A system that can deliver lower
68Thermal/Mechanical Specifications and Design Guidelines
Sensor Based Thermal Specification Design Guidance
8.3.2Thermal Design and Modelling
Based on the boundary conditions, the designer can now make the design selection of
the thermal solution components. The major components that can be mixed are the
fan, fin geometry, heat pipe or air duct design. There are cost and acoustic trade-offs
the customer can make.
To aide in the design process Intel provides TTV thermal models. Please consult your
Intel Field Sales Engineer for these tools.
8.3.3Thermal Solution Validation
8.3.3.1Test for Compliance to the TTV Thermal Profile
This step is the same as previously suggested for prior products. The thermal solution
is mounted on a test fixture with the TTV and tested at the following conditions:
• TTV is powered to the TDP condition
• Maximum airflow through heatsink
•T
AMBIENT
at the boundary condition from Section 8.3.1
The following data is collected: TTV power, TTV T
CASE
and T
AMBIENT
. and used to
calculate ΨCA which is defined as:
ΨCA = (TTV T
CASE
- T
AMBIENT
) / Power
This testing is best conducted on a bench to eliminate as many variables as possible
when assessing the thermal solution performance. The boundary condition analysis as
described in Section 8.3.1 should help in making the bench test simpler to perform.
8.3.3.2Thermal Solution Characterization for Fan Speed Control
The final step in thermal solution validation is to establish the thermal solution
performance,ΨCA and acoustics as a function of fan speed. This data is necessary to
allow the fan speed control algorithm developer to program the device. It also is
needed to asses the expected acoustic impact of the processor thermal solution in the
system.
The fan speed control device may modulate the thermal solution fan speed (RPM) by
one of two methods. The first and preferred is pulse width modulation (PWM) signal
compliant to the 4-Wire Pulse Width Modulation (PWM) Controlled Fans specification.
The alternative is varying the input voltage to the fan. As a result the characterization
data needs to also correlate the RPM to PWM or voltage to the thermal solution fan. The
fan speed algorithm developer needs to associate the output command from the fan
speed control device with the required thermal solution performance. Regardless of
which control method is used, the term RPM will be used to indicate required fan speed
in the rest of this document.
8.4Fan Speed Control (FSC) Design Process
The next step is to incorporate the thermal solution characterization data into the
algorithms for the device controlling the fans.
As a reminder the requirements are:
Thermal/Mechanical Specifications and Design Guidelines69
Sensor Based Thermal Specification Design Guidance
• When the DTS value is at or below T
CONTROL
, the fans can be slowed down - just as
with prior processors.
• When DTS is above T
CONTROL
, FSC algorithms will use knowledge of T
AMBIENT
and
ΨCA vs. RPM to achieve the necessary level of cooling.
DTS 1.1 provides another option to do fan speed control without the Tambient data.
Please refer to Section 8.4.1 for more details.This chapter will discuss two
implementations. The first is a FSC system that is not provided the T
information and a FSC system that is provided data on the current T
AMBIENT
AMBIENT
. Either
method will result in a thermally compliant solution and some acoustic benefit by
operating the processor closer to the thermal profile. But only the T
AMBIENT
aware FSC
system can fully utilize the specification for optimized acoustic performance.
In the development of the FSC algorithm it should be noted that the T
AMBIENT
is
expected to change at a significantly slower rate than the DTS value. The DTS value will
be driven by the workload on the processor and the thermal solution will be required to
respond to this much more rapidly than the changes in T
AMBIENT
.
An additional consideration in establishing the fan speed curves is to account for the
thermal interface material performance degradation over time.
70Thermal/Mechanical Specifications and Design Guidelines
Sensor Based Thermal Specification Design Guidance
8.4.1DTS 1.1 A New Fan Speed Control Algorithm without
T
AMBIENT
In most system designs incorporating processor ambient inlet data in fan speed control
adds design and validation complexity with a possible BOM cost impact to the system.
A new fan speed control methodology is introduced to improve system acoustics
without needing the processor inlet ambient information.
Data
The DTS 1.1 implementation consists of two parts, a Ψ
a Ψ
point at DTS = -1.
CA
The Ψ
point at DTS = -1 defines the minimum ΨCA required at TDP considering the
CA
requirement at T
CA
CONTROL
and
worst case system design Tambient design point:
ΨCA = (T
CASE_max
- T
Ambient target
) / TDP
For example, for a 95 TDP part, the Tcase max is 72.6C and at a worst case design
point of 40C local ambient this will result in
ΨCA = (72.6 - 40) / 95 = 0.34 C/W
Similarly for a system with a design target of 45 C ambient the Ψ
at DTS = -1 needed
CA
will be 0.29 C/W.
The second point defines the thermal solution performance (Ψ
Figure 8-1 lists the required Ψ
for various TDP processors.
CA
CA
) at T
CONTROL
.
These two points define the operational limits for the processor for DTS 1.1
implementation. At T
Ψ
is better than or equivalent to the required ΨCA listed in Tab l e 8- 1 . Similarly the fan
CA
CONTROL
the fan speed must be programed such that the resulting
speed should be set at DTS = -1 such that the thermal solution performance is better
Ψ
than or equivalent to the
requirements at Tambient_Max. Based on the processor
CA
temperature, the fan speed controller must linearly change the fan speed from DTS =
T
CONTROL
to DTS = -1 between these points. Figure 8-3 gives a visual description on
DTS 1.1.
Thermal/Mechanical Specifications and Design Guidelines71
Figure 8-3. DTS 1.1 Definition Points
Sensor Based Thermal Specification Design Guidance
Table 8-1.DTS 1.1 Thermal Solution Performance above T
ψ
at
ψ
at
Processor TDP
CA
DTS =
T
CONTROL
1,2
95W(no graphic)0.5690.3540.3000.248
95W(with graphic)0.5640.3430.2910.238
80W (no graphic)0.6200.3640.3000.238
45W(with graphic)0.8690.4130.3010.191
20W(no graphic)3.7131.8751.6251.375
Notes:
1.Ψ
2.Example, For A Chassis Trise assumption of 12 °C for a 95W TDP processor.
at “DTS = T
CA
cooling fan inlet) of less than 10 °C. In case your expected Trise is grater than 10 °C a correction factor
should be used as explained below. For each 1 °C Trise above 10 °C, the correction factor CF is defined as
CF= 1.7 / Processor_TDP.
CF = 1.7/95 W = 0.018/C
For Trise > 10 C
ΨCA at Tcontrol = Value listed in Column_2 - (Trise - 10) * CF
ΨCA = 0564 - (12 - 10) * 0.018 =0.528 C/W
” is applicable to systems that has Internal Trise (Troom temperature to Processor
control
In this case the fan speed should be set slightly higher equivalent to YCA=0.528C/W
CA
DTS = -1 At
System
ambient_max=
40C
CONTROL
ψ
at
CA
DTS = -1 At
System
ambient_max=
45C
ψ
at
CA
DTS = -1 At
System
ambient_max=
50C
72Thermal/Mechanical Specifications and Design Guidelines
Sensor Based Thermal Specification Design Guidance
8.5System Validation
System validation should focus on ensuring the fan speed control algorithm is
responding appropriately to the DTS values and T
well as any other device being monitored for thermal compliance.
Since the processor thermal solution has already been validated using the TTV to the
thermal specifications at the predicted T
chassis is not necessary.
Once the heatsink has been demonstrated to meet the TTV Thermal Profile, it should be
evaluated on a functional system at the boundary conditions.
In the system under test and Power/Thermal Utility Software set to dissipate the TDP
workload confirm the following item:
• Verify if there is TCC activity by instrumenting the PROCHOT# signal from the
processor. TCC activation in functional application testing is unlikely with a
compliant thermal solution. Some very high power applications might activate TCC
for short intervals this is normal.
• Verify fan speed response is within expectations - actual RPM (Ψ
with DTS temperature and T
• Verify RPM versus PWM command (or voltage) output from the FSC device is within
expectations.
• Perform sensitivity analysis to asses impact on processor thermal solution
performance and acoustics for the following:
— Other fans in the system.
— Other thermal loads in the system.
AMBIENT
AMBIENT
.
AMBIENT
data in the case of DTS 1.0 as
, additional TTV based testing in the
) is consistent
CA
In the same system under test, run real applications that are representative of the
expected end user usage model and verify the following:
• Verify fan speed response vs. expectations as done using Power/Thermal Utility SW
• Validate system boundary condition assumptions: Trise, venting locations, other
thermal loads and adjust models / design as required.
§
Thermal/Mechanical Specifications and Design Guidelines73
Sensor Based Thermal Specification Design Guidance
74Thermal/Mechanical Specifications and Design Guidelines
1U Thermal Solution
91U Thermal Solution
Note:The thermal mechanical solution information shown in this document represents the
current state of the data and may be subject to modification.The information
represents design targets, not commitments by Intel.
This section describes the overall requirements for enabled thermal solutions designed
to cool the Intel
®
Xeon® Processor E3-1200 product family including critical to function
dimensions, operating environment and validation criteria in 1U server system. Intel
has developed two different collaboration/reference 1U thermal solutions to meet the
cooling needs in this document.
9.1Performance Targets
Ta b le 9 - 1 provides boundary conditions and performance targets for a 1U heatsink to
cool processor in 1U server. These values are used to provide guidance for heatsink
design.
Table 9-1.Boundary Conditions and Performance Targets
ProcessorAltitude
Intel® Xeon®
processor E31280 (95W)
®
Xeon®
Intel
processor E31200 (80W)
®
Xeon®
Intel
processor E31260L (45W)
®
Xeon®
Intel
processor E31220L (20W)
Sea Level95W40.0°C0.353°C/W15CFM0.383
Sea Level80W40.8°C0.353°C/W15CFM0.383
Sea Level45W42.7°C0.353°C/W15CFM0.383
Sea Level20W67.0°C0.527°C/W10CFM0.123
Thermal
Design
Power
T
LA
Ψca
2
Air Flow
3
Pressure
4
Drop
Notes:
1.The values in Ta b l e 9 -1 are from preliminary design review.
2.Max target (mean + 3 sigma) for thermal characterization parameter.
3.Airflow through the heatsink fins with zero bypass.
4.Max target for pressure drop (dP) measured in inches H
9.21U Collaboration Heatsink
9.2.1Heatsink Performance
For 1U collaboration heatsink, see Appendix B for detailed drawings. Figure 9-1 shows
and pressure drop for the 1U collaboration heatsink versus the airflow provided.
Ψ
CA
Best-fit equations are provided to prevent errors associated with reading the graph.
Table 9-2.Comparison between TTV Thermal Profile and Thermal Solution Performance
for Intel® Xeon® Processor E3-1280 (95W) (Sheet 1 of 2)
Power (W)
0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
TTV T
CASE_MAX
(°C)
45.1
45.7
46.3
46.9
47.5
48.1
48.7
49.3
49.9
50.5
51.1
51.7
52.3
52.9
53.5
54.1
54.7
55.3
Thermal
Solution
T
CASE_MAX
(°C)
40.050
40.652
41.354
41.956
42.658
43.260
43.862
44.564
45.166
45.768
46.470
47.072
47.774
48.376
48.978
49.680
50.282
50.884
Power (W)
TTV T
CASE_MAX
(°C)
60.1
60.7
61.3
61.9
62.5
63.1
63.7
64.3
64.9
65.5
66.1
66.7
67.3
67.9
68.5
69.1
69.7
70.3
Thermal
Solution
T
CASE_MAX
56.0
56.6
57.2
57.9
58.5
59.1
59.8
60.4
61.1
61.7
62.3
63.0
63.6
64.2
64.9
65.5
66.2
66.8
(°C)
77
1U Thermal Solution
Table 9-2.Comparison between TTV Thermal Profile and Thermal Solution Performance
for Intel
Power (W)
®
Xeon® Processor E3-1280 (95W) (Sheet 2 of 2)
Thermal
Solution
T
CASE_MAX
(°C)
51.586
52.188
52.890
53.492
54.094
54.795
55.3
Power (W)
36
38
40
42
44
46
48
TTV T
CASE_MAX
(°C)
55.9
56.5
57.1
57.7
58.3
58.9
59.5
TTV T
CASE_MAX
(°C)
70.9
71.5
72.1
72.7
73.3
73.6
Thermal
Solution
T
CASE_MAX
67.4
68.1
68.7
69.3
70.0
70.3
(°C)
9.2.2Thermal Solution
The collaboration thermal solution consists of two assemblies: heatsink assembly &
back plate.
Heatsink is designed with the Aluminum base and Aluminum stack fin, which
volumetrically is 95x95x24.85 mm. The heatpipe technology is used in the heatsink to
improve thermal conduction.
Heatsink back plate is a 1.8 mm thick flat steel plate with threaded studs for heatsink
attach. A clearance hole is located at the center of the heatsink backplate to
accommodate the ILM back plate. An insulator is pre-applied.
Note:Heatsink back plate herein is only applicable to 1U server. Desktop has a specific
heatsink back plate for its form factor.
78
1U Thermal Solution
9.2.3Assembly
Figure 9-3. 1U Collaboration Heatsink Assembly
The assembly process for the 1U collaboration heatsink with application of thermal
interface material begins with placing back plate in a fixture. The motherboard is
aligned with fixture.
Next is to place the heatsink such that the heatsink fins are parallel to system airflow.
While lowering the heatsink onto the IHS, align the four captive screws of the heatsink
to the four holes of motherboard.
Using a #2 Phillips driver, torque the four captive screws to 8 inch-pounds.
This assembly process is designed to produce a static load compliant with the minimum
preload requirement (26.7 lbf) for the selected TIM and to not exceed the package
design limit (50 lbf).
79
9.31U Reference Heatsink
9.3.1Heatsink Performance
For 1U reference heatsink, see Appendix B for detailed drawings. Figure 9-4 shows
ΨCAand pressure drop for the 1U reference heatsink versus the airflow provided. Best-
fit equations are provided to prevent errors associated with reading the graph.
This 1U Reference thermal solution Ψca(mean+3sigma) is computed to 0.353°C/W at
the airflow of 15.5 CFM, which just meets Intel
thermal profile specification when TLA is 40 °C.
®
Xeon® processor E3-1280 (95W) TTV
9.3.2Thermal Solution
The reference thermal solution consists of two assemblies: heatsink assembly & back
plate.
Heatsink is designed with extruded Aluminum, which volumetrically is 95x95x24.85
mm with total 43 fins. Please refer to Appendix B for detailed drawings.
Heatsink back plate is a 1.8 mm thick flat steel plate with threaded studs for heatsink
attach. A clearance hole is located at the center of the heatsink backplate to
accommodate the ILM back plate. An insulator is pre-applied.
Note:Heatsink back plate herein is only applicable to 1U server. Desktop has a specific
heatsink back plate for its form factor.
80
1U Thermal Solution
2.5mm Maximum
Component Height
(6 places)
1.2mm Maximum
Component Height
(1 place)
1.6mm Maximum
Component Height
(2 places)
9.5mm Maximum
Component Height
(5 places)
2.07mm Maximum
Component Height
(1 place)
9.3.3Assembly
The assembly process is same as the way described in Section 9.2.3, please refer to it
for more details.
9.4Geometric Envelope for 1U Thermal Mechanical
Design
Figure 9-5. KOZ 3-D Model (Top) in 1U Server
9.5Thermal Interface Material
A thermal interface material (TIM) provides conductivity between the IHS and heatsink.
The collaboration thermal solution uses Honeywell PCM45F, which pad size is
35x35 mm.
TIM should be verified to be within its recommended shelf life before use. Surfaces
should be free of foreign materials prior to application of TIM.
9.6Heat Pipe Thermal Consideration
The following drawing shows the orientation and position of the 1155-land LGA Package
TTV die, this is the same package layout as used in the 1156-land LGA Package TTV.
The TTV die is sized and positioned similar to the production die.
81
Figure 9-6. TTV Die Size and Orientation
Die Centerline
Package Centerline
Drawing Not to Scale
All Dimensions in mm
37.5
37.5
10.94
10.94
1U Thermal Solution
§
82
Active Tower Thermal Solution
10Active Tower Thermal Solution
10.1Introduction
This active tower thermal solution is intended for system integrators who build systems
from baseboards and standard components. This chapter documents baseboard and
system requirements for the cooling solution. It is particularly important for OEMs that
manufacture baseboards for system integrators.
Note:Unless otherwise noted, all figures in this chapter are dimensioned in millimeters and
Note:Drawings in this chapter reflect only the specifications on this active tower thermal
Figure 10-1. Mechanical Representation of the Solution
inches [in brackets]. Figure 10-1 shows a mechanical representation of the active
tower thermal solution.
solution. These dimensions should not be used as a generic keep-out zone for all
cooling solutions. It is the system designers’ responsibility to consider their proprietary
cooling solution when designing to the required keep-out zone on their system
platforms and chassis. Refer to the desktop processor thermal mechanical design guide
for further guidance on keep in and keep out zones.
Thermal/Mechanical Specifications and Design Guidelines83
Active Tower Thermal Solution
10.2Mechanical Specifications
10.2.1Cooling Solution Dimensions
This section documents the mechanical specifications. Figure 10-1 shows a mechanical
representation of the solution.
Clearance is required around the fan heatsink to ensure unimpeded airflow for proper
cooling. The physical space requirements and dimensions for the processor with
assembled thermal solution are shown in Figure 10-2 (Side View), and Figure 10-3
(Top View). The airspace requirements for this active tower heatsink must also be
incorporated into new baseboard and system designs. Note that some figures have
centerlines shown (marked with alphabetic designations) to clarify relative
dimensioning.
Figure 10-2. Physical Space Requirements for the Solution (side view)
84Thermal/Mechanical Specifications and Design Guidelines
Active Tower Thermal Solution
Figure 10-3. Physical Space Requirements for the Solution (top view)
Note: Diagram does not show the attached hardware for the clip design and is provided only as a mechanical
representation.
10.2.2Retention Mechanism and Heatsink Attach Clip Assembly
The thermal solution requires a heatsink attach clip assembly, to secure the processor
and fan heatsink in the baseboard socket.
10.3Electrical Requirements
10.3.1Active Tower Heatsink Power Supply
The active tower heatsink requires a +12 V power supply. A fan power cable will be
with solution to draw power from a power header on the baseboard. The power cable
connector and pinout are shown in Figure 10-4. Baseboards must provide a matched
power header to support this. Table 10-1 contains specifications for the input and
output signals at the heatsink connector.
The active tower heatsink outputs a SENSE signal, which is an open- collector output
that pulses at a rate of 2 pulses per fan revolution. A baseboard pull-up resistor
provides VOH to match the system board-mounted fan speed monitor requirements, if
applicable. Use of the SENSE signal is optional. If the SENSE signal is not used, pin 3 of
the connector should be tied to GND.
The fan heatsink receives a PWM signal from the motherboard from the 4th pin of the
connector labeled as CONTROL.
The active tower heatsink requires a constant +12 V supplied to pin 2 and does not
support variable voltage control or 3-pin PWM control.
Thermal/Mechanical Specifications and Design Guidelines85
The power header on the baseboard must be positioned to allow the fan power cable to
Notes:
Pin
Signal
12
34
1
2
3
4
GND
+12 V
SENSE
CONTROL
Straight square pin, 4- pin termi nal housing with
polarizing ri bs and f r i c t ion locking ram p.
0.100" pitch, 0.025" square pin width.
Match with straight pin, friction lock header on
mainboard.
B
C
R110
[4.33]
reach it. The power header identification and location should be documented in the
platform documentation, or on the system board itself. Figure 10-5 shows the location
of the fan power connector relative to the processor socket. The baseboard power
header should be positioned within 110 mm [4.33 inches] from the center of the
processor socket.
Figure 10-4. Fan Power Cable Connector Description
Table 10-1. Fan Power and Signal Specifications
Active Tower Thermal Solution
DescriptionMinTypMaxUnitNotes
+12V: 12 volt fan power supply9.012.013.8V—
IC:
• Maximum fan steady-state current draw
• Maximum fan start-up current draw
SENSE: SENSE frequency—2—pulses per fan
CONTROL212528kHz
1. Baseboard should pull this pin up to 5V with a resistor.
2. Open drain type, pulse width modulated.
3. Fan will have pull-up resistor for this signal to maximum of 5.25 V.
—
—
1.2
3.0
—
—
revolution
Figure 10-5. Baseboard Power Header Placement Relative to Processor Socket
—
A
A
1
2, 3
86Thermal/Mechanical Specifications and Design Guidelines
Active Tower Thermal Solution
10.4Cooling Requirements
The processor may be directly cooled with a fan heatsink. However, meeting the
processor's temperature specification is also a function of the thermal design of the
entire system, and ultimately the responsibility of the system integrator. The processor
temperature specification is found in Chapter 6 of this document. The active tower
heatsink is able to keep the processor temperature within the specifications (see
Ta b le 6 - 1) in chassis that provide good thermal management. For fan heatsink to
operate properly, it is critical that the airflow provided to the heatsink is unimpeded.
Airflow of the fan heatsink is into the front of fan and straight out of the heatsink rear
side. Airspace is required around the fan to ensure that the airflow through the fan
heatsink is not blocked. Blocking the airflow to the fan heatsink reduces the cooling
efficiency and decreases fan life. Figure 10-6 illustrate an acceptable front airspace
clearance for the fan heatsink which is recommended to at least 15 mm or larger. The
air temperature entering the fan should be kept below 40 ºC. Again, meeting the
processor's temperature specification is the responsibility of the system integrator.
Figure 10-6. Active Tower Heatsink Airspace Keepout Requirements (side view)
§
Thermal/Mechanical Specifications and Design Guidelines87
Active Tower Thermal Solution
88Thermal/Mechanical Specifications and Design Guidelines
Thermal Solution Quality and Reliability Requirements
11Thermal Solution Quality and
Reliability Requirements
11.1Reference Heatsink Thermal Verification
Each motherboard, heatsink and attach combination may vary the mechanical loading
of the component. Based on the end user environment, the user should define the
appropriate reliability test criteria and carefully evaluate the completed assembly prior
to use in high volume. The Intel reference thermal solution will be evaluated to the
boundary conditions in Chapter 5.
The test results, for a number of samples, are reported in terms of a worst-case mean
+ 3σ value for thermal characterization parameter using the TTV.
11.2Mechanical Environmental Testing
Each motherboard, heatsink and attach combination may vary the mechanical loading
of the component. Based on the end user environment, the user should define the
appropriate reliability test criteria and carefully evaluate the completed assembly prior
to use in high volume. Some general recommendations are shown in Ta b le 11 -1.
The Intel reference heatsinks will be tested in an assembled to the LGA1155 socket and
mechanical test package. Details of the Environmental Requirements, and associated
stress tests, can be found in Tab l e 11 - 1 are based on speculative use condition
assumptions, and are provided as examples only.
Table 11-1. Use Conditions (Board Level)
1
Test
Mechanical Shock3 drops each for + and - directions in each of 3
Random VibrationDuration: 10 min/axis, 3 axes
Thermal Cycling–25°C to +100°C;Ramp rate ~ 8C/minute; Cycle time:~30
Notes:
1.It is recommended that the above tests be performed on a sample size of at least ten assemblies from
multiple lots of material.
2.Additional pass/fail criteria may be added at the discretion of the user.
perpendicular axes (that is, total 18 drops)
Profile: 50 g, Trapezoidal waveform, 4.3 m/s [170 in/s]
minimum velocity change
Frequency Range: 5 Hz to 500 Hz
5 Hz @ 0.01 g
20 Hz to 500 Hz @ 0.02 g
Power Spectral Density (PSD) Profile: 3.13 g RMS
minutes per cycle for 500 cycles.
2
RequirementPass/Fail Criteria
Visual Check and
Electrical Functional
Test
Visual Check and
Electrical Functional
/Hz to 20 Hz @ 0.02 g2/Hz (slope up)
2
/Hz (flat)
Test
Visual Check and
Thermal Performance
Test
2
Thermal/Mechanical Specifications and Design Guidelines89
Thermal Solution Quality and Reliability Requirements
11.2.1Recommended Test Sequence
Each test sequence should start with components (that is, baseboard, heatsink
assembly, and so on) that have not been previously submitted to any reliability testing.
Prior to the mechanical shock & vibration test, the units under test should be
preconditioned for 72 hours at 45 ºC. The purpose is to account for load relaxation
during burn-in stage.
The test sequence should always start with a visual inspection after assembly, and
BIOS/Processor/memory test. The stress test should be then followed by a visual
inspection and then BIOS/Processor/memory test.
11.2.2Post-Test Pass Criteria
The post-test pass criteria are:
1. No significant physical damage to the heatsink and retention hardware.
2. Heatsink remains seated and its bottom remains mated flatly against the IHS
surface. No visible gap between the heatsink base and processor IHS. No visible tilt
of the heatsink with respect to the retention hardware.
3. No signs of physical damage on baseboard surface due to impact of heatsink.
4. No visible physical damage to the processor package.
5. Successful BIOS/Processor/memory test of post-test samples.
6. Thermal compliance testing to demonstrate that the case temperature specification
can be met.
11.2.3Recommended BIOS/Processor/Memory Test Procedures
This test is to ensure proper operation of the product before and after environmental
stresses, with the thermal mechanical enabling components assembled. The test shall
be conducted on a fully operational baseboard that has not been exposed to any
battery of tests prior to the test being considered.
Testing setup should include the following components, properly assembled and/or
connected:
• Appropriate system baseboard.
• Processor and memory.
• All enabling components, including socket and thermal solution parts.
The pass criterion is that the system under test shall successfully complete the
checking of BIOS, basic processor functions and memory, without any errors. Intel PC Diags is an example of software that can be utilized for this test.
90Thermal/Mechanical Specifications and Design Guidelines
Thermal Solution Quality and Reliability Requirements
11.3Material and Recycling Requirements
Material shall be resistant to fungal growth. Examples of non-resistant materials
include cellulose materials, animal and vegetable based adhesives, grease, oils, and
many hydrocarbons. Synthetic materials such as PVC formulations, certain
polyurethane compositions (such as polyester and some polyethers), plastics which
contain organic fillers of laminating materials, paints, and varnishes also are
susceptible to fungal growth. If materials are not fungal growth resistant, then MILSTD-810E, Method 508.4 must be performed to determine material performance.
Material used shall not have deformation or degradation in a temperature life test.
Any plastic component exceeding 25 grams should be recyclable per the European Blue
Angel recycling standards.
The following definitions apply to the use of the terms lead-free, Pb-free, and RoHS
compliant.
Lead-free and Pb-free: Lead has not been intentionally added, but lead may still
exist as an impurity below 1000 ppm.
RoHS compliant: Lead and other materials banned in RoHS Directive are either
(1) below all applicable substance thresholds as proposed by the EU or (2) an
approved/pending exemption applies.
Note:RoHS implementation details are not fully defined and may change.
§
Thermal/Mechanical Specifications and Design Guidelines91
Thermal Solution Quality and Reliability Requirements
92Thermal/Mechanical Specifications and Design Guidelines
Component Suppliers
AComponent Suppliers
Note:The part numbers listed below identifies the reference components. End-users are
responsible for the verification of the Intel enabled component offerings with the
supplier. These vendors and devices are listed by Intel as a convenience to Intel's
general customer base, but Intel does not make any representations or warranties
whatsoever regarding quality, reliability, functionality, or compatibility of these devices.
Customers are responsible for thermal, mechanical, and environmental validation of
these solutions. This list and/or these devices may be subject to change without notice.
Table A-1. Collaboration Heatsink Enabled Components-1U Server