The Intel Desktop Board DB75EN may contain design defects or errors known as errata that may cause the product to deviate from published specifications.
Current characterized errata are documented in the Intel Desktop Board DB75EN Specification Update.
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board DB75EN Technical Product
Specification
-002 Specification clarificati o n June 2012
This product spec ification applies to only the standar d Intel® Desktop Board with BIOS identifier
ENB7510H.86A.
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNE CT I ON WITH INTEL® PRODUCTS. NO LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS
GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR
SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR
IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PROD UCTS INCLUDING LIABILITY OR
WARRANTIES RELATING TO FITNESS FOR A P ARTICULAR PURPOSE, MERCHANTABILITY, O R INFRINGEMENT
OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS OTHERWISE AGREED IN
WRITING BY INTEL, THE INTEL PRODUCTS ARE NOT DESIGNED NOR INTENDED FO R ANY APPLICATION IN
WHICH THE FAILURE OF THE INTEL PRODUCT COULD CREATE A SITUATION WHERE PERSONAL INJURY OR
DEATH MAY OCCUR.
®
All Intel
computers (PC) for installation in home s , offices , schoo ls , com p uter room s , and sim ilar locati o ns . The
suitability of this product for other PC or embedded no n-PC app lic a tio ns or o ther e nviro nme nts , s uc h as
medical, industrial, alarm systems, te s t equipment, etc. may not be supported without further evaluation by
Intel.
Intel Corporation may have patents or pending pa te nt app lic ations, trademarks, copyrights, or other
intellectual property rights that r e la te to the pres e nted subjec t matte r. The furnishing of documents and
other materials and inform ation doe s not provide any license, express or implied, by estoppel or otherwis e ,
to any such patents, trademarks, copyrights, or othe r intelle c tua l p ro perty rights.
Intel may make changes to specifications and produc t descriptions at any time, without notice.
Designers must not rely on the absence or characteristic s of any feature s or instructions marked “reserved”
or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for
conflicts or incompatibilities arising from future changes to them.
Intel desktop boards may contain design defe c ts or error s know n as err ata , which may c ause the prod uc t to
deviate from published specifications . C urrent characterized errata are available on request.
Contact your local Intel sales offic e or your distr ibutor to obtain the latest specifications before plac ing your
product order.
Intel, 3
trademarks of Intel Corporation in the U.S. and/or other countries.
* Other names and brands may be claimed as the propert y of others.
Copyright 2012, Intel Corporation. All rights reserved.
desktop boards are evaluated as Information Technology Equipment (I.T.E.) for use in personal
rd
generation Intel Core processor family, and 2nd generation Intel Core processor family are
April 2012
Board Identification Information
Basic Desktop Board DB75EN Identification Information
AA Revision BIOS Revision Notes
G39650-300 ENB7510H.86A.0017 1,2
Notes:
1. The AA number is found on a small label on the component side of the board.
2. The B75 processor used on this AA revisio n cons is ts of the following component:
Device Stepping S-Spec Numbers
Intel B75 Express Chipset A1 SLJ85
Specification Changes or Clarifications
Table 1 indicates the Specification Changes or Specification Clarifications that apply to
the Intel
®
Desktop Board DB75EN.
Table 1. Specification Changes or Clarifications
Date Type of Change Description of Changes or Clarifications
June 2012 Spec Clarification Removed references to RAID support and replaced with
SATA ACHI support.
Errata
Current characterized errata, if any, are documented in a separate Specification
Update. See http://developer.intel.com/products/desktop/motherboard/index.htm
for the latest documentation.
A map of the resou r ces of the Intel Desk top Board
3
The features supported by the BIOS Setup program
Preface
This Technical Product Specification (TPS) specifies the board layout, components,
connectors, power and environmental requirements, and the BIOS for Intel
Board DB75EN.
Intended Audience
The TPS is intended to provide detailed, technical information about Intel Desktop
Board DB75EN and its components to the vendors, system integrators, and other
engineers and technician s who need this level of information. It is specifical ly not
intended for general audiences.
What This Document Contains
Chapter Description
1 A description of the hardwar e used on Intel Desktop Board DB75EN
4 A description of the BIOS error mes s a ges , beep codes, and POST codes
5 Regulatory comp lia nce and battery dis posal informati on
Typographical Conventions
®
Desktop
This section cont ains information abo u t t he conventions used in this sp ecification. No t
all of these symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
# Used after a signal name to identify an active-low sig nal (s uch as USB P0# )
GB Gigabyte (1,073,741,824 bytes)
GB/s Gigabytes per second
Gb/s Gigabits per second
KB Kilobyte (1024 bytes)
Kb Kilob it (1024 bits)
kb/s 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/s Megabytes per second
Mb Megabit (1,048,576 bits)
Mb/s Megabit s pe r second
TDP Thermal Design Power
xxh An address or data value ending with a lowercase h indicates a hexadec ima l value.
x.x V Volts. Voltages are DC unless otherwise specified.
* This symbol is used to indicate third-party brands and names that are the property of their
respective owners.
vi
Contents
Revision History
Board Identification Information .................................................................. iii
Specification Changes or Clarifications ......................................................... iii
Errata ...................................................................................................... iii
Preface
Intended Audience ..................................................................................... v
What This Document Contains ..................................................................... v
Typographical Conventions ......................................................................... v
51. Regulatory Compliance Marks ............................................................ 90
7
3
x
rd
®
®
1 Product Description
1.1 Overview
1.1.1 Feature Summary
Table 2 summarizes the major features of the board.
Table 2. Feature Summary
Form Factor
Processor
Memory
Chipset
Graphics
Audio 8-channel (6+2) Intel High Definition Audio via the Realtek* ALC662 audio codec
Micro-ATX (9.60 inches by 9.60 inches [243.84 millimeters by
243.84 millimeters])
generation Intel® Core processor family and 2nd generation Intel® Core
• 3
processor family processors with up to 95 W TDP in an LGA1155 socket
― One PCI Express* 3.0 x16 graphics interface
― Integrated memory controller with dual channe l DDR 3 m emory support
― Integrated graphics process ing (proce s so rs with Intel
― External graphics interface controlle r
Table 3 lists the components identified in Figure 1.
Table 3. Components Shown in Figure 1
Item/callout
from Figure 1 Description
A Conventional PCI add-in card connector
B Conventional PCI add-in card connector
C PCI Express x1 add-in card conne c to r
D PCI Express x16 add-in card connector
E Back panel connectors
F 12 V processor core voltage connector (2 x 2 pin)
G LGA1155 processor socket
H Rear chassis fan header
I Processor fan header
J DIMM 3 (Channel A DIMM 0)
K DIMM 1 (Channel A DIMM 1)
L DIMM 4 (Channel B DIMM 0)
M DIMM 2 (Channel B DIMM 1)
N Front chassis fan header
O Chassis intrusion header
P Low Pin Count (LPC) Debug header
Q Trusted Platform Module (TPM) header
R Main p ower connector (2 x 12)
S Intel® Management Engine BIOS Extension (Intel® MEBX) Reset header
T Battery
U Piezoelectric speaker
V SATA 6.0 Gb/s connector (blue)
W eSATA 3.0 Gb/s connector (red)
X Alternate front panel power/slee p LED head er
Y Fro nt panel header
Z Standby power LED
AA BIOS Setup configuration jumper block
BB SATA 3.0 Gb/s connectors (black)
CC Front panel USB 3.0 connector (blue)
DD Intel® Management Engine “M” state LED
EE Intel B75 Express Chipset
FF Front panel USB 2.0 connector
GG Front panel USB 2.0 connector
HH Serial port connector
II S/PDIF out header
JJ Front panel audio header
KK Internal mono speaker header
14
1.1.3 Block Diagram
Figure 2 is a block diagram of the major functional areas of the board.
To find information about… Visit this World Wide Web site:
Intel Desktop Board DB75EN http://www.intel.com/products/motherboard/index.htm
Desktop Board Support http://www.intel.com/p/en_US/support?iid=hdr+support
Available configurations for Intel
Chipset information http://www.intel.com/products/desktop/chipsets/index.htm
BIOS and driver updates http://downloadcenter.intel.com
Tested memory http://www.intel.com/support/motherboards/desktop/sb/CS-
Integration informatio n http://www.intel.com/support/go/buildit
http://ark.intel.com
025414.htm
1.3 Processor
The board supports 3rd generation Intel Core processor family and 2nd generation Intel
Core processo r family processors.
Other processors may be supported in the future. This board supports processors with
a maximum wattage of 95 W Thermal Design Power (TDP). The processors listed
above are only supported when falling within the wattage requirements of Intel
Desktop Board DB75EN. See the Intel web site listed below for the most up-to-date
list of supported processors.
Use only the processors listed on the web site above. Use of unsupported processors
can damage the board, the processor, and the power supply .
NOTE
This board has specific requirements for providing power to the processor. Refer to
Section 2.6.1 on page 58 for information on power supply requirements for this board.
16
Product Description
1.3.1 Graphics Subsystem
The board supports graphics through either the processor Intel HD Graphics or a PCI
Express x16 add-in graphics card.
1.3.1.1 Processor Graphics
The board supports integrated graphics through the Intel® Flexible Display Interface
®
(Intel
1.3.1.1.1 Intel® High Definition (Intel® HD) Graphics
The Intel HD graphics controller features the following:
• 3D Features
• Video
FDI) for processors with Intel HD Graphics.
DirectX* 11 (2
nd
generation Intel Core processor family processors support
CS4.0 only) support
OpenGL* 3.0 support
Shader Model 4.0
High-Definition content at up to 1080p resolution
Hardware accelerated MPEG-2, VC-1/WMV, and H.264/AVC Hi-Definition video
formats
Intel
®
HD Graphics with Advanced Hardware Video Transcoding (Intel® Quick
Sync Video)
Note: Intel Quick Sync is enabled with the appropriate software application
Dynamic Video Memory Technology (DVMT) 5.0 support
Support of up to 1.7 GB Video Memory with 4 GB and above system memory
3rd generation Intel Core processor family processors support PCI Express 3.0, 2.x,
and 1.x and 2
nd
generation Intel Core processor family processors support PCI
Express 2.x and 1.x:
•PCI Express 3.0 with a raw bit rate of 8.0 GT/s results in an effective bandwidth of
1 GB/s each direction per lane. The maximum theoretical bandwidth of the x16
interface is 16 GB/s in each direction, simultaneously, for a total bandwidth of
32 GB/s.
•PCI Express 2.x with a raw bit rate of 5.0 GT/s results in an effective bandwidth of
500 MB/s each direction per lane. The maximum theoretical bandwidth of the x16
interface is 8 GB/s in each direction, simultane ously, for a total bandwidth of
16 GB/s.
•PCI Express 1.x with a raw bit rate of 2.5 GT/s results in an effective bandwidth of
250 MB/s each direction per lane. The maximum theoretical bandwidth of the x16
interface is 4 GB/s in each direction, simultane ously, for a total bandwidth of
8 GB/s.
For information about Refer to
PCI Express technology http://www.pcisig.com
18
Product Description
Capacity
Configuration
Density
Front-side/Back-side
Devices
1024 MB
SS
1 Gbit
128 M x8/empty
8
2048 MB
DS
1 Gbit
128 M x8/128 M x8
16
2048 MB
SS
2 Gbit
256 M x8/empty
8
4096 MB
DS
2 Gbit
256 M x8/256 M x8
16
8192 MB
DS
4 Gbit
512 M x8/512 M x8
16
1.4 System Memory
The board has four DIMM sockets and supports the following memory features:
•1.5 V DDR3 SDRAM DIMMs with gold plated contacts, with the option to raise the
voltage to support higher performance DDR3 SDRAM DIMMs.
• 1.35 V Low Voltage DDR3 DIMMs (JEDEC specification)
• Two independent memory channels with interleaved mode support
• Unbuffered, sin gl e-sided or double-sided DIMMs with the following restriction:
DIMMs with x16 organization are not supported.
•32 GB maximum total system memory (with 4 Gb memory technology). Refer to
Section 2.1.1 on page 41 for information on the total amount of addressable
memory.
Note: DDR3 1600 MHz DIMMs ar e only supported by 3
processor family processors
•XMP version 1.3 performance profile support for memory speeds of 1600 MHz or
lower
rd
generation Intel Core
NOTE
To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data
structure. This allows the BIOS to read the SPD data and pr ogram the chipset to
accurately configure memory settings for optimum performance. If non-SPD memory
is installed, the BIOS will attempt to correctly configure the memory settings, but
performance and reliability may be impacted or the DIMMs may not function under the
determined fr eq u en cy.
Table 4 lists the supported DIMM configurations.
Table 4. Supported Memory Configurations
DIMM
4096 MB SS 4 Gbit 512 M x8/empty 8
Note: “DS” refers to double-sided memory modules (containing two rows of SDRAM) and “SS” refers to
single-sided memory modules (containing one row of SDRAM).
The 3rd generation Intel Core processor family and 2nd generation Intel Core processor
family processors support the following types of memory organization:
•Dual channel (Interleaved) mode. This mode offers the highest throughput for
real world applications. Dual channel mode is enabled when the installed memory
capacities of both DIMM channels are equal. Technology and device width can vary
from one channel to the other but the installed memory capacity for each channel
must be equal. If different speed DIMMs are used between channels, the slowest
memory timing will be used.
•Single channel (Asymmetric) mode. This mode is equivalent to single channel
bandwidth operation for real world applications. This mode is used when only a
single DIMM is installed or the memory capacities are unequal. Technology and
device width can vary from one channel to the othe r. If different speed DIMMs are
used between channels, the slowest memory timing will be used.
•Flex mode. This mode provides the most flexible performance characteristics.
The bottommost DRAM memory (the memory that is lowes t within the system
memory map) is mapped to dual channel operation; the topm ost DRAM memory
(the memory that is nearest to the 8 GB address space limit), if any, is mapped to
single channel operation. Flex mode results in multiple zones of dual and single
channel operation across the whole of DRAM memory. To use flex mode, it is
necessary to populate both channels.
Intel B75 Express Chipset with Intel Flexible Display Interconnect (Intel FDI) and
Direct Media Interface (DMI) interconnect provides interfaces to the processor and the
display, USB, SATA, LPC, LAN, and PCI Express interfaces. The Intel B75 Express
Chipset is a centralized controller for the board’s I/O paths.
For information about Refer to
The Intel B75 chipset http://www.intel.com/products/desktop/chipsets/index.htm
Resources used by the chipset Chapte r 2
1.5.1 Direct Media Interface (DMI)
Direct Media Interface (DMI) is the chip-to-chip connection between the processor and
PCH. This high-speed interface integrates advanced priority-based servicing allowing
for concurrent traffic and true isochronous transfer capabilities.
1.5.2 Display Interfaces
Display is divided between the processor and the PCH. The processor houses the
memory interface, display planes, and pipes while the PCH has transcoder and display
interface or ports.
The PCH receives the display data over Intel FDI and transcodes the data as per the
display technology protocol and sends the data through the display interface.
1.5.2.1 Intel
Intel FDI connects t he display engine in the processor with the display interfaces on
the PCH. The display data from the frame buffer is processed in the display engine of
the processor and sent to the PCH over the Intel FDI where it is transcode d a s per the
display protocol and driven to the display monitor.
®
Flexible Display Interconnect (Intel
®
FDI)
1.5.2.2 Analog Display (VGA)
The VGA port supports analog displays. The maximum suppo rted resolution is 2048 x
1536 (QXGA) at a 75 Hz refresh rate. The VGA port is enabled for POST whenever a
monitor is attached, regardless of the DVI-D connector status.
1.5.2.3 Digital Visual Interface (DVI-D)
The DVI-D port supports only digital DVI displays. The maximum supported resolution
is 2048 x 1536 at 75 Hz refresh (QXGA). The DVI-D port is compliant with the DVI 1.0
specification.
22
Product Description
1.5.3 USB
The PCH contains up to two Enhanced Host Controller Interface (EHCI) host controllers
that support USB high-speed signaling. High-speed USB 2.0 allows data transfe rs up to
480 Mb/s. All ports are high-speed, fu l l-speed, and low-speed capable.
The PCH also contains an integrated eXtensible Host Controller Interface (xHCI) host
controller which supports USB 3.0 ports . T his controller allows data transfers up to
5 Gb/s. The controller supports SuperSpeed (SS), high-speed (HS), full-speed (FS),
and low-speed (LS) traffic on the bus.
The board supports up to four USB 3.0 ports and eight USB 2.0 ports.
The Intel B75 Express Chipset provides the USB controller for the 2.0/3.0 ports. The
port arrangement is as follows:
• Two USB 3.0 ports are implemented with stacked back panel connectors (b lue)
• Two front panel USB 3.0 ports are implemented through one internal connector
(blue)
• Four USB 2.0 ports are implemented with stacked back panel connectors (black)
• Four USB 2.0 front panel ports are implemented through two internal headers
(black)
NOTE
Computer systems that have an unshielded ca b le a ttached to a USB port may not
meet FCC Class B requirements, even if no device is attached to the cable. Use a
shielded cable that meets the requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 10, page 44
The location of the front panel USB headers Figure 11, page 45
1.5.4 SATA Interfaces
The board provides five SATA connectors, through the PCH, which support one device
each:
•One SATA 6.0 Gb/s interface through the Intel B75 Express Chipset with SATA
ACHI support (blue)
•Three internal Serial ATA (SATA) 3.0 Gb/s interfaces through the Intel B75 Express
Chipset with SATA ACHI support (black)
•One internal eSATA 3.0 Gb/s interface (red)
The PCH provides independent SATA ports with a theoretical maximum transfer rate of
6.0 Gb/s for one port and 3.0 Gb/s for four ports. A point-to-point interface is used for
host-to-device connections.
The PC H supports the Serial ATA Specification, Revision 3.0. The PCH also supports
several optional sections of th e Serial ATA II: Extensions to Serial ATA 1.0
Specification, Revision 1.0 (AHCI support is required for some elements).
The underlying SATA functional ity is transparent to the operating system. The SATA
controller can operate in both legacy and native modes. In legacy mode, standard IDE
I/O and IRQ resources are assigned (IRQ 14 and 15). In native mode, standard PCI
Conventional bus resource steering is used. Native mode is the preferred mode for
configurations using the Windows* XP and Windows 7 operating systems.
NOTE
Many SATA drives use new low-voltage power connectors and require adapters or
power supplies equipped with low-voltage power connectors.
For more information, see: http://www.serialata.org/.
For information about Refer to
The location of the SATA connectors Figure 11, page 45
1.6 Real-Time Clock Subsystem
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When
the computer is not plugged into a wall socket , the battery has an estimated life of
three years. When the computer is plugged in, the standby current from the power
supply extends the life of the battery. The c lock is accurate to ± 13 minutes/year at
25 ºC with 3.3 VSB applied via the power supply 5V STBY rail.
NOTE
If the battery and AC power fail, date and time values will be reset and the user will be
notified during the POST.
When the voltage drops below a certain level, the BIOS Setup program settings stored
in CMOS RAM (for example, the date and time) might not be accurate. Replace the
battery with an equivalent one. Figure 1 on page 13 shows the location of the battery.
1.7 Legacy I/O Controller
The I/O controller provides the following features:
• One serial port
• One back panel parallel port (with Extended Capabilities Port (ECP) and Enhanced
Parallel Port (EPP) support)
• PS/2-style keyboard/mouse interface on the back panel
• Serial IRQ interface compatible with serialized IRQ support for PCI systems
• Intelligent power management, including a program mable wake-up event interface
• Conventional PCI bus power management support
The BIOS Setup program provides configuration options for the I/O controller.
24
Product Description
1.8 Audio Subsystem
The board supports the Intel® High Definition Audio (Intel® HD Audio) subsystem. The
audio subsystem consists of the following:
• Intel B75 Express Chipset
• Realtek ALC662 audio codec
The audio subsystem has the following feat ures:
•Advanced jack sense for the back panel audio jacks that enables the audio codec to
recognize the device that is connected to an audio por t. The back panel audio
jacks are capable of retasking according to the user’s definition, or can be
automatically switched depending on the recognized device type.
• Front panel Intel HD Audio and AC ’97 audio support.
• 3-port analog audio out stack.
• A signal-to-noise (S/N) ratio of 95 dB.
• Windows 7 Ultimate certification.
Table 5 lists the supported functions of the front panel and back panel audio jacks.
Table 5. Audio Jack Support
Audio Jack
Front panel – Green Default
Front panel – Pink Default
Back panel – Blue Default
Back panel – Green (ctrl pane l ) Default
Back panel – Pink Default
Microphone Headphones
Line Out
(Front Spks)
(ctrl panel)
Line In
(Surround)
(ctrl panel)
1.8.1 Audio Subsystem Software
The latest audio software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining audio software and driver s Section 1.2, pa ge 16
The board contains audio connectors and headers on both the back panel and the
component side of the board. The component-side audio headers include front panel
audio (a 2 x 5-pin header that provides mic in and line out signals for front pa nel audio
connectors). The available configurable back panel audio connectors are shown in
Figure 4.
Item Description
A Line in/surround
B Line out/front speakers
C Mic in/center/sub
Figure 4. Back Panel Audio Connectors
NOTE
The back panel audio line out connector is designed to power headphones or amplified
speakers only. Poor audio quality occurs if passive (non-amplified) speakers are
connected to this output.
For information about Refer to
The locations of the front panel audio header and S/PDIF audio he ader Figure 11, page 45
The signal names of the front panel audio header and S/PDIF audio header Section 2.2.2.1, page 47
The back panel audio connectors Section 2.2.1, page 44
1.8.2.1 S/PDIF Header
The S/PDIF header allows connections to coaxial or optical dongles for digital audio
output.
1.8.2.2 Internal Mono Speaker Header
The internal mono speaker header allows co nnection to an internal, low-power speaker
for basic system sound capability. The subsystem is capable of driving a speaker load
of 8 Ohms at 1 W (rms) or 4 Ohms at 1.5 W (rms).
LAN software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining LAN software and drivers http://downloadcenter.intel.com
1.9.3 RJ-45 LAN Connector with Integrated LEDs
Two LEDs are built into the RJ-45 LAN connector (shown in Figure 5).
Item Description
A Link LED (Green)
B Data Rate LED (Green/Yellow)
Figure 5. LAN Connector LED Locations
Table 6 describes the LED states when the board is powered up and the LAN
subsystem is operating.
Table 6. LAN Connector LED States
LED LED Color LED State Condition
Off LAN link is not established.
Link Green
Data Rate Green/Yellow
On LAN link is established.
Blinking LAN activity is occurring.
Off 10 Mb/s data rate is selected.
Green 100 Mb/s data rate is selected.
Yellow 1000 Mb/s data rate is selected.
28
Product Description
1.10 Hardware Management Subsystem
The hardware management features enable the board to be compatible with the Wired
for Management (WfM) specification. The board has several hardware management
features, including the following:
• Thermal and voltage monitoring
• Chassis intrusion detection
1.10.1 Hardware Monitoring
The hardware monitoring and fan control subsystem is based on the Nuvoton
NCT6776D device, which supports the following:
• Processor and system ambient temperature monitoring
• Chassis fan speed monitoring
• Power monitoring of +12 V, +5 V, +3.3 V, 3.3 Vstandby, V_SM, +VCCP,
PCH VCC
•SMBus interface
and
1.10.2 Fan Monitoring
Fan monitoring can be implemented using Intel® Desktop Utilities or third-party
software.
For information about Refer to
The functions of the fan headers Section 1.12.2.2, page 37
1.10.3 Chassis Intrusion and Detection
The board supports a chassis security featur e that detects if the chassis cover is
removed. The security feature uses a mechan ical switch on the chass is that attaches
to the chassis intrusion header. When the chassis cover is removed, the mechanical
switch is in the closed position.
For information about Refer to
The location of the chassis intrusion header Figure 11, page 45
Figure 6 shows the locations of the thermal sensors and fan headers.
Item Description
A Thermal diode, located on the processor die
B Rear chassis fan header
C Processor fan header
D Front chassis fan header
E Thermal d iod e , loc ated on the I nte l B75 PCH
Figure 6. Thermal Sensors and Fan Headers
30
Product Description
1.11 Intel® Security and Manageability
Technologies
Intel® Security and Manageability Technologies provide tools and resources to help
small business owners and IT organizations pr otect and manage their a ssets in a
business or institut io n al environment .
NOTE
Software with security and/or manageability capability is required to take advantage of
Intel platform security and/or management technologies.
1.11.1 Intel® Small Business Technology
Intel® Small Business Technology (Intel® SBT) provides small businesses with security
and productivity capabilities to help keep their PCs up-to-date, protected and running
well. Intel SBT is the firmware component of Intel
SBA) and includes this hardware functionality:
•Local Maintenance Timer – Enables applications to “wake-up” the host platform
when it is powered down or in a sleep state.
•Local Software Monitor – Provides a common reporting mechanism to monitor
applications running on the host operating s ystem.
For information about Refer to
Intel Small Business Advantage http://www.intel.com/go/SBA
®
Small Business Advantage (Intel®
1.11.2 Intel® Virtualization Technology
Intel® Virtualization Technology (Intel® VT) is a hardware-assisted technology that,
when combined with software-based virtualization solutions, provides maximum
system utilization by consolidating multiple environments into a single server or PC.
NOTE
A processor with Intel VT does not guarantee that virtualization will work on your
system. Intel VT requires a computer system with a chipset, BIOS, enabling software
and/or operating system, device drivers , and applic ations designed for this feature.
1.11.3 Intel® Virtualization Technology for Directed I/O
Intel® Virtualization Technology for Directed I/O (Intel® VT-d) allows addresses in
incoming I/O device memory transactions to be remapped to different host addresses.
This provides Virtual Machine Monitor (VMM) software with:
•Improved reliability and security through device isolation using hardware assisted
remapping
•Improved I/O performance and availability by direct assignment of devices.
Intel® Anti-Theft (Intel® AT) provides local, tamper-resistant defense that works like a
poison pill that disables the compute r and access to its data even if the operating
system (OS) is reimaged, a new hard drive is installed, or the computer is
disconnected from the network.
NOTE
No computer system can provide absolute security under all conditions. Intel AT
requires the computer system to have an Intel AT-enabled chipset, BIOS, firmware
release, software, and an Intel AT-capable Service Provider/ISV application and service
subscription. The detection (triggers) , resp onse (actions), and reco ve ry mech an i sm s
only work after the Intel AT functionality has been activated and configured. Certain
functionality may not be offered by some ISVs or service providers and may not be
available in all countries. Intel assumes no liability for lost or stolen data and/or
systems or any other damages resulting thereof.
Power management is implemented at several levels, including:
• Software support through Advanced Configuration and Pow er Interface (ACPI)
• Hardware support:
Power connector
Fan headers
LAN wake capabilities
Instantly Available PC technology
Wake from USB
Power Management Event signal (PME#) wake-up support
PCI Express WAKE# signal support
Wake from PS/2 devices
Wake from serial port
Wake from S5
+5 V Standby Power Indicator LED
1.12.1 ACPI
ACPI gives the operating system direct control over the power management and Plug
and Play functions of a computer. The use of ACPI with this board require s an
operating system that provides full ACPI support. ACPI features include:
• Plug and Play (including bus and device enumeration)
• Power management control of individual devices, add-in boards (some add-in
boards may require an ACPI-aware driver), video displays, and hard disk drives
•Methods for achieving less than 15-watt system operation in the power-on/standby
sleeping state
• A Soft-off feature that enables the operating system to power-off the compute r
• Support for multiple wake-up events (see Table 10 on page 36)
• Support for a front panel power and sleep mode switch
Table 8 lists the system states based on how long the power switch is pressed,
depending on how ACPI is configured with an ACPI-aware operating system.
Table 8. Effects of Pressing the Power Switch
If the system is in this
Off
(ACPI G2/G5 – Soft off)
On
On
…and the power switch is
Less than four seconds Power-on
Less than four seconds Soft-off/Standby
More than six seconds Fail safe power-off
(ACPI G0 – working state)
Sleep
Sleep
(ACPI G1 – sleeping state)
34
Less than four seconds Wake-up
More than six seconds Power-off
(ACPI G2/G5 – Soft off)
Product Description
1.12.1.1 System States and Power States
Under ACPI, the operating system directs all system and device power state
transitions. The operating system p uts devices in and out of low-power states based
on user preferences and knowledge of how devices are being used by applications.
Devices that are not being used can be turned off. The operating system uses
information from applications and user settings to put the system as a whole into a
low-power state.
Table 9 lists the power states supported by the board along with the associated
system power targets. See the ACPI specification for a complete description of the
various system and power states.
Table 9. Power States and Targeted System Power
Global States Sleeping States
G0 – working
state
G1 – sleeping
state
G1 – sleeping
state
G2/S5 S5 – Soft off.
G3 –
mechanical off
AC power is
disconnected
from the
computer.
Notes:
1. To tal system power is dependent on the system configuration, including add -in board s and per ipherals
powered by the system chassis’ power supply.
2. Dependent on the standby power consumption of wake-up devices used in the sys te m .
S0 – working C0 – working D0 – working
S3 – Suspend to
RAM. Context
saved to RAM.
S4 – Suspend to
disk. Context
saved to disk.
Context not saved.
Cold boot is
required.
No power to the
system.
Processor
States
No power D3 – no power
No power D3 – no power
No power D3 – no power
No power D3 – no power for
Device States
state.
except for
wake-up logic.
except for
wake-up logic.
except for
wake-up logic.
wake-up logic,
except when
provided by
battery or
external source.
Targeted System
Power
Full power > 30 W
Power < 5 W
Power < 5 W
Power < 5 W
No power to the system.
Service can be performed
safely.
Table 10 lists the devices or specific events that can wake the computer from specific
states.
Table 10. Wake-up Devices and Events
These devices/events can wake up the computer… …from this state
Power switch
RTC alarm
LAN
USB S3
PME# signal
WAKE#
Serial port S3
PS/2 devices
Notes:
1. S4 implies operating system support only.
2. Wake from S4 and S5 is recommended by Microsoft.
3. PS/2 wake from S5 has a selection in the BIOS to enable wake from a combination key (Alt + Print
Screen) or the keyboard power button.
NOTE
S3, S4, S5
S3, S4, S5
S3, S4, S5
S3, S4, S5
S3, S4, S5
S3, S4, S5
(
(Note 1)
The use of these wake-up events from an ACPI state requires an operating system
that provides full ACPI support. In addition, software, drivers, and peripherals must
fully support ACPI wake events.
1.12.2 Hardware Support
CAUTION
Ensure that the power supply provides adeq uate + 5 V standby current if LAN wake
capabilities and Instantly Available PC technology features are used. Failure to do so
can damage the power supply. The total amount of standby current required depends
on the wake devices supported and manufacturing o pti ons.
The board provides several power management hardware features, including:
• Power connector
• Fan headers
• LAN wake capabilities
• Instantly Available PC technology
• Wake from USB
• Power Management Event signal (PME#) wake-up support
• PCI Express WAKE# signal support
• Wake from PS/2 devices
• Wake from serial port
• Wake from S5
• +5 V Standby Power Indicator LED
36
Product Description
LAN wake capabilities and Instantly Available PC technology require power from the
+5 V standby line.
NOTE
The use of Wake from USB from an ACPI state requires an operating system that
provides full ACPI support.
1.12.2.1 Power Connector
ATX12V-compliant power supplies can turn off the system power through system
control. When an ACPI -enabled system receives the correct command, the power
supply removes all non-standby voltages.
When resuming from an AC power failure, the computer returns to the power state it
was in before power was interrupted (on or off). The computer’s response can be set
using the Last Power State feature in the BIOS Setup program’s Boot menu.
For information about Refer to
The location of the main power connector Figure 11, page 45
The signal names of the main power connector Table 25, page 51
1.12.2.2 Fan Headers
The function/operation of the fan headers is as follows:
• The fans are on when the board is in the S0 state
• The fans are off when the board is off or in the S3, S4, or S5 state
• Each fan header is wired to a fan tachometer input of t he hardware monitoring and
fan control ASIC
•All fan headers support closed-loop fan control that can adjust the fan speed or
switch the fan on or of f as needed
• All fan headers have a +12 V DC connection
• The fan headers are controlled by Pulse Width Modulation
For information about Refer to
The location of the fan headers Figure 11, page 45
The location of the fan headers and sensors for thermal monitoring Figure 6, page 30
For LAN wake capabilities, the +5 V standby line for the power supply must be capable
of providing adequate +5 V standby current. Failure to provide adequate standby
current when implementing LAN wake capabi li ti es can damage the power supply.
LAN wake capabilities enable remote wake-up of the computer through a network.
The LAN subsystem PCI bus network adapter monitors network traffic at the Media
Independent Interface. Upon detecting a Mag ic P a cket* frame, the LAN subsystem
asserts a wake-up signal that powers up the computer. Depending on the LAN
implementation, the board suppor ts L A N wake capabilities with ACPI in the following
ways:
• The PCI Express WAKE# signal
• By Ping
• Magic Packet
• The onboard LAN subsystem
1.12.2.4 Instantly Available PC Technology
CAUTION
For Instantly Available PC technology, the +5 V standby line for the power supply must
be capable of providing adequate +5 V standby current. Failure to provide adequate
standby current when implementing Instantly Availabl e PC technology can damage the
power supply.
Instantly Available PC technology enables the board to enter the ACPI S3 (Suspend-toRAM) sleep-state. While in the S3 sleep-state, the computer will appear to be off (the
power supply is off, and the front panel LED is amber if dual colored, or off if single
colored.) When signaled by a wake-up device or event, the system quickly returns to
its last known wake state. Table 10 on page 36 lists the devices and events that can
wake the computer from the S3 state.
The board supports the PCI Bus Power Management Interface Specification. Add-in
boards that also support this specification ca n participate in power management and
can be used to wake the computer.
The use of Instantly Available PC technology requires operating system support and
PCI Express add-in cards and drivers.
38
Product Description
1.12.2.5 Wake from USB
USB bus activity wakes the computer from an ACPI S3 state.
NOTE
Wake from USB requires the use of a USB peripheral that supports Wake from USB.
1.12.2.6 PME# Signal Wake-up Support
When the PME# signal on the Conventional PCI bus is asserted, the computer wakes
from an ACPI S3, S4, or S5 state (with Wake on PME enabled in the BIOS).
1.12.2.7 WAKE# Signal Wake-up Support
When the WAKE# signal on t he PCI Express bus is assert ed, the computer wakes from
an ACPI S3, S4, or S5 state.
1.12.2.8 Wake from PS/2 Devices
PS/2 keyboard activity wakes the computer from an AC PI S3, S4, or S5 state.
However, when the computer is in an ACPI S4 or S5 state, the only PS/2 activity that
will wake the computer is the Alt + Print Screen or the Power Key available only on
some keyboards.
1.12.2.9 Wake from Serial Port
Serial port activity wakes the computer from an ACPI S3 state.
1.12.2.10 Wake from S5
When the RTC Date and Time is set in the BIOS, the computer will automatically wake
from an ACPI S5 state.
The +5 V standby power indicator LED shows that power is still present even when the
computer appears to be off. Figure 8 shows the location of the standby power LED.
CAUTION
If AC power has been switched off and the sta ndby power indicator is still lit,
disconnect the power cord before installing or removing any devices connected to the
board. Failure to do so could damage the board and any a ttached devices.
Figure 8. Location of the Standby Power LED
40
2 Technical Reference
2.1 Memory Resources
2.1.1 Addressable Memory
The board utilizes 32 GB of addressable system memory. Typically the address space
that is allocated for Conventional PCI bus add-in cards, PCI Express configuration
space, BIOS (SPI Flash device), and chipset overhead resides above the top of DRAM
(total system memory). On a system that has 32 GB of system memory installed, it is
not possible to use all of the installed memory due to system address space being
allocated for other system critical functions. The se functions include the following:
• BIOS/SPI Flash device (96 Mbit)
• Local APIC (19 MB)
• Direct Media Interface (40 MB)
• PCI Express configuration space (256 MB)
• PCH base address registers PCI Express ports (up to 256 MB)
• Memory-mapped I/O that is dynamically allocated for Conventional PCI and PCI
Express add-in cards (256 MB)
The board provides the capability to reclaim the physical memory overlapped by the
memory mapped I/O logical address space. The board remaps physical memory from
the top of usable DRAM boundary to the 4 GB boundary to an equiva lent sized logical
address range located just above the 4 GB boundary. Figure 9 shows a schematic of
the system memory map. All installed system memory can be used when there is no
overlap of system addresses.
1024 K - 33550336 K 100000 – 7FFC00000 32764 MB Extended memory
960 K - 1024 K F0000 - FFFFF 64 KB Runtime BIOS
896 K - 960 K E0000 - EFFFF 64 KB Reserved
800 K - 896 K C8000 - DFFFF 96 KB Pote ntia l av a ilable high DOS
640 K - 800 K A0000 - C7FFF 160 KB Video memory a nd BIOS
639 K - 640 K 9FC00 - 9FFFF 1 KB Extended BIOS data (movable by
512 K - 639 K 80000 - 9FBFF 127 KB Exte nded conventional memory
0 K - 512 K 00000 - 7FFFF 512 KB Conventio na l me mory
Address Range
(hex)
Size Description
memory (open to the PCI
Conventional bus). Dependent on
video adapter used.
memory manager software)
2.2 Connectors and Headers
CAUTION
Only the following connectors and headers have overcurrent protection: back panel
and front panel USB, and PS/2.
The other internal connectors and headers are not overcurrent protected and should
connect only to dev i ces inside the computer’s chassis, such as fans and int ernal
peripherals. Do not use these connectors or headers to power devices external to the
computer’s chassis. A fault in the load presented by the external devices could cause
damage to the computer, the power cable, and the external devices themselves.
Furthermore, improper connection of USB header single wire connectors may
eventually overload the overcurrent protection and cause damage to the board.
This section describes the board’s connectors. The connectors can be divided into
these groups:
• Back panel I/O connectors
• Component-side connectors and headers (see page 45)
Figure 10 shows the location of the back panel connectors for the board.
Item Description
A PS/2 port
B USB 2.0 ports
C USB 2.0 ports
D VGA connector
E Parallel port
F DVI-D connector
G LAN port
H USB 3.0 ports
I Line in/surround
J Line ou t/ front speakers
K Mic-in/center/subwoofer
Figure 10. Back Panel Connectors
NOTE
The back panel audio line out connector is designed to power headphones or amplified
speakers only. Poor audio quality occurs if passive (non-amplified) speakers are
connected to this output.
44
Technical Reference
2.2.2 Component-side Connectors and Headers
Figure 11 shows the locations of the component-side connectors and headers.
Table 12 lists the component-side connectors and headers identified in Figure 11.
Table 12. Component-side Connectors and Headers Shown in Figure 11
Item/callout f
rom Figure 11 Description
A Conventional PCI add-in card connector
B Conventional PCI add-in card connector
C PC I Express x1 add-in card connector
D PCI Express x16 add-in card connector
E 12 V pr oce s so r core vo lta g e connec tor (2 x 2 pin)
F Rear chassis fan header
G Processor fan header
H Front chassis fan header
I Chassis intrusion header
J LPC Debug header
K TPM header
L Main power connector (2 x 12)
M Intel MEBX reset header
N SATA 6.0 Gb/s connector (blue)
O eSATA 3.0 Gb/s connector (red)
P A l te r na te front p a ne l power/s le e p LED header
Q Front panel header
R SA T A 3.0 conne c tor s (b lack)
S Front panel USB 3.0 connector (blue)
T Fro nt panel USB 2.0 header
U Front panel USB 2.0 header
V Serial port header
W S/PDIF out header
X Front panel audio header
Y I nte rnal mono speaker header
46
Technical Reference
2.2.2.1 Signal Tables for the Connectors and Headers
Table 13. Serial Port Header
Pin Signal Name Pin Signal Name
1 DCD (Data Carrier Detect) 2 RXD# (Receive Data )
3 TXD# (Transmit Data) 4 DTR (Data Terminal Ready)
5 Ground 6 DSR (Data Set Ready)
7 RTS (Reques t To Send ) 8 CTS (Clear To Send)
9 RI (Ring Indicator) 10 Ke y (no pin)
Table 14. Front Panel Audio Header for Intel HD Audio
Pin Signal Name Pin Signal Name
1 [Port 1] Left channe l 2 Ground
3 [Port 1] Right c hanne l 4 PRESENCE# (Dongle present)
5 [Port 2] R ight c hanne l 6 [Port 1] SENSE_RETURN
7 SENSE_SEN D (Jack d e tection) 8 Key (no p in)
9 [Port 2] Left channe l 10 [Port 2] SENSE_RETURN
Table 15. Front Panel Audio Header for AC ’97 Audio
The board has the following add-in card connectors:
• One PCI Express x16 (3.0/ 2.x/ 1.x)
• One PCI Express x1 (2.x/1.x)
• Two Conventional PCI (rev 2.3)
Note the following considerations for th e Conventional PCI bus connectors:
• The Conventional PCI bus connectors are bus master capable.
• SMBus signals are routed to the Conventional PCI bus connectors. This enables
Conventional PCI bus add-in boards with SMBus support to access sensor data on
the desktop board. The specific SMBus signals are as follows:
The SMBus clock line is connected to pin A40.
The SMBus data line is connected to pin A41.
NOTE
PCI Express 3.0 is only supported by 3rd generation Intel Core processor family
processors.
50
Technical Reference
2.2.2.3 Power Supply Connectors
The board has the following power supply connectors:
•Main power – a 2 x 12 connector. This connector is compatible with 2 x 1 0
connectors previously used on Intel Desktop boards. The board supports the use
of ATX12V power supplies with either 2 x 10 or 2 x 12 main power cables. When
using a power supply with a 2 x 10 main power cable, attach that cable to the main
power connector, leaving pins 11, 12, 23, and 24 unconnected.
•Processor core power – a 2 x 2 connector. This connector provides power
directly to the processor voltage re gulator and must always be used. Failure to do
so will prevent the board from booting.
Table 24. Processor Core Power Connector
Pin Signal Name Pin Signal Name
1 Ground 2 Ground
3 +12 V 4 +12 V
Table 25. Main Power Connector
Pin Signal Name Pin Signal Name
1 +3.3 V 13 +3.3 V
2 +3.3 V 14 -12 V
3 Ground 15 Ground
4 +5 V 16 PS-ON# (power supply remote on/off)
5 Ground 17 Ground
6 +5 V 18 Ground
7 Ground 19 Ground
8 PWRGD (Power Good) 20 No connect
9 +5 V (Standby) 21 +5 V
10 +12 V 22 +5 V
11
12
Note: When using a 2 x 10 power supply cable, this pin will be unconnected.
+12 V
2 x 12 connector detect
(Note)
(Note)
23
24
(Note)
+5 V
Ground
(Note)
For information about Refer to
Power supply considerations Section 2.6.1 on page 58
This section describes the functions of t he front panel header. Table 26 lists the signal
names of the front panel header. Figure 12 is a connection diagram for the front panel
header.
Table 26. Front Panel Header
Pin Signal Name Description Pin Signal Name Description
1 HDD_POWER_LED Pull-up resistor
(750 Ω) to +5V
3 HDD_LED# [Out] Hard disk
activity LED
5 GROUND Ground 6 POWER_SWITCH# [In] Power switch
7 RESET_SWITCH# [In] Reset switch 8 GROUND Ground
9 +5V_DC Power 10 Key No pin
2 POWER_LED_MAIN [Out] Front panel LED
(main color)
4 POWER_LED_ALT [Out] Front panel LED
(alt color)
Figure 12. Connection Diagram for Front Panel Header
2.2.2.4.1 Hard Drive Activity LED Header
Pins 1 and 3 can be connected to an LED to provide a visual indicator that data is
being read from or written to a hard drive. Proper LED function requires a SATA hard
drive or optical drive connected to an onboard SATA connector.
2.2.2.4.2 Reset Switch Header
Pins 5 and 7 can be connected to a momentary single pole, single throw (SPST) type
switch that is normally open. When the switch is closed, the board resets and runs the
POST.
52
Technical Reference
2.2.2.4.3 Power/Sleep LED Header
Pins 2 and 4 can be conne cted to a one- or two-color LED. Table 27 shows the
possible states for a one-color LED. Table 28 shows the possible states for a two-color
LED.
Table 27. States for a One-Color Power LED
LED State Description
Off Power off/sleeping
Steady Green Running
Table 28. States for a Two-Color Power LED
LED State Description
Off Power of f
Steady Green Running
Steady Yellow Sleeping
NOTE
The colors listed in Table 27 and Table 28 are suggested colors only. Actual LED colors
are chassis-specific.
2.2.2.4.4 Power Switch Header
Pins 6 and 8 can be conne cted to a front panel momentary-contact power switch. The
switch must pull the SW_ON# pin to ground for at least 50 ms to signal the power
supply to switch on or off. (The time requirement is due to internal debounce circuit ry
on the board.) At least two seconds must pass before the power supply will recognize
another on/off signal.
2.2.2.5 Alternate Front Panel Power/Sleep LED Header
Pins 1 and 3 of this header duplicate the signals on pins 2 and 4 of the front panel
header.
Table 29. Alternate Front Panel Power/Sleep LED Header
Pin Signal Name Description
1 POWER_LED_MAIN [Out] Front panel LED (main color)
2 Key (no pin)
3 POWER_LED_ALT [Out] Front panel LED (alt color)
Figure 13 is a connection diagram for the front panel USB 2.0 headers.
NOTE
• The +5 V DC power on the USB headers is fused.
• Use only a front panel USB connector that conforms to the USB 2.0 specification for
high-speed USB devices.
Figure 13. Connection Diagram for Front Panel USB 2.0 Headers
54
Technical Reference
2.3 Jumper Block
CAUTION
Do not move the jumper with the power on. Always turn off the power and unplug the
power cord from the computer before changing a jumper setting. Otherwise, the
board could be damaged.
Figure 14 shows the location of the jumper b lo ck. The 3-pin jumper block determines
the BIOS Setup program’s mode. Table 30 describes the jumper settings for the three
modes: normal, configure, and recovery. When the jumper is set to configure mode
and the computer is powered-up, the BIOS compares the processor version and the
microcode version in the BIOS and reports if the two match.
The BIOS uses current configuration information and passwords
for booting.
After the POST runs, Setup runs automatically. The
maintenance menu is displayed.
Note that this Configure mode is the only way to clear the
BIOS/CMOS settings. Press F9 (restore defaults ) w hile in
Configure mode to restore the BIOS/CMOS settings to their
default values.
The BIOS attempts to recover the BIOS configuration. A
recovery CD or flash drive is required.
The Intel® MEBX reset header (see Figure 15) allows you to reset the Intel ME
configuration to the factory defaults. Momentarily shorting pins 1 and 2 with a jumper
(not supplied) will accomplish the following:
• Return all Intel ME parameters to their default values.
• Reset the Intel MEBX password to the default value (admin).
CAUTION
Always turn off the power and unplug the power cord from the computer before
installing an MEBX reset jumper. The jumper must be removed before reapplying
power. The system must be allowed to reach end of POST before reset is complete.
Otherwise, the board could be damaged.
NOTE
After using the MEBX Reset, a “CMOS battery failure” warning will occur during the
next POST. This is expected and does not indicate a component failure.
MEBX) Reset Header
Table 31. Intel MEBX Reset Header Signals
Pin Function
1 PCH_RTCRST_PULLUP
2 Ground
3 No connection
56
Figure 15. Intel MEBX Reset Header
Technical Reference
2.5 Mechanical Considerations
2.5.1 Form Factor
The board is designed to fit into an ATX-form-factor chassis. Figure 16 illustrates the
mechanical form factor for the board. Dimensions are given in inches [millimeters].
The outer dimensions are 9.60 inches by 9.60 inches [243.84 millimeters by
243.84 millimeters]. Location of the I/O co nnectors and mounting holes are in
compliance w ith the ATX specification.
The +5 V standby line from the power supply must be capa b le of providing adequate
+5 V standby current. Failure to do so can damage the power s upp ly. The total
amount of standby current require d depends on the wake devices supported and
manufacturing options.
Additional power required will depend on configurations chosen by the integrator.
The power supply must comply with the indicated parameters of the ATX form factor
specification.
• The potential relation between 3.3 V DC and +5 V DC pow er rails
• The current capability of the +5 VSB line
• All timing parameters
• All voltage tolerances
For example, for a high power system consisting of a supported 95 W processor (see
Section 1.3 on page 16 for a list of supported processors), 4 GB DDR3 RAM, one high
end video card, one hard disk drive, one optical d rive, and all board peripherals
enabled, the minimum recommended power supply is 460 W. Table 32 lists possible
recommended power supply current rail values.
Table 32. Recommended Power Supply Current Values (High Power)
Output Voltage 3.3 V 5 V 12 V1 12 V2 -1 2 V 5 VSB
Current 22 A 20 A 20 A 20 A 0. 3 A 2.5 A
For example, for a l ow p owe r system consisting of a supported 45 W processor (see
Section 1.3 on page 16 for a list of supported processor s), 2 GB DDR3 RAM, integrated
graphics, one SSD, one optical drive, and no extra onboard peripherals enabled, the
minimum recommended power supply is a 320 W. Table 33 lists possible
recommended power supply current rail values. Note: If the correct power supply and
system configuration is used, a smaller power supply will work.
Table 33. Recommended Power Supply Current Values (Low Power)
Output Voltage 3.3 V 5 V 12 V1 12 V2 -1 2 V 5 VSB
Current 20 A 20 A 15 A 15 A 0.3 A 1.5 A
For information about Refer to
Selecting an appropriate power s upply http://support.intel.com/support/motherboards/desktop/sb
/CS-026472.htm
58
Technical Reference
2.6.2 Power Supervisor
This board supports a version of the Power Superv isor feature which adds protection to
the 5 VSB power rail by limiting potential electrical overstress events to a nondestructive level.
2.6.3 Fan Header Current Capability
CAUTION
The processor fan must be connected to the processor fan header, not to a chassis fan
header. Connecting the p rocessor fan to a chassis fan header may result in onboard
component damage that will halt fan operation.
Table 34 lists the current capability of the fan headers.
Table 34. Fan Header Current Capability
Fan Header Maximum Available Current
Processor fan 2.0 A
Front chassis fan 1.5 A
Rear chassis fan 1.5 A
2.6.4 Add-in Board Considerations
The board is designed to provide 2 A (average) of current for each add-in board from
the +5 V rail. The total +5 V current draw for add-in boards for a fully loaded board
(all three expansion slots filled) must not exceed the system’s power supply +5 V
maximum current or 14 A in total.
2.7 Thermal Considerations
CAUTION
A chassis with a maximum internal ambient temperature of 38 oC at the processor fan
inlet is a requirement. Use a processor heat sink that provides omni-directional airflow
to maintain required airflow across the processor voltage reg u lator area.
CAUTION
Failure to ensure appropriate airflow may result in reduced performance of both the
processor and/or voltage regulator or, in some instances, damage to the board. For a
list of chassis that have been tested with Intel desktop boards please refer to the
following website:
All responsibility for determining the adequacy of any thermal or system design
remains solely with the reader. Intel makes no warranties or representations that
merely following the instructions presented in this document will result in a system
with adequate thermal performance.
Ensure that the ambient temperature does not exceed the board’s maximum operating
temperature. Failure to do so could cause components to exceed their maximum case
temperature and malfunction. For information about the maximum operating
temperature, see the environmental specifications in Section 2.9.
CAUTION
Ensure that proper airflow is maintained in the processor voltage regulator circuit.
Failure to do so may result in damage to the voltage regulator circuit. The processor
voltage regulator area (shown in Figure 17) can reach a temperature of up to 120
an open chassis.
Figure 17 shows the locations of the localized high temperature zones.
o
C in
Figure 17. Localized High Temperature Zones
60
Item Description
A Pro c ess or voltag e regulator area
B Processor
C Intel B75 Express Chipset
Technical Reference
For information about
Refer to
Table 35 provides maximum case temperatures for the components that are sensitive
to thermal changes. The operating temperature, current load, or operating frequency
could affect case temperatures. Maximum case temperatures are important when
considering proper airflow to cool the board.
Table 35. Thermal Considerations for Components
Component Maximum Case Temperature
Processor For processor case temperature, see processor datasheets and
processor specification updates
Intel B75 Express Chipset 104 oC
To ensure functionality and reliability, the component is specified for proper operation
when Case Temperature is maintained at or below the maximum temperature listed in
Table 35. This is a requirement for sustained power dissipation equal to Thermal
Design Power (TDP is specified as the maximum sustainable power to be dissipated by
the components). When the component is dissipating less than TDP, the case
temperature should be below the Maximum Case Temperature. The surface
temperature at the geometric center of the compone nt corresponds to Case
Temperature.
It is important to note that the temperature measurement in the system BIOS is a
value reported by embedded thermal sensors in the components and does not directly
correspond to the Maximum Case Temperature. The upper operating limit when
monitoring this thermal sensor is Tcontrol.
Table 36. Tcontrol Values for Components
Component Tcontrol
Processor For processor case temperature, see processor datasheets and
The Mean Time Between Failures (MTBF) prediction is calculated using component and
subassembly random failure rates. The calculation is based on the Telcordia SR-332,
Issue 2; Method I Cas e 3 50% electrical stress, 50 ºC ambient. The MTBF prediction is
used to estimate repair rates and spare pa rts requirements. The MTBF data is
calculated from predicted data at 50 ºC. The MTBF for the Intel Desktop Board
DB75EN is 281,462 hours.
2.9 Environmental
Table 37 lists the environmental specifications for the board.
Table 37. Environmental Specifications
Parameter Specification
Temperature
Non-Operating
Operating
Shock Unpackaged 50 g trapezoidal waveform
Velocity change of 170 inches/s²
Packaged Half sine 2 millisecond
Product Weight (pounds) Free Fall (inches) Veloc ity Cha nge (inc he s /s ²)
<20 36 167
21-40 30 152
41-80 24 136
81-100 18 118
Vibration Unpackaged 5 Hz to 20 Hz: 0.01 g² Hz sloping up to 0.02 g² Hz
20 Hz to 500 Hz: 0.02 g² Hz (flat)
Packaged 5 Hz to 40 Hz: 0.015 g² Hz (flat)
40 Hz to 500 Hz: 0.015 g² Hz sloping down to 0.00015 g² Hz
-20 °C to +70 °C
0 °C to +55 °C
62
3 Overview of BIOS Features
3.1 Introduction
The board uses an Intel BIOS that is stored in the Serial Peripheral Interface Flash
Memory (SPI Flash) and can be updated using a disk-based program. The SPI Flash
contains the BIOS Setup program, POST, the PCI auto-configuration utility, LAN
EEPROM information, and Plug and Play support.
The BIOS displays a message during POST identifying the type of BIOS and a revision
code. The initial production BIOSs are identified as ENB7510H.86A.
When the BIOS Setup configuration jumper is set to configure mode and the computer
is powered-up, the BIOS compares the CPU version and the microcode version in the
BIOS and reports if the two match.
The BIOS Setup program can be used to view and change the BIOS settings for the
computer. The BIOS Setup program is accessed by pressing the <F2> key after the
Power-On Self-Test (POST) memory test begins and before the operating system boot
begins. The menu bar is shown below.
Maintenance Main Configuration Performance Security Power Boot Exit
NOTE
The maintenance menu is d isplayed only when the board is in configure mode.
Section 2.3 on page 55 shows how to put the board in configure mode.
Table 38 lists the BIOS Setup program menu features.
Table 38. BIOS Setup Program Menu Bar
Maintenance Main
Clears
passwords and
displays
processor
information
Displays
processor
and memory
configuration
Configuration
Configures
advanced
features
available
through the
chipset
Performance Security Power
Configures
Memory, Bus
and Processor
overrides
Sets
passwords
and
security
features
Table 39 lists the function keys available for menu screens.
Table 39. BIOS Setup Program Function Keys
BIOS Setup Program
Function Key
<←> or <→>
<↑> or <↓>
<Tab> Se le c ts a field (Not im p le mente d )
<Enter> Executes command or selects the submenu
<F9> Load the default configuration values for the current menu
<F10> Save the current values and exits the BIOS Setup program
<Esc> Exits the menu
Description
Selects a different menu screen (Moves the cursor left or right)
Selects an item (Moves the cursor up or down)
Configures
power
management
features and
power supply
controls
Boot
Selects
boot
options
Exit
Saves or
discards
changes to
Setup
program
options
3.2 BIOS Flash Memory Organization
The Serial Peripheral Interface Flash Memory (SPI Flash) includes a 96 Mbit
(12288 KB) flash memory device.
3.3 Resource Configuration
3.3.1 PCI Express Autoconfiguration
The BIOS can automatically configure PCI Express devices. PCI Express devices may
be onboard or add-in cards. Autoconfiguration lets a user insert or remove PCI
Express cards without having to configure the system. When a user turns on the
system after adding a PCI Express card, the BIOS automatically configures interrupts,
the I/O space, and other system resources. Any interrupts set to Available in Setup
are considered to be available for use by the add-in card.
64
Overview of BIOS Features
3.4 System Management BIOS (SMBIOS)
SMBIOS is a Desktop Management Interface (DMI ) compliant method for managing
computers in a managed network.
The main component of SMBIOS is the Management Inf ormation Format (MIF)
database, which contains information about the computing system and its
components. Using SMBIOS, a system administra tor can obtain the system types,
capabilities, operational status, and installation dates for system components. The
MIF database defines the data and provides the method for accessing this information.
The BIOS enables applications such as third-party management software to use
SMBIOS. The BIOS stores and reports the following SMBIOS information:
• BIOS data, such as the BIOS revision level
• Fixed-system data, such as peripherals, serial numbers, and asset tags
• Resource data, such as memory size, cache size, and processor speed
• Dynamic data, such as event detection and error logging
Non-Plug and Play operating systems require an additional interface for obtaining the
SMBIOS information. The BIOS supports an SMBIOS table interface for such operating
systems. Using this support, an SMBIOS service-level application running on a
non-Plug and Play operating system can obtain the SMBIOS information. Additional
board information c an be found in the BIOS under the Additional Information header
under the Main BIOS page.
3.5 Legacy USB Support
Legacy USB support enables USB devices to be used even when the operating
system’s USB drivers are not yet available. Legacy USB support is used to access the
BIOS Setup program, and to install an operating system that supports USB. By
default, Legacy USB support is set to Enabled.
Legacy USB supp o rt op erates as follows:
1. When you apply power to the computer, legacy support is disabled.
2. POST begins.
3. Legacy USB support is enabled by the BIOS allowing you to use a USB keyboard to
enter and configure the BIOS Setup progr a m and the m ainte nance menu.
4. POST complet es.
5. The operating system loads. While the o perating system is loading, USB
keyboards and mice are recognized and may be use d to co nfigure the operating
system. (Keyboards and mice are not recognized during this period if Legacy USB
support was set to Disabled in the BIOS Setup program.)
6. After the operating system loads the USB drivers , all legacy and non-legacy USB
devices are recognized by the operating system, and Legacy USB support from the
BIOS is no longer used.
7. Additional USB legacy feature options can be access by using Intel
To install an operating system that supports USB, verify that Legacy USB support in
the BIOS Setup program is set to Enabled and follow the operating system’s
instal la tion ins t r u ctions.
3.6 BIOS Updates
The BIOS can be updated us ing either of the following utilities, which are available on
the Intel World Wide Web site:
• Intel
• Intel
Both utilities verify that the updated BIOS matches the target system to prevent
accidentally installing an incompatible BIOS.
®
Express BIOS Update utility, which enables a utomated updating while in the
Windows environment . Using this utility, the BIOS can be updated from a file on a
hard disk, a USB drive (a flash drive or a USB hard drive), or a CD-ROM, or from
the file location on the Web.
®
Flash Memory Update Utility, which requires booting from DOS. Using this
utility, the BIOS can be updated from a file on a hard disk, a USB drive (a flash
drive or a USB hard drive), or a CD-ROM.
NOTE
Review the instructions distributed with the upgrade util ity before attempting a BIOS
update.
The BIOS Setup program and help messages are supported in US English. Check the
Intel web site for support.
66
Overview of BIOS Features
3.6.2 Custom Splash Screen
During POST, an Intel® splash screen is displayed by default. This splash screen can
be augmented with a custom splash screen. The Intel Integrator’s Toolkit that is
available from Intel can be used to create a custom splash screen.
NOTE
If you add a custom splash screen, it will share space with the Intel branded logo.
It is unlikely that anything will interrupt a BIOS update; however, if an interruption
occurs, the BIOS could be damaged. Table 40 lists the drives and media types that
can and cannot be used for BIOS recovery. The BIOS recovery media does not need
to be made bootable.
Table 40. Acceptable Drives/Media Types for BIOS Recovery
Media Type Can be used for BIOS recovery?
CD-ROM drive connected to the SATA interface Yes
USB removable drive (a USB Flash Drive, for example) Yes
USB diskette drive (with a 1.44 MB diskette) No
USB hard disk drive No
In the BIOS Setup program, the user can choose to boot from a hard drive, optical
drive, removable drive, or the network. The default setting is for the optical drive to
be the first boot device, the hard drive second, removable drive third, and the network
fourth.
3.8.1 Optical Drive Boot
Booting from the optical drive is supported in compliance to the El Torito bootable
CD-ROM format specification. Under the Boot menu in the BIO S Setup p rogram, the
optical drive is listed as a boot device. Boot devices are defined in priority order.
Accordingly, if there is not a bootable CD in the optical drive, the system will attempt
to boot from the next defined drive.
3.8.2 Network Boot
The network can be selected as a boot device. This selection allows booting from the
onboard LAN or a network add-in card with a remote boot ROM installed.
Pressing the <F12> key during POST automatically fo rces booting from the LAN. To
use this key during POST, the User Access Level in the BIOS Setup program's Security
menu must be set to Full.
3.8.3 Booting Without Attached Devices
For use in embedded applications, the BIOS has been designed so that after passing
the POST, the operating system loader is invoked even if the following devices are not
present:
• Video adapter
• Keyboard
• Mouse
3.8.4 Changing the Default Boot Device During POST
Pressing the <F10> key during POST causes a boot dev ice menu to be displayed. This
menu display s the list of a vailable boot devices. Table 41 lists the boot device menu
options.
Table 41. Boot Device Menu Options
Boot Device Menu Function Keys Description
<↑> or <↓>
<Enter> Exits the menu, and boots from the selected device
<Esc> Exits the menu and boots according to the boot priority
Selects a default boot device
defined through BIOS setup
68
Overview of BIOS Features
3.9 Adjusting Boot Speed
These factors affect system boot speed:
• Selecting and configuring peripherals properly
• Optimized BIOS boot parameters
• Enabling the Fast Boot feature
3.9.1 Peripheral Selection and Configuration
The following techniques help improve system boot speed:
•Choose a hard drive with parameters such as “power-up to data ready” in less than
eight seconds that minimizes hard drive startup delays.
•Select a CD-ROM drive with a fast initialization rat e. This rate can influence POST
execution time.
•Eliminate unnecessary add-in adapter features, such as logo displays, screen
repaints, or mode changes in POST. These features may add time to the boot
process.
•Try different monitors. Some monitors in itiali ze and communicate with the BIOS
more quickly, which enables the system to boot more quickly.
3.9.2 BIOS Boot Optimizations
Use of the following BIOS Setup program settings reduces the POST execution time.
•In the Boot menu, enable the settings for Fast Boot. This option will all ow BIOS to
skip through various stages of POST and boot quickly to the last detected boot
device.
•In the Boot Menu, set the hard disk drive as the first boot device. As a result, the
POST does not first seek a diskette drive, which saves about one second from the
POST execution time.
•In the Peripheral Configuration submenu, disable the LAN device if it will not be
used. This can reduce up to four seconds of option ROM boot time.
NOTE
It is possible to optimize the boot process to the point where the system boots so
quickly that the Intel logo screen (or a custom logo splash screen) will not be seen.
Monitors and hard disk drives with minimum initialization times can also contribute to
a boot time that might be so fast that necessary logo scre ens and POST messages
cannot be seen.
This boot time may be so fast that some drives might be not be initialized at all. If
this condition should occur, it is possible to introduce a programmable delay ranging
from zero to 30 seconds by 5 second increments (using the Hard Disk Pre-Delay
feature of the Advanced Menu in the Drive Confi g uration Submenu of the BIOS Setup
program).
The BIOS includes security features that restrict access to the BIOS Setup program
and who can boot the computer. A supervisor password and a user password can be
set for the BIOS Setup program and for booting the computer, with the following
restrictions:
•The supervisor password gives unrestricted access to view and change all the
Setup options in the BIOS Setup program. This is the supervisor mode.
•The user password gives restricted access to view and change Setup options i n the
BIOS Setup program. This is the user mode.
•If only the supervisor password is set, pressing the <Enter> key at the password
prompt of the BIOS Setup program allows the user restricted access to Setup.
•If both the supervisor and user passwords are set, users can enter either the
supervisor password or the user password to access Setup. Users have access to
Setup respective to which password is entered.
•Setting the user password restricts who can boot the computer. The password
prompt will be displayed before the computer is booted. If only the supervisor
password is set, the computer boots without ask ing for a password. If both
passwords are set, the user can enter either password to boot the computer.
•For enhanced security, use different passwords for the supervisor and user
passwords.
•Valid password characters are A-Z, a-z, and 0-9. Passwords may be up to
16 characters in length.
Table 42 shows the effects of setting the supervisor password and user password.
This table is for reference only and is not displayed on the screen.
Table 42. Supervisor and User Password Functions
Password
Set
Neither Can c hang e all
Supervisor
only
User only N/A C an c hange all
Supervisor
and user set
Note: If no password is set, any user can change all Setup options.
Supervisor
Mode
options
Can change all
options
Can change all
options
(Note)
User Mode
Can change all
options
Can change a
limited
number of
options
options
Can change a
limited
number of
options
(Note)
Setup Options
None None None
Supervisor Password Supervisor None
Enter Password
Clear User Password
Supervisor Password
Enter Password
to Enter
Setup
User User
Supervisor or
user
During
Boot
Supervisor or
user
70
Overview of BIOS Features
NOTE
The BIOS complies with NIST Special Publication 800-147 BIOS Protection Guidelines /
Recommendations of the National Institute of Standards and Te chnology. Refer to
http://csrc.nist.gov/publications/nistpubs/800-147/NIST-SP800-147-April2011.pdf for
more information.
3.11 BIOS Performance Features
The BIOS includes the following options to p rovide custom performance enhancements
when using 3
processor family processors in an LGA1155 socket.
•Processor Maximum Non-Turbo Ratio (processor multiplier can only be adjusted
down)
• Memory multiplier adjustment
• Memory voltage adjustment
• Graphics multiplier adjustment
rd
generation Intel Core processor family and 2nd generation Intel Core
Whenever a recoverable error occurs during POST, the BIOS causes the board’s front
panel power LED to blink an error message describing the problem (see Table 44).
Table 44. Front-panel Power LED Blink Codes
Type Pattern Note
F2 Setup/F10 Boot Menu
Prompt
BIOS update in progress Off when the update begins, then on for
Video err or On-off (1.0 second each) two times, then
Memory error On-off (1.0 second each) three times, the n
Thermal trip warning Each beep will be accompanied by the follo wing
None
0.5 seconds, then off for 0.5 seconds. The
pattern repeats until the BIOS update is
complete.
2.5-second pause (off), entire pattern repeats
(blink and pause) until the system is powered
off.
2.5-second pause (off), entire pattern repeats
(blinks and pause) until the system is powered
off.
blink pattern: .25 seconds on, .25 seconds off,
.25 seconds on, .25 seconds off. This will result
in a total of 16 blinks.
When no VGA option ROM is
found.
4.4 BIOS Error Messages
Table 45 lists the error messages and provides a brief description of each.
Table 45. BIOS Error Messages
Error Message Explanation
CMOS Battery Low The battery may be losing power. Replace the battery soon.
CMOS Checksum Bad The CMOS checksum is incorrect. CMOS memory may have been
corrupted. Run Setup to reset values.
Memory Size Decreased Memory size has decreased since the last boot. If no memory
was removed, then memory may be bad.
No Boot Device Available System did not find a device to boot.
74
Error Messages and Beep Codes
4.5 Port 80h Power On Self Test (POST) Codes
During the POST, the BIOS generates diagnostic progress codes (POST codes) to I/O
port 80h. If the POST fails, execution stops and the last POST code generated is left
at port 80h. This code is useful for determining the point where an error occurred.
Displaying the POST codes on a medium such as a seven-segment display, requires a
POST card that can interface with the Low Pin Count (LPC) Debug header or a POST
card that can be insta l led in one of the Conventional PCI connectors. Refer to the
location of the LPC Debug header in Figure 1.
The following tables provide information about the POST codes generated by the BIOS:
• Table 46 lists the Port 80h POST code ranges
• Table 47 lists the Port 80h POST codes themselves
• Table 48 lists the Port 80h POST sequence
NOTE
In the tables listed above, all POST codes and range values are listed in hexadecimal.
Table 46. Port 80h POST Code Ranges
Range Subsystem
0x00 – 0x05 Entering SX states S0 to S5.
0x10, 0x20, 0 x30,
0x40, 0x50
0x08 – 0x0F Secur ity (S EC ) phase
0x11 – 0x1F PEI phase pre MRC execution
0x21 – 0x29 MRC Memory detection
0x2A – 0x2F PEI phase post MRC execution
0x31 – 0x35 Recovery
0x36 – 0x3F Platfor m DX E driv er
0x41 – 0x4F CPU Initialization (PEI, DXE, SMM)
0x50 – 0x5F I/O Buses: PCI, USB, ISA, ATA etc. 0x5F is an unrecover ab le erro r. Start with PCI.
0x60 – 0x6F BDS
0x70 – 0x7F Output Dev ic es: All output consoles.
0x80 – 0x8F For future use
0x90 – 0x9F Input devices: Keyboard/Mouse.
0xA0 – 0xAF For future use
0xB0 – 0xBF Boot Devices: Inc lude s fixe d media and remov a b le media. Not that cri tic al s inc e
0xC0 – 0xCF For future use
0xD0 – 0xDF For future use
0xF0 – 0xFF
Resuming from SX states. 0x10 – S1, 0x20 – S2, 0x30 – S3, etc.
ACPI S States
0x00,0x01,0x02,0x03,0x04,0x05 Enter ing S0 , S2 , S3, S4, or S5 state
0x10,0x20,0x30,0x40,0x50 Resuming from S2, S3, S4, S5
Security Phase (SEC)
0x08 Starting BIOS execution after CPU BIST
0x09 SPI prefetching and caching
0x0A Load BSP microcode
0x0B Load APs microcodes
0x0C Platfor m program baseaddresses
0x0D Wake Up All APs
0x0E Initialize NEM
0x0F Pass entry point of the PEI core
PEI before MRC
PEI Platform driver
0x11 Set bootmode, GPIO init
0x12 Early chipset register programming including gr ap hic s init
0x13 Basic PCH init, discrete device init (1394, SATA)
0x14 LAN init
0x15 Exit early platform init driver
PEI SMBUS
0x16 SMBUSriver init
0x17 Entry to SMBUS execute read/write
0x18 Exit SMBUS execute read/write
PEI CK505 Clock Programming
0x19 Entry to CK505 programming
0x1A Ex it C K50 5 progr a mmi ng
PEI Over-Clock Programming
0x1B Entr y to e ntry to PEI over -clock programming
0x1C Exit PEI ove r-clock programming
Memory
0x21 MRC entry point
0x23 Reading SPD from memory DIMMs
0x24 Detecting presenc e of memory DIMMs
0x27 Configuring memory
0x28 Testing memory
0x29 Exit MRC driver
continued
76
Error Messages and Beep Codes
Table 47. Port 80h POST Codes (continued)
Port 80 Code Progress Code Enumeration
PEI after MRC
0x2A S tart to Program MTRR Settings
0x2B Done Programming MTRR Settings
PEIMs/Recovery
0x31 Crisis Recovery has initiated
0x33 Loading recovery capsule
0x34 Start recovery capsule/ valid capsule is found
CPU Initialization
CPU PEI Phase
0x41 Begin CPU PEI Init
0x42 XMM instruction enabling
0x43 End CPU PEI Init
CPU PEI SMM Phase
0x44 Begin CPU SMM Init smm relocate bases
0x45 Smm relocate bases for APs
0x46 End CPU SMM Init
CPU DXE Phase
0x47 CPU DXE Phase begin
0x48 Refresh memory space attributes according to MTRRs
0x49 Load the microcode if needed
0x4A Initialize strings to HII database
0x4B Initialize MP Support
0x4C CPU DXE Phas e End
CPU DXE SMM Phase
0x4D CPU DXE SMM Phase begin
0x4E Relocate SM bases for all APs
0x4F CPU DXE SMM Phase end
IO BUSES
0x50 Enumerating PCI buses
0x51 Allocating resources to PCI bus
0x52 Hot Plug PCI controller initialization
USB
0x58 Resetting USB bus
0x59 Reserved for USB
ATA/ATAPI/SATA
0x5A R e s e tting PATA/SATA bus and all devices
0x5B Reserved for ATA
BDS
0x60 BDS driver entry point initialize
0x61 BDS service routine entry point (can be called multiple time s )
0x62 BDS Step2
0x63 BDS Step3
0x64 BDS Step4
0x65 BDS Step5
0x66 BDS Step6
0x67 BDS Step7
0x68 BDS Step8
0x69 BDS Step9
0x6A B DS Step10
0x6B B DS Step11
0x6C BDS Step12
0x6D BDS Step13
0x6E BDS Step14
0x6F BDS return to DXE core (should not get here)
Keyboard (PS2 or USB)
0x90 Resetting keyboard
0x91 Disabling the keyboard
0x92 Detecting the presence of the keyboard
0x93 Enabling the keyboard
0x94 Clearing keyboard input buffer
0x95 Instructing keyboard controller to run Self Test (PS2 only)
Mouse (PS2 or USB)
0x98 Resetting mouse
0x99 Detecting mouse
0x9A Detecting presence of mouse
0x9B Enab ling mouse
Fixed Media
0xB0 Resetting fixed media
0xB1 Disabling fixed media
0xB2 Detecting presence of a fixed media (IDE hard drive detection etc.)
0xB3 Enabling/configuring a fixed media
continued
78
Error Messages and Beep Codes
Table 47. Port 80h POST Codes (continued)
Port 80 Code Progress Code Enumeration
Removable Media
0xB8 Resetting removable media
0xB9 Disabling removable media
0xBA Detecting presence of a removable media (IDE, CDROM detection
etc.)
0xBB Enabling/configuring a removable media
DXE Core
0xE4 Ente r e d D X E phase
BDS
0xE7 Waiting for user input
0xE8 Checking password
0xE9 Entering BIOS setup
0xEB Calling Legacy Option ROMs
Runtime Phase/EFI OS Boot
0xF8 EFI boot service ExitBootServices ( ) has been called
0xF9 EFI runtime service SetVirtualAddressMap ( ) has been called
21 I nitia lizing a chipset component
22 Reading SPD from memory DIMMs
23 Detecting presence of memory DIMMs
25 Configuring memory
28 Tes ting m e mory
34 Loading recovery capsule
E4 Entered DXE phase
12 Starting application processor initialization
13 SMM initializ ation
50 Enumerating PCI buses
51 Allocating resourced to PCI bus
92 De te c ting the presence of the keyboard
90 Resetting keyboard
94 Clearing keyboard input buffer
95 Keyboard Self Test
EB Calling Video BIOS
58 Resetting USB bus
5A Resetting PATA/SATA bus and all devic e s
92 De te c ting the presence of the keyboard
90 Resetting keyboard
94 Clearing keyboard input buffer
5A Resetting PATA/SATA bus and all devic e s
28 Tes ting m e mory
90 Resetting keyboard
94 Clearing keyboard input buffer
E7 Waiting for user input
01 INT 19
00 Ready to boot
80
5 Regulatory Compliance and Battery
Disposal Information
5.1 Regulatory Compliance
This section cont ains the following regulatory compliance information for Intel Desk t op
Board DB75EN:
• Safety standards
• European Union Declaration of Conformity statement
• Product Ecology statements
• Electromagnetic Compatibility (EMC) standar ds
• Product certification markings
5.1.1 Safety Standards
Intel Desktop Board DB75EN complies with the safety standards stated in Table 49
when correctly installed in a compatible host system.
Table 49. Safety Standards
Standard Title
CSA/UL 60950-1 Information Technology Equipment – Safety - Part 1: General
Requirements (USA and Canada)
EN 60950-1 Information Technology Equipment – Safety - Part 1: General
Requirements (European Union)
IEC 60950-1 Information Technology Equipment – Safety - Par t 1: General
We, Intel Corporation, declare under our sole responsibility that the product Intel®
Desktop Board DB75EN is in conformity with all applicable essential requirements
necessary for CE marking, following the provisions of the European Council Directive
2004/108/EC (EMC Directive), 2006/95/EC (Low Voltage Directive), and 2002/95/EC
(ROHS Directive).
The product is properly CE marked demonstrating this conformity and is for
distribution within all member state s of the EU with no restrictions.
This product follows the provisions of the European Directives 2004/108/EC,
2006/95/EC, and 2002/95/EC.
ČeštinaTento výrobek odpovídá požadavkům evropských směrnic 2004/108/EC,
2006/95/EC a 2002/95/EC.
Dansk Dette produkt er i overensstemmelse med det europæiske direktiv
2004/108/EC, 2006/95/EC & 2002/95/EC.
Dutch Dit product is in navolging van de bepalingen van Europees Directief
2004/108/EC, 2006/95/EC & 2002/95/EC.
Eesti Antud toode vastab Euroopa direktiivides 2004/108/EC, ja 2006/95/EC ja
2002/95/EC kehtestatud nõuetele.
Suomi Tämä tuote noudattaa EU-direktiivin 2004/108/EC, 2006/95/EC & 2002/95/EC
määräyksiä.
Français Ce produit est conforme aux exigences de la Directive Européenne
2004/108/EC, 2006/95/EC & 2002/95/EC.
Deutsch Dieses Produkt entspricht den Bestimmungen der Europäischen Richtlinie
2004/108/EC, 2006/95/EC & 2002/95/EC.
Ελληνικά Το παρόν προϊόν ακολουθεί τις διατάξεις των Ευρωπαϊκών Οδηγιών
2004/108/EC, 2006/95/EC και 2002/95/EC.
Magyar E termék megfelel a 2004/108/EC, 2006/95/EC és 2002/95/EC Európai
Irányelv előírásainak.
Icelandic Þessi vara stenst reglugerð Evrópska Efnahags Bandalagsins númer
2004/108/EC, 2006/95/EC, & 2002/95/EC.
Italiano Questo prodotto è conforme alla Direttiva Europea 2004/108/EC,
2006/95/EC & 2002/95/EC.
Latviešu Šis produkts atbilst Eiropas Direktīvu 2004/108/EC, 2006/95/EC un
2002/95/EC noteikumiem.
LietuviųŠis produktas atitinka Europos direktyvų 2004/108/EC, 2006/95/EC, ir
2002/95/EC nuostatas.
Malti Dan il-prodott hu konformi mal-provvedimenti tad-Direttivi Ewropej
2004/108/EC, 2006/95/EC u 2002/95/EC.
Norsk Dette produktet er i henhold til bestemmelsene i det europeiske direktivet
2004/108/EC, 2006/95/EC & 2002/95/EC.
Polski Niniejszy produkt jest zgodny z postanowieniami Dyrektyw Unii Europejskiej
2004/108/EC, 206/95/EC i 2002/95/EC.
82
Regulatory Compliance and Battery Disposal Information
中文
Portuguese Este produto cumpre com as normas da Diretiva Européia 2004/108/EC,
2006/95/EC & 2002/95/EC.
Español Este producto cumple con las normas del Directivo Europeo 2004/108/EC,
2006/95/EC & 2002/95/EC.
Slovensky Tento produkt je v súlade s ustanoveniami európskych direktív
2004/108/EC, 2006/95/EC a 2002/95/EC.
SlovenščinaIzdelek je skladen z določbami evropskih direktiv 2004/108/EC,
2006/95/EC in 2002/95/EC.
Svenska Denna produkt har tillverkats i enlighet med EG-direktiv 2004/108/EC,
2006/95/EC & 2002/95/EC.
TürkçeBu ürün, Avrupa Birliği’nin 2004/108/EC, 2006/95/EC ve 2002/95/EC
yönergelerine uyar.
5.1.3 Product Ecology Statements
The following information is provided to address worldwide product ecology concerns
and regulations.
5.1.3.1 Disposal Considerations
This product contains the following materials th at may be regulated upon disposal:
lead solder on the printed wiring board assembly.
5.1.3.2 Recycling Considerations
As part of its commitment to environmental responsibility, Intel has implemented the
Intel Product Recycling Program to allow retail consumers of Intel’s branded products
to return used products to selected locations for proper recycling.
Please consult the http://www.intel.com/intel/other/ehs/product_ecology for the
details of this program, including the scope of covered products, available locations,
shipping instructions, terms and conditions, etc.
作为其对环境责任之承诺的部分,英特尔已实施 Intel Product Recycling Program
Als Teil von Intels Engagement für den Umweltschutz hat das Unternehmen das Intel
Produkt-Recyclingprogramm impleme nt iert, das Einzelhandelskunden von Intel
Markenprodukten ermöglicht, gebrauchte Produkte an ausgewählte Standorte für
ordnungsgemäßes Recycling zurückzugeben.
Details zu diesem Programm, einschließlich der darin eingeschlossenen Produkte,
verfügbaren Standorte, Versandanweisungen, Bedingungen usw., finden Sie auf der
Español
Como parte de su compromiso de responsabilidad medioambiental, Intel ha
implantado el programa de reciclaje de productos Intel, que permite que los
consumidores al detalle de los productos Intel devuelvan los productos usados en los
lugares seleccionados para su correspondiente reciclado.
Consulte la http://www.intel.com/intel/other/ehs/product_ecology para ver los detalles
del programa, que incluye los productos que abarca, los lugares disponibles,
instrucciones de envío, términos y condiciones, etc.
Français
Dans le cadre de son engagement pour la protection de l'environnement, Intel a mis
en œuvre le programme Intel Product Recycling Program (Programme de recyclage
des produits Intel) pour permettre aux consommateurs de produits Intel de recycler
les produits usés en les retournant à des adresses spécifiées.
Visitez la page Web http://www.intel.com/intel/other/ehs/product_ecology pour en
savoir plus sur ce programme, à savoir les produits concernés, les adresses
disponibles, les instructions d'expédition, les conditions générales, etc.
Sebagai sebahagian daripada komitmennya te rhada p ta nggungjawab persekitaran,
Intel telah melaksa nakan Program Kitar Se m u la Produk untuk membenarkan
pengguna-pengguna runcit produk jenama Intel memula n g kan produk terguna ke
lokasi-lokasi terpilih untuk dikitarkan semula dengan betul.
Sila rujuk http://www.intel.com/intel/other/ehs/product_ecology untuk mendapatkan
butir-butir program ini, termasuklah skop produk yang dirangkumi, lokasi-lokasi
tersedia, arahan penghantaran, terma & syarat, dsb.
Portuguese
Como parte deste compromisso com o respeito ao ambiente, a Intel implementou o
Programa de Reciclagem de Produtos para que os consumidores finais possam enviar
produtos Intel usados para locais selecionados, onde esses produtos são reciclados de
maneira adequada.
Consulte o site http://www.intel.com/intel/other/ehs/product_ecology (em Inglês)
para obter os detalhes sobre este programa, inclusive o escopo dos produtos cobertos,
os locais disponíveis, as instruções de envio, os termos e condições, etc.
84
Regulatory Compliance and Battery Disposal Information
Russian
В качестве части своих обязательств к окружающей среде, в Intel создана
программа утилизации продукции Intel (Product Recycling Program) для
предоставления конечным пользователям марок продукции Intel возможности
возврата используемой продукции в специализированные пункты для должной
утилизации.
Пожалуйста, обратитесь на веб-сайт
http://www.intel.com/intel/other/ehs/product_ecology за информацией об этой
программе, принимаемых продуктах, местах приема, инструкциях об отправке,
положениях и условиях и т.д.
Türkçe
Intel, çevre sorumluluğuna bağımlılığının bir parçası olarak, perakende tüketicilerin
Intel markalı kullanılmış ürünlerini belirlenmiş merkezlere iade edip uygun şekilde geri
dönüştürmesini amaçlayan Intel Ürünleri Geri Dönüşüm Programı’nı uygulamaya
koymuştur.
Bu programın ürün kapsamı, ürün iade merkezleri, nakliye talimatları, kayıtlar ve
şartlar v.s dahil bütün ayrıntılarını ögrenmek için lütfen
http://www.intel.com/intel/other/ehs/product_ecology Web sayfasına gidin.
Intel Desktop Board DB75EN is a China RoHS-compliant product.
The China Ministry of Information Industry (MII) stipulates that a material Self
Declaration Table (SDT) must be included in a product’s user documentation. The SDT
for Intel Desktop Board DB75EN is shown in Figure 18.
Figure 18. Intel Desktop Board DB75EN China RoHS Material
86
Self Declaration Table
Regulatory Compliance and Battery Disposal Information
5.1.5 EMC Regulations
Intel Desktop Board DB75EN complies with the EMC regulations stated in Table 50
when correctly installed in a compatible host system.
Table 50. EMC Regulations
Regulation Title
FCC 47 CFR Part 15,
Subpart B
ICES-003 Interference-Causing Equipment Standard, Digital Apparatus. (Canad a )
EN55022
EN55024
EN55022
CISPR 22
CISPR 24
VCCI V-3, V-4
KN-22, KN-24
CNS 13438 Bureau of Standards, Metrology, and Inspection (Taiwan)
Title 47 of the Code of Federal Regulations, Part 15, Subpart B, Rad i o
Frequency Devices. (USA)
Limits and methods of measurement of Radio Interf ere nce Characte ristics
of Information Technology Equipment. (Eur op e an Unio n)
Information Technology Equipment – Immunity Char ac ter is tic s Lim its and
methods of measurement. (European Union)
Australian Communications Author i ty , S ta nd ard for Ele c tromag ne tic
Compatibility. (Australia and New Zealand)
Limits and methods of measurement of Radio Disturbance Characteristics of
Information Technology Equipment. (International)
Information Technology Equipment – Immunity Characteristics – Limits and
Methods of Measurement. (International)
Voluntary Control for Interference by Information Technology Equipment.
(Japan)
Korean Communications Commission – Framework Act on
Telecommunications and Radio Waves Ac t (South Korea)
FCC Declaration of Conformity
This device complies with Part 15 of the FCC Rules . Oper a t ion is subject to the
following two conditions: (1) this device may not cause harmful interference, and (2)
this device must accept any interference received, including interference that may
cause undesired operation.
For questions related to the EMC performance of this product, contact:
Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124
1-800-628-8686
This equipment has been tested and found to comply with the limits for a Class B
digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to
provide reasonable protection against harmful interference in a residential installation.
This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instructions, may cause harmful interfere nce
to radio communications. However, there is no guarantee that interference will not
occur in a particular installation. If this equipment does cause harmful interference to
radio or television reception, which can be determined by turning the equipment off
and on, the user is encouraged to try to correct the interference by one or more of the
following measures:
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and the receiver.
•Connect the equipment to an o ut let on a circuit other than the one to which the
receiver is connected.
•Consult the dealer or an experienced radio/TV technician for help.
Any changes or modifications to the equipment not expressly approved by Intel
Corporation could void the user’s authority to operate the equipment.
Tested to comply with FCC standards for home or office use.
Canadian Department of Communications Compliance Statement
This digital apparatus does not exceed the Class B limits for radio noise emissions from
digital apparatus set out in the Radio Interference Regulations of the Canadian
Department of Commu nications.
Le présent appareil numerique német pas de bruits radioélectriques dépassant les
limites applicables aux appareils numériques de la classe B prescrites dans le
Réglement sur le broullage radioélectrique édicté par le ministére des Communications
du Canada.
Japan VCCI Statement
Japan VCCI Statement translation: This is a Class B product based on the sta nda rd of
the Voluntary Control Council for Inter ference from Information Technology Equipment
(VCCI). If this is used near a radio or television receiver in a domestic environment, it
may cause radio interference. Install and use the equipment according to the
instruction manua l.
Korea Class B Statement
Korea Class B Statement translation: This e quipment is for home use , and has
acquired electromagnetic conformity registration, so it can be used not only in
residential areas, but also other areas.
88
Regulatory Compliance and Battery Disposal Information
5.1.6 ENERGY STAR* 5.0, e-Standby, and ErP
Compliance
The US Department of Energy and the US Environmental Protection Agency have
continually revised the ENERGY STAR requirements. Intel has worked directly with
these two governmental agencies in the definition of new requirements.
Intel Desktop Board DB75EN meets the following program requirements in an
adequate system configuration, including appropriate selection of an efficient pow er
supply:
• Energy Star v5.0, category D
• EPEAT*
• Korea e-Standby
• European Union Energy-related Products Directive 2009 (ErP) Lot 6
NOTE
Energy Star compliance is based at the sys tem level not the board level. Use of an
Intel Desktop Board alone does not guarantee Energy Star compliance.
For information about Refer to
ENERGY STAR requirements and recommended config urations http://www.intel.com/go/energystar
Electronic Product Environmental As s e ssm e nt Too l (EPEAT) http://www.epeat.net/
Korea e-Standby Program http://www.kemco.or.kr/new_eng/pg02/
pg02100300.asp
European Union Energy-related Products Directive 2009 (ErP) http://ec.europa.eu/enterprise/policies/s
Intel Desktop Board DB75EN has the regulatory compliance marks shown in Table 51.
Table 51. Regulatory Compliance Marks
Description Mark
UL joint US/Canada Recognized Compone nt mark. Inc lude s adjace nt U L file
number for Intel Desktop Boards: E210882.
FCC Declaration of Conformity logo mark for Class B equipment.
CE mark. Declaring compliance to the European U nion (EU) EMC directive,
Low Voltage directive, and RoHS directive.
Australian Communications Author i ty (ACA) and New Zealand Radio
Spectrum Management (NZ RSM) C-tick mark. Includes adjacent Intel
supplier code number, N-232.
Japan VCCI (Voluntary Control Counci l for I nterference) mark.
Korea Certification mark. Includes an adja cent KC C (Kore an Communic ations
Commission) certificatio n number:
KCC-REM-CPU-DB75EN.
Taiwan BSMI (Bureau of Standards, Metrology and Inspections) mark.
Includes adjacent Intel company number, D33025.
Printed wiring board manufacturer ’s reco g nition mark. Consists of a unique
UL recognized manufacturer’s logo , along with a flamm ability rating (solder
side).
China RoHS/Environmentally Friendly Use Period Logo: This is an example of
the symbol used on Intel Desktop Boards and associated collateral. The color
of the mark may vary depending upon the application. The Environme ntal
Friendly Usage Period (EFUP) for Intel Desktop Boards has been determined
to be 10 years.
V-0
90
Regulatory Compliance and Battery Disposal Information
5.2 Battery Disposal Information
CAUTION
Risk of explosion if the battery is replaced with an incorrect type. Batteries should be
recycled where possible. Disposal of used batteries must be in accordance with local
environmental regulations.
PRÉCAUTION
Risque d'explosion si la pile usagée est remplacée par une pile de type incorrect. Les
piles usagées doivent être recyclées dans la mesure du possible. La mise au rebut des
piles usagées doit respecter les réglementations locales en vigueur en matière de
protection de l'environnement.
FORHOLDSREGEL
Eksplosionsfare, hvis batteriet erstattes med et batteri af en forkert type. Batterier
bør om muligt genbruges. Bortskaffelse af brugte batterier bør foregå i
overensstemmelse med gældende miljølovgivning.
OBS!
Det kan oppstå eksplosjonsfare hvis b a tteriet skiftes ut med feil type. Brukte batterier
bør kastes i henhold til gjeldende miljølovgivning.
VIKTIGT!
Risk för explosion om batteriet ersätts med felaktig batterityp. Batterier ska kasseras
enligt de lokala miljövårdsbestämmelserna.
VARO
Räjähdysvaara, jos pariston tyyppi on väärä. Paristot on kierrätettävä, jos se on
mahdollista. Käytetyt paristot on hävitettävä paikallisten ympäristömääräysten
mukaisesti.
VORSICHT
Bei falschem Einsetzen einer neuen Batterie besteht Explosionsgefahr. Die Batterie
darf nur durch denselben oder einen entspreche n d en , vom He rsteller empfoh l enen
Batterietyp ersetzt werden. Entsorgen Sie verbrauchte Batterien den Anweisungen
des Herstellers entsprechend.
AVVERTIMENTO
Esiste il pericolo di un esplosione se la pila non viene sostituita in modo corretto.
Utilizzare solo pile uguali o di tipo equiv alente a quelle consigliate dal produttore. Per
disfarsi delle pile usate, seguire le istruzioni del produttore.
Existe peligro de explosión si la pila no se cambia de forma adecuada. Utilice
solamente pilas iguales o del mismo tipo que las recomendadas por el fabricante del
equipo. Para deshacerse de las pilas usadas, siga igualmente las instrucciones del
fabricante.
WAARSCHUWING
Er bestaat ontploffingsgevaar als de batterij wordt vervangen door een onjuist type
batterij. Batterijen moeten zoveel mogelijk worden gerecycled. Houd u bij het
weggooien van gebruikte batterijen aan de plaatselijke milieuwetgeving.
ATENÇÃO
Haverá risco de explosão se a bateria for substituída por um tipo de bateria incorreto.
As baterias devem ser recicladas nos locais apropriados. A eliminação de baterias
usadas deve ser feita de acordo com as regulamentações ambientais da região.
AŚCIAROŽZNAŚĆ
Існуе рызыка выбуху, калі заменены акумулятар неправільнага тыпу.
Акумулятары павінны, па магчымасці, перепрацоўвацца. Пазбаўляцца ад старых
акумулятараў патрэбна згодна з мясцовым заканадаўствам па экалогіі.
UPOZORNÌNÍ
V případě výměny baterie za nesprávný druh může dojít k výbuchu. Je-li to možné,
baterie by měly být recyklovány. Baterie je třeba zlikvidovat v souladu s místními
předpisy o životním prostředí.
Προσοχή
Υπάρχει κίνδυνος για έκρηξη σε περίπτωση που η μπαταρία αντικατασταθεί από μία
λανθασμένου τύπου. Οι μπαταρίες θα πρέπει να ανακυκλώνονται όταν κάτι τέτοιο είναι
δυνατό. Η απόρριψη των χρησιμοποιημένων μπαταριών πρέπει να γίνεται σύμφωνα με
τους κατά τόπο περιβαλλοντικούς κανονισμούς.
VIGYÁZAT
Ha a telepet nem a megfelelő típusú telepre cseréli, az felrobbanhat. A telepeket
lehetőség szerint újra kell hasznosítani. A használt telepeket a helyi környezetvédelmi
előírásoknak megfelelően kell kiselejtezni.
92
Regulatory Compliance and Battery Disposal Information
AWAS
Risiko letupan wujud jika bateri digantikan dengan jenis yang tidak betul. Bateri
sepatutnya dikitar semula jika boleh. Pelupusan bateri terpakai mestilah mematuhi
peraturan alam sekitar tempatan.
OSTRZEŻENIE
Istnieje niebezpieczeństwo wybuchu w przypadku zastosowania niewłaściwego typu
baterii. Zużyte baterie należy w miarę możliwości utylizować zgodnie z odpowiednimi
przepisami ochrony środowiska.
PRECAUŢIE
Risc de explozie, dacă bateria este înlocuită cu un tip de baterie necorespunzător.
Bateriile trebuie reciclate, dacă este posibil. Depozitarea bateriilor uzate trebuie să
respecte reglementările locale privind protecţia mediului.
ВНИМАНИЕ
При использовании батареи несоответствующего типа существует риск ее взрыва.
Батареи должны быть утилизированы по возможности. Утилизация батарей должна
проводится по правилам, соответствующим местным требованиям.
UPOZORNENIE
Ak batériu vymeníte za nesprávny typ, hrozí nebezpečenstvo jej výbuchu.
Batérie by sa mali podľa možnosti vždy recyklovať. Likvidácia použitých batérií sa musí
vykonávať v súlade s miestnymi predpismi na ochranu životného prostredia.
POZOR
Zamenjava baterije z baterijo drugačnega tipa lahko povzroči eksplozijo.
Če je mogoče, baterije reciklirajte. Rabljene baterije zavrzite v skladu z lokalnimi
okoljevarstvenimi predpisi.
UYARI
Yanlış türde pil takıldığında patlama riski vardır. Piller mümkün olduğunda geri
dönüştürülmelidir. Kullanılmış piller, yerel çevre yasalarına uygun olarak atılmalıdır.
OСТОРОГА
Використовуйте батареї правильного типу, інакше існуватиме ризик вибуху.
Якщо можливо, використані батареї слід утилізувати. Утилізація використаних
батарей має бути виконана згідно місцевих норм, що регулюють охорону довкілля.
배터리를 잘못된 종류로 교체할 경우 폭발 위험이 있습니다. 가능한 경우 배터리는 재활용해야
하며, 수명이 다한 배터리를 폐기할 때는 각 지역의 환경법을 따라야 합니다.
THẬN TRỌNG
Có nguy cơ xảy ra nổ nếu thay pin không đúng loại. Pin cần được tái chế nếu có thể
thực hiện được. Việc thải bỏ pin đã sử dụng phải tuân theo các quy định của địa
phương về môi trường.
94
Regulatory Compliance and Battery Disposal Information