The Intel® Desktop Board D955XBK may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel Desktop Board D955XBK Specification Update.
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board D955XBK Technical Product
Specification
April 2005
This product specification applies to only the standard Intel
®
Desktop Board D955XBK with BIOS
identifier BK95510J.86A.
Changes to this specification will be published in the Intel Desktop Board D955XBK Specification
Update before being incorporated into a revision of this document.
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RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT,
COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. INTEL PRODUCTS ARE NOT INTENDED FOR USE IN
MEDICAL, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS.
All Intel desktop boards are evaluated as Information Technology Equipment (I.T.E.) for use in personal computers (PC) for
installation in homes, offices, schools, computer rooms, and similar locations. The suitability of this product for other PC or
embedded non-PC applications or other environments, such as medical, industrial, alarm systems, test equipment, etc. may
not be supported without further evaluation by Intel.
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intellectual property rights.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.”
Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising
from future changes to them.
®
Intel
desktop boards may contain design defects or errors known as errata, which may cause the product to deviate from
published specifications. Current characterized errata are available on request.
®
PRODUCTS INCLUDING LIABILITY OR WARRANTIES
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
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Intel, Pentium, and Celeron are registered trademarks of Intel Corporation or its subsidiaries in the United States and other
countries.
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
power and environmental requirements, and the BIOS for the Intel
describes the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the Intel Desktop Board
D955XBK and its components to the vendors, system integrators, and other engineers and
technicians who need this level of information. It is specifically not intended for general audiences.
What This Document Contains
Chapter Description
1 A description of the hardware used on the Desktop Board D955XBK
2 A map of the resources of the Desktop Board
3 The features supported by the BIOS Setup program
4 A description of the BIOS error messages, beep codes, and POST codes
®
Desktop Board D955XBK. It
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
Notes call attention to important information.
INTEGRATOR’S NOTES
#
Integrator’s notes are used to call attention to information that may be useful to system integrators.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
# Used after a signal name to identify an active-low signal (such as USBP0#)
(NxnX) When used in the description of a component, N indicates component type, xn are the relative
coordinates of its location on the Desktop Board D955XBK, and X is the instance of the
particular part at that general location. For example, J5J1 is a connector, located at 5J. It is
the first connector in the 5J area.
GB Gigabyte (1,073,741,824 bytes)
GB/sec Gigabytes per second
Gbits/sec Gigabits per second
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbits/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
* This symbol is used to indicate third-party brands and names that are the property of their
Table 1 summarizes the major features of the board.
Table 1. Feature Summary
Form Factor
Processor
Memory
Chipset
Video
Audio
I/O Control
USB
Peripheral
Interfaces
BIOS
Instantly Available
PC Technology
LAN Support
Expansion
Capabilities
ATX (12.00 inches by 9.60 inches [304.80 millimeters by 243.84 millimeters])
Support for an Intel® Pentium® 4 processor in an LGA775 socket with a 1066 or
• Firmware Hub (FWH) or Serial Peripheral Interface (SPI) Flash device
One PCI Express* x16 connector supporting PCI Express x16 graphics cards
Intel
LPC Bus I/O controller
Support for USB 2.0 devices
• Eight USB ports
• One serial port
• One parallel port
• Four Serial ATA interfaces with RAID support
• One Parallel ATA IDE interface with UDMA 33, ATA-66/100 support
• One diskette drive interface
• PS/2* keyboard and mouse ports
• Intel
• Support for Advanced Configuration and Power Interface (ACPI), Plug and Play,
• Support for PCI Local Bus Specification Revision 2.2
• Support for PCI Express Revision 1.0a
• Suspend to RAM support
• Wake on PCI, RS-232, front panel, PS/2 devices, and USB ports
Gigabit (10/100/1000 Mbits/sec) LAN subsystem using the
Intel
• Three PCI Conventional bus add-in card connectors (SMBus routed to PCI
• One PCI Express x16 bus add-in card connector
• One Secondary PCI Express x16/x4 bus add-in card connector
• One PCI Express x1 bus add-in card connector
82955X Memory Controller Hub (MCH)
®
High Definition Audio subsystem
®
BIOS (resident in the FWH or SPI Flash device)
SMBIOS, and Intel
®
82573E/82573V/82574V Gigabit Ethernet Controller
Conventional bus connector 2)
®
Active Management Technology (AMT)
continued
10
Product Description
Table 1. Feature Summary (continued)
Hardware Monitor
Subsystem
• Hardware monitoring and fan control ASIC
• Voltage sense to detect out of range power supply voltages
• Thermal sense to detect out of range thermal values
• Three fan connectors
• Three fan sense inputs used to monitor fan activity
• Fan speed control
1.1.2 Manufacturing Options
Table 2 describes the manufacturing options. Not every manufacturing option is available in all
marketing channels. Please contact your Intel representative to determine which manufacturing
options are available to you.
Table 2. Manufacturing Options
Alternate (ALT)
Power Input
Connector
ATAPI CD-ROM
connector
Audio Subsystem
Auxiliary (AUX)
Power Output
Connector
Discrete SATA
RAID controller
IEEE-1394a/b
Interface
Processor power
connector
SCSI Hard Drive
Activity LED
Connector
Trusted Platform
Module (TPM)
For information about Refer to
Available configurations for the board Section 1.2, page 15
Provides required additional power when using high power (75 W or greater) add-in
cards in both the PCI Express x16 and the Secondary PCI Express x16/x4 bus add-in
card connectors
A 1 x 4-pin ATAPI-style connector for connecting an internal ATAPI CD-ROM drive to
the audio mixer
Intel High Definition Audio subsystem in one of the following configurations:
• 8-channel (7.1) audio subsystem with five analog audio outputs and two S/PDIF
digital audio outputs (coaxial and optical) using the Sigmatel 9221 audio codec
• 6-channel (5.1) audio subsystem with three analog audio outputs using the
Sigmatel 9220 audio codec
Provides power for internal chassis lighting
• Silicon Image Sil 3114 SATA RAID controller
• Four SATA connectors (in addition to the four SATA connectors on the ICH7-R
SATA interface)
IEEE-1394a/b controller and three IEEE-1394a/b connectors: one back panel
connector, two front-panel connectors. Back panel connector is IEEE-1394acompatible only; front panel connectors are 1394a- or 1394b-compatible, configurable
through the BIOS Setup program.
One of the following connectors for providing +12 V power to the processor voltage
regulator:
• 2 x 4-pin (requires a power supply with a dual-rail 2 x 4 power cable)
• 2 x 2-pin
Allows add-in hard drive controllers (SCSI or other) to use the same LED as the
onboard IDE controller.
Figure 1 shows the location of the major components.
OO
NN
MM
LL
KK
JJ
HH
F GAPBD
II
HCE
I
J
K
L
M
N
O
Q
Y
AAGG EECC
Figure 1. Desktop Board Components
W
XZBBDDFF
V
Table 3 lists the components identified in Figure 1.
12
S RTU
OM17719
Table 3. Components Shown in Figure 1
Item/callout from Figure 1 Description
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
X
Y
Z
AA
BB
CC
DD
EE
FF
GG
HH
II
JJ
KK
LL
MM
NN
OO
Auxiliary rear fan connector
ATAPI CD-ROM connector (optional)
Audio codec
Front panel audio connector
Secondary PCI Express x16/x4 bus add-in card connector
Gigabit Ethernet Controller
PCI Express x16 bus add-in card connector
Back panel connectors
Processor power connector
Alternate power connector (optional)
Rear chassis fan connector
LGA775 processor socket
Intel 82955X MCH
Processor fan connector
Intel 82801GR I/O Controller Hub (ICH7-R)
DIMM Channel A sockets [2]
DIMM Channel B sockets [2]
I/O controller
Power connector
Diskette drive connector
Parallel ATE IDE connector
Battery
Front chassis fan connector
BIOS Setup configuration jumper block
Firmware Hub (FWH)
Chassis intrusion connector
Serial ATA connectors (ICH7-R RAID) [4]
Front panel USB connectors [2]
Auxiliary front panel power LED connector
Front panel connector
SCSI Hard Drive Activity LED (optional)
Auxiliary power output connector (optional)
Serial ATA RAID controller (Discrete RAID) (optional)
Serial ATA RAID connectors (Discrete RAID) (optional) [4]
IEEE-1394a/b front panel connectors [2]
IEEE-1394a/b PHY component (optional)
IEEE-1394a/b Link component (optional)
SPI Flash device
PCI Conventional bus add-in card connectors [3]
Speaker
PCI Express x1 bus add-in card connector
The board is designed to support Intel Pentium 4 processors in an LGA775 processor socket with a
1066 or 800 MHz system bus. See the Intel web site listed below for the most up-to-date list of
supported processors.
For information about… Refer to:
Supported processors for the board http://www.intel.com/design/motherbd/bk/bk_proc.htm
CAUTION
Use only the processors listed on web site above. Use of unsupported processors can damage the
board, the processor, and the power supply.
INTEGRATOR’S NOTE
#
This board has specific requirements for providing power to the processor. Refer to Section 2.7.2.1
on page 60 for information on power supply requirements for this board.
The board has four DIMM sockets and supports the following memory features:
• 1.8 V and 1.9 V DDR2 SDRAM DIMMs
• Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMS with x16 organization are not supported.
• 8 GB maximum total system memory. Refer to Section 2.1.1 on page 45 for information on the
total amount of addressable memory.
• Minimum total system memory: 128 MB
• ECC DIMMs and non-ECC DIMMs
• Serial Presence Detect
• DDR2 667 and 533 MHz SDRAM DIMMs
NOTES
• Remove the PCI Express x16 video card before installing or upgrading memory to avoid
interference with the memory retention mechanism.
• To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data structure.
This allows the BIOS to read the SPD data and program the chipset to accurately configure
memory settings for optimum performance. If non-SPD memory is installed, the BIOS will
attempt to correctly configure the memory settings, but performance and reliability may be
impacted or the DIMMs may not function under the determined frequency.
Table 4 lists the supported DIMM configurations.
Table 4. Supported Memory Configurations
DIMM
Capacity
128 MB SS 256 Mbit 16 M x 16/empty 4 [5]
256 MB SS 256 Mbit 32 M x 8/empty 8 [9]
256 MB SS 512 Mbit 32 M x 16/empty 4 [5]
512 MB DS 256 Mbit 32 M x 8/32 M x 8 16 [18]
512 MB SS 512 Mbit 64 M x 8/empty 8 [9]
512 MB SS 1 Gbit 64 M x 16/empty 4 [5]
1024 MB DS 512 Mbit 64 M x 8/64 M x 8 16 [18]
1024 MB SS 1 Gbit 128 M x 8/empty 8 [9]
2048 MB DS 1 Gbit 128 M x 8/128 M x 8 16 [18]
Notes:
1. In the second column, “DS” refers to double-sided memory modules (containing two rows of SDRAM) and “SS” refers to
single-sided memory modules (containing one row of SDRAM).
2. In the fifth column, the number in brackets specifies the number of SDRAM devices on an ECC DIMM.
INTEGRATOR’S NOTE
#
Configuration
(Note 1)
SDRAM
Density
SDRAM Organization
Front-side/Back-side
Number of SDRAM
Devices
(Note 2)
Refer to Section 2.1.1, on page 45 for additional information on available memory.
16
Product Description
1.4.1 Memory Configurations
The Intel 82955X MCH supports two types of memory organization:
•Dual channel (Interleaved) mode. This mode offers the highest throughput for real world
applications. Dual channel mode is enabled when the installed memory capacities of both
DIMM channels are equal. Technology and device width can vary from one channel to the
other but the installed memory capacity for each channel must be equal. If different speed
DIMMs are used between channels, the slowest memory timing will be used.
•Single channel (Asymmetric) mode. This mode is equivalent to single channel bandwidth
operation for real world applications. This mode is used when only a single DIMM is installed
or the memory capacities are unequal. Technology and device width can vary from one
channel to the other. If different speed DIMMs are used between channels, the slowest
memory timing will be used.
Figure 3 illustrates the memory channel and DIMM configuration.
NOTE
The DIMM0 sockets of both channels are blue. The DIMM1 sockets of both channels are black.
Figure 4 shows a dual channel configuration using two DIMMs. In this example, the DIMM0
(blue) sockets of both channels are populated with identical DIMMs.
1 GB
Channel A, DIMM 0
Channel A, DIMM 1
1 GB
Channel B, DIMM 0
Channel B, DIMM 1
OM17123
Figure 4. Dual Channel (Interleaved) Mode Configuration with Two DIMMs
Figure 5 shows a dual channel configuration using three DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A equal the capacity of the single DIMM in the DIMM0
(blue) socket of Channel B.
256 MB
256 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
Figure 5. Dual Channel (Interleaved) Mode Configuration with Three DIMMs
18
OM17122
Product Description
Figure 6 shows a dual channel configuration using four DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A equal the combined capacity of the two DIMMs in
Channel B. Also, the DIMMs are matched between DIMM0 and DIMM1 of both channels.
256 MB
512 MB
256 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
OM17124
Figure 6. Dual Channel (Interleaved) Mode Configuration with Four DIMMs
1.4.1.2 Single Channel (Asymmetric) Mode Configurations
NOTE
Dual channel (Interleaved) mode configurations provide the highest memory throughput.
Figure 7 shows a single channel configuration using one DIMM. In this example, only the DIMM0
(blue) socket of Channel A is populated. Channel B is not populated.
256 MB
Figure 7. Single Channel (Asymmetric) Mode Configuration with One DIMM
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
OM17125
Figure 8 shows a single channel configuration using three DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A does not equal the capacity of the single DIMM in the
DIMM0 (blue) socket of Channel B.
256 MB
512 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
Figure 8. Single Channel (Asymmetric) Mode Configuration with Three DIMMs
20
OM17126
Product Description
1.5 Intel® 955X Chipset
The Intel 955X chipset consists of the following devices:
• Intel 82955X Memory Controller Hub (MCH) with Direct Media Interface (DMI) interconnect
• Intel 82801GR I/O Controller Hub (ICH7-R) with DMI interconnect
• BIOS storage in one of the following:
⎯ Firmware Hub (FWH)
⎯ Serial Peripheral Interface (SPI) Flash device
The MCH is a centralized controller for the system bus, the memory bus, the PCI Express bus, and
the DMI interconnect. The ICH7-R is a centralized controller for the board’s I/O paths.
For information about Refer to
The Intel 955X chipset http://developer.intel.com/
Resources used by the chipset Chapter 2
1.5.1 USB
The board supports up to eight USB 2.0 ports, supports UHCI and EHCI, and uses UHCI- and
EHCI-compatible drivers.
The ICH7-R provides the USB controller for all ports. The port arrangement is as follows:
• Four ports are implemented with dual stacked back panel connectors adjacent to the audio
connectors
• Four ports are routed to two separate front panel USB connectors
NOTES
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that meets the
requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 18, page 55
The location of the front panel USB connectors Figure 19, page 56
1.5.2 IDE Support
The board provides five IDE interface connectors:
• One parallel ATA IDE connector that supports two devices
• Four serial ATA IDE connectors that support one device per connector
1.5.2.1 Parallel ATE IDE Interface
The ICH7-R’s Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE interface.
The Parallel ATA IDE interface supports the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.
• Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
• ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of
up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible.
• ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH7-R’s
ATA-100 logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to
88 MB/sec.
NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections,
noise, and inductive coupling.
The Parallel ATA IDE interface also supports ATAPI devices (such as CD-ROM drives) and ATA
devices using the transfer modes.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
For information about Refer to
The location of the Parallel ATA IDE connector Figure 19, page 56
1.5.2.2 Serial ATA Interfaces
The ICH7-R’s Serial ATA controller offers four independent Serial ATA ports with a theoretical
maximum transfer rate of 3 Gbits/sec per port. One device can be installed on each port for a
maximum of four Serial ATA devices. A point-to-point interface is used for host to device
connections, unlike Parallel ATA IDE which supports a master/slave configuration and two devices
per channel.
For compatibility, the underlying Serial ATA functionality is transparent to the operating system.
The Serial ATA controller can operate in both legacy and native modes. In legacy mode, standard
IDE I/O and IRQ resources are assigned (IRQ 14 and 15). In Native mode, standard PCI
Conventional bus resource steering is used. Native mode is the preferred mode for configurations
using the Windows* XP and Windows 2000 operating systems.
NOTE
Many Serial ATA drives use new low-voltage power connectors and require adaptors or power
supplies equipped with low-voltage power connectors.
For more information, see: http://www.serialata.org/
For information about Refer to
The location of the Serial ATA IDE connectors on the D955XBK board Figure 19, page 56
22
Product Description
1.5.2.3 Serial ATA RAID
The ICH7-R supports the following RAID (Redundant Array of Independent Drives) levels:
•RAID 0 - data striping. Multiple physical drives can be teamed together to create one logical
drive. As data is written or retrieved from the logical drive, both drives operate in parallel, thus
increasing the throughput. The ICH7-R allows for more than two drives to be used in a
RAID 0 configuration.
•RAID 1 - data mirroring. Multiple physical drives maintain duplicate sets of all data on
separate disk drives. Level 1 provides the highest data reliability because two complete copies
of all information are maintained. The ICH7-R allows for two or four drives to be used in a
RAID 1 configuration.
•RAID 0+1 (or RAID 10) - data striping and mirroring. RAID 0+1 combines multiple mirrored
drives (RAID 1) with data striping (RAID 0) into a single array. This provides the highest
performance with data protection. Data is striped across all mirrored sets. RAID 0+1 utilizes
several drives to stripe data (increased performance) and then makes a copy of the striped
drives to provide redundancy. The mirrored disks eliminate the overhead and delay of parity.
•RAID 5 - distributed parity. RAID Level 5 stripes data at a block level across several drives
and distributes parity among the drives; no single disk is devoted to parity. Because parity data
is distributed on each drive, read performance tends to be lower than other RAID types.
RAID 5 requires the use of three or four drives.
1.5.2.4 SCSI Hard Drive Activity LED Connector (Optional)
The SCSI hard drive activity LED connector is a 1 x 2-pin connector that allows an add-in
hard drive controller to use the same LED as the onboard IDE controller. For proper operation, this
connector should be wired to the LED output of the add-in hard drive controller. The LED
indicates when data is being read from, or written to, either the add-in hard drive controller or the
onboard IDE controller (Parallel ATA or Serial ATA).
For information about Refer to
The location of the SCSI hard drive activity LED connector Figure 19, page 56
The signal names of the SCSI hard drive activity LED connector Table 23, page 59
1.5.3 Real-Time Clock, CMOS SRAM, and Battery
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
As a manufacturing option, the board provides a Silicon Image Sil 3114 Serial ATA (SATA)
controller and four connectors (that support one device per connector) for SATA devices. These
connectors are in addition to the four SATA connectors of the ICH7-R SATA interface.
The Sil 3114 controller uses the PCI bus for data transfer and provides a maximum data transfer
rate of up to 1.5 Gbits/sec. The discrete SATA interface supports the following RAID levels:
• RAID 0
• RAID 1
• RAID 0+1
For information about Refer to
RAID levels Section 1.5.2.3, page 23
The location of the discrete SATA RAID connectors Figure 19, page 56
1.7 PCI Express Connectors
The board provides the following PCI Express connectors:
• One PCI Express x16 connector. The x16 interface supports simultaneous (full duplex)
transfers up to 8 GBytes/sec. Single-ended (half duplex) transfers are supported at up to
4 GBytes/sec.
• One Secondary PCI Express x16/x4 bus add-in card connector: The board provides a PCI
Express add-in card connector in the form of a physical x16 connector with electrical routing of
x4. It is important to note that this connector is an electrical equivalent of a PCI Express x4 bus
add-in card connector. This connector supports x4 and x1 PCI Express add-in cards.
• One PCI Express x1 connector. The x1 interface supports simultaneous transfers up to
500 MBytes/sec.
INTEGRATOR’S NOTE
#
Although the PCI Express specification allows x16 cards to auto-negotiate down from x16 to x4
and x1 and may function properly, such configurations have not been validated on this board.
Please consult your add-in card vendor prior to attempting to use a PCI Express x16 add-in card in
this connector.
The PCI Express interface supports the PCI Conventional bus configuration mechanism so that the
underlying PCI Express architecture is compatible with PCI Conventional compliant operating
systems. Additional features of the PCI Express interface includes the following:
• Support for the PCI Express enhanced configuration mechanism
• Automatic discovery, link training, and initialization
• Support for Active State Power Management (ASPM)
• SMBus 2.0 support
• Wake# signal supporting wake events from ACPI S1, S3, S4, or S5
• Software compatible with the PCI Power Management Event (PME) mechanism defined in the
PCI Power Management Specification Rev. 1.1
24
Product Description
1.8 Auxiliary Power (AUX PWR) Output Connector (Optional)
The D955XBK board includes a 1x4 power connector that can be used to provide power for
internal chassis lighting or additional fans. The on/off function of this connector is controlled from
within the BIOS Setup Program. The default setting in the BIOS is for this connector to be off.
INTEGRATOR’S NOTES
#
When using this connector, observe the following precautions:
• Do not use a Y-adapter, power splitter, or SATA power adapter to attach storage devices (such
as hard disk drives or CD/DVD drives) to this connector. This connector will not provide
adequate power for storage devices.
• Do not connect any devices to this connector that draw more than 1.5 A. The connector
circuitry includes overcurrent protection components that limit the current draw to a maximum
of 1.5 A.
For information about Refer to
The location of the optional auxiliary power output connector Figure 19, page 56
The signal names of the optional auxiliary power output connector Table 25, page 59
1.9 IEEE-1394a/b Connectors (Optional)
The optional IEEE-1394 interface addresses interconnection of both computer peripherals and
consumer electronics with these features:
• IEEE-1394a and IEEE-1394b operation
• Support for up to 63 peer-to-peer devices
• Operation ranging from 100 Mbits/sec to 800 Mbits/sec (depending on cable type)
• Connection over short and long distances
• Support for both asynchronous and isochronous data transfer
As a manufacturing option, the board includes three IEEE-1394a/b connectors as follows:
• One IEEE-1394a connector located on the back panel. This connector supports IEEE-1394a
operation only; IEEE-1394b operation is not supported.
• Two IEEE-1394a/b front-panel connectors located on the component side. These connectors
can be independently configured for either IEEE-1394a or IEEE-1394b operation using the
BIOS Setup program.
The IEEE-1394a interface provides a throughput ranging from 100 Mbits/sec to 400 Mbits/sec.
The IEEE-1394b interface is completely compatible with IEEE-1394a. IEEE-1394b also supports
higher data transfer rates (800 Mbits/sec) and longer distances.
The location of the back panel IEEE-1394a connector Figure 17, page 54
The location of the front panel IEEE-1394a/b connectors Figure 19, page 56
The signal names of the front panel IEEE-1394a/b connectors Section 2.7.2.6, page 66
1.10 I/O Controller
The I/O controller provides the following features:
• One serial port
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
• Serial IRQ interface compatible with serialized IRQ support for PCI Conventional bus systems
• PS/2-style mouse and keyboard interfaces
• Interface for one 1.44 MB or 2.88 MB diskette drive
• Intelligent power management, including a programmable wake-up event interface
• PCI Conventional bus power management support
The BIOS Setup program provides configuration options for the I/O controller.
1.10.1 Serial Port
The board has one serial port connector located on the back panel. The serial port supports data
transfers at rates of up to 115.2 kbits/sec with BIOS support.
For information about Refer to
The location of the serial port A connector Figure 18, page 55
1.10.2 Parallel Port
The 25-pin D-Sub parallel port connector is located on the back panel. Use the BIOS Setup
program to set the parallel port mode.
For information about Refer to
The location of the parallel port connector Figure 18, page 55
1.10.3 Diskette Drive Controller
The I/O controller supports one diskette drive. Use the BIOS Setup program to configure the
diskette drive interface.
For information about Refer to
The location of the diskette drive connector on the D955XBK board Figure 19, page 56
1.10.4 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel.
26
Product Description
NOTE
The keyboard is supported in the bottom PS/2 connector and the mouse is supported in the top PS/2
connector. Power to the computer should be turned off before a keyboard or mouse is connected or
disconnected.
For information about Refer to
The location of the keyboard and mouse connectors Figure 18, page 55
1.11 Audio Subsystem
The board supports the Intel High Definition audio subsystem based on the Sigmatel 9221 or the
Sigmatel 9220 audio codec. The audio subsystem supports the following features:
• Advanced jack sense for the back panel audio jacks that enables the audio codec to recognize
the device that is connected to an audio port. The back panel audio jacks are capable of
retasking according to user’s definition, or can be automatically switched depending on the
recognized device type.
• Stereo input and output for all back panel jacks
• Line out and Mic in functions for front panel audio jacks
• A signal-to-noise (S/N) ratio of 90 dB
1.11.1 Audio Subsystem Software
Audio software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining audio software and drivers Section 1.2, page 15
1.11.2 Audio Connectors
The board contains audio connectors on both the back panel and the component side of the board.
The component-side audio connectors include the following:
• Front panel audio (a 2 x 5-pin connector that provides mic in and line out signals for front panel
audio connectors)
• ATAPI CD-ROM (an optional 1 x 4-pin ATAPI-style connector for connecting an internal
ATAPI CD-ROM drive to the audio mixer)
The functions of the back panel audio connectors are dependent on which subsystem is present.
The 8-channel (7.1) audio subsystem is described in Section 1.11.3; the 6-channel (5.1) audio
subsystem is described in Section 1.11.4.
For information about Refer to
The locations of the front panel audio connector and the optional ATAPI
CD-ROM connector
The signal names of the front panel audio connector Table 19, page 58
The signal names of the optional ATAPI CD-ROM connector Table 18, page 58
The back panel audio connectors Section 2.7.1, page 53