The Intel® Desktop Board D925XCV/D925XBC may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel Desktop Board D925XCV/D925XBC Specification Update.
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board D925XCV/D925XBC Technical
Product Specification
June 2004
This product specification applies to only standard Intel
®
Desktop Boards D925XCV and
D925XBC with BIOS identifier CV92510A.86A.
Changes to this specification will be published in the Intel Desktop Board D925XCV/D925XBC
Specification Update before being incorporated into a revision of this document.
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED
BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH
PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY, RELATING TO SALE AND/OR USE OF INTEL® PRODUCTS INCLUDING LIABILITY OR WARRANTIES
RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT,
COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. INTEL PRODUCTS ARE NOT INTENDED FOR USE IN
MEDICAL, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS.
Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property
rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not
provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other
intellectual property rights.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.”
Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising
from future changes to them.
®
Intel
desktop boards may contain design defects or errors known as errata, which may cause the product to deviate from
published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation
P.O. Box 5937
Denver, CO 80217-9808
or call in North America 1-800-548-4725, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany 44-0-1793-421-333, other Countries 708-296-9333.
Intel, Pentium, and Celeron are registered trademarks of Intel Corporation or its subsidiaries in the United States and other
countries.
* Other names and brands may be claimed as the property of others.
Preface
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
®
power and environmental requirements, and the BIOS for these Intel
and D925XBC. It describes the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the Desktop Boards
D925XCV and D925XBC and their components to the vendors, system integrators, and other
engineers and technicians who need this level of information. It is specifically not intended for
general audiences.
What This Document Contains
Desktop Boards: D925XCV
Chapter Description
1 A description of the hardware used on the Desktop Boards D925XCV and D925XBC
2 A map of the resources of the Desktop Boards
3 The features supported by the BIOS Setup program
4 A description of the BIOS error messages, beep codes, and POST codes
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
✏
Notes call attention to important information.
INTEGRATOR’S NOTES
#
Integrator’s notes are used to call attention to information that may be useful to system integrators.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
Warnings indicate conditions, which if not observed, can cause personal injury.
Other Common Notation
# Used after a signal name to identify an active-low signal (such as USBP0#)
(NxnX) When used in the description of a component, N indicates component type, xn are the relative
coordinates of its location on the Desktop Boards D925XCV and D925XBC, and X is the
instance of the particular part at that general location. For example, J5J1 is a connector,
located at 5J. It is the first connector in the 5J area.
GB Gigabyte (1,073,741,824 bytes)
GB/sec Gigabytes per second
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbit/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
* This symbol is used to indicate third-party brands and names that are the property of their
respective owners.
iv
Contents
1 Product Description
1.1 PCI Bus Terminology Change...................................................................................... 11
1.14 Power Management .....................................................................................................40
1.1 PCI Bus Terminology Change
Previous generations of Intel® Desktop Boards used an add-in card connector referred to as PCI.
This generation of Intel Desktop Boards adds a new technology for add-in cards: PCI Express*.
The 32-bit parallel bus previously referred to as PCI is now called PCI Conventional.
1.2 Board Differences
This TPS describes these Intel Desktop Boards: D925XCV and D925XBC. The Desktop Boards
are identical with the exception of the items listed in Table 1.
Table 1. Summary of Board Differences
D925XCV
D925XBC
• ATX Form Factor (10.20 inches by 9.60 inches [259.08 millimeters by
243.84 millimeters])
• Four PCI Conventional bus add-in card connectors
• Two PCI Express x1 bus add-in card connectors
• Auxiliary rear fan connector
• Option for auxiliary power output connector
• Option for SCSI hard drive indicator LED
• Option for Trusted Platform Module (TPM)
• microATX Form Factor (9.60 inches by 9.60 inches [243.84 millimeters by
Most of the illustrations in this document show only the Desktop Board D925XCV. When there are
significant differences between the two Desktop Boards, illustrations of both boards are provided.
1.3 Overview
1.3.1 Feature Summary
Table 2 summarizes the major features of the Desktop Boards D925XCV and D925XBC.
Table 2. Feature Summary
Form Factor
Processor Support for an Intel® Pentium® 4 processor in an LGA775 socket with an 800 or
Memory
Chipset
Video One PCI Express x16 connector supporting PCI Express x16 graphics cards
Audio Intel® High Definition Audio subsystem
I/O Control LPC Bus I/O controller
USB Support for USB 2.0 devices
Peripheral
Interfaces
BIOS
Instantly Available
PC Technology
• D925XCV: ATX (10.20 inches by 9.60 inches [259.08 millimeters by
243.84 millimeters])
• D925XBC: microATX (9.60 inches by 9.60 inches [243.84 millimeters by
• One Parallel ATA IDE interface with UDMA 33, ATA-66/100 support
• One diskette drive interface
• PS/2* keyboard and mouse ports
• Intel/AMI BIOS (resident in the 8 Mbit FWH)
• Support for Advanced Configuration and Power Interface (ACPI), Plug and Play,
• Support for PCI Local Bus Specification Revision 2.2
• Support for PCI Express Revision 1.0a
• Suspend to RAM support
• Wake on PCI, RS-232, front panel, PS/2 devices, and USB ports
82925X Memory Controller Hub (MCH)
®
82801FR I/O Controller Hub (ICH6-R)
and SMBIOS
continued
12
Product Description
Table 2. Feature Summary (continued)
LAN Support Gigabit (10/100/1000 Mbits/sec) LAN subsystem using the Marvell* Yukon*
88E8050 PCI Express Gigabit Ethernet Controller
Expansion
Capabilities
Hardware Monitor
Subsystem
• D925XCV: Four PCI Conventional bus add-in card connectors (SMBus routed
to PCI Conventional bus connector 2), two PCI Express x1 bus add-in card
connectors, and one PCI Express x16 bus add-in card connector
• D925XBC: Two PCI Conventional bus add-in card connectors (SMBus routed to
PCI Conventional bus connector 2), one PCI Express x1 bus add-in card
connector, and one PCI Express x16 bus add-in card connector
• Hardware monitoring and fan control ASIC
• Voltage sense to detect out of range power supply voltages
• Thermal sense to detect out of range thermal values
• Three fan connectors
• Three fan sense inputs used to monitor fan activity
• Fan speed control
1.3.2 Manufacturing Options
Table 3 describes the manufacturing options on the Desktop Boards D925XCV and D925XBC.
Not every manufacturing option is available in all marketing channels. Please contact your Intel
representative to determine which manufacturing options are available to you.
Table 3. Manufacturing Options
Audio Subsystem Intel High Definition Audio subsystem in one of the following configurations:
• 8-channel (7.1) audio subsystem with five analog audio outputs and two S/PDIF
• 6-channel (5.1) audio subsystem with three analog audio outputs using the
Alternate (ALT)
Power Input
Connector
Auxiliary (AUX)
Power Output
Connector
IEEE-1394a
Interface
SCSI Hard Drive
Activity LED
Connector
Trusted Platform
Module (TPM)
For information about Refer to
Available configurations for the Desktop Boards D925XCV and D925XBC Section 1.4, page 19
Provides required additional power when using a power supply with a 20-pin (2x10)
main power connector. Not required when using a power supply with a 24-pin (2x12)
main power connector.
Provides power for internal chassis lighting (D925XCV board only)
IEEE-1394a controller and three IEEE-1394a connectors (one back panel connector,
two front-panel connectors)
Allows add-in hard drive controllers (SCSI or other) to use the same LED as the
onboard IDE controller. (D925XCV board only)
A component that enhances platform security (D925XCV board only)
digital audio outputs (coaxial and optical) using the Realtek* ALC880 audio codec
The boards are designed to support Intel Pentium 4 processors in an LGA775 processor socket with
an 800 or 533 MHz system bus. See the Intel web site listed below for the most up-to-date list of
supported processors.
For information about… Refer to:
Supported processors for the D925XCV board http://www.intel.com/design/motherbd/cv/cv_proc.htm
Supported processors for the D925XBC board http://www.intel.com/design/motherbd/bc/bc_proc.htm
CAUTION
Use only the processors listed on web site above. Use of unsupported processors can damage the
board, the processor, and the power supply.
The boards have four DIMM sockets and support the following memory features:
• 1.8 V (only) DDR2 SDRAM DIMMs
• Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMS with x16 organization are not supported.
• 4 GB maximum total system memory. Refer to Section 2.2.1 on page 55 for information on the
total amount of addressable memory.
• Minimum total system memory: 128 MB
• Non-ECC DIMMs
• Serial Presence Detect
• DDR2 533 MHz or DDR2 400 MHz SDRAM DIMMs
✏ NOTES
• Remove the PCI Express x16 video card before installing or upgrading memory to avoid
interference with the memory retention mechanism.
• To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data structure.
This allows the BIOS to read the SPD data and program the chipset to accurately configure
memory settings for optimum performance. If non-SPD memory is installed, the BIOS will
attempt to correctly configure the memory settings, but performance and reliability may be
impacted or the DIMMs may not function under the determined frequency.
Table 6 lists the supported DIMM configurations.
Table 6. Supported Memory Configurations
DIMM
Capacity
128 MB SS 256 Mbit 16 M x 16/empty 4
256 MB SS 256 Mbit 32 M x 8/empty 8
256 MB SS 512 Mbit 32 M x 16/empty 4
512 MB DS 256 Mbit 32 M x 8/32 M x 8 16
512 MB SS 512 Mbit 64 M x 8/empty 8
512 MB SS 1 Gbit 64 M x 16/empty 4
1024 MB DS 512 Mbit 64 M x 8/64 M x 8 16
1024 MB SS 1 Gbit 128 M x 8/empty 8
2048 MB DS 1 Gbit 128 M x 8/128 M x 8 16
Note: In the second column, “DS” refers to double-sided memory modules (containing two rows of SDRAM) and “SS” refers
to single-sided memory modules (containing one row of SDRAM).
INTEGRATOR’S NOTE
#
Configuration
SDRAM
Density
SDRAM Organization
Front-side/Back-side
Number of SDRAM
Devices
Refer to Section 2.2.1, on page 55 for additional information on available memory.
20
Product Description
0
0
1.6.1 Memory Configurations
The Intel 82925X MCH supports two types of memory organization:
• Dual channel (Interleaved) mode. This mode offers the highest throughput for real world
applications. Dual channel mode is enabled when the installed memory capacities of both
DIMM channels are equal. Technology and device width can vary from one channel to the
other but the installed memory capacity for each channel must be equal. If different speed
DIMMs are used between channels, the slowest memory timing will be used.
• Single channel (Asymmetric) mode. This mode is equivalent to single channel bandwidth
operation for real world applications. This mode is used when only a single DIMM is installed
or the memory capacities are unequal. Technology and device width can vary from one
channel to the other. If different speed DIMMs are used between channels, the slowest
memory timing will be used.
Figure 4 illustrates the memory channel and DIMM configuration.
NOTE
✏
The DIMM0 sockets of both channels are blue. The DIMM1 sockets of both channels are black.
Figure 5 shows a dual channel configuration using two DIMMs. In this example, the DIMM0
(blue) sockets of both channels are populated with identical DIMMs.
1 GB
Channel A, DIMM 0
Channel A, DIMM 1
1 GB
Channel B, DIMM 0
Channel B, DIMM 1
OM17123
Figure 5. Dual Channel (Interleaved) Mode Configuration with Two DIMMs
Figure 6 shows a dual channel configuration using three DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A equal the capacity of the single DIMM in the DIMM0
(blue) socket of Channel B.
256 MB
256 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
22
OM17122
Figure 6. Dual Channel (Interleaved) Mode Configuration with Three DIMMs
Product Description
Figure 7 shows a dual channel configuration using four DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A equal the combined capacity of the two DIMMs in
Channel B. Also, the DIMMs are matched between DIMM0 and DIMM1 of both channels.
256 MB
512 MB
256 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
OM17124
Figure 7. Dual Channel (Interleaved) Mode Configuration with Four DIMMs
1.6.1.2 Single Channel (Asymmetric) Mode Configurations
NOTE
✏
Dual channel (Interleaved) mode configurations provide the highest memory throughput.
Figure 8 shows a single channel configuration using one DIMM. In this example, only the DIMM0
(blue) socket of Channel A is populated. Channel B is not populated.
256 MB
Figure 8. Single Channel (Asymmetric) Mode Configuration with One DIMM
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
OM17125
Figure 9 shows a single channel configuration using three DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A does not equal the capacity of the single DIMM in the
DIMM0 (blue) socket of Channel B.
256 MB
512 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
24
OM17126
Figure 9. Single Channel (Asymmetric) Mode Configuration with Three DIMMs
Product Description
1.7 Intel® 925X Chipset
The Intel 925X chipset consists of the following devices:
• Intel 82925X Memory Controller Hub (MCH) with Direct Media Interface (DMI) interconnect
• Intel 82801FR I/O Controller Hub (ICH6-R) with DMI interconnect
• Firmware Hub (FWH)
The MCH is a centralized controller for the system bus, the memory bus, the PCI Express bus, and
the DMI interconnect. The ICH6-R is a centralized controller for the board’s I/O paths. The FWH
provides the nonvolatile storage of the BIOS.
For information about Refer to
The Intel 925X chipset http://developer.intel.com/
Resources used by the chipset Chapter 2
1.7.1 USB
The boards support up to eight USB 2.0 ports, supports UHCI and EHCI, and uses UHCI- and
EHCI-compatible drivers.
The ICH6-R provides the USB controller for all ports. The port arrangement is as follows:
• Four ports are implemented with dual stacked back panel connectors adjacent to the audio
connectors
• Four ports are routed to two separate front panel USB connectors
NOTES
✏
• Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that meets
the requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 20, page 66
The location of the front panel USB connectors on the Desktop Board D925XCV Figure 21, page 68
The location of the front panel USB connectors on the Desktop Board D925XBC Figure 22, page 70
1.7.2 IDE Support
The board provides five IDE interface connectors:
• One parallel ATA IDE connector, which supports two devices
• Four serial ATA IDE connectors, which support one device per connector
1.7.2.1 Parallel ATE IDE Interface
The ICH6-R’s Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE interface.
The Parallel ATA IDE interface supports the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.
• Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
• ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of
up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible.
• ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH6-R’s
ATA-100 logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to
88 MB/sec.
✏ NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections,
noise, and inductive coupling.
The Parallel ATA IDE interface also supports ATAPI devices (such as CD-ROM drives) and ATA
devices using the transfer modes.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The boards support Laser Servo (LS-120) diskette technology through the Parallel ATA IDE
interfaces. An LS-120 drive can be configured as a boot device by setting the BIOS Setup
program’s Boot menu to one of the following:
• ARMD-FDD (ATAPI removable media device – floppy disk drive)
• ARMD-HDD (ATAPI removable media device – hard disk drive)
For information about Refer to
The location of the Parallel ATA IDE connector on the D925XCV board Figure 21, page 68
The location of the Parallel ATA IDE connector on the D925XBC board Figure 22, page 70
1.7.2.2 Serial ATA Interfaces
The ICH6-R’s Serial ATA controller offers four independent Serial ATA ports with a theoretical
maximum transfer rate of 150 MB/s per port. One device can be installed on each port for a
maximum of four Serial ATA devices. A point-to-point interface is used for host to device
connections, unlike Parallel ATA IDE which supports a master/slave configuration and two devices
per channel.
For compatibility, the underlying Serial ATA functionality is transparent to the operating system.
The Serial ATA controller can operate in both legacy and native modes. In legacy mode, standard
IDE I/O and IRQ resources are assigned (IRQ 14 and 15). In Native mode, standard PCI
Conventional bus resource steering is used. Native mode is the preferred mode for configurations
using the Windows XP and Windows 2000 operating systems.
NOTE
✏
Many Serial ATA drives use new low-voltage power connectors and require adaptors or power
supplies equipped with low-voltage power connectors.
For more information, see: http://www.serialata.org/
26
Product Description
For information about Refer to
The location of the Serial ATA IDE connectors on the D925XCV board Figure 21, page 68
The location of the Serial ATA IDE connectors on the D925XBC board Figure 22, page 70
1.7.2.3 Serial ATA RAID
The ICH6-R supports RAID (Redundant Array of Independent Drives) level 0 and RAID level 1 on
the Serial ATA ports as follows:
• RAID 0 supports data striping. Two physical drives, of identical size, can be teamed together
to create one logical drive. As data is written or retrieved from the logical drive, both drives
operate in parallel, thus increasing the throughput.
• RAID 1 supports data mirroring. Two physical drives, of identical size, maintain duplicate sets
of all data on separate disk drives. Level 1 provides the highest data reliability because two
complete copies of all information are maintained.
1.7.2.4 RAID Boot Configuration Overview
A RAID array can be created by using the existing Serial ATA ports, correctly configuring the
BIOS, and installing drivers. The following steps are required to successfully establish a RAID
configuration.
1. Enable RAID Support in BIOS.
2. Create a RAID array using the Intel Application Accelerator (IAA) utility.
3. Install the IAA RAID driver.
4. Format the RAID array.
5. Install the IAA Companion Utility (this step is optional).
For information about Refer to
Serial ATA RAID configuration http://developer.intel.com/design/motherbd/cv/index.htm
1.7.2.5 SCSI Hard Drive Activity LED Connector (Optional)
The SCSI hard drive activity LED connector is a 1 x 2-pin connector that allows an add-in
hard drive controller to use the same LED as the onboard IDE controller. For proper operation, this
connector should be wired to the LED output of the add-in hard drive controller. The LED
indicates when data is being read from, or written to, either the add-in hard drive controller or the
onboard IDE controller (Parallel ATA or Serial ATA).
NOTE
✏
The SCSI Hard Drive Activity LED connector is an option available only on the D925XCV board.
It is not available on the D925XBC board.
For information about Refer to
The location of the SCSI hard drive activity LED connector on the
D925XCV board
The signal names of the SCSI hard drive activity LED connector Table 26, page 73
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
✏ NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
1.8 PCI Express Connectors
The boards provide the following PCI Express connectors:
• One PCI Express x16 connector. The x16 interface supports simultaneous (full duplex) transfer
speeds up to 8 GBytes/sec. Single-ended (half duplex) transfers are supported at up to
4 Gbytes/sec.
• Four PCI Express x1 connectors on the D925XCV board; two PCI Express x1 connectors on
the D925XBC board. The x1 interfaces support simultaneous transfer speeds up to
500 MBytes/sec
The PCI Express interface supports the PCI Conventional bus configuration mechanism so that the
underlying PCI Express architecture is compatible with PCI Conventional compliant operating
systems. Additional features of the PCI Express interface includes the following:
• Support for the PCI Express enhanced configuration mechanism
• Automatic discovery, link training, and initialization
• Support for Active State Power Management (ASPM)
• SMBus 2.0 support
• Wake# signal supporting wake events from ACPI S1, S3, S4, or S5
• Software compatible with the PCI Power Management Event (PME) mechanism defined in the
PCI Power Management Specification Rev. 1.1
1.9 Auxiliary Power (AUX PWR) Output Connector
The D925XCV board includes a 1x4 power connector that can be used to provide power for
internal chassis lighting or additional fans. The use of this connector requires an ATX12V power
supply with a 24-pin (2x12) main power cable. If a power supply with a 20-pin (2x10) main power
cable is used, the auxiliary power output connector may not function.
The on/off function of this connector is controlled from within the BIOS Setup Program. The
default setting in the BIOS is for this connector to be off.
28
Product Description
INTEGRATOR’S NOTES
#
When using this connector, observe the following precautions:
• Do not use a Y-adapter, power splitter, or SATA power adapter to attach storage devices (such
as hard disk drives or CD/DVD drives) to this connector. This connector will not provide
adequate power for storage devices.
• Do not connect any devices to this connector that draw more than 1.5 A. The connector
circuitry includes overcurrent protection components that limit the current draw to a maximum
✏
of 1.5 A.
For information about Refer to
The location of the auxiliary power output connector Figure 21, page 68
The signal names of the auxiliary power output connector Table 28, page 73
NOTE
The auxiliary power output connector is present only on the D925XCV board. It is not present on
the D925XBC board.
1.10 I/O Controller
The I/O controller provides the following features:
• One serial port
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
• Serial IRQ interface compatible with serialized IRQ support for PCI Conventional bus systems
• PS/2-style mouse and keyboard interfaces
• Interface for one 1.44 MB or 2.88 MB diskette drive
• Intelligent power management, including a programmable wake-up event interface
• PCI Conventional bus power management support
The BIOS Setup program provides configuration options for the I/O controller.
1.10.1 Serial Port
The boards have one serial port connector located on the back panel. The serial port supports data
transfers at speeds up to 115.2 kbits/sec with BIOS support.
For information about Refer to
The location of the serial port A connector Figure 20, page 66
1.10.2 Parallel Port
The 25-pin D-Sub parallel port connector is located on the back panel. Use the BIOS Setup
program to set the parallel port mode.
The location of the parallel port connector Figure 20, page 66
1.10.3 Diskette Drive Controller
The I/O controller supports one diskette drive. Use the BIOS Setup program to configure the
diskette drive interface.
For information about Refer to
The location of the diskette drive connector on the D925XCV board Figure 21, page 68
The location of the diskette drive connector on the D925XBC board Figure 22, page 70
1.10.4 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel.
NOTE
✏
The keyboard is supported in the bottom PS/2 connector and the mouse is supported in the top PS/2
connector. Power to the computer should be turned off before a keyboard or mouse is connected or
disconnected.
For information about Refer to
The location of the keyboard and mouse connectors Figure 20, page 66
30
Loading...
+ 82 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.