The Intel® Desktop Boards D850MD/D850MV may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel Desktop Board D850MD/D850MV Specification Update.
August 2001
Order Number: A65145-001
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board D850MD/D850MV Technical
Product Specification.
This product specification applies to only standard D850MD and D850MV boards with BIOS
identifier MV85010A.86A.
Changes to this specification will be published in the Intel Desktop Board D850MD/D850MV
Specification Update before being incorporated into a revision of this document.
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL
PROVIDED IN INTEL’S TERM S AND CONDITIONS OF SALE F OR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY
WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE
OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANT I ES RELATING TO FITN ESS FOR A PARTICULAR
PURPOSE, MERCHANT ABILITY, OR INFRI NGE M ENT OF ANY PATENT, COP YRIGHT, OR OTHER INTELLE CT UA L
PROPERTY RIGHT.
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not provide any license, express or implied, by estoppel or otherwise, to any suc h patents, trademarks, copyrights, or other
intellectual property rights.
Intel products are not int ended f or use in medical, life saving, or life sustaini ng appl i c ations or for any other applicati on i n
which the failure of the Intel product could create a situation where personal injury or death may occur.
Intel may make changes t o specifications, produc t descriptions, and plans at any time, without noti ce.
The Intel
the product to deviate from publ i shed specifications. Current characterized errata are avai l abl e on request.
Contact your local Int el sales office or your distributor to obtain the latest specifications before placing your product order.
Copies of documents whic h hav e an orderi ng number and are referenced in this document, or other Intel literature, m ay be
obtained from:
Intel Corporation
P.O. Box 5937
Denver, CO 80217-9808
or call in North America 1-800-548-4725, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany 44-0-1793-421-333, other Countries 708-296-9333.
Intel and Pentium are regist ered trademarks of Intel Corporation or i t s subsidiaries in the Unit ed S tates and other countries.
†
Copyright 2001, Intel Corporation. All rights reserved.
®
Desktop Boards D850MD and D850MV may contain design defects or errors known as errata which may cause
Other names and brands may be claim ed as the property of others.
®
PRODUCTS. EXCEPT AS
August 2001
Preface
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
®
power and environmental requirements, and the BIOS for these Intel
and D850MV. It describes the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the D850MD and D850MV
boards and their components to the vendors, system integrators, and other engineers and
technicians who need this level of information. It is specifically not intended for general
audiences.
What This Document Contains
Desktop Boards: D850MD
Chapter Description
1 A description of the hardware used on the D850MD and D850MV boards
2 A map of the resources of the boards
3 The features supported by the BIOS Setup program
4 The contents of the BIOS Setup program’s menus and submenus
5 A description of the BIOS error messages, beep codes, POST codes, and diagnostic
LEDs
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
✏
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
# Used after a signal name to identify an active-low signal (such as USB#)
(NxnX) When used in the description of a component, N indicates the component type, xn are the
relative coordinates of its location on the D850MD and D850MV boards, and X is the instance
of the particular part at that general location. For example, J5J1 is a connector, located at 5J.
It is the first connector in the 5J area.
GB Gigabyte (1,073,741,824 bytes)
GB/sec Gigabytes per second
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbit/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
†
This symbol is used to indicate other names and brands may be claimed as the property of
1.14 Power Management ...................................................................................................38
1.1 Board Differences
This TPS describes these Intel® desktop boards: D850MD and D850MV. The boards are identical
except for the differences listed in Table 1 below.
Table 1. Summary of Board Differences
D850MD
D850MV
NOTE
✏
All illustrations show the D850MD board unless there are significant differences between the two
boards. Any significant differences are indicated in each figure.
• microATX form factor (9.60 inches by 9.60 inches)
Table 2 summarizes the D850MD and D850MV boards’ major features.
Table 2. Feature Summary
Form Factor
Processor
Memory
Chipset
I/O Control
Video
Peripheral
Interfaces
Expansion
Capabilities
BIOS
Instantly Available
PC
LAN Wake
Capabilities
D850MD: microATX (9.60 inches by 9.60 inches)
D850MV: ATX (12.00 inches by 9.60 inches)
• Support for an Intel
• 400 MHz system data bus
• Two Direct-RDRAM channels with two RIMM
• Support for up to 2 GB of system memory using PC600 or PC800 RDRAM
Intel® 850 Chipset, consisting of:
®
• Intel
• Intel
• Intel
SMSC LPC47M142 LPC bus I/O controller
• AGP connector supporting 1.5 V 4X AGP cards only
• Up to seven Universal Serial Bus (USB) ports
• Two serial ports
• One parallel port
• Two IDE interfaces with Ultra DMA 33 and ATA-66/100 support
• One diskette drive interface
• PS/2
• D850MD: Three PCI bus add-in card connectors (SMBus routed to PCI bus
• D850MV: Five PCI bus add-in card connectors (SMBus routed to PCI bus
• Intel/AMI BIOS (resident in the Intel 82802AB 4 Mbit FWH)
• Support for Advanced Power Management (APM), Advanced Configuration and
• Support for
• Suspend to RAM support
• Wake on PCI, CNR, RS-232, front panel, PS/2 keyboard, and USB ports
Support for system wake-up using an add-in network interface card with remote
wake-up capability via the PME# signal
82850 Memory Controller Hub (MCH)
®
82801BA I/O Controller Hub (ICH2)
®
82802AB 4 Mbit Firmware Hub (FWH)
†
keyboard and mouse ports
connector 2)
connector 2)
Power Interface (ACPI), Plug and Play, and System Management BIOS
(SMBIOS)
®
Pentium® 4 processor
PCI Local Bus Specification Revision 2.2
†
s per channel (four RIMM sockets)
continued
12
Table 2. Feature Summary (continued)
Hardware Monitor
Subsystem
Hardware
Monitoring Features
Audio (Integrated)
• Voltage sense to detect out-of-range power supply voltages
• Thermal sense to detect out-of-range thermal values
• Fan control and monitoring
Two fan sense inputs used to monitor fan activity
Audio subsystem that use s the Analo g Devices AD1885 analog codec for AC ’97
processing
For information about Refer to
The board’s compliance level with APM, ACPI, Plug and Play, and SMBIOS. Section 1.5, page 19
1.2.2 Manufacturing Options
Table 3 describes the D850MD and D850MV boards’ manufacturing options. Not every
manufacturing option is available in all marketing channels. Please contact your Intel
representative to determine which manufacturing options are available to you.
Product Description
Table 3. Manufacturing Options
✏
Video
LAN
CNR
USB 2.0
NOTE
AGP Pro50 interface (50 W maximum); backward compatible with 1.5 V AGP
video cards.
This option uses an AGP Pro 1.5 V connector, also known as an AGP Pro50
connector.
®
Intel
82562ET 10/100 Mbit/sec Platform LAN Connect (PLC) device
One Communication and Networking Riser (CNR) connector (slot shared with
PCI bus connector 3 on the D850MD board and with PCI bus connector 5 on the
D850MV board)
Support for USB 2.0 devices. The USB 2.0 option supports up to five USB ports
and is currently available only on the D850MV board. It uses the following
components:
• NEC
• SMSC LPC47M132 LPC bus I/O controller
The USB 1.1 ports routed through the ICH2 are not available with the USB 2.0
option.
µPD720100 USB 2.0 host controller
The LAN and the CNR manufacturing options are mutually exclusive.
Figure 1 shows the location of the major components on the D850MD board.
A
C
B
D
V
U
T
S
R
Q
NO
KPL
M
A AD1885 audio codec L Diskette drive connector
B Intel 82562ET PLC device (optional) M IDE connectors
C AGP connector
(AGP Pro50 connector optional)
D Back panel connectors (SMSC LPC47M132 I/O controller optional)
E +12 V power connector (ATX12V) P Front panel connector
F Intel 82850 MCH Q Battery
G mPGA478 processor socket R Speaker
H Hardware monitor S Intel 82802AB 4 Mbit FWH
I RAMBUS
J RAMBUS Bank 1 (RIMM3 and RIMM4) U PCI bus add-in card connectors
K Power connector V CNR connector (optional)
†
Bank 0 (RIMM1 and RIMM2) T Intel 82801BA ICH2
N O Auxiliary power connector (optional)
SMSC LPC47M142 I/O controller
OM12320
E
F
G
H
I
J
14
Figure 1. D850MD Board Components
Figure 2 shows the location of the major components on the D850MV board.
Product Description
A
C
B
D
W
V
U
T
S
R
Q
NO
M
A AD1885 audio codec M IDE connectors
B Intel 82562ET PLC device (optional) N Auxiliary power connector (optional)
C AGP connector
(AGP Pro50 connector optional)
D Back panel connectors P Front panel connector
E +12 V power connector (ATX12V) Q Battery
F Intel 82850 MCH R Speaker
G mPGA478 processor socket S Intel 82802AB 4 Mbit FWH
H Hardware monitor T Intel 82801BA ICH2
I RAMBUS Bank 0 (RIMM1 and RIMM2) U NEC
J RAMBUS Bank 1 (RIMM3 and RIMM4) V PCI bus add-in card connectors
K Power connector W CNR connector (optional)
L Diskette drive connector
Figure 3 is a block diagram of the major functional areas of the standard D850MD and D850MV
boards. See Figure 7 on page 27 for USB port routing.
Diskette Drive
Connector
Serial Ports
Parallel Port
PS/2 Mouse
PS/2 Keyboard
Back Panel
USB Ports (2)
LPC
Bus
Primary/
Secondary IDE
mPGA478
Processor Socket
System Bus
(400 MHz)
I/O
Controller
ATA-66/100
USB
USB
850 Chipset
Front Panel
USB Ports (2)
4X AGP
Connector
(1.5 V only)
or
AGP Pro50
Connector
(optional)
Hardware
Monitor
AGP
Interface
PCI Slot 1
PCI Slot 2
PCI Slot 3
82850 Memory
Controller Hub
Dual RAMBUS
Channels
RAMBUS Bank 0
(RIMM1 and RIMM2)
(RIMM3 and RIMM4)
SMBus
PCI Slot 4
PCI Slot 5
(MCH)
RAMBUS Bank 1
PCI
D850MV
Only
AHA
Bus
82801BA
I/O Controller Hub
(ICH2)
CSMA/CD
Unit
Interface
Audio Codec
USB
Physical
Interface
AC Link
AD1885
Layer
82802AB 4 Mbit
Firmware Hub
(FWH)
LAN
Connector
(optional)
CNR
Connector
(optional)
Line In
Line Out
Mic In
Auxiliary Line In
CD-ROM
Back Panel
USB Ports (2)
= connector or socket
16
Figure 3. Standard Block Diagram
OM12394
Product Description
Figure 4 is a block diagram of the major functional areas of D850MD and D850MV boards with
the USB 2.0 manufacturing option. See Figure 8 on page 28 for USB port routing.
Primary/
Secondary IDE
mPGA478
Processor Socket
AGP
Interface
4X AGP
Connector
(1.5 V only)
or
AGP Pro50
Connector
(optional)
Hardware
Monitor
PCI Slot 1
PCI Slot 2
PCI Slot 3
PCI Slot 4
PCI Slot 5
ATA-66/100
System Bus
(400 MHz)
82850 Memory
Controller Hub
(MCH)
Dual RAMBUS
Channels
RAMBUS Bank 0
(RIMM1 and RIMM2)
RAMBUS Bank 1
(RIMM3 and RIMM4)
SMBus
PCI
D850MV
Only
850 Chipset
AHA
Bus
USB
82801BA
I/O Controller Hub
(ICH2)
CSMA/CD
Unit
Interface
AD1885
Audio Codec
NEC µPD720100
USB 2.0
Host Controller
(optional)
Physical
Interface
AC Link
USB
I/O
Controller
LPC
Bus
Layer
Diskette Drive
Connector
Serial Ports
Parallel Port
PS/2 Mouse
PS/2 Keyboard
82802AB 4 Mbit
Firmware Hub
(FWH)
LAN
Connector
(optional)
CNR
Connector
(optional)
Line In
Line Out
Mic In
Auxiliary Line In
CD-ROM
Back Panel
USB Ports (2)
Front Panel
USB Ports (2)
= connector or socket
Figure 4. Block Diagram with Optional USB 2.0 Support
To find information about… Visit this World Wide Web site:
Intel’s D850MD and D850MV boards http://www.intel.com/design/motherbd
http://support.intel.com/support/motherboards/desktop
Processor data sheets http://www.intel.com/design/litcentr
ICH2 addressing http://developer.intel.com/design/chipsets/datashts
Custom splash screens http://intel.com/design/motherbd/gen_indx.htm
Audio software and utilities http://www.intel.com/design/motherbd
LAN software and drivers http://www.intel.com/design/motherbd
1.4 Operating System Support
The D850MD and D850MV boards support drivers for all of the onboard hardware and subsystems
under the following operating systems:
†
• Windows
• Windows Me
• Windows NT
• Windows 2000
• Windows XP
For information about Refer to
Supported drivers Section 1.3, page 18
98/98 SE
†
4.0
NOTE
✏
Other drivers may be offered by other third-party vendors.
✏ NOTE
The USB 2.0 option requires an operating system that officially supports USB 2.0. USB 2.0
support has been tested with Windows 2000 and Windows XP drivers and is not currently
supported by any other operating system.
18
1.5 Design Specifications
Table 4 lists the specifications applicable to the D850MD and D850MV boards.
Table 4. Specifications
Reference
Name
AC ’97
ACPI
AGP
AMI BIOS
APM
ATA/
ATAPI-5
ATX
ATX12V
BIS Boot Integrity
CNR
EHCI
Specification
Title
Audio Codec ’97
Advanced
Configuration and
Power Interface
Specification
Accelerated Graphics
Port Interface
Specification
American Megatrends
BIOS Specification
Advanced Power
Management BIOS
Interface
Specification
Information
Technology - AT
Attachment with
Packet Interface - 5,
(ATA/ATAPI-5)
ATX Specification
ATX / ATX12V Power
Supply Design Guide
Services
Communication and
Network Riser (CNR)
Specification
Enhanced Host
Controller Interface
Specification for
Universal Serial Bus
Version, Revision Date,
and Ownership
Version 2.1,
May 1998,
Intel Corporation.
Version 2.0,
July 27, 2000,
Compaq Computer Corp.,
Intel Corporation,
Microsoft Corporation,
and Toshiba Corporation.
Version 2.0,
May 4, 1998,
Intel Corporation.
AMIBIOS 99,
1999,
American Megatrends, Inc.
Version 1.2,
February 1996,
Intel Corporation and
Microsoft Corporation.
Revision 3,
February 29, 2000,
Contact: T13 Chair,
Seagate Technology.
Version 2.03,
December 1998,
Intel Corporation.
Version 1.1,
August 2000,
Intel Corporation.
Version 1.0 for WfM 2.0,
August 1999,
Intel Corporation.
Version 2.3.1,
March 16, 1999,
American Megatrends Inc.,
Award Software International Inc.,
Compaq Computer Corporation,
Dell Computer Corporation,
Hewlett-Packard Company,
Intel Corporation,
International Business Machines
Corporation,
Phoenix Technologies Limited,
and SystemSoft Corporation.
Version 1.1,
March 1996,
Intel Corporation.
Version 1.1,
September 23, 1998,
Compaq Computer Corporation,
Intel Corporation,
Microsoft Corporation, and
NEC Corporation.
Version 2.0,
April 27, 2000,
Compaq Computer Corporation,
Hewlett-Packard Company,
Lucent Technologies Inc.,
Intel Corporation,
Microsoft Corporation,
NEC Corporation, and
Koninklijke Philips Electronics N.V.
Version 2.0,
December 18, 1998,
Intel Corporation.
Use only the processors listed below. Use of unsupported processors can damage the board, the
®
processor, and the power supply. See the Intel
Update for the most up-to-date list of supported processors for these boards.
The D850MD and D850MV boards support a single Pentium 4 processor (in a 478-pin socket)
with a system bus of 400 MHz. The D850MD and D850MV boards support the processors listed
in Table 5. All supported onboard memory can be cached, up to the cachability limit of the
processor. See the processor’s data sheet for cachability limits.
Table 5. Supported Processors
Type Designation System Bus L2 Cache Size
Pentium 4 processor Up to 2.0 GHz 400 MHz 256 KB
CAUTION
Use only an ATX12V-compliant power supply with the D850MD and D850MV boards. ATX12V
power supplies have two power leads that provide required supplemental power for the Intel
Pentium
ATX12V power supply to the corresponding connectors on the D850MD and D850MV boards.
Otherwise, the board and the processor could be damaged.
4
processor and the Intel 850 chipset. Always connect the 20-pin and 4-pin leads of the
Desktop Board D850MD/D850MV Specification
Do not use a standard ATX power supply. Doing so could damage the board and the processor.
For information about Refer to
Processor support Section 1.3, page 18
Processor usage Section 1.3, page 18
Power supply connectors Section 2.8.2.3, page 60
22
Product Description
1.7 System Memory
CAUTION
Turn off the power and unplug the power cord before installing or removing RIMM modules.
Failure to do so could damage the memory and the board. (After AC power is removed, the
standby power indicator LED should not be lit. See Figure 11 on page 45 for the location of the
standby power indicator LED.)
NOTE
✏
The board supports combinations of no more than 32 RDRAM components per RDRAM bank. If
the total number of RDRAM components installed in all RIMM sockets exceeds 64, the computer
will not boot.
1.7.1 Memory Features
The 82850 MCH integrates two lock-stepped Direct Rambus banks, providing a processor-tomemory bandwidth up to 3.2 GB/sec. The D850MD and D850MV boards have four RIMM
sockets (two sockets for each bank) and support the following memory features:
• Single- or double-sided RIMM configurations
• Maximum of 32 Direct Rambus devices per bank
• Memory configurations from 128 MB (minimum) to 2 GB (maximum), using 128 Mbit or
256 Mbit technology PC600- or PC800-compliant RDRAM
• Serial Presence Detect (SPD)–based configuration for optimal memory operation
• Suspend to RAM support
• ECC and non-ECC support
NOTE
✏
PC700 memory can be installed on D850MD and D850MV boards but defaults to PC600-level
performance.
1.7.2 Continuity RIMM Modules
All RIMM sockets must be populated to achieve continuity for termination at the Rambus
interface. Continuity RIMMs (or “pass-through” modules) must be installed in the second
RDRAM bank if memory is not installed. If any of the RIMM sockets are not populated, the
computer will not complete the Power-On Self-Test (POST) and the BIOS beep codes will not be
heard.
• The four RIMM sockets are grouped into two banks:
Bank 0 (labeled on the board as RIMM1 and RIMM2)
Bank 1 (labeled on the board as RIMM3 and RIMM4)
• Bank 0 must be populated first, ensuring that the RDRAM installed in RIMM1 and RIMM2 is
identical in speed, size, and density. For example, the minimum system configuration would
use two 64 MB RIMM modules of PC600 or PC800 RDRAM.
• If the desired memory configuration has been achieved by populating Bank 0, then Bank 1
should be filled with two Continuity RIMMs.
• If memory is to be installed in Bank 1, the RIMM modules installed in RIMM3 and RIMM4
must be identical in size and density to each other and match the speed of the RIMM modules
in Bank 0. The RIMM modules do not, however, need to match those in Bank 0 in size and
density. For example, if Bank 0 has two 128 MB RIMMs of PC800 RDRAM, Bank 1 would
require PC800 RDRAM also; however, any other supported RIMM modules such as 64 MB or
192 MB could be used.
• If ECC functionality is required, all installed RIMM modules must be ECC compliant.
Table 6 gives examples of RDRAM component density for various RIMM modules. Component
density (counts) can be identified on the RIMM label.
The Intel 850 chipset consists of the following devices:
• Intel 82850 MCH with Accelerated Hub Architecture (AHA) bus
• Intel 82801BA ICH2 with AHA bus
• Intel 82802AB FWH
The MCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the
AHA interface. The ICH2 is a centralized controller for the board’s I/O paths. The FWH provides
the nonvolatile storage of the BIOS. The component combination provides the chipset interfaces
as shown in Figure 5.
ATA-66/100
System Bus
Network
USB
850 Chipset
82850
Memory Controller
Hub (MCH)
Dual RAMBUS
Channels
AHA
Bus
AGP
Interface
82801BA
I/O Controller Hub
(ICH2)
82802AB 4 Mbit
Firmware Hub
(FWH)
LPC Bus
AC LinkPCI BusSMBus
Figure 5. Intel 850 Chipset Block Diagram
NOTE
✏
The USB bus is routed from the NEC USB 2.0 controller if the USB 2.0 option is supported.
The AGP connector is keyed for 1.5 V AGP cards only. Do not attempt to install a legacy 3.3 V
AGP card. The AGP connector is not mechanically compatible with legacy 3.3 V AGP cards. See
Figure 6 for more information on the AGP keying mechanism.
The AGP connector supports AGP add-in cards with 1.5 V Switching Voltage Level (SVL). An
AGP Pro50 interface is available (for a 50 W maximum power draw) as a manufacturing option.
Legacy 3.3 V AGP cards are not supported and will prevent the system from booting if installed.
AGP 1X/2X or 4X or AGP Pro Card
VGA
Connector
1.5 Volt
Cards
AGP 2X/4X
Universal
Connector Key
(All AGP cards have
this cut away)
Desktop Board
3.3 Volt
Cards
AGP 1X/2X
Registration Tab
for AGP Pro cards only
3.3 Volt
1.5 Volt
Universal 1.5 or 3.3 Volt
AGP Pro 1.5
OM12354
Figure 6. AGP Keying Mechanism
For information about Refer to
The location of the AGP connector Figure 1, page 14
The signal names of the AGP connector Table 39, page 67
AGP is a high-performance interface for graphics-intensive applications, such as 3-D applications.
While based on the PCI Local Bus Specification, Rev. 2.1, AGP is independent of the PCI bus and
is intended for exclusive use with graphical display devices. AGP overcomes certain limitations of
the PCI bus related to handling large amounts of graphics data with the following features:
• Pipelined memory read and write operations that hide memory access latency
• Demultiplexing of address and data on the bus for nearly 100 percent efficiency
For information about Refer to
The
Accelerated Graphics Port Interface Specification
26
Section 1.5, page 19
Product Description
1.8.2 USB
The following sections describe the USB port configurations implemented on the
D850MD/D850MV boards.
NOTE
✏
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that meets the
requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 12, page 54
The signal names of the back panel USB connectors Table 20, page 55
The location of the front panel USB connector Figure 17, page 70
The signal names of the front panel USB connector Table 44, page 71
The USB specifications, OHCI, and EHCI Section 1.5, page 19
1.8.2.1 USB 1.1 Support
The D850MD/D850MV boards support up to seven USB ports, as shown in Figure 7. The ICH2
provides four ports:
• Two ports implemented with stacked back panel connectors, adjacent to the PS/2 connectors
• One port accessible through a CNR add-in card
• One port routed to the SMSC USB hub
The onboard SMSC USB hub provides four ports:
• Two ports implemented with stacked back panel connectors, adjacent to the audio connectors
• Two ports routed to the front panel USB connector
For more than seven USB devices, an external hub can be connected to any of the ports.
Back panel USB connectors
adjacent to the PS/2 ports
USB port accesible through a USB
connector on an optional CNR add-in card
Back panel USB connectors
adjacent to the audio connectors
The USB 2.0 option is currently available only on the D850MV board.
The D850MV board supports USB 2.0 using the NEC µPD720100 USB 2.0 host controller, which
is a manufacturing option. The port routing is implemented as shown in Figure 8. The NEC
µPD720100 controller is connected through the PCI bus and provides support for up to five USB
ports:
• Two ports implemented with stacked back panel connectors, adjacent to the audio connectors
• Two ports routed to the front panel USB connector
• One port accessible through a CNR add-in card
For more than five USB devices, an external hub can be connected to any of the ports. D850MV
boards with the USB 2.0 option fully support OHCI and EHCI and use OHCI- and
EHCI-compatible drivers.
✏ NOTE
The USB 2.0 option requires an operating system that officially supports USB 2.0. USB 2.0
support has been tested with Windows 2000 and Windows XP drivers and is not currently
supported by any other operating system.
PCI
NEC µPD720100
USB 2.0
Host Co ntroller
Figure 8. USB 2.0 Port Configuration (Optional)
USB
USB ports (2)
CNR connector
USB ports (2)Front panel USB connectors
Back panel USB connectors
adjacent to the audio connectors
USB port accesible through a USB
connector on an optional CNR add-in card
OM12337
28
1.8.3 IDE Support
1.8.3.1 IDE Interfaces
The ICH2’s IDE controller has two independent bus-mastering IDE interfaces that can be
independently enabled. The IDE interfaces support the modes listed in Table 7.
Table 7. Supported IDE Modes
Mode Description Supported Transfer Rates
Programmed I/O
(PIO)
8237-style DMA DMA offloads the processor Up to 16 MB/sec
Ultra DMA • DMA protocol on the IDE bus
ATA-66 • DMA protocol on the IDE bus
ATA-100 • DMA protocol on the IDE bus
Processor controls data transfer
• Supports host and target throttling
• Allows host and target throttling
• Similar to Ultra DMA
• Device driver compatible
• Allows host and target throttling
Up to 33 MB/sec
Up to 66 MB/sec
• Read transfer rates up to 100 MB/sec
• Write transfer rates up to 88 MB/sec
Product Description
✏ NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections,
noise, and inductive coupling.
The IDE interfaces also support ATAPI devices (such as CD-ROM drives) and ATA devices using
the transfer modes listed in Section 4.4.4.1 on page 105.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The D850MD and D850MV boards support Laser Servo (LS-120) diskette technology through the
IDE interfaces. An LS-120 drive can be configured as a boot device in the BIOS Setup program.
For information about Refer to
The location of the IDE connectors Figure 15, page 63
The signal names of the IDE connectors Table 41, page 69
The Boot menu in the BIOS Setup program Section 4.7, page 113
The SCSI hard drive activity LED connector is a 1 x 2–pin connector that allows an add-in
SCSI controller to use the same LED as the onboard IDE controller. For proper operation, this
connector should be wired to the LED output of the add-in SCSI controller. The LED indicates
when data is being read from, or written to, both the add-in SCSI controller and the IDE controller.
For information about Refer to
The location of the SCSI hard drive activity LED connector Figure 17, page 70
The signal names of the SCSI hard drive activity LED connector Table 42, page 69
1.8.4 Real-Time Clock, CMOS SRAM, and Battery
The real-time clock provides a time-of-day clock and a multicentury calendar with alarm features.
The real-time clock supports 256 bytes of battery-backed CMOS SRAM in two banks that are
reserved for BIOS use.
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to ±13 minutes/year at 25 ºC with 3.3 VSB applied.
The time, date, and CMOS values can be specified in the BIOS Setup program. The CMOS values
can be returned to their defaults by using the BIOS Setup program.
✏ NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
For information about Refer to
Proper date access in systems with D850MD and D850MV boards Section 1.3, page 18
1.8.5 Intel 82802AB 4 Mbit FWH
The FWH provides the following:
• System BIOS program
• System security and manageability logic that enable protection for storing and updating of
platform information
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