The Intel® Desktop Boards D850MD/D850MV may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel Desktop Board D850MD/D850MV Specification Update.
August 2001
Order Number: A65145-001
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board D850MD/D850MV Technical
Product Specification.
This product specification applies to only standard D850MD and D850MV boards with BIOS
identifier MV85010A.86A.
Changes to this specification will be published in the Intel Desktop Board D850MD/D850MV
Specification Update before being incorporated into a revision of this document.
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL
PROVIDED IN INTEL’S TERM S AND CONDITIONS OF SALE F OR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY
WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE
OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANT I ES RELATING TO FITN ESS FOR A PARTICULAR
PURPOSE, MERCHANT ABILITY, OR INFRI NGE M ENT OF ANY PATENT, COP YRIGHT, OR OTHER INTELLE CT UA L
PROPERTY RIGHT.
Intel Corporation may have patents or pending patent applications , trademarks, copyright s, or other intellectual propert y
rights that relate to t he pres ented subject matter. The f urni shing of documents and other materi al s and information does
not provide any license, express or implied, by estoppel or otherwise, to any suc h patents, trademarks, copyrights, or other
intellectual property rights.
Intel products are not int ended f or use in medical, life saving, or life sustaini ng appl i c ations or for any other applicati on i n
which the failure of the Intel product could create a situation where personal injury or death may occur.
Intel may make changes t o specifications, produc t descriptions, and plans at any time, without noti ce.
The Intel
the product to deviate from publ i shed specifications. Current characterized errata are avai l abl e on request.
Contact your local Int el sales office or your distributor to obtain the latest specifications before placing your product order.
Copies of documents whic h hav e an orderi ng number and are referenced in this document, or other Intel literature, m ay be
obtained from:
Intel Corporation
P.O. Box 5937
Denver, CO 80217-9808
or call in North America 1-800-548-4725, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany 44-0-1793-421-333, other Countries 708-296-9333.
Intel and Pentium are regist ered trademarks of Intel Corporation or i t s subsidiaries in the Unit ed S tates and other countries.
†
Copyright 2001, Intel Corporation. All rights reserved.
®
Desktop Boards D850MD and D850MV may contain design defects or errors known as errata which may cause
Other names and brands may be claim ed as the property of others.
®
PRODUCTS. EXCEPT AS
August 2001
Preface
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
®
power and environmental requirements, and the BIOS for these Intel
and D850MV. It describes the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the D850MD and D850MV
boards and their components to the vendors, system integrators, and other engineers and
technicians who need this level of information. It is specifically not intended for general
audiences.
What This Document Contains
Desktop Boards: D850MD
Chapter Description
1 A description of the hardware used on the D850MD and D850MV boards
2 A map of the resources of the boards
3 The features supported by the BIOS Setup program
4 The contents of the BIOS Setup program’s menus and submenus
5 A description of the BIOS error messages, beep codes, POST codes, and diagnostic
LEDs
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
✏
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
# Used after a signal name to identify an active-low signal (such as USB#)
(NxnX) When used in the description of a component, N indicates the component type, xn are the
relative coordinates of its location on the D850MD and D850MV boards, and X is the instance
of the particular part at that general location. For example, J5J1 is a connector, located at 5J.
It is the first connector in the 5J area.
GB Gigabyte (1,073,741,824 bytes)
GB/sec Gigabytes per second
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbit/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
†
This symbol is used to indicate other names and brands may be claimed as the property of
1.14 Power Management ...................................................................................................38
1.1 Board Differences
This TPS describes these Intel® desktop boards: D850MD and D850MV. The boards are identical
except for the differences listed in Table 1 below.
Table 1. Summary of Board Differences
D850MD
D850MV
NOTE
✏
All illustrations show the D850MD board unless there are significant differences between the two
boards. Any significant differences are indicated in each figure.
• microATX form factor (9.60 inches by 9.60 inches)
Table 2 summarizes the D850MD and D850MV boards’ major features.
Table 2. Feature Summary
Form Factor
Processor
Memory
Chipset
I/O Control
Video
Peripheral
Interfaces
Expansion
Capabilities
BIOS
Instantly Available
PC
LAN Wake
Capabilities
D850MD: microATX (9.60 inches by 9.60 inches)
D850MV: ATX (12.00 inches by 9.60 inches)
• Support for an Intel
• 400 MHz system data bus
• Two Direct-RDRAM channels with two RIMM
• Support for up to 2 GB of system memory using PC600 or PC800 RDRAM
Intel® 850 Chipset, consisting of:
®
• Intel
• Intel
• Intel
SMSC LPC47M142 LPC bus I/O controller
• AGP connector supporting 1.5 V 4X AGP cards only
• Up to seven Universal Serial Bus (USB) ports
• Two serial ports
• One parallel port
• Two IDE interfaces with Ultra DMA 33 and ATA-66/100 support
• One diskette drive interface
• PS/2
• D850MD: Three PCI bus add-in card connectors (SMBus routed to PCI bus
• D850MV: Five PCI bus add-in card connectors (SMBus routed to PCI bus
• Intel/AMI BIOS (resident in the Intel 82802AB 4 Mbit FWH)
• Support for Advanced Power Management (APM), Advanced Configuration and
• Support for
• Suspend to RAM support
• Wake on PCI, CNR, RS-232, front panel, PS/2 keyboard, and USB ports
Support for system wake-up using an add-in network interface card with remote
wake-up capability via the PME# signal
82850 Memory Controller Hub (MCH)
®
82801BA I/O Controller Hub (ICH2)
®
82802AB 4 Mbit Firmware Hub (FWH)
†
keyboard and mouse ports
connector 2)
connector 2)
Power Interface (ACPI), Plug and Play, and System Management BIOS
(SMBIOS)
®
Pentium® 4 processor
PCI Local Bus Specification Revision 2.2
†
s per channel (four RIMM sockets)
continued
12
Table 2. Feature Summary (continued)
Hardware Monitor
Subsystem
Hardware
Monitoring Features
Audio (Integrated)
• Voltage sense to detect out-of-range power supply voltages
• Thermal sense to detect out-of-range thermal values
• Fan control and monitoring
Two fan sense inputs used to monitor fan activity
Audio subsystem that use s the Analo g Devices AD1885 analog codec for AC ’97
processing
For information about Refer to
The board’s compliance level with APM, ACPI, Plug and Play, and SMBIOS. Section 1.5, page 19
1.2.2 Manufacturing Options
Table 3 describes the D850MD and D850MV boards’ manufacturing options. Not every
manufacturing option is available in all marketing channels. Please contact your Intel
representative to determine which manufacturing options are available to you.
Product Description
Table 3. Manufacturing Options
✏
Video
LAN
CNR
USB 2.0
NOTE
AGP Pro50 interface (50 W maximum); backward compatible with 1.5 V AGP
video cards.
This option uses an AGP Pro 1.5 V connector, also known as an AGP Pro50
connector.
®
Intel
82562ET 10/100 Mbit/sec Platform LAN Connect (PLC) device
One Communication and Networking Riser (CNR) connector (slot shared with
PCI bus connector 3 on the D850MD board and with PCI bus connector 5 on the
D850MV board)
Support for USB 2.0 devices. The USB 2.0 option supports up to five USB ports
and is currently available only on the D850MV board. It uses the following
components:
• NEC
• SMSC LPC47M132 LPC bus I/O controller
The USB 1.1 ports routed through the ICH2 are not available with the USB 2.0
option.
µPD720100 USB 2.0 host controller
The LAN and the CNR manufacturing options are mutually exclusive.
Figure 1 shows the location of the major components on the D850MD board.
A
C
B
D
V
U
T
S
R
Q
NO
KPL
M
A AD1885 audio codec L Diskette drive connector
B Intel 82562ET PLC device (optional) M IDE connectors
C AGP connector
(AGP Pro50 connector optional)
D Back panel connectors (SMSC LPC47M132 I/O controller optional)
E +12 V power connector (ATX12V) P Front panel connector
F Intel 82850 MCH Q Battery
G mPGA478 processor socket R Speaker
H Hardware monitor S Intel 82802AB 4 Mbit FWH
I RAMBUS
J RAMBUS Bank 1 (RIMM3 and RIMM4) U PCI bus add-in card connectors
K Power connector V CNR connector (optional)
†
Bank 0 (RIMM1 and RIMM2) T Intel 82801BA ICH2
N O Auxiliary power connector (optional)
SMSC LPC47M142 I/O controller
OM12320
E
F
G
H
I
J
14
Figure 1. D850MD Board Components
Figure 2 shows the location of the major components on the D850MV board.
Product Description
A
C
B
D
W
V
U
T
S
R
Q
NO
M
A AD1885 audio codec M IDE connectors
B Intel 82562ET PLC device (optional) N Auxiliary power connector (optional)
C AGP connector
(AGP Pro50 connector optional)
D Back panel connectors P Front panel connector
E +12 V power connector (ATX12V) Q Battery
F Intel 82850 MCH R Speaker
G mPGA478 processor socket S Intel 82802AB 4 Mbit FWH
H Hardware monitor T Intel 82801BA ICH2
I RAMBUS Bank 0 (RIMM1 and RIMM2) U NEC
J RAMBUS Bank 1 (RIMM3 and RIMM4) V PCI bus add-in card connectors
K Power connector W CNR connector (optional)
L Diskette drive connector
Figure 3 is a block diagram of the major functional areas of the standard D850MD and D850MV
boards. See Figure 7 on page 27 for USB port routing.
Diskette Drive
Connector
Serial Ports
Parallel Port
PS/2 Mouse
PS/2 Keyboard
Back Panel
USB Ports (2)
LPC
Bus
Primary/
Secondary IDE
mPGA478
Processor Socket
System Bus
(400 MHz)
I/O
Controller
ATA-66/100
USB
USB
850 Chipset
Front Panel
USB Ports (2)
4X AGP
Connector
(1.5 V only)
or
AGP Pro50
Connector
(optional)
Hardware
Monitor
AGP
Interface
PCI Slot 1
PCI Slot 2
PCI Slot 3
82850 Memory
Controller Hub
Dual RAMBUS
Channels
RAMBUS Bank 0
(RIMM1 and RIMM2)
(RIMM3 and RIMM4)
SMBus
PCI Slot 4
PCI Slot 5
(MCH)
RAMBUS Bank 1
PCI
D850MV
Only
AHA
Bus
82801BA
I/O Controller Hub
(ICH2)
CSMA/CD
Unit
Interface
Audio Codec
USB
Physical
Interface
AC Link
AD1885
Layer
82802AB 4 Mbit
Firmware Hub
(FWH)
LAN
Connector
(optional)
CNR
Connector
(optional)
Line In
Line Out
Mic In
Auxiliary Line In
CD-ROM
Back Panel
USB Ports (2)
= connector or socket
16
Figure 3. Standard Block Diagram
OM12394
Product Description
Figure 4 is a block diagram of the major functional areas of D850MD and D850MV boards with
the USB 2.0 manufacturing option. See Figure 8 on page 28 for USB port routing.
Primary/
Secondary IDE
mPGA478
Processor Socket
AGP
Interface
4X AGP
Connector
(1.5 V only)
or
AGP Pro50
Connector
(optional)
Hardware
Monitor
PCI Slot 1
PCI Slot 2
PCI Slot 3
PCI Slot 4
PCI Slot 5
ATA-66/100
System Bus
(400 MHz)
82850 Memory
Controller Hub
(MCH)
Dual RAMBUS
Channels
RAMBUS Bank 0
(RIMM1 and RIMM2)
RAMBUS Bank 1
(RIMM3 and RIMM4)
SMBus
PCI
D850MV
Only
850 Chipset
AHA
Bus
USB
82801BA
I/O Controller Hub
(ICH2)
CSMA/CD
Unit
Interface
AD1885
Audio Codec
NEC µPD720100
USB 2.0
Host Controller
(optional)
Physical
Interface
AC Link
USB
I/O
Controller
LPC
Bus
Layer
Diskette Drive
Connector
Serial Ports
Parallel Port
PS/2 Mouse
PS/2 Keyboard
82802AB 4 Mbit
Firmware Hub
(FWH)
LAN
Connector
(optional)
CNR
Connector
(optional)
Line In
Line Out
Mic In
Auxiliary Line In
CD-ROM
Back Panel
USB Ports (2)
Front Panel
USB Ports (2)
= connector or socket
Figure 4. Block Diagram with Optional USB 2.0 Support
To find information about… Visit this World Wide Web site:
Intel’s D850MD and D850MV boards http://www.intel.com/design/motherbd
http://support.intel.com/support/motherboards/desktop
Processor data sheets http://www.intel.com/design/litcentr
ICH2 addressing http://developer.intel.com/design/chipsets/datashts
Custom splash screens http://intel.com/design/motherbd/gen_indx.htm
Audio software and utilities http://www.intel.com/design/motherbd
LAN software and drivers http://www.intel.com/design/motherbd
1.4 Operating System Support
The D850MD and D850MV boards support drivers for all of the onboard hardware and subsystems
under the following operating systems:
†
• Windows
• Windows Me
• Windows NT
• Windows 2000
• Windows XP
For information about Refer to
Supported drivers Section 1.3, page 18
98/98 SE
†
4.0
NOTE
✏
Other drivers may be offered by other third-party vendors.
✏ NOTE
The USB 2.0 option requires an operating system that officially supports USB 2.0. USB 2.0
support has been tested with Windows 2000 and Windows XP drivers and is not currently
supported by any other operating system.
18
1.5 Design Specifications
Table 4 lists the specifications applicable to the D850MD and D850MV boards.
Table 4. Specifications
Reference
Name
AC ’97
ACPI
AGP
AMI BIOS
APM
ATA/
ATAPI-5
ATX
ATX12V
BIS Boot Integrity
CNR
EHCI
Specification
Title
Audio Codec ’97
Advanced
Configuration and
Power Interface
Specification
Accelerated Graphics
Port Interface
Specification
American Megatrends
BIOS Specification
Advanced Power
Management BIOS
Interface
Specification
Information
Technology - AT
Attachment with
Packet Interface - 5,
(ATA/ATAPI-5)
ATX Specification
ATX / ATX12V Power
Supply Design Guide
Services
Communication and
Network Riser (CNR)
Specification
Enhanced Host
Controller Interface
Specification for
Universal Serial Bus
Version, Revision Date,
and Ownership
Version 2.1,
May 1998,
Intel Corporation.
Version 2.0,
July 27, 2000,
Compaq Computer Corp.,
Intel Corporation,
Microsoft Corporation,
and Toshiba Corporation.
Version 2.0,
May 4, 1998,
Intel Corporation.
AMIBIOS 99,
1999,
American Megatrends, Inc.
Version 1.2,
February 1996,
Intel Corporation and
Microsoft Corporation.
Revision 3,
February 29, 2000,
Contact: T13 Chair,
Seagate Technology.
Version 2.03,
December 1998,
Intel Corporation.
Version 1.1,
August 2000,
Intel Corporation.
Version 1.0 for WfM 2.0,
August 1999,
Intel Corporation.
Version 2.3.1,
March 16, 1999,
American Megatrends Inc.,
Award Software International Inc.,
Compaq Computer Corporation,
Dell Computer Corporation,
Hewlett-Packard Company,
Intel Corporation,
International Business Machines
Corporation,
Phoenix Technologies Limited,
and SystemSoft Corporation.
Version 1.1,
March 1996,
Intel Corporation.
Version 1.1,
September 23, 1998,
Compaq Computer Corporation,
Intel Corporation,
Microsoft Corporation, and
NEC Corporation.
Version 2.0,
April 27, 2000,
Compaq Computer Corporation,
Hewlett-Packard Company,
Lucent Technologies Inc.,
Intel Corporation,
Microsoft Corporation,
NEC Corporation, and
Koninklijke Philips Electronics N.V.
Version 2.0,
December 18, 1998,
Intel Corporation.
Use only the processors listed below. Use of unsupported processors can damage the board, the
®
processor, and the power supply. See the Intel
Update for the most up-to-date list of supported processors for these boards.
The D850MD and D850MV boards support a single Pentium 4 processor (in a 478-pin socket)
with a system bus of 400 MHz. The D850MD and D850MV boards support the processors listed
in Table 5. All supported onboard memory can be cached, up to the cachability limit of the
processor. See the processor’s data sheet for cachability limits.
Table 5. Supported Processors
Type Designation System Bus L2 Cache Size
Pentium 4 processor Up to 2.0 GHz 400 MHz 256 KB
CAUTION
Use only an ATX12V-compliant power supply with the D850MD and D850MV boards. ATX12V
power supplies have two power leads that provide required supplemental power for the Intel
Pentium
ATX12V power supply to the corresponding connectors on the D850MD and D850MV boards.
Otherwise, the board and the processor could be damaged.
4
processor and the Intel 850 chipset. Always connect the 20-pin and 4-pin leads of the
Desktop Board D850MD/D850MV Specification
Do not use a standard ATX power supply. Doing so could damage the board and the processor.
For information about Refer to
Processor support Section 1.3, page 18
Processor usage Section 1.3, page 18
Power supply connectors Section 2.8.2.3, page 60
22
Product Description
1.7 System Memory
CAUTION
Turn off the power and unplug the power cord before installing or removing RIMM modules.
Failure to do so could damage the memory and the board. (After AC power is removed, the
standby power indicator LED should not be lit. See Figure 11 on page 45 for the location of the
standby power indicator LED.)
NOTE
✏
The board supports combinations of no more than 32 RDRAM components per RDRAM bank. If
the total number of RDRAM components installed in all RIMM sockets exceeds 64, the computer
will not boot.
1.7.1 Memory Features
The 82850 MCH integrates two lock-stepped Direct Rambus banks, providing a processor-tomemory bandwidth up to 3.2 GB/sec. The D850MD and D850MV boards have four RIMM
sockets (two sockets for each bank) and support the following memory features:
• Single- or double-sided RIMM configurations
• Maximum of 32 Direct Rambus devices per bank
• Memory configurations from 128 MB (minimum) to 2 GB (maximum), using 128 Mbit or
256 Mbit technology PC600- or PC800-compliant RDRAM
• Serial Presence Detect (SPD)–based configuration for optimal memory operation
• Suspend to RAM support
• ECC and non-ECC support
NOTE
✏
PC700 memory can be installed on D850MD and D850MV boards but defaults to PC600-level
performance.
1.7.2 Continuity RIMM Modules
All RIMM sockets must be populated to achieve continuity for termination at the Rambus
interface. Continuity RIMMs (or “pass-through” modules) must be installed in the second
RDRAM bank if memory is not installed. If any of the RIMM sockets are not populated, the
computer will not complete the Power-On Self-Test (POST) and the BIOS beep codes will not be
heard.
• The four RIMM sockets are grouped into two banks:
Bank 0 (labeled on the board as RIMM1 and RIMM2)
Bank 1 (labeled on the board as RIMM3 and RIMM4)
• Bank 0 must be populated first, ensuring that the RDRAM installed in RIMM1 and RIMM2 is
identical in speed, size, and density. For example, the minimum system configuration would
use two 64 MB RIMM modules of PC600 or PC800 RDRAM.
• If the desired memory configuration has been achieved by populating Bank 0, then Bank 1
should be filled with two Continuity RIMMs.
• If memory is to be installed in Bank 1, the RIMM modules installed in RIMM3 and RIMM4
must be identical in size and density to each other and match the speed of the RIMM modules
in Bank 0. The RIMM modules do not, however, need to match those in Bank 0 in size and
density. For example, if Bank 0 has two 128 MB RIMMs of PC800 RDRAM, Bank 1 would
require PC800 RDRAM also; however, any other supported RIMM modules such as 64 MB or
192 MB could be used.
• If ECC functionality is required, all installed RIMM modules must be ECC compliant.
Table 6 gives examples of RDRAM component density for various RIMM modules. Component
density (counts) can be identified on the RIMM label.
The Intel 850 chipset consists of the following devices:
• Intel 82850 MCH with Accelerated Hub Architecture (AHA) bus
• Intel 82801BA ICH2 with AHA bus
• Intel 82802AB FWH
The MCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the
AHA interface. The ICH2 is a centralized controller for the board’s I/O paths. The FWH provides
the nonvolatile storage of the BIOS. The component combination provides the chipset interfaces
as shown in Figure 5.
ATA-66/100
System Bus
Network
USB
850 Chipset
82850
Memory Controller
Hub (MCH)
Dual RAMBUS
Channels
AHA
Bus
AGP
Interface
82801BA
I/O Controller Hub
(ICH2)
82802AB 4 Mbit
Firmware Hub
(FWH)
LPC Bus
AC LinkPCI BusSMBus
Figure 5. Intel 850 Chipset Block Diagram
NOTE
✏
The USB bus is routed from the NEC USB 2.0 controller if the USB 2.0 option is supported.
The AGP connector is keyed for 1.5 V AGP cards only. Do not attempt to install a legacy 3.3 V
AGP card. The AGP connector is not mechanically compatible with legacy 3.3 V AGP cards. See
Figure 6 for more information on the AGP keying mechanism.
The AGP connector supports AGP add-in cards with 1.5 V Switching Voltage Level (SVL). An
AGP Pro50 interface is available (for a 50 W maximum power draw) as a manufacturing option.
Legacy 3.3 V AGP cards are not supported and will prevent the system from booting if installed.
AGP 1X/2X or 4X or AGP Pro Card
VGA
Connector
1.5 Volt
Cards
AGP 2X/4X
Universal
Connector Key
(All AGP cards have
this cut away)
Desktop Board
3.3 Volt
Cards
AGP 1X/2X
Registration Tab
for AGP Pro cards only
3.3 Volt
1.5 Volt
Universal 1.5 or 3.3 Volt
AGP Pro 1.5
OM12354
Figure 6. AGP Keying Mechanism
For information about Refer to
The location of the AGP connector Figure 1, page 14
The signal names of the AGP connector Table 39, page 67
AGP is a high-performance interface for graphics-intensive applications, such as 3-D applications.
While based on the PCI Local Bus Specification, Rev. 2.1, AGP is independent of the PCI bus and
is intended for exclusive use with graphical display devices. AGP overcomes certain limitations of
the PCI bus related to handling large amounts of graphics data with the following features:
• Pipelined memory read and write operations that hide memory access latency
• Demultiplexing of address and data on the bus for nearly 100 percent efficiency
For information about Refer to
The
Accelerated Graphics Port Interface Specification
26
Section 1.5, page 19
Product Description
1.8.2 USB
The following sections describe the USB port configurations implemented on the
D850MD/D850MV boards.
NOTE
✏
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that meets the
requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 12, page 54
The signal names of the back panel USB connectors Table 20, page 55
The location of the front panel USB connector Figure 17, page 70
The signal names of the front panel USB connector Table 44, page 71
The USB specifications, OHCI, and EHCI Section 1.5, page 19
1.8.2.1 USB 1.1 Support
The D850MD/D850MV boards support up to seven USB ports, as shown in Figure 7. The ICH2
provides four ports:
• Two ports implemented with stacked back panel connectors, adjacent to the PS/2 connectors
• One port accessible through a CNR add-in card
• One port routed to the SMSC USB hub
The onboard SMSC USB hub provides four ports:
• Two ports implemented with stacked back panel connectors, adjacent to the audio connectors
• Two ports routed to the front panel USB connector
For more than seven USB devices, an external hub can be connected to any of the ports.
Back panel USB connectors
adjacent to the PS/2 ports
USB port accesible through a USB
connector on an optional CNR add-in card
Back panel USB connectors
adjacent to the audio connectors
The USB 2.0 option is currently available only on the D850MV board.
The D850MV board supports USB 2.0 using the NEC µPD720100 USB 2.0 host controller, which
is a manufacturing option. The port routing is implemented as shown in Figure 8. The NEC
µPD720100 controller is connected through the PCI bus and provides support for up to five USB
ports:
• Two ports implemented with stacked back panel connectors, adjacent to the audio connectors
• Two ports routed to the front panel USB connector
• One port accessible through a CNR add-in card
For more than five USB devices, an external hub can be connected to any of the ports. D850MV
boards with the USB 2.0 option fully support OHCI and EHCI and use OHCI- and
EHCI-compatible drivers.
✏ NOTE
The USB 2.0 option requires an operating system that officially supports USB 2.0. USB 2.0
support has been tested with Windows 2000 and Windows XP drivers and is not currently
supported by any other operating system.
PCI
NEC µPD720100
USB 2.0
Host Co ntroller
Figure 8. USB 2.0 Port Configuration (Optional)
USB
USB ports (2)
CNR connector
USB ports (2)Front panel USB connectors
Back panel USB connectors
adjacent to the audio connectors
USB port accesible through a USB
connector on an optional CNR add-in card
OM12337
28
1.8.3 IDE Support
1.8.3.1 IDE Interfaces
The ICH2’s IDE controller has two independent bus-mastering IDE interfaces that can be
independently enabled. The IDE interfaces support the modes listed in Table 7.
Table 7. Supported IDE Modes
Mode Description Supported Transfer Rates
Programmed I/O
(PIO)
8237-style DMA DMA offloads the processor Up to 16 MB/sec
Ultra DMA • DMA protocol on the IDE bus
ATA-66 • DMA protocol on the IDE bus
ATA-100 • DMA protocol on the IDE bus
Processor controls data transfer
• Supports host and target throttling
• Allows host and target throttling
• Similar to Ultra DMA
• Device driver compatible
• Allows host and target throttling
Up to 33 MB/sec
Up to 66 MB/sec
• Read transfer rates up to 100 MB/sec
• Write transfer rates up to 88 MB/sec
Product Description
✏ NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections,
noise, and inductive coupling.
The IDE interfaces also support ATAPI devices (such as CD-ROM drives) and ATA devices using
the transfer modes listed in Section 4.4.4.1 on page 105.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The D850MD and D850MV boards support Laser Servo (LS-120) diskette technology through the
IDE interfaces. An LS-120 drive can be configured as a boot device in the BIOS Setup program.
For information about Refer to
The location of the IDE connectors Figure 15, page 63
The signal names of the IDE connectors Table 41, page 69
The Boot menu in the BIOS Setup program Section 4.7, page 113
The SCSI hard drive activity LED connector is a 1 x 2–pin connector that allows an add-in
SCSI controller to use the same LED as the onboard IDE controller. For proper operation, this
connector should be wired to the LED output of the add-in SCSI controller. The LED indicates
when data is being read from, or written to, both the add-in SCSI controller and the IDE controller.
For information about Refer to
The location of the SCSI hard drive activity LED connector Figure 17, page 70
The signal names of the SCSI hard drive activity LED connector Table 42, page 69
1.8.4 Real-Time Clock, CMOS SRAM, and Battery
The real-time clock provides a time-of-day clock and a multicentury calendar with alarm features.
The real-time clock supports 256 bytes of battery-backed CMOS SRAM in two banks that are
reserved for BIOS use.
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to ±13 minutes/year at 25 ºC with 3.3 VSB applied.
The time, date, and CMOS values can be specified in the BIOS Setup program. The CMOS values
can be returned to their defaults by using the BIOS Setup program.
✏ NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
For information about Refer to
Proper date access in systems with D850MD and D850MV boards Section 1.3, page 18
1.8.5 Intel 82802AB 4 Mbit FWH
The FWH provides the following:
• System BIOS program
• System security and manageability logic that enable protection for storing and updating of
platform information
30
Product Description
1.9 I/O Controller
The SMSC LPC47M142 I/O controller provides the following features:
• 3.3 V operation
• Two serial ports
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
• Serial IRQ interface compatible with serialized IRQ support for PCI systems
• PS/2-style mouse and keyboard interfaces
• Interface for one 1.2 MB or 1.44 MB diskette drive
• Intelligent power management, including a programmable wake-up event interface
• PCI power management support
• Two fan tachometer inputs
• USB hub
The BIOS Setup program provides configuration options for the I/O controller.
NOTE
✏
The SMSC LPC47M132 I/O controller is used if the USB 2.0 option is supported. The SMSC
LPC47M132 I/O controller supports all the features of the LPC47M142 controller, except the
LPC47M132 does not have a USB hub.
For information about Refer to
SMSC LPC47M142 and LPC47M132 I/O controllers http://www.smsc.com
1.9.1 Serial Port
The D850MD and D850MV boards have two serial port connectors on the back panel. The serial
ports’ NS16C550-compatible UART supports data transfers at speeds up to 115.2 kbits/sec with
BIOS support. The serial ports can be assigned as COM1 (3F8h), COM2 (2F8h), COM3 (3E8h),
or COM4 (2E8h).
For information about Refer to
The location of the serial port connectors Figure 12, page 54
The signal names of the serial port connectors Table 22, page 56
The 25-pin D-Sub parallel port connector is located on the back panel. In the BIOS Setup
program, the parallel port can be set to the following modes:
†
• Output only (PC-AT
–compatible mode)
• Bidirectional (PS/2 compatible)
• EPP
• ECP
For information about Refer to
The location of the parallel port connector Figure 12, page 54
The signal names of the parallel port connector Table 21, page 55
Setting the parallel port’s mode Section 4.4.3, page 102
1.9.3 Diskette Drive Controller
The I/O controller supports one diskette drive that is compatible with the 82077 diskette drive
controller and supports both PC-AT and PS/2 modes.
For information about Refer to
The location of the diskette drive connector Section 2.8.2.4, page 63
The signal names of the diskette drive connector Table 40, page 68
The supported diskette drive capacities and sizes Table 70, page 107
1.9.4 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel. The +5 V lines to these
†
connectors are protected with a PolySwitch
connection after an overcurrent condition is removed.
NOTE
✏
The keyboard is supported in the bottom PS/2 connector and the mouse is supported in the top
PS/2 connector. Power to the computer should be turned off before a keyboard or mouse is
connected or disconnected.
The keyboard controller has the following functions:
• Contains the AMI keyboard and mouse controller code.
• Provides the keyboard and mouse control functions.
• Supports password protection for power-on/reset. A power-on/reset password can be specified
in the BIOS Setup program.
For information about Refer to
The location of the keyboard and mouse connectors Figure 12, page 54
The signal names of the keyboard and mouse connectors Table 19, page 55
circuit that, like a self-healing fuse, reestablishes the
32
1.10 Audio Subsystem
The audio subsystem includes these features:
• Split digital/analog architecture for improved signal-to-noise (S/N) ratio: ≥ 85 dB
• Power management support for APM 1.2 and ACPI 1.0 (driver dependant)
• 3-D stereo enhancement
The audio subsystem supports the following audio interfaces:
• ATAPI-style connectors:
CD-ROM
Auxiliary line in
• Back panel audio connectors:
Line out
Line in
Mic in
The audio subsystem consists of the following devices:
• Intel 82801BA ICH2
• Analog Devices AD1885 analog codec
Product Description
Figure 9 is a block diagram of the audio subsystem.
82801BA
I/O Controller Hub
(ICH2)
Figure 9. Audio Subsystem Block Diagram
For information about Refer to
The location and signal names of the back panel audio connectors Section 2.8.1, page 54
A 1 x 4–pin ATAPI-style connector connects the left and right channel signals of an internal audio
device to the audio subsystem.
For information about Refer to
The location of the auxiliary line in connector Figure 13, page 58
The signal names of the auxiliary line in connector Table 27, page 59
1.10.1.2 ATAPI CD-ROM Audio Connector
A 1 x 4–pin ATAPI-style connector connects an internal ATAPI CD-ROM drive to the audio
mixer.
For information about Refer to
The location of the ATAPI CD-ROM connector Figure 13, page 58
The signal names of the ATAPI CD-ROM connector Table 28, page 59
1.10.2 Audio Subsystem Software
Audio software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining audio software and drivers Section 1.3, page 18
34
Product Description
1.11 LAN Subsystem (Optional)
The Network Interface Controller subsystem consists of the ICH2 (with integrated LAN Media
Access Controller) and a physical layer interface device. The LAN subsystem includes the
following features:
• PCI Bus Master interface
• CSMA/CD Protocol Engine
• Serial CSMA/CD unit interface that supports the following physical layer interface devices:
82562ET onboard LAN
82562ET/EM (10/100 Mbit/sec Ethernet) on CNR bus
†
82562EH (1 Mbit/sec HomePNA
• PCI Power Management
Supports ACPI technology
Supports wake-up from a suspend state using the PME# signal
1.11.1 Intel® 82562ET PLC Device
) on CNR bus
The Intel 82562ET component provides an interface to the back panel RJ-45 connector with
integrated LEDs. This physical interface may alternately be provided through the CNR connector.
The Intel 82562ET provides the following functions:
• Basic 10/100 Ethernet LAN connectivity
• RJ-45 connector support with status indicator LEDs on the back panel
• Full device driver compatibility
• ACPI support
• Programmable transit threshold
• Configuration EEPROM that contains the MAC address
1.11.2 RJ-45 LAN Connector with Integrated LEDs
Two LEDs are built into the RJ-45 LAN connector. Table 8 describes the LED states when the
board is powered up and the LAN subsystem is operating.
Table 8. LAN Connector LED States
LED Color LED State Condition
Off 10 Mbit/sec data rate is selected. Green
On 100 Mbit/sec data rate is selected.
Yellow
Off LAN link is not established.
On (steady state) LAN link is established.
On (brighter and pulsing) The computer is communicating with another computer on
LAN software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining LAN software and drivers Section 1.3, page 18
1.12 CNR (Optional)
The CNR connector provides an interface that supports the audio, modem, USB, and LAN
interfaces of the Intel 850 chipset. Figure 10 shows the signal interface between the riser and the
ICH2.
✏
NOTE
Intel 82801BA
I/O Controller Hub
(ICH2)
Figure 10. ICH2 and CNR Signal Interface
AC ’97 Interface
LAN Interface
SMBus
USB
Communicat i on and
Networking Riser
(Up to two AC ’97 codecs
and one LAN device)
CNR Connector
OM12277
The USB bus is routed from the NEC USB 2.0 controller if the USB 2.0 option is supported.
The CNR supports the following interfaces:
• AC ’97 interface: supports audio and/or modem functions on the CNR board. The
D850MD/D850MV boards support six-channel audio using a CNR board.
• LAN interface: eight-pin interface for use with PLC-based devices.
• SMBus interface: provides Plug and Play functionality for the CNR board.
• USB interface: provides a USB interface for the CNR board.
The CNR connector includes power signals required for power management and for CNR board
operation. To learn more about the CNR, refer to the CNR specification.
NOTE
✏
If you install a CNR card with an audio codec that cannot support a multichannel audio upgrade,
the D850MD and D850MV boards’ integrated audio codec will be disabled. This only applies to
D850MD and D850MV boards that have both the onboard audio subsystem and a CNR.
For information about Refer to
The CNR specification Section 1.5, page 19
36
Product Description
1.13 Hardware Management Subsystem
The hardware management features enable the boards to be compatible with the Wired for
Management (WfM) specification. The board has several hardware management features,
including the following:
• Fan control and monitoring
• Thermal and voltage monitoring
For information about Refer to
The WfM specification Section 1.5, page 19
1.13.1 Hardware Monitor Component
The hardware monitor component provides low-cost instrumentation capabilities. The features of
the component include:
• Internal ambient temperature sensing
• Remote thermal diode sensing for direct monitoring of processor temperature
• Power supply monitoring (+5 V, +3.3 V, +2.5 V, 3.3 VSB, and Vccp) to detect levels above or
below acceptable values
• SMBus interface
1.13.2 Fan Control and Monitoring
The I/O controller provides two fan tachometer inputs. Monitoring and control can be
implemented using third-party software.
For information about Refer to
The functions of the fan connectors Section 1.14.2.2, page 43
The location of the fan connectors Figure 14, page 60
The signal names of the fan connectors Section 2.8.2.3, page 60
Power management is implemented at several levels, including:
• Software support:
APM
ACPI
• Hardware support:
Power connector
Fan connectors
LAN wake capabilities
Instantly Available technology
Wake from USB
Wake from PS/2 keyboard
PME# wake-up support
1.14.1 Software Support
The software support for power management includes:
• APM
• ACPI
If an ACPI-aware operating system is used, the BIOS can provide ACPI support. Otherwise, it
defaults to APM support.
1.14.1.1 APM
APM makes it possible for the computer to enter an energy-saving standby mode. The standby
mode can be initiated in the following ways:
• Using the time-out period specified in the BIOS Setup program
• From the operating system, such as the Standby menu item in Windows 98
In standby mode, the D850MD and D850MV boards can reduce power consumption by spinning
†
down hard drives and reducing power to, or turning off, VESA
Power management mode can be enabled or disabled in the BIOS Setup program.
While in standby mode, the system retains the ability to respond to external interrupts and service
requests, such as incoming faxes or network messages. Any keyboard or mouse activity brings the
system out of standby mode and immediately restores power to the monitor.
The BIOS enables APM by default, but the operating system must support an APM driver for the
power management features to work. For example, Windows 98 supports the power management
features upon detecting that APM is enabled in the BIOS.
For information about Refer to
Enabling or disabling power management in the BIOS Setup program Section 4.6, page 111
The D850MD and D850MV boards’ compliance level with APM Section 1.5, page 19
DPMS-compliant monitors.
38
Product Description
1.14.1.2 ACPI
ACPI gives the operating system direct control over the power management and Plug and Play
functions of a computer. The use of ACPI with the D850MD and D850MV boards requires an
operating system that provides full ACPI support. ACPI features include:
• Plug and Play (including bus and device enumeration) and APM support (normally contained
in the BIOS).
• Power management control of individual devices, add-in boards (some add-in boards may
require an ACPI-aware driver), video displays, and hard disk drives.
• Methods for achieving less than 15-watt system operation in the power-on/standby sleeping
state.
• A soft-off feature that enables the operating system to power off the computer.
• Support for multiple wake-up events (see Table 11 on page 41).
• Support for a front panel power and sleep mode switch. Table 9 lists the system states based
on how long the power switch is pressed, depending on how ACPI is configured with an
ACPI-aware operating system.
Table 9. Effects of Pressing the Power Switch
If the system is in this state…
Off
(ACPI S5 – soft-off)
On
(ACPI S0 – working state)
On
(ACPI S0 – working state)
Sleep
(ACPI S1 – sleeping state)
Sleep
(ACPI S1 – sleeping state)
…and the power switch is
pressed for
Less than four seconds Power-on
Less than four seconds Soft-off/Standby
More than four seconds Fail-safe power-off
Less than four seconds Wake-up
More than four seconds Power-off
…the system enters this state
(ACPI S0 – working state)
(ACPI S1 – sleeping state)
(ACPI S5 – soft-off)
(ACPI S0 – working state)
(ACPI S5 – soft-off)
For information about Refer to
The D850MD and D850MV boards’ compliance level with ACPI Section 1.5, page 19
Under ACPI, the operating system directs all system and device power state transitions. The
operating system puts devices in and out of low-power states based on user preferences and
knowledge of how devices are being used by applications. Devices that are not being used can be
turned off. The operating system uses information from applications and user settings to put the
system as a whole into a low-power state.
Table 10 lists the power states supported by the D850MD and D850MV boards along with the
associated system power targets. See the ACPI specification for a complete description of the
various system and power states.
Table 10. Power States and Targeted System Power
Sleeping States
S0 – working C0 – working D0 – working state Full power > 30 W
S1 – Processor stopped C1 – stop grant D1, D2, D3 – device
S3 – Suspend to RAM.
Context saved to RAM.
S4 – Suspend to disk.
Context saved to disk.
S5 – Soft-off. Context
not saved. Cold boot is
required.
No power to the system No power D3 – no power for wake-up
Notes:
1. Total system power is dependent on the system configuration, including add-in boards and peripherals powered
by the system chassis’ power supply.
2. Dependent on the standby power consumpt i on of wake-up devices used in the system.
Processor
States
No power D3 – no power except for
No power D3 – no power except for
No power D3 – no power except for
Device States
specification specific
wake-up logic
wake-up logic
wake-up logic
logic, except when provided
by battery or external source
Targeted System
Power
5 W < power < 52.5 W
Power < 5 W
Power < 5 W
Power < 5 W
No power to t he system so
that service can be
performed.
(Note 1)
(Note 2)
(Note 2)
(Note 2)
40
Product Description
1.14.1.2.2 Wake-up Devices and Events
Table 11 lists the devices or specific events that can wake the computer from specific states.
Table 11. Wake-up Devices and Events
These devices/events can wake up the computer… …from this state
Power switch S1, S3, S4, S5
RTC alarm S1, S3, S4, S5
LAN S1, S3, S4, S5
CNR S1, S3 , S4, S5
PME# S1, S3, S4, S5
Modem (back panel serial port A) S1, S3
USB S1, S3
PS/2 keyboard S1, S3
Note: For LAN, CNR, and PME#, S5 is disabl ed by default in the BIOS Set up program. Setting this opti on to Power On
will enable a wake-up event from LAN in the S5 stat e.
(Note)
(Note)
(Note)
NOTE
✏
The use of these wake-up events from an ACPI state requires an operating system that provides full
ACPI support. In addition, software, drivers, and peripherals must fully support ACPI wake
events.
1.14.1.2.3 Plug and Play
In addition to power management, ACPI provides control information so that operating systems
can facilitate Plug and Play. ACPI is used only to configure devices that do not use other hardware
configuration standards. PCI devices, for example, are not configured by ACPI.
Ensure that the power supply provides adequate +5 V standby current if the LAN wake capabilities
and Instantly Available technology features are used. Failure to do so can damage the power
supply. The total amount of standby current required depends on the wake devices supported and
manufacturing options. Refer to Section 2.11.3 on page 80 for additional information.
The D850MD and D850MV boards provide several power management hardware features,
including:
• Power connector
• Fan connectors
• LAN wake capabilities
• Instantly Available technology
• Wake from USB
• Wake from PS/2 keyboard
• PME# wake-up support
LAN wake capabilities and Instantly Available technology require power from the +5 V standby
line. The sections discussing these features describe the incremental standby power requirements
for each.
NOTE
✏
The use of Wake from USB devices from an ACPI state requires an operating system that provides
full ACPI support.
1.14.2.1 Power Connector
When used with an ATX12V-compliant power supply that supports remote power-on/off, the
D850MD and D850MV boards can turn off the system power through software control. When the
system BIOS receives the correct command from the operating system, the BIOS turns off power
to the computer.
With soft-off enabled, if power to the computer is interrupted by a power outage or a disconnected
power cord, the computer returns to either an on or off state, based on the BIOS configuration,
when power resumes. The computer’s response can be set using the After Power Failure feature in
the BIOS Setup program’s Power menu.
For information about Refer to
The location of the power connector Figure 14, page 60
The signal names of the power connector Table 34, page 62
The Power menu in the BIOS Setup program Section 4.6, page 113
The ATX specification Section 1.5, page 19
42
Product Description
1.14.2.2 Fan Connectors
The D850MD and D850MV boards have two fan connectors with thermal control signals (fan 1
and fan 2) that are used to switch the fans on and off as determined by the thermal sensors.
The ambient temperature of a D850MD- or D850MV-based system is thermally monitored by
separate temperature sensors that control voltage to the fan 1 and fan 2 connectors. If the fans
attached to these connectors provide a tachometer signal, the sensor reports the fan speed to the
hardware monitor component.
The temperature sensors that control the fans are initialized by the BIOS at power-up to turn on
only when the sensor reaches 36
cool down to 31
o
C (87.8 oF). This prevents the fans from turning off and on when the ambient air
around the sensor fluctuates around 35–36
slowly because the fan’s duty cycle starts at 70 percent and rises to 100 percent when the sensor
reaches 46
o
C (114.8 oF).
o
C (96.8 oF). The fans switch off when their respective sensors
o
C. When the fans switch on, they may appear to rotate
Table 12 summarizes the functions of the four fan connectors.
Table 12. Fan Connector Descriptions
Processor
Feature
+12 V DC connection Yes Yes Yes Yes
Tachometer output Yes No Yes No
Controllable No Yes Yes Yes
Fan is on in the ACPI S0 or S1 states Yes Yes Yes Yes
Fan is off in the ACPI S3, S4, and S5 states Yes Yes Yes Yes
Notes:
1. This fan is present on the D850MV board onl y.
2. Fan 3 uses the same controls as fan 2. If fan 2 is switched off, fan 3 is also off.
For information about Refer to
The location of the fan connectors Figure 14, page 60
The signal names of the fan connectors Section 2.8.2.3, page 58
For LAN wake capabilities, the +5 V standby line for the power supply must be capable of
providing adequate +5 V standby current. Failure to provide adequate standby current when
implementing LAN wake capabilities can damage the power supply. Refer to Section 2.11.3 on
page 80 for additional information.
LAN wake capabilities enable remote wake-up of the computer through a network. The LAN
subsystem PCI bus network adapter monitors network traffic at the MII. Upon detecting a Magic
†
Packet
frame, the LAN subsystem asserts a wake-up signal that powers up the computer.
Depending on the LAN implementation, the D850MD and D850MV boards support LAN wake
capabilities in the following ways, which are with ACPI only:
• Through the PCI bus PME# signal for PCI 2.2–compliant LAN designs
• Through the onboard LAN subsystem
• Through a CNR-based LAN subsystem
1.14.2.4 Instantly Available Technology
CAUTION
For Instantly Available technology, the +5 V standby line for the power supply must be capable of
providing adequate +5 V standby current. Failure to provide adequate standby current when
implementing Instantly Available technology can damage the power supply. Refer to
Section 2.11.3 on page 80 for additional information.
Instantly Available technology enables the D850MD and D850MV boards to enter the ACPI S3
(Suspend to RAM) sleep state. While in the S3 sleep state, the computer will appear to be off; the
power supply fan is off, and the front panel LED is amber if dual colored or off if single colored.
When signaled by a wake-up device or event, the system quickly returns to its last known wake
state. Table 11 on page 41 lists the devices and events that can wake the computer from the S3
state.
The D850MD and D850MV boards support the PCI Bus Power Management Interface Specification. For information on the versions of this specification, see Section 1.5. Add-in
boards that also support this specification can participate in power management and can be used to
wake the computer.
The use of Instantly Available technology requires operating system support and
PCI 2.2–compliant add-in cards and drivers.
44
Product Description
The standby power indicator LED shows that power is still present at the RIMM, PCI bus, AGP,
and CNR connectors, even when the computer appears to be off. Figure 11 shows the location of
the standby power indicator LED.
CR7F1
OM12322
Figure 11. Location of the Standby Power Indicator LED
1.14.2.5 Wake from USB
USB bus activity wakes the computer from an ACPI S1 or S3 state.
NOTE
✏
Wake from USB requires the use of a USB peripheral that supports Wake from USB.
1.14.2.6 Wake from PS/2 Keyboard
PS/2 keyboard activity wakes the computer from an ACPI S1 or S3 state.
1.14.2.7 PME# Wake-up Support
When the PME# signal on the PCI bus is asserted, the computer wakes from an ACPI S1, S3, S4,
or S5 state (with BIOS support).
Sections 2.2–2.6 contain several stand-alone tables. Table 13 describes the system memory map,
Table 14 shows the I/O map, Table 15 lists the DMA channels, Table 16 defines the PCI
configuration space map, and Table 17 describes the interrupts.
2.2 Memory Map
Table 13. System Memory Map
Address Range (decimal) Address Range (hex) Size Description
1024 K - 2097152 K 100000 - 7FFFFFFF 2047 MB Extended memory
960 K - 1024 K F0000 - FFFFF 64 KB Run-time BIOS
896 K - 960 K E0000 - EFFFF 64 KB Reserved
800 K - 896 K C8000 - DFFFF 96 KB Available high DOS memory (open
to the PCI bus)
640 K - 800 K A0000 - C7FFF 160 KB Video memory and BIOS
639 K - 640 K 9FC00 - 9FFFF 1 KB Extended BIOS data (movable by
memory manager software)
512 K - 639 K 80000 - 9FBFF 127 KB Extended conventional memory
0 K - 512 K 00000 - 7FFFF 512 KB Conventional memory
0 8 or 16 bits Open
1 8 or 16 bits Parallel port
2 8 or 16 bits Diskette drive
3 8 or 16 bits Parallel port (for ECP or EPP)
4 8 or 16 bits DMA controller
5 16 bits Open
6 16 bits Open
7 16 bits Open
2.5 PCI Configuration Space Map
Table 16. PCI Configuration Space Map
Bus
Number (hex)
00 00 00 Memory controller of Intel 82850 component
00 01 00 PCI to AGP bridge
00 1E 00 Hub link to PCI bridge
00 1F 00 Intel 82801BA ICH2 PCI to LPC bridge
00 1F 01 IDE controller
00 1F 02 USB
00 1F 03 SMBus controller
00 1F 04 USB
00 1F 05 AC ’97 audio controller (optional)
NMI I/O channel check
0 Reserved, interval timer
1 Reserved, keyboard buffer full
2 Reserved, cascade interrupt from slave PIC
3 COM2
4 COM1
5 LPT2 (Plug and Play option) / Audio / User available
6 Diskette drive
7 LPT1
8 Real-time clock
9 Reserved fo r ICH2 system management bus
10 User available
11 User available
12 Onboard mouse port (if present, else user available)
13 Reserved, math coprocessor
14 Primary IDE
15 Secondary IDE
Note: Default, but can be changed to another IRQ.
(Note)
(Note)
(Note)
Technical Reference
2.7 PCI Interrupt Routing Map
This section describes interrupt sharing and how the interrupt signals are connected between the
PCI bus connectors and onboard PCI devices. The PCI specification specifies how interrupts can
be shared between devices attached to the PCI bus. In most cases, the small amount of latency
added by sharing interrupts does not affect the operation or throughput of the devices. In some
special cases where maximum performance is needed from a device, a PCI device should not share
an interrupt with other PCI devices. Use the following information to avoid sharing an interrupt
with a PCI add-in card.
PCI devices are categorized as follows to specify their interrupt grouping:
• INTA: By default, all add-in cards that require only one interrupt are in this category. For
almost all cards that require more than one interrupt, the first interrupt on the card is also
classified as INTA.
• INTB: Generally, the second interrupt on add-in cards that require two or more interrupts is
classified as INTB. (This is not an absolute requirement.)
• INTC and INTD: Generally, a third interrupt on add-in cards is classified as INTC and a
The ICH2 has eight programmable interrupt request (PIRQ) input signals. All PCI interrupt
sources either onboard or from a PCI add-in card connect to one of these PIRQ signals. Some PCI
interrupt sources are electrically tied together on the D850MD and D850MV boards and therefore
share the same interrupt. Table 18 shows an example of how the PIRQ signals are routed on the
D850MD and D850MV boards.
For example, using Table 18 as a reference, assume an add-in card using INTB is plugged into PCI
bus connector 3. In PCI bus connector 3, INTB is connected to PIRQB, which is already
connected to the SMBus controller, ICH2 audio/modem, and the AGP connector. The add-in card
in PCI bus connector 3 now shares interrupts with these onboard interrupt sources.
Table 18. PCI Interrupt Routing Map
PCI Interrupt Source
AGP connector INTB INTA to PIRQA
ICH2 USB controller INTD to PIRQD
SMBus controller INTB
ICH2 USB controller INTC to PIRQC
ICH2 Audio / Modem INTB
ICH2 LAN INTA to PIRQE
OHCI controller 1
OHCI controller 2
EHCI controller
PCI Bus Connector 1 INTA INTB INTC INTD
PCI Bus Connector 2 INTD INTA INTB INTC
PCI Bus Connector 3 INTC INTD INTA INTB
PCI Bus Connector 4
PCI Bus Connector 5
Notes:
1. USB 2.0 option only
2. D850MV board onl y
(Note 1)
INTD to PIRQA
(Note 1)
INTC to PIRQB
(Note 1)
INTH to PIRQC
(Note 2)
INTB INTC INTD INTA
(Note 2)
INTA INTB INTC INTD
PIRQF PIRQG PIRQH PIRQB Other
ICH2 PIRQ Signal Name
NOTE
✏
The ICH2 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6, 7, 9, 10, 11,
12, 14, and 15). Typically, a device that does not share a PIRQ line will have a unique interrupt.
However, in certain interrupt-constrained situations, it is possible for two or more of the PIRQ
lines to be connected to the same IRQ signal.
52
Technical Reference
2.8 Connectors
CAUTION
Only the back panel connectors and the front panel USB connector of the D850MD and D850MV
boards have overcurrent protection. All of the remaining internal connectors on the D850MD and
D850MV boards are not overcurrent protected and should connect only to devices inside the
computer’s chassis, such as fans and internal peripherals. Do not use these connectors to power
devices external to the computer’s chassis. A fault in the load presented by the external devices
could cause damage to the computer, the interconnecting cable, and the external devices
themselves.
This section describes the boards’ connectors. The connectors can be divided into the following
groups:
• Back panel I/O connectors (see page 54)
PS/2 keyboard and mouse
USB (four with USB 1.1 option, two with USB 2.0)
Parallel port
Serial ports (two)
LAN (optional)
Audio (Line out, Line in, and Mic in)
• Internal I/O connectors (see page 57)
Audio (auxiliary line input and ATAPI CD-ROM)
Fans (three on the D850 MD board, four on the D850MV board)
Power (three: two standard, one optional)
Add-in boards (CNR, PCI, and AGP)
IDE (two)
Diskette drive
SCSI hard drive activity LED
• External I/O connectors (see page 70)
Front panel audio
Front panel USB
Auxiliary front panel power/sleep/message-waiting LED
Front panel (power/sleep/message-waiting LED, power switch, hard drive activity LED,
reset switch, and auxiliary front panel power LED)
Figure 12 shows the location of the back panel connectors. The back panel connectors are color
coded in compliance with PC 99 recommendations. The figure legend below lists the colors used.
A
C
BEGKJDI
Item Description Color For more information see:
A PS/2 mouse port Green Table 19, page 55
B PS/2 keyboard port Purple Table 19, page 55
C USB port Black Table 20, page 55
D USB port Black Table 20, page 55
E Serial port A Teal Table 22, page 56
F Parallel port Burgundy Table 21, page 55
G Serial port B Teal Table 22, page 56
H LAN (optional) Black Table 23, page 56
I USB port Black Table 20, page 55
J USB port Black Table 20, page 55
K Mic in Pink Table 26, page 56
L Audio line out Lime green Table 25, page 56
M Audio line in Light blue Table 24, page 56
F
H
LM
OM12323
NOTE
✏
The USB ports adjacent to the PS/2 ports are not populated if the USB 2.0 option is supported.
NOTE
✏
The back panel audio line out connector is designed to power headphones or amplified speakers
only. Poor audio quality occurs if passive (nonamplified) speakers are connected to this output.
54
Figure 12. Back Panel Connectors
Table 19. PS/2 Mouse/Keyboard Connectors
Pin Signal Name
1 Data
2 Not connected
3 Ground
4 +5 V
5 Clock
6 Not connected
Table 20. USB Connectors
Pin Signal Name
1 +5 V
2 USB#
3 USB
4 Ground
Technical Reference
Table 21. Parallel Port Connector
Pin Standard Signal Name ECP Signal Name EPP Signal Name
Tip Audio left in
Ring Audio right in
Sleeve Ground
Table 25. Audio Line Out Connector
Pin Signal Name
Tip Audio left out
Ring Audio right out
Sleeve Ground
Table 26. Mic In Connector
Pin Signal Name
Tip Mono in
Ring Mic bias voltage
Sleeve Ground
56
2.8.2 Internal I/O Connectors
The internal I/O connectors are divided into the following functional groups:
• Audio (see page 58)
Auxiliary line in
ATAPI CD-ROM
• Power and hardware control (see page 60)
Fans (three on the D850 MD board, four on the D850MV board)
ATX12V
Main power
Auxiliary power (optional)
• Add-in boards and peripheral interfaces (see page 62)
CNR (optional)
PCI bus (three on the D850MD board; five on the D850MV board)
AGP
IDE (two)
Diskette drive
SCSI hard drive activity LED
Technical Reference
2.8.2.1 Expansion Slots
The board has the following expansion slots:
• One AGP connector or an optional AGP Pro50 connector (ATX expansion slot 6). The AGP
connector is keyed for 1.5 V AGP cards only. Do not install a legacy 3.3 V AGP card. The
AGP connector is not mechanically compatible with legacy 3.3 V AGP cards. See Figure 6 on
page 26 for more information on the AGP keying mechanism.
• PCI 2.2–compliant local bus slots (three on the D850MD board, five on the D850MV board).
The SMBus is routed to PCI bus connector 2 only (ATX expansion slot 4). PCI add-in cards
with SMBus support can access sensor data and other information residing on the board.
• One CNR connector (optional), shared with PCI bus connector 3 (ATX expansion slot 1) on
the D850MD board or with PCI bus connector 5 (ATX expansion slot 1) on the D850MV
board.
NOTE
✏
This document references back panel slot numbering with respect to processor location on the
board. The AGP slot is not numbered. PCI slots are identified as PCI slot #x, starting with the
slot closest to the processor. The CNR slot shares PCI slot 5. The ATX/microATX specifications
identify expansion slot locations with respect to the far edge of a full-sized ATX chassis. The ATX
specification and the board’s silkscreen are opposite and could cause confusion. The ATX
numbering convention is made without respect to slot type (PCI vs. AGP) but refers to an actual
slot location on a chassis. Figure 15 on page 63 illustrates the D850MD board’s PCI slot
numbering. Figure 16 on page 64 illustrates the D850MV board’s PCI slot numbering.
Figure 14 shows the location of the power and hardware control connectors.
NOTE
✏
Figure 14 shows the D850MV board. Fan 3 is not present on the D850MD board.
A
1
1
B
G
C
4
321
6
1
3
1
3
1
EHF
OM12325
Item Description For more information see:
A Fan 3 (D850MV board only) Table 29, page 61
B Chassis intrusion Table 30, page 61
C ATX12V power Table 31, page 61
D Processor fan Table 32, page 61
E Fan 1 Table 33, page 61
F Main power Table 34, page 62
G Auxiliary power (optional) Table 35, page 62
H Fan 2 Table 36, page 62
D
Figure 14. Power and Hardware Control Connectors
For information about Refer to
The power connector Section 1.14.2.1, page 42
60
The functions of the fan connectors Section 1.14.2.2, page 43
Technical Reference
CAUTION
Use only an ATX12V-compliant power supply with these boards. ATX12V power supplies have
two power leads that provide required supplemental power for the Intel Pentium
the Intel 850 chipset. Always connect the 20-pin and 4-pin leads of the ATX12V power supply to
the corresponding connectors on the D850MD and D850MV boards. Otherwise, the board and the
processor could be damaged.
Do not use a standard ATX power supply. Doing so could damage the board and the processor.
1 +3.3 V 11 +3.3 V
2 +3.3 V 12 -12 V
3 Ground 13 Ground
4 +5 V 14 PS_ON# (power supply remote on/off)
5 Ground 15 Ground
6 +5 V 16 Ground
7 Ground 17 Ground
8 PWRGD (Power Good) 18 TP_PWRCONN_18
9 +5 V (Standby) 19 +5 V
10 +12 V 20 +5 V
Table 35. Optional Auxiliary Power Connector
(Required for AGP Pro Only)
Pin Signal Name
1 Ground
2 Ground
3 Ground
4 +3.3 V
5 +3.3 V
6 +5 V
Table 36. Fan 2 Connector
Pin Signal Name
1 FAN_CNTRL
2 +12 V
3 Tachometer (FAN_2)
2.8.2.4 Add-in Board and Peripheral Interface Connectors
Figure 15 and Figure 16 show the locations of the add-in board connectors and peripheral
connectors for the D850MD and D850MV boards respectively. Note the following considerations
for the PCI bus connectors:
• All of the PCI bus connectors are bus-master capable.
• PCI bus connector 2 has SMBus signals routed to it, which enables PCI bus add-in boards with
SMBus support to access sensor data on the board. The specific SMBus signals are as follows:
The SMBus clock line is connected to pin A40
The SMBus data line is connected to pin A41
62
Technical Reference
A
1
E
DCB
2
1
2
1
I
G
40
39
40
2
1
39
34
33
FH
OM12326
Item Description For more information see:
A CNR (optional) Table 37, page 65
B PCI bus connector 3 Table 38, page 66
C PCI bus connector 2 Table 38, page 66
D PCI bus connector 1 Table 38, page 66
E AGP connector Table 39, page 67
F Diskette drive Table 40, page 68
G Primary IDE Table 41, page 69
H Secondary IDE Table 41, page 69
I SCSI hard drive activity LED Table 42, page 69
Figure 15. Add-in Board and Peripheral Interface Connectors (D850MD Board)
A CNR (optional) Table 37, page 65
B PCI bus connector 5 Table 38, page 66
C PCI bus connector 4 Table 38, page 66
D PCI bus connector 3 Table 38, page 66
E PCI bus connector 2 Table 38, page 66
F PCI bus connector 1 Table 38, page 66
G AGP connector Table 39, page 67
H Diskette drive Table 40, page 68
I Primary IDE Table 41, page 69
J Secondary IDE Table 41, page 69
K SCSI hard drive activity LED Table 42, page 69
Figure 16. Add-in Board and Peripheral Interface Connectors (D850MV Board)
Pin Signal Name Pin Signal Name Pin Signal Name Pin Signal Name
A1 Ground (TRST#)* B1 -12 V A32 AD16 B32 AD17
A2 +12 V B2 Ground (TCK)* A33 +3.3 V B33 C/BE2#
A3 +5 V (TMS)* B3 Ground A34 FRAME# B34 Ground
A4 +5 V (TDI)* B4 Not connected (TDO)* A35 Ground B35 IRDY#
A5 +5 V B5 +5 V A36 TRDY# B36 +3.3 V
A6 INTA# B6 +5 V A37 Ground B37 DEVSEL#
A7 INTC# B7 INTB# A38 STOP# B38 Ground
A8 +5 V B8 INTD# A39 +3.3 V B39 LOCK#
A9 Reserved B9 Not connected
(PRSNT1#)*
A10 +5 V (I/O) B10 Reserved A41 Reserved *** B41 +3.3 V
A11 Reserved B11 Not connected
(PRSNT2#)*
A12 Ground B12 Ground A43 PAR B43 +3.3 V
A13 Ground B13 Ground A44 AD15 B44 C/BE1#
A14 +3.3 V aux B14 Reserved A45 +3.3 V B45 AD14
A15 RST# B15 Ground A46 AD13 B46 Ground
A16 +5 V (I/O) B16 CLK A47 AD11 B47 AD12
A17 GNT# B17 Ground A48 Ground B48 AD10
A18 Ground B18 REQ# A49 AD09 B49 Ground
A19 PME# B19 +5 V (I/O) A50 Key B50 Key
A20 AD30 B20 AD31 A51 Key B51 Key
A21 +3.3 V B21 AD29 A52 C/BE0# B52 AD08
A22 AD28 B22 Ground A53 +3.3 V B53 AD07
A23 AD26 B23 AD27 A54 AD06 B54 +3.3 V
A24 Ground B24 AD25 A55 AD04 B55 AD05
A25 AD24 B25 +3.3 V A56 Ground B56 AD03
A26 IDSEL B26 C/BE3# A57 AD02 B57 Ground
A27 +3.3 V B27 AD23 A58 AD00 B58 AD01
A28 AD22 B28 Ground A59 +5 V (I/O) B59 +5 V (I/O)
A29 AD20 B29 AD21 A60 REQ64C# B60 ACK64C#
A30 Ground B30 AD19 A61 +5 V B61 +5 V
A31 AD18 B31 +3.3 V A62 +5 V B62 +5 V
* These signals (i n parentheses) are optional in the PCI s pecification and are not currentl y implemented.
** On PCI bus c onnector 2, this pin is connected to the SMBus cl oc k line.
*** On PCI bus connector 2, this pin is connected to the SMBus dat a line.
A40 Reserved ** B40 PERR#
A42 Ground B42 SERR#
66
Table 39. AGP Connector
Pin Signal Name Pin Signal Name Pin Signal Name Pin Signal Name
The AGP connector is keyed for 1.5 V AGP cards only. Do not attempt to install a legacy 3.3 V
AGP card. The AGP connector is not mechanically compatible with legacy 3.3 V AGP cards. See
Figure 6 on page 26 for more information on the AGP keying mechanism.
Figure 17 shows the locations of the external I/O connectors.
A
2
1
10
9
1
2
1
1
2
10
7
15
16
B
D C
OM12328
Item Description For more information see:
A Front panel audio Table 43, page 71
B Front panel USB Table 44, page 71
C Auxiliary front panel power/sleep/message-waiting LED Table 45, page 71
D Front panel Table 46, page 72
This section describes the functions of the front panel connector. Table 46 lists the signal names
of the front panel connector.
Table 46. Front Panel Connector
Pin Signal In/Out Description Pin Signal In/Out Description
1 HD_PWR Out Hard disk LED pull-
up (330 Ω) to +5 V
3 HAD# Out Hard disk active LED 4 HDR_BLNK_
5 Ground Ground 6 FPBUT_IN In Power switch
7 FP_RESET# In Reset switch 8 Ground Ground
9 +5 V Out Reserved 10 N/C
11 Reserved In Reserved 12 Ground Ground
13 Ground Ground 14 (pin removed) Not connected
15 Reserved Out Reserved 16 +5 V Out Power
2 HDR_BLNK_
GRN
YEL
Out Front panel green
LED
Out Front panel yellow
LED
2.8.3.2.1 Reset Switch Connector
Pins 5 and 7 can be connected to a momentary (SPST type) switch that is normally open. When
the switch is closed, the D850MD/D850MV boards reset and run the POST.
2.8.3.2.2 Hard Drive Activity LED Connector
Pins 1 and 3 can be connected to an LED to provide a visual indicator that data is being read from
or written to a hard drive. For the LED to function properly, an IDE drive must be connected to
the onboard IDE interface. The LED will also show activity for devices connected to the SCSI
hard drive activity LED connector.
For information about Refer to
The SCSI hard drive activity LED connector Section 1.8.3.2, page 30
2.8.3.2.3 Power/Sleep/Message-Wait ing LED Connector
Pins 2 and 4 can be connected to a one- or two-color LED. Table 47 shows the possible states for
a one-color LED. Table 48 shows the possible states for a two-color LED.
Table 47. States for a One-Color Power LED
LED State Description
Off Power off/sleeping
Steady Green Running
Blinking Green Running/message waiting
72
Technical Reference
Table 48. States for a Two-Color Power LED
LED State Description
Off Power off
Steady Green Running
Blinking Green Running/message waiting
Steady Yellow Sleeping
Blinking Yellow Sleeping/message waiting
✏ NOTE
To use the message-waiting function, ACPI must be enabled in the operating system and a
message-capturing application must be invoked.
2.8.3.2.4 Power Switch Connector
Pins 6 and 8 can be connected to a front panel momentary-contact power switch. The switch must
pull the SW_ON# pin to ground for at least 50 ms to signal the power supply to switch on or off.
(The time requirement is due to internal debounce circuitry on the D850MD/D850MV boards.) At
least two seconds must pass before the power supply will recognize another on/off signal.
Do not move any jumpers with the power on. Always turn off the power and unplug the power
cord from the computer before changing a jumper setting. Otherwise, the board could be
damaged.
Figure 18 shows the location of the jumper block.
J9H2
1
3
OM12329
Figure 18. Location of the Jumper Block
74
Technical Reference
The 3-pin jumper block determines the BIOS Setup program’s mode. Table 49 describes the
jumper settings for the three modes: normal, configure, and recovery. When the jumper is set to
configuration mode and the computer is powered up, the BIOS compares the processor version and
the microcode version in the BIOS and reports if the two match.
The BIOS uses current configuration information and
passwords for booting.
After the POST runs, Setup runs automatically. The
Maintenance menu is displayed.
The BIOS attempts to recover the BIOS configuration. A
recovery diskette is required.
For information about Refer to
Accessing the BIOS Setup program Section 4.1, page 95
The Maintenance menu in the BIOS Setup program Section 4.2, page 96
BIOS recovery Section 3.7, page 91
The D850MD board is designed to fit into a microATX form factor chassis. Figure 19 illustrates
the mechanical form factor for the D850MD board. Dimensions are given in inches [millimeters].
The outer dimensions are 9.60 inches by 9.60 inches [243.84 millimeters by 243.84 millimeters].
Location of the I/O connectors and mounting holes are in compliance with the ATX specification
(see Section 1.5).
6.50[165.10]
6.10[154.94]
5.20[132.08]
0.00
2.85[72.39]
3.10[78.74]
0.55[13.97]
0.00
0.80
[20.32]
2.60
[66.04]
[223.52]
9.05[229.87]
8.80
Figure 19. D850MD Board Dimensions
NOTE
✏
There may be mechanical interference with installed RDRAM modules in some combinations of
ATX chassis and peripherals, such as CD-ROM drives.
OM12330
76
Technical Reference
2.10.2 D850MV Form Factor
The D850MV board is designed to fit into an ATX form factor chassis. Figure 20 illustrates the
mechanical form factor for the D850MV board. Dimensions are given in inches [millimeters].
The outer dimensions are 12.00 inches by 9.60 inches [304.48 millimeters by 243.84 millimeters].
Location of the I/O connectors and mounting holes are in compliance with the ATX specification
(see Section 1.5).
6.50[165.10]
6.10[154.94]
5.20[132.08]
0.00
2.85[72.39]
3.10[78.74]
0.55[13.97]
0.00
0.80
[20.32]
2.60
[66.04]
[223.52]
Figure 20. D850MV Board Dimensions
NOTE
✏
There may be mechanical interference with installed RDRAM modules in some combinations of
ATX chassis and peripherals, such as CD-ROM drives.
The back panel I/O shield for D850MD and D850MV boards must meet specific dimension and
material requirements. Systems based on these boards need the back panel I/O shield to pass
certification testing. Figure 21 shows the critical dimensions of the chassis-dependent I/O shield.
Dimensions are given in inches to a tolerance of ±0.02 inches [±0.508 millimeters].
The figure also indicates the position of each cutout. Additional design considerations for I/O
shields relative to chassis requirements are described in the ATX specification. See Section 1.5 for
information about the ATX specification.
NOTE
✏
The illustration below is for reference only. An I/O shield compliant with the ATX chassis
specification 2.01 is available from Intel.
6.390 Ref
[162.300]
0.063±0.005
[1.600±0.120]
0.884
[22.450]
0.276
[7.012]
0.00
0.465
[11.811]
0.567
[14.400]
0.039 Dia. [1.000]
0.00
0.447
[11.345]
0.787±0.010 TYP [20±0.254]
4x Dia 0.125 [3.180]
2.079
1.807
1.195
[30.360]
[45.892]
[52.804]
3x Dia 0.330 [8.380]
3.219
[81.768]
4.451
[113.050]
5.010
[127.250]
5.732
[145.584]
Pictorial
View
8X R0.5 MIN
0.519
[13.190]
0.027
[0.690]
0.465
[11.811]
0.567
[14.400]
0.621
[15.770]
1.89
Ref
OM11400
NOTE
✏
The USB ports between the PS/2 and serial ports are not populated if USB 2.0 is supported.
78
Figure 21. I/O Shield Dimensions
Technical Reference
2.11 Electrical Considerations
2.11.1 Power Consumption
Table 50 lists voltage and current measurements for a computer that contains the
D850MD/D850MV board and the following:
• 1.7 GHz Intel Pentium 4 processor with a 256 KB cache
• 128 MB PC800 ECC RDRAM
• AGP 4X/2X video card
• 3.5-inch diskette drive
• 11.5 GB IDE hard disk drive
• 36X IDE CD-ROM drive
This information is provided only as a guide for calculating approximate power usage with
additional resources added.
Values for the Windows 98 SE desktop mode are measured at 640 x 480 x 256 colors and 60 Hz
refresh rate. AC watts are measured with the computer connected to a typical 250 W power
supply, at nominal input voltage and frequency, with a true RMS wattmeter at the line input.
✏ NOTE
Actual system power consumption depends upon system configuration. The power supply should
comply with the recommendations found in the ATX / ATX12V Power Supply Design Guide, Version 1.1 (see Section 1.5 for specification information).
Table 50. Power Usage
DC Current at:
Mode
Windows 98 SE ACPI S0 69 W 2.6 A 2.3 A 1.5 A 0 A 0.3 A
Windows 98 SE ACPI S1 63 W 2.5 A 2.3 A 1.4 A 0 A 0.3 A
Windows 98 SE ACPI S3 3 W 0 A 0 A 0 A 0 A 0.4 A
2.11.2 Add-in Board Considerations
The D850MD and D850MV boards are designed to provide 2 A (average) of +5 V current for each
add-in board. The total +5 V current draw for add-in boards is as follows:
• For a fully loaded D850MD board (all four expansion slots filled), the total +5 V current draw
must not exceed 8 A.
• For a fully loaded D850MV board (all seven expansion slots filled), the total +5 V current
If the standby current necessary to support multiple wake events from the PCI and/or USB buses
exceeds power supply capacity, the D850MD and D850MV boards may lose register settings
stored in memory, etc. Calculate the standby current requirements using the steps described
below.
Power supplies used with the D850MD and D850MV boards must be able to provide enough
standby current to support the Instantly Available (ACPI S3 sleep state) configuration as outlined
in Table 51 below.
Values are determined by specifications such as PCI 2.2. Actual measured values may vary.
To estimate the amount of standby current required for a particular system configuration, standby
current requirements of all installed components must be added to determine the total standby
current requirement. Refer to the descriptions in Table 51 and review the following steps.
1. Note the total standby current required for the D850MD or D850MV board.
2. Add to that the total PS/2 port standby current requirement if a wake-enabled device is
connected.
3. Add, from the PCI 2.2 slots (wake enabled) row, the total number of wake-enabled devices
installed (PCI and AGP) and multiply by the standby current requirement.
4. Add, from the PCI 2.2 slots (non–wake enabled) row, the total number of wake-enabled
devices installed (PCI and AGP) and multiply by the standby current requirement.
5. Add the standby current requirements for all additional wake-enabled and non-wake-enabled
devices as applicable.
6. Add all the required current totals from steps 1 through 5 to determine the total estimated
standby current power supply requirement.
Table 51. Standby Current Requirements
Instantly Available Current
Support (Estimated for
Integrated Board Components)
Instantly Available Standby
Current Support
• Estimated for add-on
components
• Add to Instantly Available
total current requirement
(See instructions above)
Note: Dependent upon system configuration
Description
Total for D850MD board 375
PS/2 ports
PCI 2.2 slots (wake enabled) 375
PCI 2.2 slots (non–wake enabled) 20
(Note)
CNR
USB ports
375
Standby Current
Requirements (mA)
(Note)
345
(Note)
500
80
Technical Reference
NOTE
✏
IBM PS/2 Port Specification (September 1991) states:
• 275 mA for keyboard
• 70 mA for the mouse (non-wake-enabled device)
PCI/AGP requirements are calculated by totaling the following:
• One wake-enabled device @ 375 mA, plus
• Five non-wake-enabled devices @ 20 mA each, plus
USB requirements are calculated as:
• One wake-enabled device @ 500 mA
• USB hub @ 100 mA
• Three USB non-wake-enabled devices connected @ 2.5 mA each
NOTE
✏
Both USB ports are capable of providing up to 500 mA during normal S0 operation. Only one
USB port will support up to 500 mA of standby current (wake-enabled device) during S3
suspended operation. The other ports may provide up to 7.5 mA (three non-wake-enabled devices)
during S3 suspended operation.
2.11.4 Fan Connector Current Capability
The D850MD and D850MV boards are designed to supply a maximum of 1 A per fan connector.
2.11.5 Power Supply Considerations
CAUTION
The +5 V standby line for the power supply must be capable of providing adequate +5 V standby
current. Failure to do so can damage the power supply. The total amount of standby current
required depends on the wake devices supported and manufacturing options. Refer to
Section 2.11.3 on page 80 for additional information.
System integrators should refer to the power usage values listed in Table 50 on page 79 when
selecting a power supply to use with the D850MD or D850MV boards.
Measurements account only for current sourced by the D850MD or D850MV boards while running
in idle modes of the started operating systems.
Additional required power will depend on configurations chosen by the integrator.
The power supply must comply with the following recommendations found in the indicated
sections of the ATX form factor specification.
• The potential relation between 3.3 VDC and +5 VDC power rails (Section 4.2)
• The current capability of the +5 VSB line (Section 4.2.1.2)
• All timing parameters (Section 4.2.1.3)
• All voltage tolerances (Section 4.2.2)
For information about Refer to
The ATX form factor specification Section 1.5, page 19
Ensure that the ambient temperature does not exceed the board’s maximum operating temperature
by more than 10
temperature and malfunction. For information about the maximum operating temperature, see the
environmental specifications in Section 2.14.
CAUTION
Ensure that proper airflow is maintained in the processor voltage regulator circuit. Failure to do
so may result in damage to the voltage regulator circuit. The processor voltage regulator area
(item A in Figure 22) can reach a temperature of up to 85
Figure 22 shows the locations of the localized high temperature zones.
o
C. Failure to do so could cause components to exceed their maximum case
o
C in an open chassis.
D
A Processor voltage regulator area
B Processor
C Intel 82850 MCH
D Intel 82801BA ICH2
OM12332
A
B
C
82
Figure 22. Localized High-Temperature Zones
Technical Reference
Table 52 provides maximum case temperatures for D850MD/D850MV board components that are
sensitive to thermal changes. The operating temperature, current load, or operating frequency
could affect case temperatures. Maximum case temperatures are important when considering
proper airflow to cool the D850MD and D850MV boards.
Table 52. Thermal Considerations for Components
Component Maximum Case Temperature
Intel Pentium 4 processor For processor case temperature, see processor datasheets and
The mean time between failures (MTBF) prediction is calculated using component and
subassembly random failure rates. The calculation is based on the Bellcore Reliability Prediction
Procedure, TR-NWT-000332, Issue 4, September 1991. The MTBF prediction is used to estimate
repair rates and spare parts requirements.
The MTBF data is calculated from predicted data at 55 ºC.
D850MD and D850MV board MTBF: 110595.61 hours
Unpackaged 5 Hz to 20 Hz: 0.01 g² Hz sloping up to 0.02 g² Hz
20 Hz to 500 Hz: 0.02 g² Hz (flat)
Packaged 10 Hz to 40 Hz: 0.015 g² Hz (flat)
40 Hz to 500 Hz: 0.015 g² Hz sloping down to 0.00015 g² Hz
84
Technical Reference
2.15 Regulatory Compliance
This section describes the D850MD and D850MV boards’ compliance with U.S. and international
safety and electromagnetic compatibility (EMC) regulations.
2.15.1 Safety Regulations
Table 54 lists the safety regulations that the D850MD and D850MV boards comply with when
correctly installed in a compatible host system.
Table 54. Safety Regulations
Regulation Title
UL 1950/CSA C22.2 No. 950, 3rd
edition
EN 60950, 2nd Edition, 1992
(with Amendments 1, 2, 3, and 4)
EMKO-TSE (74-SEC) 207/94 Summary of Nordic deviations to EN 60950. (Norway, Sweden,
Bi-National Standard for Safety of Information Technology Equipment
including Electrical Business Equipment. (USA and Canada)
The Standard for Safety of Information Technology Equipment including
Electrical Business Equipment. (European Union)
The Standard for Safety of Information Technology Equipment including
Electrical Business Equipment. (International)
Denmark, and Finland)
2.15.2 EMC Regulations
Table 55 lists the EMC regulations that the D850MD and D850MV boards comply with when
correctly installed in a compatible host system.
Table 55. EMC Regulations
Regulation Title
FCC (Class B) Title 47 of the Code of Federal Regulations, Parts 2 and 15, Subpart B,
Radiofrequency Devices. (USA)
ICES-003 (Class B) Interference-Causing Equipment Standard, Digital Apparatus. (Canada)
EN55022: 1994 (Class B) Limits and methods of measurement of Radio Interference
Characteristics of Information Technology Equipment. (European
Union)
EN55024: 1998 Information Technology Equipment – Immunity Characteristics Limits
and methods of measurement. (European Union)
AS/NZS 3548 (Class B) Australian Communications Authority, Standard for Electromagnetic
Compatibility. (Australia and New Zealand)
CISPR 22, 2nd Edition (Class B) Limits and methods of measurement of Radio Disturbance
Characteristics of Information Technology Equipment. (International)
CISPR 24: 1997 Information Technology Equipment – Immunity Characteristics – Limits
The following tables describe the product certification markings on the D850MD and D850MV
boards. Table 56 lists the markings on the component side of the boards and Table 57 lists the
solder side markings.
Table 56. Component Side Markings
Certification Mark Description
UL joint US/Canada
Recognized Component mark
CE mark • Declares compliance to the European Union (EU) EMC directive
Australian Communications
Authority (ACA) C-tick mark
Korean EMC certification logo
mark
Battery “+ Side Up” marking Located in close proximity to the battery holder
• Consists of lower case c followed by a stylized backward UR and
followed by a small US
• Includes the adjacent UL file number for Intel desktop boards
— For the D850MD board, the number is E139761.
— For the D850MV board, the number is E210882.
(89/336/EEC) and Low Voltage directive (73/23/EEC)
• Should also be on the shipping container
• Consists of a stylized C overlaid with a check (tick) mark, followed by
an Intel supplier code number, N-232
• Should also be on the shipping container
Consists of MIC lettering within a stylized elliptical outline
Table 57. Solder Side Markings
Certification Mark Description
FCC Declaration of Conformity
logo mark for Class B
equipment
Printed wiring board
manufacturer’s recognition
mark
PB part number • Intel bare circuit board part number
Includes the Intel name and D850MD and D850MV model designation
Consists of a unique UL-recognized manufacturer’s logo, along with a
flammability rating (94V-0)
• Also includes the SKU number, which starts with
additional alphanumeric characters
— For the D850MD board, the PB number is A49682-003.
— For the D850MV board, the PB number is A56437-002.
The D850MD and D850MV boards use an Intel/AMI BIOS that is stored in the FWH and can be
updated using a software utility. The FWH contains the BIOS Setup program, POST, APM, the
PCI autoconfiguration utility, and Plug and Play support.
The D850MD and D850MV boards support system BIOS shadowing, allowing the BIOS to
execute from 64-bit onboard write-protected system memory.
The BIOS displays a message during POST identifying the type of BIOS and a revision code. The
initial production BIOS is identified as MV85010A.86A.
For information about Refer to
The D850MD and D850MV boards’ compliance level with APM and Plug and Play Section 1.5, page 19
The Intel 82802AB FWH includes a 4 Mbit (512 KB) symmetrical flash memory device.
Internally, the device is grouped into eight 64 KB blocks that are individually erasable, lockable,
and unlockable.
3.3 Resource Configuration
3.3.1 PCI Autoconfiguration
The BIOS can automatically configure PCI devices. PCI devices may be onboard or add-in cards.
Autoconfiguration lets a user insert or remove PCI cards without having to configure the system.
When a user turns on the system after adding a PCI card, the BIOS automatically configures
interrupts, the I/O space, and other system resources. Any interrupts set to Available in Setup are
considered to be available for use by the add-in card. Autoconfiguration information is stored in
ESCD format.
For information about the versions of PCI and Plug and Play supported by the BIOS, see
Section 1.5.
3.3.2 PCI IDE Support
If you select Auto in the BIOS Setup program, the BIOS automatically sets up the two
PCI IDE connectors with independent I/O channel support. The IDE interface supports hard drives
up to ATA-66/100 and recognizes any ATAPI-compliant devices, including CD-ROM drives, tape
drives, and Ultra DMA drives (see Section 1.5 for the supported version of ATAPI). The BIOS
determines the capabilities of each drive and configures them to optimize capacity and
performance. To take advantage of the high capacities typically available today, hard drives are
automatically configured for LBA and to PIO Mode 3 or 4, depending on the capability of the
drive. You can override the autoconfiguration options by specifying manual configuration in the
BIOS Setup program.
To use ATA-66/100 features, the following items are required:
• An ATA-66/100 peripheral device
• An ATA-66/100 compatible cable
• ATA-66/100 operating system device drivers
NOTE
✏
ATA-66/100 compatible cables are backward compatible with drives using slower IDE transfer
protocols. If an ATA-66/100 disk drive and a disk drive using any other IDE transfer protocol are
attached to the same cable, the maximum transfer rate between the drives is reduced to that of the
slowest device.
NOTE
✏
Do not connect an ATA device as a slave on the same IDE cable as an ATAPI master device. For
example, do not connect an ATA hard drive as a slave to an ATAPI CD-ROM drive.
88
Overview of BIOS Features
3.4 SMBIOS
SMBIOS is a Desktop Management Interface (DMI)–compliant method for managing computers
in a managed network.
The main component of SMBIOS is the management information format (MIF) database, which
contains information about the computing system and its components. Using SMBIOS, a system
administrator can obtain the system types, capabilities, operational status, and installation dates for
system components. The MIF database defines the data and provides the method for accessing this
information. The BIOS enables applications such as third-party management software to use
SMBIOS. The BIOS stores and reports the following SMBIOS information:
• BIOS data, such as the BIOS revision level
• Fixed-system data, such as peripherals, serial numbers, and asset tags
• Resource data, such as memory size, cache size, and processor speed
• Dynamic data, such as event detection and error logging
Non–Plug and Play operating systems, such as Windows NT, require an additional interface for
obtaining the SMBIOS information. The BIOS supports an SMBIOS table interface for such
operating systems. Using this support, an SMBIOS service-level application running on a non–
Plug and Play operating system can obtain the SMBIOS information.
For information about Refer to
The D850MD and D850MV boards’ compliance level with SMBIOS Section 1.5, page 19
3.5 Legacy USB Support
Legacy USB support enables USB devices such as keyboards and mice to be used even when the
operating system’s USB drivers are not yet available. Legacy USB support is used to access the
BIOS Setup program and to install an operating system that supports USB. By default, legacy
USB support is set to Enabled.
Legacy USB support operates as follows:
1. When you apply power to the computer, legacy support is disabled.
2. POST begins.
3. Legacy USB support is enabled by the BIOS, allowing you to use a USB keyboard to enter and
configure the BIOS Setup program and the Maintenance menu.
4. POST completes.
5. The operating system loads. While the operating system is loading, USB keyboards and mice
are recognized and may be used to configure the operating system. (Keyboards and mice are
not recognized during this period if legacy USB support was set to Disabled in the BIOS Setup
program.)
6. After the operating system loads the USB drivers, all legacy and nonlegacy USB devices are
recognized by the operating system, and legacy USB support from the BIOS is no longer used.
To install an operating system that supports USB, verify that legacy USB support in the BIOS
Setup program is set to Enabled and follow the operating system’s installation instructions.
Legacy USB support is for keyboards and mice only. Other USB devices are not supported in
legacy mode.
3.6 BIOS Updates
The BIOS can be updated using either of the following utilities, which are available on the Intel
World Wide Web site:
®
• Intel
• Intel
Both utilities support the following BIOS maintenance functions:
• Verifying that the updated BIOS matches the target system to prevent accidentally installing
• Updating both the BIOS boot block and the main BIOS. This process is fault tolerant to
• Updating the BIOS boot block separately.
• Changing the language section of the BIOS.
• Updating replaceable BIOS modules, such as the video BIOS module.
• Inserting a custom splash screen.
Express BIOS Update utility, which enables automated updating while in the Windows
environment. Using this utility, the BIOS can be updated from a file on a hard disk, a 1.44 MB
diskette, a CD-ROM, or from the file location on the Web.
®
Flash Memory Update Utility, which requires creation of a boot diskette and manual
rebooting of the system. Using this utility, the BIOS can be updated from a file on a 1.44 MB
diskette (from a legacy diskette drive or an LS-120 diskette drive) or a CD-ROM.
an incompatible BIOS.
prevent boot block corruption.
NOTE
✏
Review the instructions distributed with the upgrade utility before attempting a BIOS update.
For information about Refer to
The Intel World Wide Web site Section 1.3, page 18
3.6.1 Language Support
The BIOS Setup program and help messages are supported in five languages: US English,
Spanish, German, Italian, and French. The default language is US English, which is present unless
another language is selected in the BIOS Setup program.
90
Overview of BIOS Features
3.6.2 Custom Splash Screen
During POST, an Intel splash screen is displayed by default. This splash screen can be replaced
with a custom splash screen. A utility is available from Intel to assist with creating a custom
splash screen. The custom splash screen can be programmed into the flash memory using the
BIOS upgrade utility. Information about this capability is available on the Intel Support World
Wide Web site.
For information about Refer to
The Intel World Wide Web site Section 1.3, page 18
3.7 Recovering BIOS Data
Some types of failure can corrupt the content of the FWH. For example, the data can be lost if a
power outage occurs while the BIOS is being updated in flash memory. The BIOS can be
recovered from a diskette using the BIOS recovery mode. When recovering the BIOS, be aware of
the following:
• Because of the small amount of code available in the nonerasable boot block area, there is no
video support. You can only monitor this procedure by listening to the speaker or looking at
the diskette drive LED.
• The recovery process may take several minutes. Larger BIOS flash memory devices require
more time.
• Two beeps and the end of activity in the diskette drive indicate successful BIOS recovery.
• A series of continuous beeps indicates a failed BIOS recovery.
To create a BIOS recovery diskette, a bootable diskette must be created and the BIOS update files
copied to it. BIOS upgrades and the Intel Flash Memory Update Utility are available from Intel
Customer Support through the Intel World Wide Web site.
NOTE
✏
Even if the computer is configured to boot from an LS-120 diskette (in the Setup program’s
Removable Devices submenu), the BIOS recovery diskette must be a standard 1.44 MB diskette and
not a 120 MB diskette.
For information about Refer to
The BIOS recovery mode jumper settings Section 2.9, page 74
The Boot menu in the BIOS Setup program Section 4.7, page 113
Contacting Intel customer support Section 1.3, page 18
In the BIOS Setup program, the user can choose to boot from a diskette drive, hard drives,
CD-ROM, or the network. The default setting is for the diskette drive to be the first boot device,
the hard drive second, the ATAPI CD-ROM third, and the network fourth.
3.8.1 CD-ROM and Network Boot
Booting from CD-ROM is supported in compliance to the El Torito bootable CD-ROM format
specification. Under the Boot menu in the BIOS Setup program, ATAPI CD-ROM is listed as a
boot device. Boot devices are defined in priority order. Accordingly, if there is not a bootable CD
in the CD-ROM drive, the system will attempt to boot from the next defined drive.
The network can be selected as a boot device. This selection allows booting from the onboard
LAN or a network add-in card with a remote boot ROM installed.
For information about Refer to
The El Torito specification Section 1.5, page 19
3.8.2 Booting Without Attached Devices
For use in embedded applications, the BIOS has been designed so that after passing the POST, the
operating system loader is invoked even if the following devices are not present:
• Video adapter
• Keyboard
• Mouse
3.9 Fast Booting Systems with Intel® Rapid BIOS Boot
Three factors affect system boot speed:
• Selecting and configuring peripherals properly
®
• Using an optimized BIOS, such as the Intel
• Selecting a compatible operating system
3.9.1 Peripheral Selection and Configur ation
The following techniques help improve system boot speed:
• Choose a hard drive with parameters such as “power-up to data ready” less than eight seconds,
that minimize hard drive startup delays.
• Select a CD-ROM drive with a fast initialization rate. This rate can influence POST execution
time.
• Eliminate unnecessary add-in adapter features, such as logo displays, screen repaints, or mode
changes in POST. These features may add time to the boot process.
Rapid BIOS
92
Overview of BIOS Features
3.9.2 Intel Rapid BIOS Boot
Use the following BIOS Setup program settings to reduce the POST execution time:
• In the Boot menu:
Set the hard disk drive as the first boot device. As a result, the POST does not first seek a
diskette drive, which saves about one second from the POST execution time.
Enable Intel Rapid BIOS Boot. This feature bypasses memory count and the search for a
diskette drive.
Disable unused features.
• In the Peripheral Configuration submenu, disable the LAN device if it will not be used, which
can reduce up to four seconds of option ROM boot time.
NOTE
✏
It is possible to optimize the boot process to the point where the system boots so quickly that the
Intel logo screen (or a custom logo splash screen) will not be seen. Monitors and hard disk drives
with minimum initialization times can also contribute to a boot time that might be so fast that
necessary logo screens and POST messages cannot be seen.
This boot time may be so fast that some drives might be not be initialized at all. If this condition
should occur, it is possible to introduce a programmable delay ranging from 3 to 30 seconds
(using the Hard Disk Pre-Delay feature of the Advanced menu in the IDE Configuration submenu
of the BIOS Setup program).
For information about Refer to
The IDE Configuration submenu in the BIOS Setup program Section 4.4.4, page 104
3.9.3 Operating System
The Microsoft Windows Millennium Edition (Windows Me) operating system has built-in
capabilities for making PCs boot more quickly. To speed operating system availability at boot
time, limit the number of applications that load into the system tray or the task bar.
The BIOS includes security features that restrict access to the BIOS Setup program and who can
boot the computer. A supervisor password and a user password can be set for the BIOS Setup
program and for booting the computer, with the following restrictions:
• The supervisor password gives unrestricted access to view and change all the Setup options in
the BIOS Setup program. This is the supervisor mode.
• The user password gives restricted access to view and change Setup options in the BIOS Setup
program. This is the user mode.
• If only the supervisor password is set, pressing the <Enter> key at the password prompt of the
BIOS Setup program allows the user restricted access to Setup.
• If both the supervisor and user passwords are set, users can enter either the supervisor
password or the user password to access Setup. Users have access to Setup respective to
which password is entered.
• Setting the user password restricts who can boot the computer. The password prompt will be
displayed before the computer is booted. If only the supervisor password is set, the computer
boots without asking for a password. If both passwords are set, the user can enter either
password to boot the computer.
Table 58 shows the effects of setting the supervisor password and user password. This table is for
reference only and is not displayed on the screen.
Table 58. Supervisor and User Password Functions
Password Set
Neither Can change all
Supervisor
only
User only N/A Can change all
Supervisor
and user set
Note: If no password is set, any user c an change all Setup options.
Supervisor
Mode
options
Can change all
options
Can change all
options
(Note)
User Mode Setup Options
Can change all
options
Can change a
limited number
of options
options
Can change a
limited number
of options
(Note)
None None None
Supervisor Password Supervisor None
Enter Password
Clear User Password
Supervisor Password
Enter Password
Password to
Enter Setup
User User
Supervisor or
user
Password
During Boot
Supervisor or
user
For information about Refer to
Setting user and supervisor passwords Section 4.5, page 110
The BIOS Setup program can be used to view and change the BIOS settings for the computer. The
BIOS Setup program is accessed by pressing the <F2> key after the POST memory test begins and
before the operating system boot begins. The menu bar is shown below.
Maintenance Main Advanced Security Power Boot Exit
Table 59 lists the BIOS Setup program’s menu features.
Table 59. BIOS Setup Program Menu Bar
Maintenance Main Advanced Security Power Boot Exit
Clears
passwords and
BIS credentials
and enables
extended
configuration
mode
Allocates
resources for
hardware
components
Configures
advanced
features
available
through the
chipset
Sets
passwords
and security
features
Configures
power
management
features
Selects boot
options and
power supply
controls
For information about Refer to
BIS Section 1.5, page 19
Saves or
discards
changes to
Setup
program
options
NOTE
✏
In this chapter, all examples of the BIOS Setup program menu bar include the Maintenance menu;
however, the Maintenance menu is displayed only when the board is in configuration mode.
Section 2.9 on page 74 tells how to put the board in configuration mode.
Table 60 lists the function keys available for menu screens.
Table 60. BIOS Setup Program Function Keys
BIOS Setup Program Function Key Description
<←> or <→> Selects a different menu screen (Moves the cursor left or right)
<↑> or <↓> Selects an item (Moves the cursor up or down)
<Tab> Selects a field (Not implemented)
<Enter> Executes command or selects the submenu
<F9> Loads the default configuration values for the current menu
<F10> Saves the current values and exits the BIOS Setup program
<Esc> Exits the menu
4.2 Maintenance Menu
To access this menu, select Maintenance on the menu bar at the top of the screen.
Maintenance
Extended Configuration
The menu shown in Table 61 is for clearing Setup passwords and enabling extended configuration
mode. Setup displays this menu only in configuration mode. See Section 2.9 on page 74 for
information on setting configuration mode.
Main Advanced Security Power Boot Exit
Table 61. Maintenance Menu
Feature Options Description
Clear All Passwords • Yes (default)
• No
Clear BIS Credentials • Yes (default)
• No
Extended
Configuration
CPU Information No options Displays CPU information.
CPU Stepping
Signature
CPU Microcode
Update Revision
Select to display
submenu
No options Displays the CPU’s stepping signature.
No options Displays the CPU’s microcode update revision.
Clears the user and supervisor passwords.
Clears the WfM BIS credentials.
Invokes the Extended Configuration submenu.
96
BIOS Setup Program
4.2.1 Extended Configuration Submenu
To access this submenu, select Maintenance on the menu bar and then Extended Configuration.
Maintenance
Extended Configuration
The submenu represented by Table 62 is for setting video memory cache mode. This submenu
becomes available when User Defined is selected under Extended Configuration.
memory cache mode. If selected here, it will also display
in the Advanced menu as “Extended Menu: Used.”
Selects Uncacheable Speculative Write-Combining
(USWC) video memory cache mode. Full 32-byte contents
of the Write Combining buffer are written to memory as
required. Cache lookups are not performed. Both the
video driver and the application must support Write
Combining.
Selects UnCacheable (UC) video memory cache mode.
This setting identifies the video memory range as
uncacheable by the processor. Memory writes are
performed in program order. Cache lookups are not
performed. This setting is well suited for applications that
do not support Write Combining.
To access this menu, select Main on the menu bar at the top of the screen.
Maintenance
Main
Table 63 describes the Main menu. This menu reports processor and memory information and is
for configuring the system date and system time.
Table 63. Main Menu
Feature Options Description
BIOS Version No options Displays the version of the BIOS.
Processor Type No options Displays processor type.
Processor Speed No options Displays processor speed.
System Bus Speed No options Displays the system bus speed.
Cache RAM No options Displays the size of second-level cache and whether it is
Total Memory No options Displays the total amount of RAM.
RIMM 1
RIMM 2
RIMM 3
RIMM 4
Language • English (default)
Memory
Configuration
System Time Hour, minute, and
System Date Day of week
No options Displays the amount and type of RAM in the memory
• Español
• Deutsch
• Italiano
• Français
• Non-ECC
• ECC (default)
second
Month/day/year
Advanced Security Power Boot Exit
ECC capable.
banks.
Selects the current default language used by the BIOS.
Allows the user to enable error reporting if the system and
all installed memory support ECC. If non-ECC memory is
installed, BIOS will detect and change the setting to
Non-ECC.
Specifies the current time.
Specifies the current date.
98
BIOS Setup Program
4.4 Advanced Menu
To access this menu, select Advanced on the menu bar at the top of the screen.
Maintenance Main
Advanced
PCI Configuration
Boot Configuration
Peripheral Configuration
IDE Configuration
Diskette Configuration
Event Log Configuration
Video Configuration
Table 64 describes the Advanced menu. This menu is used for setting advanced features that are
available through the chipset.
Table 64. Advanced Menu
Feature Options Description
Extended Configuration No options If
PCI Configuration Select to display
submenu
Boot Configuration Select to display
submenu
Peripheral Configuration Select to display
submenu
IDE Configuration Select to display
submenu
Diskette Configuration Select to display
submenu
Event Log Configuration Select to display
submenu
Video Configuration Select to display
submenu
Security Power Boot Exit
Used
is displayed,
Extended Configuration under the Maintenance menu.
Configures individual PCI slot’s IRQ priority.
Configures Plug and Play and the Numlock key, and resets
configuration data.