The Intel® Desktop Board D2550DC2 may contain design defects or errors known as errata that may cause the product to deviate from published
specifications. Current characterized errata are documented in the Intel Desktop Board D2550DC2 Specification Update.
July 2012
Revision History
Revision Revision Histor y Date
-001 First release o f the Intel® Desktop Board D2550DC2 Technical Produc t
Specification.
This product spec ification applies to only the standard In te l® Desktop Board D2550DC2 with
BIOS identifier MUCDT10N.86A.
INFORMATION IN THIS DOCUMENT IS PROVIDED I N C ONNEC TION WITH INTEL® PRODUCTS. NO LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHER WISE, TO ANY INTELLECTUAL PRO PER TY R IGHTS IS
GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR
SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR
IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR
WARRANTIES RELATI NG TO FI TNESS FOR A PARTIC U LA R PURPOSE, MERCHANTABILITY, OR
INFRINGEMENT OF ANY PATENT, CO PY R IGHT OR OTHER IN TELLECTU A L PR O PERTY RIGHT. UNLESS
OTHERWISE AGREED IN WRITING BY IN TEL, THE I NTEL PR O D UCTS ARE NOT DESIGNED NOR INTENDED
FOR ANY APPLICATION IN WHICH THE FAILURE O F THE INTEL PRODUCT COULD CREATE A SITUATION
WHERE PERSONAL INJUR Y OR DEATH MAY OCCUR.
Intel Corporation may have patents o r pending patent applic a tio ns , trademarks, cop y rights, or other
intellectual proper ty rights that relate to the p resented subject matte r. The furnishing of d ocuments and
other materials and inf ormation does not p rovide any license , e x press or implied , by estoppel or otherwise,
to any such patents, trad e ma r ks, copyrights, o r other intellectual pr o perty rights.
Intel may make change s to specifications and p roduct descrip tions at any time, without notice.
Designers must not rely on the absence o r characteristics o f any features or ins tr uc ti o ns marked “reserved”
or “undefined.” Intel reserves the s e for future def inition and shall have no resp onsibility whatsoev e r for
conflicts or inco mpatibilities arising from future changes to the m .
®
Desktop Boards may contain design defects or errors known as errata, which may c aus e the p roduct
Intel
to deviate from p ublished specifications. Current characte rized errata are available on request.
Contact your local Intel sales office o r your distributor to obtain the latest sp e c ifications befor e p lac i ng y our
product order.
Basic Desktop Board D2550DC2 Identification Information
AA Revision BIOS Revision Notes
G73894-600 MUCDT10N.86A.0069 1,2
Notes:
1. The AA number is fo und on a small label on the comp o ne nt s ide of the board.
®
2. The Intel
following comp onent:
Device Stepping S-Spec Numbers
CG82NM10 B0 SLGXX
D2550 processor B3 SR0VY
NM10 Express Chipset and D2550 processor used on this AA revision consists of the
Errata
Current characterized errata, if any, are documented in a separate Specification
Update. See http://developer.intel.com/products/desktop/motherboard/index.htm
for the latest documentation.
A description of the BIOS error messages, beep codes, and POST codes
5
Regulatory compliance and battery disposal information
Preface
This Technical Product Specification (TPS) specifies the board layout, components,
connectors, power and environmental requirements, and the BIOS for the Intel
Desktop Board D2550DC2. It describes the standard product and a vailable
manufacturing options .
Intended Audience
The TPS is intended to provide detailed, technical information about the Intel Desktop
Board D2550DC2 and its components to the vendors, system integrators, and other
engineers and technicia ns who need this level of information. It is specifically not
intended for general audiences.
What This Document Contai ns
®
Typographical Conventions
This section cont ains information about the conventions used in this specification. Not
all of these symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
Notes call attentio n to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing da ta.
# Used after a signal na me to identify an active-low s ig na l (s uc h as USBP0#)
GB Gigabyte (1,073,741,824 bytes)
GB/s Gigabytes per second
Gb/s Gigabits per second
KB Kilobyte (1024 bytes)
Kb Kilob it (1024 bits)
kb/s 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/s Megabytes per second
Mb Megabit (1,048,576 bits)
Mb/s Megabits per second
TDP Therma l D e s ign Power
xxh An address or d ata v al ue ending with a lowercase h ind i c ate s a he x a d e c im al value.
x.x V Volts. Voltages are DC unless otherwise specified.
* This symbol is used to indicate third-party brands and names that are the p roperty of thei r
A Back panel connectors
B Standby power LED
C Processor core power connector (2 x 12)
D Intel Atom processor
E SO-DIMM channel A so c k e t, DIMM 1
F SO-DI MM c hanne l A s ocket, DIMM 0
G Intel NM10 Express Chipset
H SATA connectors
I System fan header
J Front panel header
K BIOS setup conf iguration jumper blo c k
L Battery
M Front panel USB 2 .0 header
N Fro nt Pane l Wi r e le s s A c ti v ity LED header
O Piezo/mono tonic speaker head e r
P PCI Exp r e s s Full-/Half-Mini Card slot
Q Conventional PCI bus add-in car d c onnector
R Front panel audio he ader
S Front panel USB hea d e r (supports Inte l Z -U130 USB Solid-
Description
State Drive or c ompatible device (b rown-colored)
14
1.1.3 Block Diagram
Figure 2 is a block diagram of the major functional areas.
To find information a bout… Visit this World Wide Web site:
Intel Desktop B oard D2550DC2 http://www.intel.com/products/motherboard/index.htm
Desktop Board Support http://www.intel.com/p/en_US/support?iid=hdr+support
Available config ur a tio ns for the Intel
Chipset informatio n http://www.intel.com/products/desktop/chipsets/index.htm
BIOS and driver updates http://downloadcenter.intel.com
Tested memory http://www.intel.com/support/motherboards/desktop/sb/CS-
Integration info r m ation http://www.intel.com/support/go/buildit
http://ark.intel.com
025414.htm
1.3 Processor
The board has a passively-cooled, soldered-down Dual-Core Intel Atom processor with
integrated graphics and integrated memory controller.
NOTE
The board is des igned to be passively cooled in a properly ventilated chassis. Chassis
venting locations are recommended above the processor heatsink area for maximum
heat dissipation effectiveness.
For information about Refer to
Power supply c o nne c tors Section 2.2.2.3, page 46
16
Product Description
1.3.1 Intel® D2550 Graphics Subsystem
1.3.1.1 Intel® Graphics Media Accelerator 3650 Graphics
Controller (Intel® GMA)
The Intel® GMA 3650 graphics controller features the following:
• 640 MHz core frequency
• High quality texture engine
DX9.3* and OpenGL* 3.0 compliant
Hardware Pixel Shader 4.1
Vertex Shader Model 4.1
Supports HDMI and DVI displays up to 1920 x 1200 at 60 Hz refresh (WUXGA)
Dual independent display support
For information about Refer to
Obtaining graphics s oftware and utilities Section 1.2, page 16
1.3.1.2 High Definition Multimedia Interface* (HDMI*)
The HDMI por t supports standard, enhanced, or high definition video, plus multichannel digital audio on a single cable. . The maximum supported resolution is 1920 x
1200 (WUXGA). The HDMI port is compliant with the HDMI 1.3a specification
The HDMI port is enabled for POST whenever a monitor is attached
(DDR3 1333 MHz and DDR3 1600 MHz memory will run at 1066 MHz)
NOTES
•Due to passively-cooled thermal constraints, system memory must have an
operating temperature rating of 85
The board is designed to be passively cooled in a properly ventilated
chassis. Chassis venting locations are recommended above the system
memory area for maximum heat dissipation effectiveness.
o
C.
•If you are installing only one SO-DIMM, it must be installed in the bottom
socket (SO-DIMM 1).
•To be fully compliant with all applicable DDR3 SDRAM memory
specifications, the board should be populated with SO-DIMMs that support
the Serial Presence Detect (SPD) data structure. This allows the BIOS to
read the SPD data and program the chipset to accurately configure memory
settings for optimum performance. If non-SPD memory is installed,
performance and reliability may be impacted or the SO-DIMMs may not
function under the determined frequency.
Table 3 lists the supported SO-DIMM configurations.
1
Table 3. Supported Memory Configurations
Raw Card
Version
B
F
Notes:
1. System memory configurations are based on availab ility and are subject to c hange.
2. Support fo r one 4 GB SO-DIMM instal le d in s lot 1. Slot 0 must be lef t e m p ty.
SO-DIMM
Capacity
1 GB 1 Gb 128 M x 8 8
2 GB 2 Gb 256 M x 8 8
2 GB 1 Gb 128 M x 8 16
4 GB2 2 Gb 256 M x 8 16
DRAM Device
Technology
DRAM
Organization
# of DRAM
Devices
18
Product Description
Figure 3 illustrates the memory channel and SO-DIMM configuration.
Figure 3. Memory Channel and SO-DIMM Configuration
The Intel NM10 Express Chipset provides interfaces to the processor and the USB,
SATA, LPC, LAN, PCI, and PCI Express interfaces. The Intel NM10 Express Chipset is a
centralized controller for the board’s I/O paths.
NOTE
The board is des igned to be passively cooled in a properly ventilated chassis. Chassis
venting locations are recommended above the processor heatsink area for maximum
heat dissipation effectiveness.
For information about Refer to
The Intel NM10 Express chipset http://www.intel.com/products/desktop/chipsets/index.htm
Resources used by the chipset Chapter 2
1.5.1.1 Video Memory Allocation
Video memory is allocated from the total available system memory for the efficient
balancing of 2-D/3-D graphics performance and overall system performance. Dynamic
allocation of system memory to video memory is as follows:
• 256 MB total RAM results in 32 MB video RAM
• 512 MB total RAM results in 64 MB video RAM
• 1 GB total RAM results in 128 MB video RAM
• 2 GB total RAM results in 224 MB video RAM
1.5.1.2 Digital Visual Interface (DVI-D)
The DVI-D port supports only digital DVI displays. The max imum supported resolution
is 1920 x 1200 at 60 Hz refresh (WUXGA). The DVI-D port is compliant with the
DVI 1.0 specification.
20
Product Description
1.5.2 USB
The board provides up to seven USB 2.0 ports, supports UHCI and EHCI, and uses
UHCI- and EHCI-compatible drivers (four ports routed to the back panel and three
ports routed to two front panel USB 2.0 headers). One of the front panel USB headers
(brown-colored) supports an Intel Z-U130 USB Solid-State Drive or compatible device.
NOTE
Computer systems that have an unshielded cable attached to a USB port may not meet
FCC Class B requirements, even if no device is attached to the cable. Use shielded
cable that meets the requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 9, page 39
The location of the front panel USB headers Figure 11, page 41
1.5.3 SATA Support
The board provides two SATA interface connectors that support one device per
connector.
The board’s SATA controller offers independent SATA ports with a theoretical
maximum transfer rate of 3.0 Gb/s on each port. One device can be installed on each
port for a maximum of two SATA devices. A point-to-point interface is used for host to
device connections, unlike PATA which supports a master/slave configuration and two
devices on each channel.
For compatibility, the underlying SATA functionality is transparent to the operating
system. The SATA controller supports IDE and AHCI configuration and can operate in
both legacy and native modes. In legacy mode, standard ATA I/O and IRQ resources
are assigned (IRQ 14 a nd 1 5 ). In native mode, standard Conventional PCI bus
resource steering is used. Native mode is the preferred mode for configurations using
the Windows Vista* operating system.
For information about Refer to
Obtaining AHCI driver Section 1.2, page 16
The location of the SA TA c onnectors Figure 11, page 41
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the
computer is not plugged into a wall socket, the battery has an estimated life of three
years. When the computer is plugged in, the standby current from the power supply
extends the life of the battery. The clock is accurate to ± 13 minutes/year at 25 ºC
with 3.3 VSB applied.
NOTE
If the battery and AC po w er fail, custom defaults, if previously saved, will be l oaded
into CMOS RAM at power-on.
When the voltage drops b elow a certain level, the BIOS Setup program settings stored
in CMOS RAM (for example, the date and time) might not be accurate. Replace the
battery with an equivalent one. Figure 1 on page 13 shows the location of the battery.
1.7 Legacy I/O Controller
The Legacy I/O Controller provides the following features:
•Serial IRQ interface compatible wi th serialized IRQ support for Conventional
PCI bus systems
•Intelligent power management, including a programmable wake-up event
interface
•Conventional PCI bus power management support
The BIOS Setup program provides configuration options for the Legacy I/O controller.
For information about Refer to
The location of the head e rs Figure 11, page 41
22
Product Description
1.8 LAN Subsystem
The LAN subsystem consists of the following:
• Intel NM10 Express Chipset
• Intel 82574L Gigabit Ethernet Controller for 10/100/1000 Mb/s Ethernet
LAN connectivity
•RJ-45 LAN connector with integrated status LEDs
Additional features of the LAN subsystem include:
• CSMA/CD protocol engine
• LAN connect interface that supports the Ethernet controller
• Conventional PCI bus power management
Supports ACPI technology
Supports LAN w ake capabilities
1.8.1 LAN Subsystem Drivers
LAN drivers are available from Intel’s World Wide Web site.
Two LEDs are built into the RJ-45 LAN connector (shown in Figure 4).
Figure 4. LAN Connector LED Locations
Table 4 describes the LED states w hen the board is powered up and the Ethernet LAN
subsystem is opera ting.
Table 4. LAN Connector LED States
LED LED Color LED State Condition
Off LAN link is not estab lis he d.
Link/Activity (A) Green
Link Speed (B) Green/Yellow
On LAN link is established .
Blinking LAN ac tivity is occurring .
Off 10 Mb/s data ra te is se l e c te d o r negotiated.
Green 100 Mb/s data rate is s e le c te d or negotiated.
Yellow 1000 Mb/s data r ate is s e le c te d or negotiated.
24
Product Description
1.9 Audio Subsystem
The board support s the Intel® High Definition Audio (Intel® HD Audio) subsystem. The
audio subsystem consists of the following:
• Intel NM10 Express Chipset
• Realtek ALC662 audio codec
The audio subsystem has the following features:
•Advanced jack sense for the back panel audio jacks that enables the audio
codec to recognize the device that is connected to an audio port. The back
panel audio jacks are capable of retasking according to the user’s definition,
or can be automatically switched depending on the recognized device type.
• Front panel Intel HD Audio and AC ’97 audio support.
• 3-port analog audio out stack.
• Windows Vista Basic certification.
• A signal-to-noi se (S/N) r atio of 95 dB.
Table 5 lists the supported functions of the front panel and back panel audio jacks.
Table 5. Audio Jack Support
Audio Jack
Front panel – Green Default
Front panel – Pink Default
Back panel – Blue Default
Back panel – Green (ctrl pa ne l) Default
Back panel – Pink Default
Audio software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining audio sof tw a r e and drivers Section 1.2, page 16
1.9.2 Audio Connectors and Headers
The board contains audio connectors and headers on both the back panel and the
component side of the board. The component-side audio headers include front panel
audio (a 2 x 5-pin header that provides mic in and line out signals for front panel audio
connectors).
Item Description
A Line in
B Line out
C Mic in
Figure 5. Back Panel Audio Connectors
NOTE
The back panel audio line out connector is designed to power headphones or amplified
speakers only. Poor audio quality occurs if passive (non-amplified) speakers are
connected to this output.
For information about Refer to
The locations of the f ront panel audio header and S/PDIF audio header Figure 11, page 41
The signal names of the f ront panel audio header and S/PDIF head e r Section 2.2.2.1, page 43
26
Product Description
1.10 Hardware Management Subsystem
The hardware management features enable the board to be compatible with the Wired
for Management (Wf M) specification. The boar d has several hardware management
features, including the following:
• Thermal monitoring
• Voltage monitoring
1.10.1 Hardware Monitoring
The hardware monitoring and fan control subsystem is based on the Winbond
W83627DHG-P device, which supports the following:
• System ambient temperature monitoring
• System fan speed monitoring
• Power monitoring of +12 V, +5 V, +5 Vstdby, +3.3 V, and +VCCP
Figure 6 shows the locations of the thermal sensors and fan header.
28
Item Description
A Remote thermal sensor
B DTS, located on the pr ocessor die
C System fan header
Figure 6. Thermal Sensors and Fan Header
Product Description
1.11 Power Management
Power management is implemented at several levels, including:
• Software support through Advanced Configuration and Power Interface
(ACPI)
• Hardware support:
Power connector
Fan header
LAN wake capabilities
Instantly Available PC techno logy
Wake from USB
Power M a na gement Event signal (PME#) wake-up support
WAKE# signal wake-up support
1.11.1 ACPI
ACPI gives the operating system direct control over the power management and Plug
and Play functions of a computer. The use of ACPI with the boa rd requires an
operating system that provides full ACPI support. A C PI features include:
• Plug and Play (including bus and device enumeration)
• Power management control of individual devices, add-in boards (some add-
in boards may require an ACPI-aware driver), video displays, and hard disk
drives
• Methods for achieving less than 15-watt system operation in the power-
on/standby sleeping state
• A Soft-off feature that enables the operating system to power-off the
computer
• Support for multiple wake-up events (see Table 8 on page 31)
• Support for a front panel power and sleep mode switch
Table 6 lists the system states based on how long the power switch is pressed,
depending on how ACPI is configured with an ACPI-aware operating system.
Under ACPI, the operating system directs all system and device power state
transitions. The opera ting sy stem puts devices in and out of low-power states based
on user preferences and knowledge of how devices are being used by applications.
Devices that are not being used can be turned off. The operating system uses
information from applications and user settings to put the system as a whole into a
low-power state.
Table 7 lists the power states supported by the board along with the associated system
power targets. See the ACPI specification for a complete description of the various
system and power states.
Table 7. Power States and Targeted System Power
Global
States
G0 – working
state
G1 – sleeping
state
G1 – sleeping
state
G2/S5 S5 – Soft off.
G3 –
mechanical off.
AC power is
disconnected
from the
computer.
Notes:
1. Total system powe r is dependent on the system configuratio n, inc l ud ing add-in boards and p e ripherals
powered by the system’s power supply.
2. Dependent on the stand b y power consumption of wake-up devices used in the system.
Sleeping States
S0 – working C0 – working D0 – working
S3 – Suspend to
RAM. Context
saved to RAM.
S4 – Suspend to
disk. Context
saved to disk.
Context not saved .
Cold boot is
required.
No power to the
system.
Processor
States
No power D3 – no power
No power D3 – no power
No power D3 – no power
No power D3 – no power for
Device States
state.
except for
wake-up logic.
except for
wake-up logic.
except for
wake-up logic.
wake-up logic,
except when
provided by
battery or
external source.
Targeted System
Power
Full power > 30 W
Power < 5 W
Power < 5 W
Power < 5 W
No power to the s y s te m .
Service can be performed
safely.
(Note 1)
(Note 2)
(Note 2)
(Note 2)
30
Product Description
Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
1.11.1.2 Wake-up Devices and Events
Table 8 lists the devices or specific events that can wake the computer from specific
states.
Table 8. Wake-up Devices and Events
Devices/events that wake up the system… …from this sleep state
Power switch S3, S4, S5
RTC alarm S3, S4, S5
LAN S3, S4, S5
USB S3
WAKE# S3, S4, S5
PME# signal S3, S4, S5
Notes:
1. S4 implies oper a ting s ystem support only.
2. USB ports must be tur ne d off during S4/S5 states.
(Note 2)
(
NOTE
The use of these wake-up events from an ACPI state requires an operating system that
provides full ACPI support. In addition, software, drivers, and peripherals must fully
support ACPI wake events.
The board provides several power management hardware features, including:
• Power connector
• Fan header
• LAN wake capabilities
• Instantly Available PC technology
• Wake from USB
• Power Management Event signal (PME#) wake-up support
• WAKE# signal wake-up support
• +5V Standby Power Indicator LED
LAN wake capabilities and Instantly Available PC technology require power from the
+5 V standby line.
NOTE
The use of Wake from USB technologies from an ACPI state requires an operating
system that provides full ACPI support.
1.11.2.1 Fan Header
The function/operation of the fan header is as follows:
• The fan is on when the board is in the S0 state.
• The fan is off when the board is off or in the S3, S4, or S5 state.
• The system fan header supports closed-loop fan control that can adjust the
fan speed and is wired to a fan tachometer input.
• The fan header supports +12 V, 3-wire fans at 1 A maximum.
For information about Refer to
The locations of the f an he a d e r and thermal sensors Figure 6, page 28
The signal names of the system f an he a d e r Table 11, page 43
1.11.2.2 LAN Wake Capabilities
LAN wake capabilities enable remote wake-up of the computer through a network. The
LAN subsystem network adapter monitors network traffic at the Media Independent
Interface. The board supports LAN wake capabilities with ACPI in the following ways:
• By Ping
• By Magic Packet
Upon detecting the configured wake packet type, the LAN subsystem asserts a wakeup signal that powers up the compute r.
32
Product Description
1.11.2.3 Instantly Available PC Technology
Instantly Available PC technology enables the board to enter the ACPI S3 (Suspend-toRAM) sleep-state. While in the S3 sleep-state, the computer will appear to be off (the
hard drive(s) and fan will power off, the front panel LED will blink). When signaled by
a wake-up device or event, the system quickly returns to its last known state. Table 8
on page 31 lists the devices and events that can wake the computer from the S3 state.
The board support s the PCI Bus Power Management Interface Specification. Add-in
boards that also suppor t this s pecification can participate in power manage ment and
can be used to wake the computer.
1.11.2.4 Wake from USB
USB bus activity wakes the computer from an ACPI S3 state.
NOTE
Wake from USB requires the use of a USB peripheral that supports Wake from USB and
support in the operating system.
1.11.2.5 PME# Signal Wake-up Support
When the PME# signal on the PCI bus is asserted, the computer wakes from an ACPI
S3, S4, or S5 state (with Wake on PME enabled in the BIOS).
1.11.2.6 WAKE# Signal Wake-up Support
When the WAKE# signal on the PCI Express bus is asserted, the computer wakes from
an ACPI S3, S4, or S5 state.
The +5 V standby power indicator LED shows that power is still present even when the
computer appears to be off. Figure 7 shows the location of the standby power
indicator LED.
CAUTION
If AC power has been switched off and the standby power indicator is still lit,
disconnect the power cord before installing or removing any devices connected to the
board. Failure to d o so could damage the board and any attached devices.
Figure 7. Location of the Standby Power Indicator LED
34
2 Technical Reference
2.1 Memory Map
2.1.1 Addressable Memory
The board utilizes 4 GB of addressable system memory. Typically the address space
that is allocated for Conventional PCI bus add-in cards, PCI Express configuration
space, BIOS (SPI Flash), and chipset overhead resides above the top of DRAM (total
system memory). On a system that has 4 GB of syste m m emory installed, it is not
possible to use all of the installed memor y due to system address space being
allocated for other system critical functions. T hese functions include the following:
• BIOS/ SPI Flash (2 MB)
• Local APIC (19 MB)
• Direct Media Interface (40 MB)
• Internal graphics address registers
• Memory-mapped I/O that is dynamically allocated for Conventional PCI
The amount of installed memory that can be used will vary based on add-in cards and
BIOS settings. Figure 8 shows a schematic of the system memory map. All installed
system memory can be used when there is no overlap of system addresses.
Figure 8. Detailed System Memory Address Map
36
Technical Reference
Table 9 lists the system memory map.
Table 9. System Memory Map
Address Range
(decimal)
1024 K - 4194304 K 100000 - FFFFFFFF 4095 MB Extended memory
960 K - 1024 K F0000 - FFFFF 64 KB Runtime BIOS
896 K - 960 K E0000 - EFFFF 64 KB Reserved
800 K - 896 K C8000 - DFFFF 96 KB Potential available high DOS
640 K - 800 K A0000 - C7FFF 160 KB Video memory and BIOS
639 K - 640 K 9FC00 - 9FFFF 1 KB Extended BIOS data (movable by
512 K - 639 K 80000 - 9FBFF 127 KB Extend e d conventional memor y
0 K - 512 K 00000 - 7FFFF 512 KB Conventional memory
Address Range
(hex)
Size
Description
memory (open to the PC I bus).
Dependent on vid e o adapter used.
Only the following connectors/headers have overcurrent protection: Back panel and
front panel USB.
The other internal connectors/headers are not overcurrent protected and should
connect only to devices inside the computer’s chassis, such as fans and internal
peripherals. Do not use these connectors/headers to power devices external to the
computer’s chassis. A fault in the load presented by the external devices could cause
damage to the computer, the power cable, and the external devices themselves.
NOTE
Computer systems that have an unshielded cable attached to a USB port may not meet
FCC Class B requirements, even if no device is attached to the cable. Use shielded
cable that meets the requirements for full-speed devices.
This section describes the board’s connectors and headers. The connectors and
headers can be divided into these groups:
• Back panel I/O connectors (see pag e 39)
• Component-side connectors and headers (see page 41)
38
2.2.1 Back Panel
2.2.1.1 Back Panel Connectors
Figure 9 shows the location of the back panel connectors.
Item Description
A S/PDIF digital audio out (optical)
B HDMI port
C DVI-D port
D USB ports
E LAN port
F USB ports
G Line in
H Line out
I Mic in
Technical Reference
Figure 9. Back Panel Connectors
NOTE
The back panel audio line out connector is designed to power headphones or amplified
speakers only. Poor audio quality occurs if passive (non-amplified) speakers are
connected to this output.
The I/O shield provided with the board allows access to all back panel connectors a nd
is compatible with standard mini-ITX and microATX chassis. As an added benefit for
system configurations with wireless PCI Express Mini Card solutions, the I/O shield also
provides pre-cut holes for user installation of up to three external wireless antennas.
Figure 10 shows an I/O shield reference diagram.
Figure 10. I/O Shield Reference Diagram
40
Technical Reference
2.2.2 Component-side Connectors and Headers
Figure 11 shows the locations of the component-side connectors and headers.
Table 10 lists the component-side connectors and headers identified in Figure 11.
Table 10. Component-side Connectors and Headers Shown in Figure 11
Item/callout
from Figure 11 Description
A
B
C
D
E
F
G
H
I
J
K
L
Processor core power connector (2 x 12)
SATA connector
SATA connector
System fan header
Front panel header
Front panel USB 2.0 header
Front panel wire le s s ac tivity LED header
Piezo/monotonic spe a k e r header
PCI Express Full-/Half-Mini Card slot
Conventional PCI b us add-in card connector
Front panel audio he ad e r
Front panel USB hea d e r supports Inte l Z -U130 US B S o lid-State Drive or c o m p a tib le
device (brown-colored)
42
Technical Reference
2.2.2.1 Signal Tables for the Connectors and Headers
Table 11. System Fan Header
Pin Signal Name
1 Ground
2 +12 V (PWM controlled p uls e s )
3 Tach
Table 13. Front Panel Wireless Activity LED Header
Pin Signal Name
1 Ground
2 MINICARD_WLAN#
Table 14. Front Panel Audio Header for Intel HD Audio
Pin Signal N a me Pin Signal Name
1 [Port 1 ] Le ft channel 2 Ground
3 [Port 1 ] R i g ht c hanne l 4 PR ES EN C E# (Dongle prese nt)
5 [Port 2 ] R i g ht c hanne l 6 [Port 1] SENSE_RETURN
7 SENSE_ S E ND (Jack detection) 8 Key (no pin)
9 [Port 2 ] Le ft channel 10 [Port 2] SENSE_RETURN
Table 15. Front Panel Audio Header for AC ’97 Audio
The board has the following add-in card connectors:
• PCI Express Full-/Half-Mini Card slot
• Conventional PCI bus connector (with riser card support for up to two PCI
cards)
Note the following considerations for the Conventional PCI bus connector:
• The Conventional PCI bus connector is bus master capable.
• SMBus signals are routed to the Conventional PCI bus connector. This
enables Conventional PCI bus add-in boards with SMBus support to access
sensor data on the board. The specific SMBus signals are as follows:
The SMBus clock line is connected to pin A40.
The SMBus data line is connected to pin A41.
The Conventional PCI bus connector also supports single-slot and dual-slot riser cards
for use of up to two bus master PCI expansion cards. In order to support two PCI bus
master expansion cards, the riser card must support the following PCI signal routing:
• Pin A11: additional 33 MHz PCI clock
• Pin B10: additional PCI Request signal (i.e., PREQ#2)
• Pin B14: additional PCI Grant signal (i.e., GNT#2)
NOTE
BIOS IRQ programming for the second PCI slot on PCI riser card:
• ID_SEL: AD20 (Device 4)
• Second PCI slot INT Mapping:
INT A# (A6)
INT B# (B7)
INT C# (A7)
INT D# (B8)
NOTE
The Conventional PCI slot on this board does not support the PCI PHOLD1 function.
Due to this limitation (errata), certain PCI cards may experience performance or
detection issues when DMA transfer is used as part of the PCI card operation.
1
PHOLD is the signal required to hold the bus during DMA transfers.
The board has a 2 x 12 power connector (see Table 18). This board requires a TFX12V
or SFX12V power supply.
Table 18. Power Connector
Pin Signal Name Pin Signal Name
1 +3.3 V 13 +3.3 V
2 +3.3 V 14 -12 V
3 Ground 15 Ground
4 +5 V 16 PS-ON# (power supply remote on/o ff)
5 Ground 17 Ground
6 +5 V 18 Ground
7 Ground 19 Ground
8 PWRGD (Power Goo d ) 20 No connect
9 +5 V (Standby) 21 +5 V
10 +12 V 22 +5 V
11 +12 V 23 +5 V
12 No connect 24 Ground
46
Technical Reference
2.2.2.4 Front Panel Header
This section describes the functions of the front panel header. Table 19 lists the signal
names of the front panel header. Figure 12 is a connection diagram for the front panel
header.
Table 19. Front Panel Header
Pin Signal
Hard Drive Activity LED Power LED
1 HD_PWR Out Hard disk LED
3 HDA# Out Hard disk active
5 Ground Ground 6 FPBUT_IN In Po w e r switch
7 FP_RESET# In Reset switch 8 Ground Ground
9 +5 V Power 10 N/C Not connected
In/
Out Description
pull-up to +5 V
LED
Pin Signal
2 HDR_BLNK_GRN Out Front panel gree n
4 HDR_BLNK_YEL Out Front panel yellow
In/
Out Description
Reset Switch On/Off Switch
Power Not Connected
LED
LED
Figure 12. Connection Diagram for Front Panel Header
Pins 1 and 3 can be connected to an LED to provide a visual indicator that data is
being read from or written to a hard drive.
2.2.2.4.2 Reset Switch Header
Pins 5 and 7 can be connected to a momentary single pole, single throw (SPST) type
switch that is normally open. When the s w itch is closed, the board resets and runs the
POST.
2.2.2.4.3 Power/Sleep LED Header
Pins 2 and 4 can be conne cted to a single- or dual-color LED. Table 20 shows the
default states for a single-color LED.
Table 20. States for a One-Color Power LED
LED State Description
Off Po w e r off/hibernate (S 5/S4)
Blinking Sle e ping (S3)
Steady Green Running/Away (S0)
NOTE
The LED states listed in Table 20 are default settings that c an be modified through
BIOS setup. Systems built with a dual-color front panel power LED can also use
alternate color state options.
2.2.2.4.4 Power Switch Header
Pins 6 and 8 can be connected to a front panel momentary-contact power switch. The
switch must pull the SW_ON# pin to ground for a t lea st 50 ms to signal the power
supply circuitry to switch on or off. (The time requirement is due to internal debounce
circuitry on the board.) At lea st two seconds must pass before the power supply
circuitry will recognize another on/off signal.
48
Technical Reference
2.2.2.5 Front Panel USB Headers
Figure 13 and Figure 14 are connection diagrams for the front panel USB headers.
NOTE
• The +5 VDC power on the USB headers is fused.
• Use only a front panel USB connector that conforms to the USB 2.0
specification for high-speed USB devices.
Figure 13. Connection Diagram for Front Panel USB Header
Figure 14. Connection Diagram for Front Panel USB Header
with Intel Z-USB Solid-State Drive or Compatible Device Support
Do not move the jumper with the power on. Al ways turn off t he power and unplug the
power cord from the computer before changing a jumper setting. Otherwise, the board
could be damaged.
Figure 15 shows the location of the jumper block. The jumper determines the BIOS
Setup program’s mode. Table 21 lists the jumper settings for the three modes: normal,
configure, and recovery.
Figure 15. Location of the BIOS Configuration Jumper Block
50
Table 21. BIOS Configuration Jumper Settings
Technical Reference
Function/Mode
Normal 1-2 T he BIOS uses curre nt c onfiguration infor m ation and passwords
Configure 2-3 After the POST runs, Setup runs automatically. The maintenance
Recovery None The BIOS attempts to r e c over the BIOS configuration. See
Jumper
Setting
Configuration
for booting.
menu is displayed.
Section 3.7 for more inf o rmation on BIOS r e c o very.
The board is designed to fit into a mini-ITX or microATX form-factor chassis. Figure 16
illustrates the mechanical form factor for the board. Dimensions are given in inches
[millimeters]. The outer dimensions are 6.7 inches by 6.7 inches [170 millimeters by
170 millimeters]. Location of the I/ O connectors and mounting holes are in
compliance with the microATX specification.
52
Figure 16. Board Dimensions
Technical Reference
2.5 Electrical Considerations
2.5.1 Fan Header Current Capability
Table 22 lists the current capability of the fan header.
Table 22. Fan Header Current Capability
Fan Header Maximum Avai lable Current
System fan 1.5 A
2.5.2 Add-in Board Considerations
The board is designed to provide 2 A (average) of +5 V current for the Conventional
PCI slot. The total +5 V current draw for the Conventional PCI expansion s lot (total
load) must not exceed 2 A.
2.6 Thermal Considerations
CAUTION
A chassis with a maximum internal ambient temperature of 38 oC at the processor fan
inlet is a requirement. Whenever possible, use of a processor heat sink that provides
omni-directional airflow to maintain required airflow across the processor voltage
regulator area is recommended.
CAUTION
Failure to ensure appropriate airflow may result in reduced performance of both the
processor and/or voltage regulator or, in some instances, damage to the board. For a
list of chassis that have been tested with Intel Desktop Boards please refer to the
following website:
All responsibility for determining the adequacy of any thermal or system design
remains solely with the system integrator. Intel makes no warranties or
representations that merely following the instructions presented in this document will
result in a system with adequate thermal performance.
CAUTION
Ensure that the ambient temperature does not exceed the board’s maximum operating
temperature. Failure to do so could cause components to exceed their maximum case
temperature and malfunction. For information about the ma ximum operating
temperature, see the environmental specifications in Section 2.9.
Ensure that proper airflow is maintained in the processor voltage regulator circuit.
Failure to do so may result in damage to the voltage regulator circuit. The processor
voltage regulator area (shown in Figure 17) can reach a temperature of up to 85
an open chassis.
Figure 17 shows the locations of the localized high temperature zones.
o
C in
Figure 17. Localized High Temperature Zones
Table 23 provides maximum case temperatures for the board components that are
sensitive to thermal changes. The operating temperature, current load, or operating
frequency could affect case temperatures. Maximum case temperatures are important
when considering proper airflow to cool the board.
54
A Processor voltage regulator area
B Intel Atom processor
C
Intel NM10 Express Chipset
Table 23. Thermal Considerations for Components
For information about
Refer to
Component Maximum Case Temperature
Intel Atom processor 100 oC
Processor voltage regulator area 85 oC
Intel NM10 Express Chipset 113 oC
Memory SO-DIMM 85 oC
Technical Reference
Processor datasheets and specification updates Section 1.2, page 16
2.6.1 Passive Heatsink Design in a Passive System
Environment
This section highlights important guidelines and related thermal boundary conditions
for passive heatsink design in a passive system environment. Passive heatsink
describes a thermal solution without a fan attached. Passive system environment
describes a chassis with either a power supply fan or a built-in system fan.
This information sho uld be used in conjunction with the Thermal and Mechanical
Design Guide (TMDG) published for the Intel Atom processor D2000 series. The TMDG
contains detailed package information and thermal mechanical specifications for the
processors. The TMDG also contains information on how to enable a completely fanless
design provided the right usage s cenario and boundary conditions are observed for
optimal thermal design. While the TMSDG has a section on thermal design for passive
system environments (page 32), the information in this section can also be us ed to
complement the TMDG.
2.6.1.1 Definition of Terms
Term Description
TA
TJ
Ψ
JA
TIM
TDP
TA external
The measured ambient te mperature locally surrounding the pro c e s s or. The ambient
temperature should be measured just ups tr e a m o f a passive heatsink.
Processor junc tion temperature.
Junction-to-ambient thermal char ac te rization parameter (p s i). A me as ure of thermal
solution performance using total pack ag e power. Defined as (T
Note: Heat source must be specified for Ψ measurements.
Thermal Interfac e Mate r i al: the the r m ally conductive comp ound between the heatsink
and the processo r die surface. This mate rial fills the air gaps and voids, and enhances
the transfer of the he at from the proces s or die surface to the heatsink.
Thermal Design Powe r: a power dissip a tio n target based on wo rst-case applications.
Thermal solutions should be designed to dissipate the thermal de s ig n power.
The measured external ambient temperature s urrounding the chassis . The e x te rnal
ambient temperature s hould be measured jus t upstream of the chass is inle t vent.
Maximum heatsink size
Heatsink mass ≤ 63.6 grams
Retention type Spring load e d fasteners
Heatsink preload 13.2 lb
Note: Refers to the he ats ink installed on the board.
(Note)
87 x 52 x 29 mm
2.6.1.4 Chassis Design Guideline
The pin fin heatsink design used on this board w ill be able to dissipate up to 10 W of
processor power in most of the passively enabled system chassis. This board is
targeted for 3-7 liters volumetric or larger, desktop/tower orientation, mini-ITX and
microATX chassis with a system fan. The recommended fan type is an exhaust fan.
For best thermal performance, it is recommended that the system fan provide
reasonable airflow directly over all the major components on the board. The pin fin
heatsink is designed to have the best thermal performance when airflow direction is
parallel to the heatsink fins.
The processor on the board will generate the highest amount of heat, lea ding to high
ambient temperature within the chassis. The system fan should be located near the
board region in order to effectively regulate airflow (see Figure 18). A system fan
located further away from the board region, i.e., at the optical disk drive or hard disk
drive region, will be less effective in controlling the local ambient temperature.
Regardless of where the system fan is located, the maximum local ambient
temperature as defined by T
also provide adequate openings for airflow to pass through. The recommended freearea-ratio of chassis vents should be equal to or greater than 0.53. By using the
reference pin fin heatsink, most chassis with a system fan enabled should have local
ambient temperature safely below the 50 °C limit.
A should be capped at 50 °C. Chassis inlet vents should
56
Technical Reference
Figure 18. Fan Location Guide for Chassis Selection
(Chassis Orientation is Not Restricted)
For all chassis configurations, the heatsink performance parameter, Ψ
should be less
JA
than 3.85 °C/W. The detail thermal measurement metrology is described in the
TMSDG. For chas sis that fail to meet the thermal specifications guideline highlighted
above, an actively cooled heatsink solution should be used.
Power measurements were performed to determine bare minimum and likely
maximum power requirements from the board, as well as attached devices, in order to
facilitate power supply rating estimates for specific system configurations.
2.7.1 Minimum Load Configuration
Minimum load refers to the power demand placed on the power supply when using a
bare system configuration with minimal power requirement conditions. Minimum load
configuration tes t results are shown in Table 24. The test configuration was defined a s
follows:
• 2 GB DDR3/1066 MHz SO-DIMM
• USB keyboard and mouse
• LAN linked at 1000 Mb/s
• DOS booted via network (PXE); system at idle
• All on board peripherals enabled (serial, parallel, audio, …)
Table 24. Minimum Load Configuration Current and Power Results
Output Voltage
Minimum Load
3.3 V 5 V 12 V -12 V 5 VSB
0.67 A 1.91 A 0.77 A 0.1 A 0.17 A
2.7.2 Maximum Load Configuration
Maximum load refers to the incremental power demands placed on the power supply,
augmenting the minimum load configuration into a fully-featured system that stresses
power consumption from all subsystems. Maximum load configuration test results are
shown in Table 25. The test configuration was defined as follows:
• 4 GB DDR3/1066 MHz SO-DIMM
• SATA DVD-R/W
Load: DVD playback
• 3.5-inch SATA hard disk drive, running Microsoft Windows Vista Home Basic
Load: continuous read/write benchmark
• Intel Z-U130 USB Solid-State Drive or compatible device on the USB flash
drive header
Load: continuous read/write benchmark
• Wireless card on PCI Express Full-/Half-Mini Card slot, connected via
802.11n protocol
Load: continuous read/write benchmark on remote share
• Riser card on conventional PCI slot, populated with PCI LAN card, running
file transfer through local network to SATA hard drive
•USB keyboard and mouse
58
Technical Reference
Parameter
Specification
Temperature
Non-Operating
-20 °C to +70 °C
Operating
0 °C to +50 °C
Shock
Unpackaged
50 g trapezoidal waveform
Velocity change of 170 inches/second²
Packaged
Half sine 2 millisecond
Product weight (po und s )
Free fall (inches)
Velocity change (inche s /s ²)
<20
36
167 21-40
30
152 41-80
24
136 81-100
18
118
Unpackaged
5 Hz to 20 Hz: 0.01 g ² Hz s lo ping up to 0.02 g² Hz
20 Hz to 500 Hz: 0.02 g² Hz (flat)
Packaged
10 Hz to 40 Hz: 0.015 g² Hz (flat)
• Back and front panel host-powered USB devices (other than keyboard and
mouse)
Load: continuous read/write activity on external drive/peripheral
• LAN linked at 1000 Mb/s
Load: continuous read/write benchmark on remote share
• All on board peripherals enabled (serial, parallel, audio, …)
Table 25. Maximum Load Configuration Current and Power Results
Output Voltage
Maximum Load
3.3 V 5 V 12 V -12 V 5 VSB
5 A 7.83 A 2.34 A 0.1 A 0.68 A
2.8 Reliability
The Mean Time Between Failures (MTBF) prediction is calculated using component and
subassembly random failure rates. The calculation is based on the Telcordia SR-332,
Method I Case 1 50% electrical stress, 55 ºC ambient. The MTBF pred iction is used to
estimate repair rates and spare parts requirements.
The MTBF data was calculated from predicted data at 5 5 ºC. The Intel Desktop Board
D2550DC2 has an MTBF of at least 394,528 hours.
2.9 Environmental
Table 26 lists the environmental specifications for the board.
The board uses an Intel BIOS that is stored in the Serial Peripheral Interface Flash
Memory (SPI Flash) and can be updated using a disk-based program. The SPI Flash
contains the BIOS Setup program, POST, the PCI auto-configuration utility, LAN
EEPROM information, and P lug and Play support.
The BIOS displays a message during POST identifying the type of BIOS and a revision
code. The initial production BIOSs a re identified as MUCDT10N.86A.
The BIOS Setup program can be used to view and change the BIOS settings for the
computer. The BIOS Setup program is accessed by pressing the <F2> key after the
Power-On Self-Test (POST) memory test begins and before the oper a ting system boot
begins. The men u bar is shown below .
NOTE
The maintenance menu is displayed only when the b oard is in configure mode.
Section 2.3 on page 50 shows how to put the board in configure mode.
Table 27 lists the BIOS Setup program menu features.
Table 27. BIOS Setup Program Menu Bar
Maintenance Main Advanced Security Power Boot Exit
Clears
passwords and
displays
processor
information
Displays
processor
and memory
configuration
Configures
advanced
features
available
through the
chipset
Sets
passwords
and security
features
Configures
power
management
features and
power states
options
Table 28 lists the function keys available for menu screens.
Table 28. BIOS Setup Program Function Keys
BIOS Setup Program
Function Key
<←> or <→>
<↑> or <↓>
<Enter> Executes command or selects the submenu
<F9> Load the default conf iguration values for the current menu
<F10> Save the current value s and e xits the BIOS Setup p rogram
<Esc> Exits the menu
Description
Selects a different menu screen (Move s the c ur s or left or right)
Selects an item (Moves the c ursor up or do w n)
Selects boot
options
Saves or
discards
changes to
Setup
program
options
3.2 BIOS Flash Memory Organization
The Serial Peripheral Interface Flash Memory (SPI Flash) includes an 8 Mb (1024 KB)
flash memory device.
3.3 Resource Configuration
3.3.1 PCI* Autoconfiguration
The BIOS can automatically configure PCI devices. PCI devices may be onboard or
add-in cards. Autoconfiguration lets a user insert or remove PCI cards without having
to configure the system. When a user turns on the system after adding a PCI card, the
BIOS automatically configures interrupts, the I/O space, and other system resources.
Any interrupts set to Available in Setup are co nsidered to be available for use by the
add-in card.
62
Overview of BIOS Features
3.4 System Management BIOS (SMBIOS)
SMBIOS is a Desktop Management Interface (DMI) compliant method for managing
computers in a managed network.
The main component of SMBIOS is the Management Infor mation Format (MIF)
database, which contains information about the computing system and its
components. Using SMBIOS, a system administrator can obtain the system types,
capabilities, operational status, and installation dates for system components. The MIF
database defines the data and provides the method for accessing this information. The
BIOS enables applications such as third-party management software to use SMBIOS.
The BIOS stores and reports the following SMBIOS information:
• BIOS data, such as the BIOS revision level
• Fixed-system data, such as peripherals, serial numbers, and asset tags
• Resource data, such as memory size, cache size, and processor speed
• Dynamic data, such as event detection and error logging
Non-Plug and Play operating systems require an additional interface f or obtaining the
SMBIOS information. The BIOS supports an SMBIOS table interface for such operating
systems. Using this support, an SMBIOS service-level application running on a
non-Plug and Play operating system can obta in the SM BIOS information. Additional
board informat io n can be found in the BIOS under the Additional Informatio n h eader
under the Main BIOS page.
Legacy USB support enables USB devices to be used even when the operating system’s
USB drivers are not yet available. Legacy USB support is used to access the BIOS
Setup program, and to install an operating system that supports US B . By default,
Legacy USB support is set to Enabled.
Legacy USB support operates as follows:
1. When you apply power to the computer, legacy support is disabled.
2. POST begins.
3. Legacy US B support is enabled by the BIOS allowing you to use a USB keyboard to
enter and configure the BIOS Setup program and the maintenance menu.
4. POST completes.
5. The operating system load s. While the operating syste m is loading, USB keyboards
and mice are recognized and may be used to configure the operating system.
(Keyboards and mice are not recognized during this period if Legacy USB support
was set to Disabled in the BIOS S etup program.)
6. After the operating system loads the USB drivers, all legacy and non-legacy USB
devices are recognized by the operating system, and Legacy USB support from the
BIOS is no longer used.
7. Additional USB legacy feature options can be accessed by using Intel Integrator
Toolkit.
To install an operating system that suppo rts USB, verify that Legacy USB support in
the BIOS Setup program is set to Enabled and follow the operating system’s
installa tion instruct ions.
64
Overview of BIOS Features
3.6 BIOS Updates
The BIOS can be updat ed using either of the following utilities, which are available on
the Intel World Wide Web site:
• Intel® Express BIOS Update utility, which enables automated updating while
in the Windows environment. Using this utility, the BIOS can be updated
from a file on a hard disk, a USB drive (a flash drive or a USB drive), or an
optical drive.
• Intel
• Intel
Both utilities verify that the updated BIOS m a tches the target system to prevent
accidentally installing an incompatib le BIOS.
NOTE
Review the instructions distributed with the upgrad e utility before attempting a BIOS
update.
Flash Memory Update Utility, which requires booting from DOS.
Using this utility, the BIOS can be updated from a file on a hard disk, a USB
drive (a flash drive or a USB drive), or an optical drive.
®
F7 switch allows a user to select where the BIOS .bio file is located
and perform the update from that location/device. Similar to performing a
BIOS Recovery without removing the BIOS configuration jumper.
3.6.1 BIOS Recovery
It is unlikely that anything will interrupt a BIOS update; howeve r, if an interruption
occurs, the BIOS could be damaged. Table 29 lists the drives and media types that
can and cannot be used for BIOS recovery. The BIOS recovery media does not need to
be made bootable.
Table 29. Acceptable Drives/Media Types for BIOS Recovery
Media Type
Optical drive c o nne c te d to the SATA interfac e Yes
USB removable drive (a USB Flash Drive, for example) Yes
USB diskette dr iv e (with a 1.44 MB diskette ) No
USB hard disk drive Yes
During POST, an Intel® splash screen is displayed by default. This splash screen can
be augmented with a custom splash screen. The Intel
available from Intel can be used to create a custom splash screen.
NOTE
If you add a custom spl a sh screen, it will share space with the Intel branded logo.
For information about
Intel Integrato r Toolkit http://developer.intel.com/design/motherbd/software/itk/
Refer to
®
Integrator’s Toolkit that is
3.7 Boot Options
In the BIOS Setup program, the user can choose to boot from a hard drive, optical
drive, removable drive, or the network. The default setting is for the optical drive to
be the first boot device, the hard drive second, removable drive third, and the network
fourth.
3.7.1 Optical Drive Boot
Booting from the optical drive is supp orted in compliance to the El Torito bootable
CD-ROM format specification. U nder the Boot menu in the BIOS Setup program, the
optical drive is listed as a boot device. Boot devices are defined in priority order.
Accordingly, if there is not a bootable CD in the optical drive, the system will attempt
to boot from the next defined drive.
3.7.2 Network Boot
The network can be selected as a boot device. This selection allows booting from the
onboard LAN or a network add-in card with a remote boot ROM installed.
Pressing the <F12> key during POST automatically forces booting fro m the LAN. To
use this key during POST, the User Access Level in the BIOS Setup program's Security
menu must be set to Full.
66
Overview of BIOS Features
3.7.3 Booting Without Attached Devices
For use in embedded applications, the BIOS has been designed so that after passing
the POST, the operating system loader is invoked even if the following devices are not
present:
• Video adapter
• Keyboard
• Mouse
3.7.4 Changing the Default Boot Device During POST
Pressing the <F10> key during POST causes a bo ot device menu to be displayed. This
menu displays the list of available boot devices (as set in the BIOS setup program’s
Boot Device Priority submenu). Table 30 lists the boot device menu options.
Table 30. Boot Device Menu Options
Boot Device Menu F unc t ion Keys Description
<↑> or <↓>
<Enter> Exits the menu, saves changes, and boots from the s e le c te d
The BIOS includes security features that restrict access to the BIOS Setup program
and who can boot the computer. A supervisor password and a user password can be
set for the BIOS Setup program and for booting the computer, with the following
restrictions:
• The supervisor password gives unrestricted access to view and change all
the Setup options in the BIOS Setup program. This is the supervisor mode.
• The user password gives restricted access to view and change Setup
options in the BIOS Setup program. This is the user mode.
• If only the supervisor password is set, pressing the <Enter> key at the
password prompt of the BIOS Setup program allows the user restricted
access to Setup.
• If both the supervisor and user passwords are set, users can enter either
the supervisor password or the user password to access Setup. Users have
access to Setup respective to which password is entered.
• Setting the user password restricts who can boot the computer. The
password prompt will be displayed before the computer is booted. If only
the supervisor password is set, the computer boots without asking for a
password. If both passwords are set, the user can enter either password to
boot the computer.
• For enhanced security, use different passwords for the supervisor and user
passwords.
• Valid password characters are A-Z, a-z, and 0-9. Passwords may be up to
16 characters in length.
Table 31 shows the effects of setting the supervisor password and user password. This
table is for reference only and is not displayed on the screen.
Table 31. Supervisor and User Password Functions
Password
Set
Neither Can change all
Supervisor
only
User only N/A Can change all
Supervisor
and user set
Note: If no pas s word is set, any user can change all Setup op tions.
Supervisor
Mode
options
Can change all
options
Can change all
options
(Note)
User Mode
Can change all
options
Can change a
limited
number of
options
options
Can change a
limited
number of
options
(Note)
Setup Options
None None None
Supervisor Password Supervisor None
Enter Password
Clear User Password
Supervisor Password
Enter Password
Password
to Enter
Setup
User User
Supervisor or
user
Password
During
Boot
Supervisor or
user
68
(Note)
4 Board Status and Error Messages
4.1 BIOS Beep Codes
The BIOS uses audible beep codes to signal status messages and error messages
indicating recoverable errors that occur during the POST. The beep codes are listed in
Table 32. These beep codes can be heard through a speaker attached to the board’s
line out audio jack (see Figure 5, B on page 26).
Table 32. BIOS Beep Codes
Type Pattern Frequency
BIOS update in progress None
Video error
Memory error On-off (1.0 second eac h) three times, then
Thermal trip warning Alternate high and low beeps (1 .0 s e c ond each)
Note: Disabled pe r default BIOS s e tup o ption.
On-off (1.0 second ea c h) tw o tim e s , the n
2.5-second pause (o ff), entire pattern r e p e ats
(beeps and pause) o nc e and the BIOS will
continue to boot.
2.5-second pause (o ff), entire pattern r e p e ats
(beeps and pause) until the s y s te m is p o wered
off.
Whenever a recoverable error occurs during POST, the BIOS causes the board’s front
panel power LED to blink an error message describing the problem (see Table 33).
Table 33. Front-panel Power LED Blink Codes
Type Pattern Note
BIOS update in progress Off when the update b e g ins , the n on for
0.5 seconds, then off for 0.5 seconds. The
pattern repeats until the B IOS update is
complete.
Video error
Memory error On-off (1.0 second e ac h) three times, then
Thermal trip warning Each beep will be accompanied b y the following
Note: Disabled pe r default BIOS s e tup o ption.
On-off (1.0 second ea c h) tw o tim e s , the n
2.5-second pause (o ff), entire pattern r e p e ats
(blink and pause) until the sy s te m is p owered
off.
2.5-second pause (o ff), entire pattern r e p e ats
(blinks and pause) until the system is powered
off.
blink pattern: .25 se c onds on, .25 seconds off,
.25 seconds on, .25 seconds off. This will result
in a total of 16 blinks.
When no VGA option R O M is
found.
4.3 BIOS Error Messages
Whenever a recoverable error occurs during POST, the BIOS displays an error message
describing the problem. Table 34 lists the error messages and provides a brief
description of each.
Table 34. BIOS Error Messages
Error Message Explanation
CMOS Battery Low The battery may be losing power. Re place the battery so o n.
CMOS Checksum Bad The CMOS checksum is incorrect. CMOS memory may have
been corrupted. Run Setup to reset values.
Memory Size Decreased Memory size has decreased since the last boot. If no memory
was removed, then memory may be bad.
No Boot Device A vailable System did not find a d e vice to boot.
70
Board Status and Error Messages
4.4 Port 80h POST Codes
During the POST, the BIOS generates diagnostic progress codes (POST codes) to I/O
port 80h. If the P OST fails, execution stops and the last POST code generated is left at
port 80h. This code is useful for determining the point where an error occurred.
Displaying the POST codes requires a PCI bus add-in card, often called a POST card.
The POST card ca n d ecode the port and display the contents on a medium such as a
seven-segment display.
NOTE
The POST card must be installed in the PCI bus connector.
The following tables provide information ab out the POST codes generated by the BIOS:
• Table 35 lists the Port 80h POST code ranges
• Table 36 lists the Port 80 h POST codes themselves
• Table 37 lists the Port 80h POST sequence
NOTE
In the tables listed above, all POST codes and range values are listed in hexadecimal.
Table 35. Port 80h POST Code Ranges
Range Subsystem
0x00 – 0x05 Entering SX states S0 to S5.
0x10, 0x20, 0x30 Resuming f rom SX states (0x10 – 0x20 – S2, 0x30 – S3, etc.)
0x11 – 0x1F PEI phase pre MRC execution
0x21 – 0x29 MRC memory detection
0x2A – 0x2F PEI phase post MRC execution
0x31 – 0x35 Recovery
0x36 – 0x3F Platform DXE driver
0x41 – 0x4F CPU Initialization (PEI, D X E, S MM)
0x50 – 0x5F I/O Buses: PCI, USB, ATA etc . 0 x5F is an unrecov e r a b le e rror. Start with PCI.
0x60 – 0x6F BDS
0x70 – 0x7F Output devices: All output consoles.
0x80 – 0x8F For future use
0x90 – 0x9F Input devices: Keyboard/Mouse.
0xA0 – 0xAF Fo r future use
0xB0 – 0xBF Boot Devices: Includes fixed me d ia a nd removable media. Not that critical since
consoles should b e up at this point.
0xC0 – 0xCF For future use
0xD0 – 0xDF For future use
ACPI S States
0x00,0x01,0x02,0x03,0x04,0x05 Entering S0, S2, S3, S4, or S5 state
0x10,0x20,0x30 Resuming from S2, S 3, S4, or S5 state
PEI before MRC
PEI Platform driver
0x11 Set boot mode, GPIO init
0x12 Early chipset register programming
0x13 Basic chipset initialization
0x14 LAN init
0x15 Exit early platform init driver
PEI SMBUS
0x16 SMBUS driver init
0x17 Entry to SMBUS execute read/wr ite
0x18 Exit SMBUS execute read/write
Memory
0x21 MRC entry point
0x24 Detecting presence of memory DIMMs
0x25 Override Detected DIMM settings
0x27 Configuring memory.
0x28 Testing memory
PEIMs/Recovery
0x31 Crisis Recovery has initiated
0x33 Loading recovery capsule
0x34 Start recovery capsule / v ali d c apsule is found
CPU Initialization
CPU PEI Phase
0x41 Begin CPU PEI Init
0x42 XMM instruction enabling
0x43 End CPU PEI Init
CPU PEI SMM Phase
0x44 Begin CPU SMM Init smm relocate bases
0x45 Smm relocate bases for APs
0x46 End CPU SMM Init
continued
72
Board Status and Error Messages
Table 36. Port 80h POST Codes (continued)
Port 80 Code P rogress Code Enumeration
CPU DXE Phase
0x47 CPU DXE Phase beg in
0x48 Refresh memory space attributes according to MTRRs
0x49 Load the microcode if needed
0x4A Initialize strings to HII d ata b as e
0x4B Initialize MP support
0x4C CPU DXE Phase End
CPU DXE SMM Phase
0x4D CPU DXE SMM Phase begin
0x4E Relocate SM bases for all APs
0x4F CPU D X E SMM Phase end
I/O BUSES
0x50 Enumerating PCI bus e s
0x51 Allocating reso urces to PCI bus
0x52 Hot Plug PCI contr oller initialization
USB
0x58 Resetting USB b us
0x59 Reserved for USB
ATA/ATAPI/SATA
0x5A Resetting PATA/SATA bus and al l d e vices
0x5B Reserved for ATA
BDS
0x60 BDS driver entry point initialize
0x61 BDS service r o utine e ntry point (can be called m ultip le tim e s )
0x62 BDS Step2
0x63 BDS Step3
0x64 BDS Step4
0x65 BDS Step5
0x66 BDS Step6
0x67 BDS Step7
0x68 BDS Step8
0x69 BDS Step9
0x6A BDS Step10
0x6B BDS Step11
0x6C BDS Step12
0x6D BDS Step13
0x6E BDS Step14
0x6F BDS return to DXE cor e (should not get here)
Keyboard (PS/2 or USB)
0x90 Resetting keyboard
0x91 Disabling the key board
0x92 Detecting the presence of the keyboard
0x93 Enabling the keyboard
0x94 Clearing keyboard input buff e r
0x95 Instructing keyboard controller to run Self Tes t (PS /2 only)
Mouse (PS/2 or USB)
0x98 Resetting mouse
0x99 Detecting mouse
0x9A Detecting presence of mouse
0x9B Enabling mouse
Fixed Media
0xB0 Resetting fixed med ia
0xB1 Disabling fixed medi a
0xB2 Detecting presence o f a fixed media (I DE hard drive de te c tio n e tc .)
0xB3 Enabling/configuring a fixed media
Removable Media
0xB8 Resetting removable me dia
0xB9 Disabling removable me dia
0xBA Detecting presence of a removable media (IDE, CDROM de te c tion
etc.)
0xBC Enabling/configuring a re m o vable media
DXE Core
0xE4 Entere d DXE phase
BDS
0xE7 Waiting f o r user input
0xE8 Checking password
0xE9 Entering B IOS setup
0xEB Calling Legacy Op tion ROMs
Runtime Phase/EFI OS Boot
0xF8 EFI bo ot serv ice ExitBootServices ( ) has be e n c all e d
0xF9 EF I runtime service S e tV irtualAddressMap ( ) has been called
74
Table 37. Typical Port 80h POST Sequence
POST Code Description
24 Detecting presence of memory DIMMs
27 Configuring memo ry
28 T e s ting me m o ry
33 Loading recovery capsule
E4 Entered DXE phas e
50 Enum e rating PCI buses
51 Allocating resour c e d to PCI bus
92 D etecting the presence of the keyboard
90 Resetting keybo ard
94 Clearing keybo ard input buffer
95 Keybo ard Self Test
EB Calling V i d e o BIOS
58 Resetting USB bus
5A Resetting PA TA /SATA bus and all devic e s
92 D etecting the presence of the keyboard
90 Resetting keybo ard
94 Clearing keybo ard input buffer
5A Resetting PA TA /SATA bus and all devices
28 T e s ting me m o ry
90 Resetting keybo ard
94 Clearing keybo ard input buffer
E7 Waiting for user input
00 Ready to boot
A3 Legacy USB driver disconnect
5.1.2 European Union Declaration of Conformity
Statement
We, Intel Corporation, declare under our sole responsibility that the product Intel®
Desktop Board D2550DC2 is in conformity with all applicable essential requirements
necessary for CE marking, following the provisions of the European Council Directive
2004/108/EC (EMC Directive), 2006/95/EC (Low Voltage Directive), and 2002/95/EC
(ROHS Directive).
The product is properly CE marked demonstrating this conformity and is for
distribution within all member states of the EU with no restrictions.
This product follows the provisions of the European Directives 2004/108/EC,
2006/95/EC, and 2002/95/EC.
ČeštinaTento výrobek odpovídá požadavkům evropských směrnic 2004/108/EC,
2006/95/EC a 2002/95/EC.
Dansk Dette produkt er i overensstemmelse med det europæiske direktiv
2004/108/EC, 2006/95/EC & 2002/95/EC.
Dutch Dit product is in navolging van de bepalingen van Europees Directief
2004/108/EC, 2006/95/EC & 2002/95/EC.
Eesti Antud toode vastab Euroopa direk tiivides 2004/108/EC, ja 2006/95/EC ja
2002/95/EC kehtestatud nõuetele.
Suomi Tämä tuote noudattaa EU-direktiivin 2004/108/EC, 2006/95/EC & 2002/95/EC
määräyksiä.
Français Ce produit est conforme aux exigences de la Directive Européenne
2004/108/EC, 2006/95/EC & 2002/95/EC.
Deutsch Dieses Produkt entspricht den Bestimmungen der Europäischen Richtlinie
2004/108/EC, 2006/95/EC & 2002/95/EC.
Ελληνικά Το παρόν προϊόν ακολουθεί τις διατάξεις των Ευρωπαϊκών Οδηγιών
2004/108/EC, 2006/95/EC και 2002/95/EC.
Magyar E termék megfelel a 2004/108/EC, 2006/95/EC és 2002/95/EC Európai
Irányelv előírásainak.
Icelandic Þessi vara stenst reglugerð Evrópska Efnahags Bandalagsins númer
2004/108/EC, 2006/95/EC, & 2002/95/EC.
Italiano Questo prodotto è conforme alla Direttiva Europea 2004/108/EC,
2006/95/EC & 2002/95/EC.
LatviešuŠis produkts atbilst Eiropas Direktīvu 2004/108/EC, 2006/95/EC un
2002/95/EC noteikumiem.
LietuviųŠis produktas atitinka Europos direktyvų 2004/108/EC, 2006/95/EC, ir
2002/95/EC nuostatas.
Malti Dan il-prodott hu konformi mal-provvedimenti tad-Direttivi Ewropej
2004/108/EC, 2006/95/EC u 2002/95/EC.
Norsk Dette produktet er i henhold til bestemmelsene i det europeiske direktivet
2004/108/EC, 2006/95/EC & 2002/95/EC.
Polski Niniejszy produkt jest zgodny z postanowieniami Dyrektyw Unii Europejskiej
2004/108/EC, 206/95/EC i 2002/95/EC.
78
Regulatory Complia nc e and Battery Disposal Information
中文
Portuguese Este produto cumpre com as normas da Diretiva Européia 2004/108/EC,
2006/95/EC & 2002/95/EC.
Español Este producto cumple con las normas del Directivo Europeo 2004/108/EC,
2006/95/EC & 2002/95/EC.
Slovensky Tento produkt je v súlade s ustanoveniami európskych direktív
2004/108/EC, 2006/95/EC a 2002/95/EC.
SlovenščinaIzdelek je skladen z določbami evropskih direktiv 2004/108/EC,
2006/95/EC in 2002/95/EC.
Svenska Denna produkt har tillverkats i enlighet med EG-direktiv 2004/108/EC,
2006/95/EC & 2002/95/EC.
TürkçeBu ürün, Avrupa Birliği’nin 2004/108/EC, 2006/95/EC ve 2002/95/EC
yönergelerine uyar.
5.1.3 Product Ecology Statements
The following information is provided to address worldwide product ecology concerns
and regulations.
5.1.3.1 Disposal Considerations
This product contains the fo llowing mater ials that may be regulated upon disposal:
lead solder on the printed wiring board assembly.
5.1.3.2 Recycling Considerations
As part of its commitment to environmental responsibility, Intel has implemented the
Intel Product Recycling Program to allow retail consumers of Intel’s branded products
to return used products to selected locations for proper recycling.
Please consult the http://www.intel.com/intel/other/ehs/product_ecology for the
details of this program, including the scope of covered products, available locatio ns,
shipping instructions, terms and conditions, e tc.
作为其对环境责任之承诺的部分,英特尔已实施 Intel Product Recycling Program
Als Teil von Intels Engagement für den Umweltschutz hat da s Unternehmen das Intel
Produkt-Recyclingprogramm implementiert, das Einzelhandelskunden von Intel
Markenprodukten ermöglicht, gebrauchte Produkte an ausgewählte Standorte für
ordnungsgemäßes Recycling zurückzugeben.
Details zu diesem Programm, einschließlich der darin eingeschlossenen Produkte,
verfügbaren Standorte, Versandanweisung en, Bedingungen usw., finden Sie auf der
Español
Como parte de su compromiso de responsabilidad medioambiental, Intel ha
implantado el programa de reciclaje de productos Intel, que permite que los
consumidores al d etalle de los productos Intel devuelvan los productos usados en los
lugares seleccionados para su correspondiente reciclado.
Consulte la http://www.intel.com/intel/other/ehs/product_ecologypara ver los detalles
del programa, que incluye los productos que abarca, los lugares disponibles,
instrucciones de envío, términos y condiciones, etc.
Français
Dans le cadre de son engagement pour la protection de l'environnement, Intel a mis
en œuvre le programme Intel Product Recycling Program (Programme de recyclage des
produits Intel) pour permettre aux consommateurs de produits Intel de recycler les
produits usés en les retournant à des adresses spécifiées.
Visitez la page Web http://www.intel.com/intel/other/ehs/product_ecology pour en
savoir plus sur ce programme, à savoir les produits concernés, les adresses
disponibles, les instructions d'expé d ition, les conditions générales, etc.
Sebagai sebahagian daripada komitmennya te rhadap tanggungjawab persekitaran,
Intel telah melaksa nakan Program Kitar Semula Produk unt u k membenarkan
pengguna-pengguna runcit produk jenama Intel memulangkan produk t erguna ke
lokasi-lokasi terpilih untuk dikitarkan semula dengan betul.
Sila rujuk http://www.intel.com/intel/other/ehs/product_ecology untuk m endapatkan
butir-butir program ini, termasuklah skop produk yang dirangkumi, lokasi-lokasi
tersedia, arahan penghantaran, terma & syar a t, dsb.
Portuguese
Como parte deste compromisso com o respeito ao ambiente, a Intel implementou o
Programa de Reciclagem de Produtos para que os consumidores finais possam enviar
produtos Intel usados para locais selecionados, onde esses produtos são reciclados de
maneira adequada.
Consulte o site http://www.intel.com/intel/other/ehs/product_ecology (em Inglês)
para obter os detalhes sobre este programa, inclusive o escopo dos produtos cobertos,
os locais disponíveis, as instruções de envio, os termos e condições, etc.
80
Regulatory Complia nc e and Battery Disposal Information
Russian
В качестве части своих обязательств к окружающей среде, в Intel создана
программа утилизации продукции Intel (Product Recycling Progr am) для
предоставления конечным пользователям марок продукции Intel возможности
возврата используемой продукции в специализированные пункты для должной
утилизации.
Пожалуйста, обратитесь на веб-сайт
http://www.intel.com/intel/other/ehs/product_ecology за информацией об этой
программе, принимаемых продуктах, местах приема, инструкциях об отправке,
положениях и условиях и т.д.
Türkçe
Intel, çevre sorumluluğuna bağımlılığının bir parçası olarak, perakende tüketicilerin
Intel markalı kullanılmış ürünlerini belirlenmiş merkezlere iade edip uygun şekilde geri
dönüştürmesini amaçlayan Intel Ürünleri Geri Dönüşüm Programı’nı uygulamaya
koymuştur.
Bu programın ürün kapsamı, ürün iade merkezleri, nakliye talimatları, kayıtlar ve
şartlar v.s dahil bütün ayrıntılarını ögrenmek için lütfen
Intel Desktop Board D2550DC2 complies with the EMC regulations stated in Table 39
when correctly installed in a compatible host system.
Table 39. EMC Regulations
Regulation Title
FCC 47 CFR Part 15,
Subpart B
ICES-003 Interference-Causing Equipment Sta nd ard, Digital Appar atus . (C anada)
EN55022 Limits and methods of measurement of Radio Inter ference Characteristics
EN55024 Information Technology Eq ui p me nt – Immunity Characteristics Limits and
EN55022 Australian Communications Authority, S ta nd ard for Electro m ag ne tic
CISPR 22 Limits and methods of me as urement of Radio D isturbance Characteristics
CISPR 24 Information Tec hno l o gy Equipment – Immunity Characteristics – Limits
VCCI V-3, V-4 Voluntary Control f o r Interferenc e b y Information Te c hnology Equipment.
KN-22, KN-24 Korean Communications Commis s io n – Framework Act on
CNS 13438 Bureau of Standards, Metrology, and Inspection (Taiwan)
Title 47 of the Code of Federal R e gulations, Part 15, Subp a r t B , Radio
Frequency Devices. (USA)
of Information Technology Equip me nt. (European Union)
methods of measurement. (European Union)
Compatibility. (Austr ali a and N e w Z e al and )
of Information Technology Equip me nt. (International)
and Methods of Measurement. (International)
(Japan)
Telecommunications and Radio Waves Act (So uth Korea)
This device complies with Part 15 of the FCC Rules. Operation is subject to the
following two conditions: (1) this device may not cause harmful interference, and (2)
this device must accept any interference received, including interference that may
cause undesired operation.
For questions related to the EMC performance of this product , contact:
Intel Corpo ration, 5200 N.E. Elam Young Parkw a y, Hillsboro, OR 97124
1-800-628-8686
This equipment has been teste d a nd found to comply with the limits for a Class B
digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to
provide reasonable protection against harmful interference in a residential installation.
This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in acco rdance with the instructions, may cause harmful interference
to radio communications. However, there is no guarantee that interference will not
occur in a particular installation. If this equipme n t does cause harmful interference to
radio or television reception, which can be determined by turning the equipment off
and on, the user is encouraged to try to correct the interference by one or more of the
following measures:
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and the receiver.
• Connect the equipment to an outlet on a circuit other than the one to which
the receiver is connected.
• Consult the dealer or an experienced radio/TV technician for help.
Any changes or modifications to the equipment not expressly approved by Intel
Corporation could void the us er’s authority to operate the equipment.
Tested to comply with FCC sta nda rds for home or office use.
Canadian Department o f C o mmun ications Compliance Statement
This digital apparatus does not exceed the Class B limits for radio noise emissions from
digital apparatus set out in the Radio Interf erence Regulations of the Canadian
Department of Comm unications.
Le présent appareil numerique német pas de bruits radioélectriques dépassant les
limites applicables aux appareils numériques de la classe B prescrites dans le
Réglement sur le broullage radioélectrique édicté par le ministére des Communications
du Canada.
82
Regulatory Complia nc e and Battery Disposal Information
Japan VCCI Statement
Japan VCCI Statement translation: This is a Class B product based on the standard of
the Voluntary Control Council for Interference from Information Technology Equipment
(VCCI). If this is used near a radio or television receiver in a domestic environment, it
may cause radio interference. Install and use the equipment according to the
instruction manual.
Korea Class B Statement
Korea Class B Statement trans lation: This equipment is for home use, and has
acquired electromagnetic conformity registration, so it can be used not only in
residential areas, but also other areas.
5.1.5 ENERGY STAR* 5.0, e-Standby, and ErP
Compliance
Intel Desktop Board D2550DC2 meets the ENERGY STAR requirements listed in
Table 40 when used in corresponding system configurations.
Table 40. ENERGY STAR Requirements
ENERGY STAR
Specification
v4.0 Desktop Com p ute r Idle State (Cat A)
v4.0 Integrated Co m p ute r
v5.0 Desktop Com p ute r Off Mode
v5.0 Integrated De s ktop
v5.0 Thin Client Off Mode
Computer Type
Computer
Required
States
Sleep Mode
Standby Level
Sleep Mode
Idle State
Active State
Sleep Mode
Idle State (Cat B)
Capability
Adjustments
With and without
Wake On LAN
(Sleep, Standby)
With and without
additional internal
storage
With and without
Wake On LAN
(Sleep, Standby)
The Desktop Boards also meet the following international requirements:
• Republic of Korea e-Standby program
• European Union Energy-related Products (ErP) directive
Typical
Electricity
Consumption
(TEC) Criteria
N/A
Cat A under
“desktop
conventional” and
“desktop
proxying”
operational mode
weightings
N/A
For information about Refer to
ENERGY STAR req uirements and recomme nded configuratio ns http://www.intel.com/go/energystar
Electronic Produc t Environmental Assessm e nt To ol (EPEAT) http://www.epeat.net/
Korea e-Standby Pr o gram http://www.kemco.or.kr/new_eng/pg02
European Union Energ y-related Products Directive 200 9 (ErP) http://ec.europa.eu/enterprise/policies/s
Regulatory Complia nc e and Battery Disposal Information
5.1.6 Regulatory Compliance Marks (Board Level)
Intel Desktop Board D2550DC2 has the regulatory compliance marks shown in
Table 41.
Table 41. Regulatory Compliance Marks
Description Mark
UL joint US/Canada Rec o gnized Component mark. Includes adjac e nt U L file
number for Intel Desktop Boards: E210882.
FCC Declaratio n o f Conformity lo g o mark for Clas s B e quipment.
CE mark. Declaring c o m p li anc e to the European Union (EU) EMC d irective,
Low Voltage dire c tive, and RoHS dire c tiv e .
Australian Communications Authority (ACA) and Ne w Zealand Radio
Spectrum Management (NZ RSM) C-tick mark. Inc lud e s adjacent Intel
supplier code num b e r, N-232.
Japan VCCI (Voluntary Control Counc il f or Interfer e nc e ) mark.
Korea Certificati o n ma r k. Includes an adjace nt KC C (Korean
Communications Commis s ion) certification numbe r :
KCC-REM-CPU-D2550DC2.
Taiwan BSMI (Bureau o f Standards, Metrolo g y and Inspections ) mark.
Includes adjacent Intel company number, D33025.
Printed wiring boa r d manufacturer’s r e c o gnition mark. Consists o f a unique
UL recognized manuf a c tur e r’s logo, along wi th a f la mm ab il ity rating (solder
side).
China RoHS/Environme nta lly Friendly Use Period Logo: This is an example of
the symbol used on Intel Desktop Boards and associa te d c o l late ral. The
color of the mar k may vary depe nd ing upon the application. The
Environmental Friendly Usage Period (EFUP) for Intel De s k top Boards has
been determined to be 10 years.
Risk of explosion if the battery is replaced with an incorrect type. Batteries should be
recycled where possible. Disposal of used batteries must be in accordance with local
environmental regulations.
PRÉCAUTION
Risque d'explosion si la pile usagée est remplacée par une pile de type incorrect. Les
piles usagées doivent être recyclées dans la mesure du possible. La mise au rebut des
piles usagées doit respecter les réglementations locales en vigueur en matière de
protection de l'environnement.
FORHOLDSREGEL
Eksplosionsfare, hvis batteriet erstattes med et batteri af en forkert type. Batterier bør
om muligt genbruges. Bortskaffelse af brugte batterier bør foregå i overensstemmelse
med gældende miljølovgivning.
OBS!
Det kan oppstå eksplosjonsfare hvis batteriet skiftes ut med feil type. Brukte batterier
bør kastes i henhold til gjeldende miljølovgivning.
VIKTIGT!
Risk för explosion om batteriet ersä tts med felaktig batterityp. Batterier ska kasseras
enligt de lokala miljövårdsbestämmelserna.
VARO
Räjähdysvaara, jos pariston tyyppi on väärä. Paristot on kierrätettävä, jos se on
mahdollista. Käytetyt par i stot on hävitettävä paikallisten ympäristömäärä ysten
mukaisesti.
VORSICHT
Bei falschem Einsetzen einer neuen Batterie besteht Explosionsgefahr. Die Batterie
darf nur durch denselben oder einen entsprechenden, vom Hersteller empfohlenen
Batterietyp ersetzt werden. Entsorgen Sie verbrauchte Batterien den Anweisungen des
Herstellers entsprechend.
AVVERTIMENTO
Esiste il pericolo di un esplosione se la pila non viene sostituita in modo corretto.
Utilizzare solo pile uguali o di tipo equivalente a quelle consigliate dal produttore. Per
disfarsi delle pile usate, seguire le istruzioni del produttore.
86
Regulatory Complia nc e and Battery Disposal Information
PRECAUCIÓN
Existe peligro de explosión si la pila no se cambia de forma adecuada. Utilice
solamente pilas iguales o del mismo tipo que las recomendadas por el fabr icante del
equipo. Para deshacerse de las pilas usadas, siga igualmente las instrucciones del
fabricante.
WAARSCHUWING
Er bestaat ontploffingsgevaar als de batterij wordt vervangen door een onjuist type
batterij. Batterijen moeten zoveel mogelijk worden gerecycled. Houd u bij het
weggooien van gebruikte batterijen aan de plaatselijke milieuwetgeving.
ATENÇÃO
Haverá risco de explosão se a bateria for substituída por um tipo de bateria incorreto.
As baterias devem ser recicladas nos locais apropriados. A eliminação de baterias
usadas deve ser feita de acordo com as regulamentações ambientais da região.
AŚCIAROŽZNAŚĆ
Існуе рызыка выбуху, калі заменены акумулятар неправільнага тыпу.
Акумулятары павінны, па магчымасці, перепрацоўвацца. Пазбаўляцца ад старых
акумулятараў патрэбна згодна з мясцовым заканадаўствам па экалогіі.
UPOZORNÌNÍ
V případě výměny baterie za nesprávný druh může dojít k výbuchu. Je-li to možné,
baterie by měly být recyklovány. Baterie je třeba zlikvidovat v souladu s místními
předpisy o životním prostředí.
Προσοχή
Υπάρχει κίνδυνος για έκρηξη σε περίπτωση που η μπαταρία αντικατασταθεί από μία
λανθασμένου τύπου. Οι μπαταρίες θα πρέπει να ανακυκλώνονται όταν κάτι τέτοιο είναι
δυνατό. Η απόρριψη των χρησιμοποιημένων μπαταριών πρέπει να γίνεται σύμφωνα με
τους κατά τόπο περιβαλλοντικούς κανονισμούς.
VIGYÁZAT
Ha a telepet nem a megfelelő típusú telepre cseréli, az felrobbanhat. A telepeket
lehetőség szerint újra kell hasznosítani. A használt telepeket a helyi környezetvédelmi
előírásoknak megfelelően kell kiselejtezni.
Risiko letupan wujud jika bateri digantikan dengan jenis yang tidak betul. Bateri
sepatutnya dikitar semula jika boleh. Pelupusan bateri terpakai mes tila h mematuhi
peraturan alam sekitar tempatan.
OSTRZEŻENIE
Istnieje niebezpieczeństwo wybuchu w przypadku zastosowania niewłaściwego typu
baterii. Zużyte baterie należy w miarę możliwości utylizować zgodnie z odpowiednimi
przepisami ochrony środowiska.
PRECAUŢIE
Risc de explozie, dacă bateria este înlocuită cu un tip de baterie necorespunzător.
Bateriile trebuie reciclate, dacă este posibil. Depozitarea bateriilor uzate trebuie să
respecte reglementările locale privind protecţia mediului.
ВНИМАНИЕ
При использовании батареи несоответствующего типа существует риск ее взрыва.
Батареи должны быть утилизированы по возможности. Утилизация батарей должна
проводится по правилам, соответствующим местным требованиям.
UPOZORNENIE
Ak batériu vymeníte za nesprávny typ, hrozí nebezpečenstvo jej výbuchu.
Batérie by sa mali podľa možnosti vždy recyklovať. Likvidácia použitých batérií sa musí
vykonávať v súlade s miestnymi predpismi na ochranu životného pros tredia.
POZOR
Zamenjava baterije z baterijo drugačnega tipa lahko povzroči eksplozijo.
Če je mogoče, baterije reciklirajte. Rabljene baterije zavrzite v skladu z lokalnimi
okoljevarstvenimi predpisi.
UYARI
Yanlış türde pil takıldığında patlama riski vardır. Piller mümkün olduğunda geri
dönüştürülmelidir. Kullanılmış piller, yerel çevre yasalarına uygun olarak atılmalıdır.
OСТОРОГА
Використовуйте батареї правильного типу, інакше існуватиме ризик вибуху.
Якщо можливо, використані батареї слід утилізувати. Утилізація використаних
батарей має бути виконана згідно місцевих норм, що регулюють охорону довкілля.
88
Regulatory Complia nc e and Battery Disposal Information