Intel CD8069504201101 User Manual
Second Generation Intel® Xeon
Scalable Processors
Specification Update
April 2019
®
Notice: The Second Generation Intel® Xeon® Scalable Processors may contain design defects or errors known
as errata which may cause the product to deviate from published specifications. Current characterized errata are
available on request.
Reference Number: 338848-001US
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2 Second Generation Intel® Xeon® Scalable Processors
Specification Update
April 2019
Contents
Contents
Revision History ........................................................................................................4
Preface ......................................................................................................................5
Summary Tables of Changes......................................................................................7
Identification Information.........................................................................................9
Errata ...................................................................................................................... 18
Specification Changes.............................................................................................. 23
Specification Clarifications ...................................................................................... 24
Documentation Changes .......................................................................................... 25
Second Generation Intel
Specification Update
April 2019
®
Xeon® Scalable Processors 3
Revision History
Date Revision Description
April 2019 001 Initial Release (Intel Public).
Revision History
®
4 Second Generation Intel
April 2019
Xeon® Scalable Processors
Specification Update
Preface
Preface
This document is an update to the specifications contained in the next table: Affected
Documents. This document is a compilation of device and documentation errata,
specification clarifications and changes. It is intended for hardware system
manufacturers and software developers of applications, operating systems, or tools.
Information types defined in Nomenclature are consolidated into the specification
update and are no longer published in other documents.
This document may also contain information that was not previously published.
Affected Documents
Second Generation Intel
Electrical
Second Generation Intel
Registers
Related Documents
®
Intel
64 and IA-32 Architecture Software Developer Manual, Volume 1: Basic
Architecture
Volume 2A: Instruction Set Reference, A-M 253666
Volume 2B: Instruction Set Reference, N-Z 253667
756BVolume 3A: System Programming Guide, Part 1 253668
Volume 3B: System Programming Guide, Part 2 253669
ACPI Specifications www.acpi.info
1. Document is available publicly at http://developer.intel.com.
2. Document available at www.acpi.info.
Document Title
®
Xeon® Scalable Processors Datasheet: Volume 1 -
®
Xeon® Scalable Processors Datasheet: Volume 2 -
Document Title
Document Number/
Location
338845
338846
Document Number/
Location
1
253665
1
1
1
1
2
Second Generation Intel® Xeon® Scalable Processors 5
Specification Update
April 2019
Preface
Nomenclature
Errata are design defects or errors. These may cause the Product Name’s behavior to
deviate from published specifications. Hardware and software designed to be used with
any given stepping must assume that all errata documented for that stepping are
present on all devices.
Specification Changes are modifications to the current published specifications.
These changes will be incorporated in any new release of the specification.
Specification Clarifications describe a specification in greater detail or further
highlight a specification’s impact to a complex design situation. These clarifications will
be incorporated in any new release of the specification.
Documentation Changes include typos, errors, or omissions from the current
published specifications. These will be incorporated in any new release of the
specification.
Note: Errata remain in the specification update throughout the product’s lifecycle, or until a
particular stepping is no longer commercially available. Under these circumstances,
errata removed from the specification update are archived and available upon request.
Specification changes, specification clarifications and documentation changes are
removed from the specification update when the appropriate changes are made to the
appropriate product specification or user documentation (datasheets, manuals, etc.).
®
6 Second Generation Intel
April 2019
Xeon® Scalable Processors
Specification Update
Summary Tables of Changes
Summary Tables of Changes
The following tables indicate the errata, specification changes, specification
clarifications, or documentation changes which apply to the Product Name product.
Intel may fix some of the errata in a future stepping of the component, and account for
the other outstanding issues through documentation or specification changes as noted.
These tables uses the following notations:
Codes Used in Summary Tables
Stepping
Page
Status
Row
X: Errata exists in the stepping indicated. Specification Change or
Clarification that applies to this stepping.
(No mark)
or (Blank box): This erratum is fixed in listed stepping or specification change
does not apply to listed stepping.
(Page): Page location of item in this document.
Doc: Document change or update will be implemented.
Plan Fix: This erratum may be fixed in a future stepping of the product.
Fixed: This erratum has been previously fixed.
No Fix: There are no plans to fix this erratum.
Change bar to left of table row indicates this erratum is either
new or modified from the previous version of the document.
Second Generation Intel® Xeon® Scalable Processors 7
Specification Update
April 2019
Errata
Summary Tables of Changes
Number
CLX1. xxx No Fix
CLX2. xxx No FixIntel
CLX3. xxx No FixIDI_MISC Performance Monitoring Events May be Inaccurate
CLX4. xxx No FixIntel
CLX5. xxx No FixIntel
CLX6. xxx No Fix
CLX7. xxx No Fix
CLX8. xxx No Fix
CLX9. xxx No FixIntel
CLX10. xxx No FixNon-Zero Values May Appear in ZMM Upper Bits After SSE Instructions
CLX11. xxx No FixZMM/YMM Registers May Contain Incorrect Values
CLX12. xxx No Fix
CLX13. xxx No Fix
CLX14. xxx No FixPerforming an XACQUIRE to an Intel
CLX15. xxx No FixUsing Intel
CLX16. xxx No Fix
CLX17. xxx No FixPerformance in an 8sg System May Be Lower Than Expected
Steppings
B-1 L-1 R-1
Status Errata
Cache Allocation Technology (CAT)/CDP Might Not Restrict Cacheline
Allocation Under Certain Conditions (Intel
® PT PSB+ Packets May be Omitted on a C6 Transition
® PT CYC Packets Can be Dropped When Immediately Preceding PSB
® PT VM-entry Indication Depends on The Incorrect VMCS Control Field
Memory Bandwidth Allocation (MBA) Read After MSR Write May Return
Incorrect Value
In eMCA2 Mode, When The Retirement Watchdog Timeout Occurs
CATERR# May be Asserted
VCVTPS2PH To Memory May Update MXCSR in The Case of a Fault on The
Store
® PT May Drop All Packets After an Internal Buffer Overflow
When Virtualization Exceptions are Enabled, EPT Violations May Generate
Erroneous Virtualization Exceptions
® PT ToPA Tables Read From Non-Cacheable Memory During an Intel® Transactional
Intel
Synchronization Extensions (Intel® TSX) Transaction May Lead to Processor Hang
® PT ToPA Table May Lead to Processor Hang
® TSX Instructions May Lead to Unpredictable System Behavior
Reading Some C-state Residency MSRs May Result in Unpredictable
System Behavior
® Xeon® Processor Scalable Family)
Specification Changes
Number Specification Changes
1 None for this revision of this specification update.
Specification Clarifications
No. Specification Clarifications
1 None for this revision of this specification update.
Documentation Changes
No. Documentation Changes
1 None for this revision of this specification update.
®
8 Second Generation Intel
April 2019
Xeon® Scalable Processors
Specification Update
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