Intel CC820 User Manual

Intel® Desktop Board CC820
Technical Product Specification
November 1999 Order Number 748475-002
The Intel® Desktop Board CC820 may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current characterized errata are documented in the Intel Desktop Board CC820 Specification Update.
Revision History
Revision Revision History Date
-001 Intel Desktop Board CC820 Technical Product Specification September 1999
-002 Intel Desktop Board CC820 Technical Product Specification November 1999
This product specification applies to only standard CC820 boards with BIOS identifier CC82010A.86A.
Changes to this specification will be published in the Intel Desktop Board CC820 Specification Update before being incorporated into a revision of this document.
Information in this doc um ent is provided in connection wi t h Intel® products. No license, express or implied, by est oppel or otherwise, to any intell ectual property rights is granted by this document. E x cept as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and I nt el dis claims any express or implied warranty, relating to sale and/or use of I ntel products including liability or warranties relat i ng t o f i t ness for a particular purpose, merchantability, or infringement of any patent, copyright or other int ellec t ual propert y right. Intel products are not intended for use in medical, l i f e saving, or life sustai ni ng appl i cations.
Intel may make changes t o specifications and produc t descriptions at any tim e, without notice. The Intel Desktop Board CC820 may contain design defects or errors known as errata that may cause t he product to
deviate from published spec i fications. Current charac terized errata are available on request. Contact your local Int el sales office or your distributor to obtain the latest specifications before pl acing your product order. Copies of documents whic h hav e an orderi ng number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation P.O. Box 5937 Denver, CO 80217-9808
or call in North America 1-800-548-4725, Europe 44-0-1793-431-155, France 44-0-1793-421-777, Germany 44-0-1793-421-333, other Countries 708-296-9333.
Third-party brands and names are the property of their respective owners.
Copyright 1999, Intel Corporation. All rights reserved.

Preface

This Technical Product Specification (TPS) specifies the board layout, components, connectors, power and environmental requirements, and the BIOS for the Intel Desktop Board CC820. It describes the standard product and available manufacturing options.

Intended Audience

The TPS is intended to provide detailed, technical information about the CC820 board and its components to the vendors, system integrators, and other engineers and technicians who need this level of information. It is specifically not intended for general audiences.

What This Document Contains

Chapter Description
1 A description of the hardware used on the CC820 board 2 A map of the resources of the board 3 The features supported by the BIOS Setup program 4 The contents of the BIOS Setup program’s menus and submenus
5 A description of the BIOS error messages, beep codes, POST codes, and enhanced
diagnostics
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these symbols and abbreviations appear in all specifications of this type.

Notes, Cautions, and Warnings

NOTE
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
iii
Intel Desktop Board CC820 Technical Product Specification

Other Common Notation

# Used after a signal name to identify an active-low signal (such as USBP0#) (NxnX) When used in the description of a component, N indicates component type, xn are the relative
coordinates of its location on the CC820 board, and X is the instance of the particular part at that general location. For example, J5J1 is a connector, located at 5J. It is the first connector in the
5J area. KB Kilobyte (1024 bytes) Kbit Kilobit (1024 bits) MB Megabyte (1,048,576 bytes) Mbit Megabit (1,048,576 bits) GB Gigabyte (1,073,741,824 bytes) xxh An address or data value ending with a lowercase h indicates a hexadecimal value. x.x V Volts. Voltages are DC unless otherwise specified.
This symbol is used to indicate third-party brands and names that are the property of their
respective owners.
iv

Contents

1 Product Description
1.1 Overview ................................................................................................................... 12
1.1.1 Feature Summary ....................................................................................... 12
1.1.2 Manufacturing Option.................................................................................. 13
1.1.3 CC820 Board Layout ................................................................................... 14
1.1.4 Block Diagram............................................................................................. 15
1.2 Online Support........................................................................................................... 16
1.3 Design Specifications ................................................................................................ 16
1.4 Processor..................................................................................................................19
1.5 System Memory......................................................................................................... 20
1.5.1 ECC Memory............................................................................................... 20
1.5.2 DIMM Installation Guidelines ....................................................................... 21
®
1.6 Intel
1.7 I/O Controller............................................................................................................. 25
1.8 Audio......................................................................................................................... 28
1.9 Hardware Management Features.............................................................................. 32
1.10 Power Management Features.................................................................................... 33
820 Chipset...................................................................................................... 22
1.6.1 AGP............................................................................................................ 23
1.6.2 USB............................................................................................................. 23
1.6.3 IDE Support................................................................................................. 24
1.6.4 Real-Time Clock, CMOS SRAM, and Battery .............................................. 24
1.7.1 Serial Ports.................................................................................................. 26
1.7.2 Infrared Support.......................................................................................... 26
1.7.3 Parallel Port................................................................................................. 26
1.7.4 Diskette Drive Controller.............................................................................. 27
1.7.5 Keyboard and Mouse Interface ................................................................... 27
1.8.1 Audio/Modem Riser (AMR) Connector........................................................ 28
1.8.2 Enhanced PCI Audio Subsystem (Optional)................................................ 29
1.8.3 Audio Connectors........................................................................................ 30
1.9.1 Hardware Monitor Component .................................................................... 32
1.9.2 Chassis Intrusion Detect Connector............................................................ 32
1.10.1 Software Support ........................................................................................ 33
1.10.2 Hardware Support....................................................................................... 37
2 Technical Reference
2.1 Introduction................................................................................................................43
2.2 Memory Map ............................................................................................................. 43
2.3 I/O Map ..................................................................................................................... 44
2.4 DMA Channels .......................................................................................................... 46
2.5 PCI Configuration Space Map ................................................................................... 46
2.6 Interrupts...................................................................................................................47
2.7 PCI Interrupt Routing Map......................................................................................... 47
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Intel Desktop Board CC820 Technical Product Specification
2.8 Connectors................................................................................................................ 49
2.8.1 Back Panel Connectors............................................................................... 50
2.8.2 Midboard Connectors.................................................................................. 53
2.8.3 Front Panel Connectors .............................................................................. 66
2.9 Jumper Block............................................................................................................. 69
2.10 Mechanical Considerations........................................................................................ 71
2.10.1 Form Factor................................................................................................. 71
2.10.2 I/O Shield .................................................................................................... 72
2.11 Electrical Considerations........................................................................................... 74
2.11.1 Power Consumption.................................................................................... 74
2.11.2 Add-in Board Considerations....................................................................... 74
2.11.3 Standby Current Requirements................................................................... 75
2.11.4 Fan Power Requirements............................................................................ 76
2.11.5 Power Supply Considerations......................................................................76
2.12 Thermal Considerations............................................................................................. 77
2.13 Reliability................................................................................................................... 78
2.14 Environmental............................................................................................................ 79
2.15 Regulatory Compliance............................................................................................. 80
2.15.1 Safety Regulations...................................................................................... 80
2.15.2 EMC Regulations........................................................................................ 80
2.15.3 Certification Markings.................................................................................. 81
3 Overview of BIOS Features
3.1 Introduction................................................................................................................83
3.2 BIOS Flash Memory Organization............................................................................. 84
3.3 Resource Configuration............................................................................................. 84
3.3.1 PCI Autoconfiguration................................................................................. 84
3.3.2 PCI IDE Support.......................................................................................... 85
3.4 System Management BIOS (SMBIOS)...................................................................... 86
3.5 BIOS Upgrades ......................................................................................................... 87
3.5.1 Language Support....................................................................................... 87
3.5.2 Custom Splash Screen................................................................................ 87
3.6 Recovering BIOS Data.............................................................................................. 88
3.7 Boot Options.............................................................................................................. 89
3.7.1 CD-ROM and Network Boot........................................................................ 89
3.7.2 Booting Without Attached Devices.............................................................. 89
3.8 USB Legacy Support................................................................................................. 90
3.9 BIOS Security Features............................................................................................. 91
4 BIOS Setup Program
4.1 Introduction................................................................................................................93
4.2 Maintenance Menu.................................................................................................... 94
4.2.1 Extended Configuration Submenu............................................................... 95
4.3 Main Menu................................................................................................................. 95
4.4 Advanced Menu......................................................................................................... 96
4.4.1 PCI Configuration Submenu ........................................................................ 97
4.4.2 Boot Configuration Submenu ...................................................................... 98
4.4.3 Peripheral Configuration Submenu.............................................................. 99
vi
4.4.4 IDE Configuration Submenu ...................................................................... 101
4.4.5 Diskette Configuration Submenu............................................................... 103
4.4.6 Event Log Configuration Submenu............................................................ 104
4.4.7 Video Configuration Submenu................................................................... 105
4.5 Security Menu..........................................................................................................106
4.6 Power Menu............................................................................................................ 107
4.7 Boot Menu............................................................................................................... 108
4.7.1 IDE Drive Configuration Submenu............................................................. 109
4.8 Exit Menu................................................................................................................ 109
5 Error Messages and Beep Codes
5.1 BIOS Error Messages.............................................................................................. 111
5.2 Port 80h POST Codes............................................................................................. 113
5.3 Bus Initialization Checkpoints.................................................................................. 117
5.4 Speaker................................................................................................................... 118
5.5 BIOS Beep Codes................................................................................................... 118
5.6 Enhanced Diagnostics............................................................................................. 120
Contents
Figures
1. CC820 Board Components............................................................................................... 14
2. Block Diagram................................................................................................................... 15
3. Intel 820 Chipset Block Diagram....................................................................................... 22
4. Block Diagram of Audio Subsystem (with ICH and AMR).................................................. 28
5. Block Diagram of Audio Subsystem with Analog Codec and Digital Controller.................. 29
6. Using the Wake on LAN Technology Connector............................................................... 39
7. Location of Standby Power Indicator LED......................................................................... 40
8. Connector Groups............................................................................................................. 49
9. Back Panel Connectors..................................................................................................... 50
10. Audio Connectors.............................................................................................................. 54
11. Peripheral Interface and Indicator Connectors.................................................................. 57
12. Hardware Control and Power Connectors......................................................................... 60
13. Add-In Board Connectors.................................................................................................. 63
14. Front Panel Connectors.................................................................................................... 66
15. Location of the Jumper Block............................................................................................ 69
16. CC820 Board Dimensions................................................................................................. 71
17. I/O Shield Dimensions (for CC820 Boards with Audio Connectors)................................... 72
18. I/O Shield Dimensions (for CC820 Boards without Audio Connectors).............................. 73
19. Thermally-sensitive Components...................................................................................... 77
20. Memory Map of the Flash Memory Device........................................................................ 84
21. Enhanced Diagnostic LEDs............................................................................................. 120
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Intel Desktop Board CC820 Technical Product Specification
Tables
1. Feature Summary............................................................................................................. 12
2. Manufacturing Option........................................................................................................ 13
3. Specifications.................................................................................................................... 16
4. Supported Processors....................................................................................................... 19
5. Supported DIMM Sizes and Configurations (non-ECC specified)...................................... 20
6. Installation Guideline Summary......................................................................................... 21
7. Effects of Pressing the Power Switch................................................................................ 34
8. Power States and Targeted System Power ....................................................................... 35
9. Wake Up Devices and Events........................................................................................... 36
10. Fan Connector Descriptions.............................................................................................. 38
11. System Memory Map........................................................................................................ 43
12. I/O Map............................................................................................................................. 44
13. DMA Channels.................................................................................................................. 46
14. PCI Configuration Space Map........................................................................................... 46
15. Interrupts........................................................................................................................... 47
16. PCI Interrupt Routing Map ................................................................................................ 48
17. PS/2 Keyboard/Mouse Connectors................................................................................... 51
18. USB Connectors...............................................................................................................51
19. Parallel Port Connector..................................................................................................... 51
20. Serial Port Connectors...................................................................................................... 52
21. MIDI/Game Port Connector............................................................................................... 52
22. Audio Line Out Connector................................................................................................. 52
23. Audio Line In Connector.................................................................................................... 52
24. Mic In Connector............................................................................................................... 52
25. CD-ROM Legacy Style Connector (J2C1)......................................................................... 55
26. Audio/Modem Riser Connector (J3F1).............................................................................. 55
27. ATAPI CD-ROM Connector (J1F1) ................................................................................... 56
28. Telephony Connector (J2F1)............................................................................................. 56
29. Auxiliary Line In Connector (J2F2).................................................................................... 56
30. SCSI LED Connector (J7B3)............................................................................................. 58
31. PCI IDE Connectors (J7G1, Primary and J6G1, Secondary)............................................. 58
32. Diskette Drive Connector (J8G1) ...................................................................................... 59
33. Power Supply Fan 2 Control Connector (J5L1)................................................................. 61
34. Processor Fan 3 Connector (J2M1) .................................................................................. 61
35. Main Power Connector (J6M2).......................................................................................... 61
36. System Fan 1 Connector (J8D1)....................................................................................... 61
37. Wake on LAN Technology Connector (J7C2).................................................................... 62
38. Chassis Intrusion Connector (J7C1).................................................................................. 62
39. Wake on Ring Connector (J7B2)....................................................................................... 62
40. PCI Bus Connectors (J4A1, J4B1, J4C1, J4D1, J4E1)...................................................... 64
41. AGP Interface Connector (J5E1)....................................................................................... 65
42. Front Panel Connector (J8G2).......................................................................................... 67
43. States for a Single-Colored Power LED ............................................................................ 68
44. States for a Dual-Colored Power LED............................................................................... 68
45. Auxiliary Front Panel Power LED Connector (J8J2).......................................................... 68
46. BIOS Setup Configuration Jumper Settings (J7B1)........................................................... 70
viii
Contents
47. Power Usage .................................................................................................................... 74
48. Standby Current Requirements......................................................................................... 75
49. Thermal Considerations for Components.......................................................................... 78
50. CC820 Desktop Board Environmental Specifications........................................................ 79
51. Safety Regulations............................................................................................................ 80
52. EMC Regulations..............................................................................................................80
53. Supervisor and User Password Functions......................................................................... 91
54. BIOS Setup Program Menu Bar........................................................................................ 93
55. BIOS Setup Program Function Keys................................................................................. 94
56. Maintenance Menu............................................................................................................ 94
57. Extended Configuration Submenu..................................................................................... 95
58. Main Menu........................................................................................................................ 95
59. Advanced Menu................................................................................................................96
60. PCI Configuration Submenu.............................................................................................. 97
61. Boot Configuration Submenu............................................................................................ 98
62. Peripheral Configuration Submenu ................................................................................... 99
63. IDE Configuration Submenu............................................................................................ 101
64. IDE Configuration Sub-Submenus.................................................................................. 102
65. Diskette Configuration Submenu..................................................................................... 103
66. Event Log Configuration Submenu.................................................................................. 104
67. Video Configuration Submenu......................................................................................... 105
68. Security Menu................................................................................................................. 106
69. Power Menu.................................................................................................................... 107
70. Boot Menu....................................................................................................................... 108
71. IDE Drive Configuration Submenu.................................................................................. 109
72. Exit Menu........................................................................................................................ 109
73. BIOS Error Messages..................................................................................................... 111
74. Uncompressed INIT Code Checkpoints.......................................................................... 113
75. Boot Block Recovery Code Checkpoints......................................................................... 113
76. Runtime Code Uncompressed in F000 Shadow RAM..................................................... 114
77. Bus Initialization Checkpoints.......................................................................................... 117
78. Upper Nibble High Byte Functions .................................................................................. 117
79. Lower Nibble High Byte Functions .................................................................................. 118
80. Beep Codes .................................................................................................................. 119
81. Diagnostic LED Codes.................................................................................................... 121
ix
Intel Desktop Board CC820 Technical Product Specification
x

1 Product Description

What This Chapter Contains
1.1 Overview ................................................................................................................... 12
1.2 Online Support........................................................................................................... 16
1.3 Design Specifications ................................................................................................ 16
1.4 Processor.................................................................................................................. 19
1.5 System Memory......................................................................................................... 20
®
1.6 Intel
1.7 I/O Controller............................................................................................................. 25
1.8 Audio......................................................................................................................... 28
1.9 Hardware Management Features.............................................................................. 32
1.10 Power Management Features.................................................................................... 33
820 Chipset ..................................................................................................... 22
11
Intel Desktop Board CC820 Technical Product Specification

1.1 Overview

1.1.1 Feature Summary

Table 1 summarizes the CC820 board’s major features.
Table 1. Feature Summary
Form Factor Processor Memory
Chipset
I/O Control Video Peripheral
Interfaces
Expansion Capabilities
BIOS
Enhanced Diagnostics
Hardware Monitor Subsystem
Instantly Available PC
ATX (12.0 inches by 8.2 inches) Support for Intel
Two 168-pin SDRAM Dual Inline Memory Module (DIMM) sockets
Support for up to 512 MB system memory
Single or double-sided DIMMs supported
Intel® 820 Chipset, consisting of:
®
Intel
Intel
Intel
Intel® 82805AA Memory Translator Hub (MTH)
SMSC LPC47M102 ultra I/O controller AGP universal connector supporting 1X, 2X, and 4X AGP cards
Two serial ports
Two Universal Serial Bus (USB) ports
One parallel port
Two IDE interfaces with Ultra DMA and ATA 66 support
One diskette drive interface
Six add-in card expansion slots:
Five PCI bus add-in card connectors (SMBus routed to PCI connector – slot 2)
One AGP universal connector
Intel/AMI BIOS
Intel 82802AB 4 Mbit Firmware Hub (FWH)
Support for Advanced Power Management (APM), Advanced Configuration and
Four dual-color LEDs on back panel
Two fan sense inputs used to monitor fan activity
Two pin header security feature for intrusion detection
Remote diode temperature sense
Voltage sense to detect out of range values
Hardware monitor component
Support for
Suspend to RAM support
Wake on PS/2 keyboard and USB ports
® ®
Power Interface (ACPI), Plug and Play, and SMBIOS
®
Pentium® III and Pentium II processors
82820 Memory Controller Hub (MCH) 82801AA I/O Controller Hub (ICH) 82802AB 4 Mbit Firmware Hub (FWH)
PCI Local Bus Specification Revision 2.2
continued
12
Table 1. Feature Summary (continued)
Wake on LAN Technology Connector
Wake on Ring Connector
SCSI LED Connector
AMR
For information about Refer to
The board’s compliance level with APM, ACPI, Plug and Play, and SMBIOS. Section 1.3, page 16
Support for system wake up using an add-in network interface card with remote wake up capability
Support for system wake up using an add-in telephony device, such as a modem
Allows add-in SCSI controllers to use the same LED as the onboard I/O controller
Audio/Modem Riser connector

1.1.2 Manufacturing Option

Table 2 describes the CC820 board’s manufacturing option.
Table 2. Manufacturing Option
Audio
Audio Codec ’97 (AC ’97) compatible. The audio subsystem includes Creative Labs’ ES1373 AC ’97 Digital Controller with Crystal Semiconductor’s CS4297 Stereo Audio Codec.
Product Description
13
Intel Desktop Board CC820 Technical Product Specification

1.1.3 CC820 Board Layout

Figure 1 shows the location of the major components on the CC820 board.
R
Q
A
B
C
P
O
D E
F
NM K JIL HG
OM08893
A Back panel connectors J Battery B 242-contact slot connector K Speaker C Intel 82820 Memory Controller Hub (MCH) L Intel 82801AA I/O Controller Hub (ICH) D Power connector M SMSC LPC47M102 I/O Controller E Intel 82805 Memory Translator Hub (MTH) N Intel 82802AB 4 Mbit Firmware Hub (FWH) F DIMM sockets (Bank 0, upper; Bank 1, lower) O Creative Labs ES1373 Digital Controller (optional) G Diskette drive connector P AGP universal connector H Front panel connector Q PCI bus add-in card connectors I IDE connectors R Audio/Modem Riser (AMR) connector
Figure 1. CC820 Board Components
14

1.1.4 Block Diagram

Figure 2 is a block diagram of the major functional areas of the CC820 board.
Product Description
Processor Connector
82805AA
Memory
Translator
Hub (MTH)
SDRAM Bus
AGP Universal
Connector
Host Bus
820 Chipset
Memory Controller
DIMM Banks
(2)
AGP Interface
Hardware
Monitor
Secondary IDE
82820
Hub (MCH)
Primary/
AHA
Bus
SMBus
ATA33/66
82801AA I/O Controller Hub
(ICH)
Controller
PCI Bus
LPC Bus
LPC I/O
USB PortsUSB
82802AB
Firmware Hub
(FWH)
Diskette Drive
Connector
Serial Port A Serial Port B Parallel Port PS/2 Mouse
PS/2 Keyboard
MIDI/Game Port
Diagnostic
LEDs
PCI Slots
(5)
Figure 2. Block Diagram
AC Link
Audio
Modem
Riser
Enhanced
Audio
(Optional)
OM08889
15
Intel Desktop Board CC820 Technical Product Specification

1.2 Online Support

Find information about Intel’s CC820 board under “Product Info” or “Customer Support” at these World Wide Web sites:
http://www.intel.com/design/motherbd http://support.intel.com/support/motherboards/desktop
Find “Processor Data Sheets” or information about “Proper Date Access in Systems with Intel Motherboards” at these World Wide Web sites:
http://www.intel.com/design/litcentr http://support.intel.com/support/year2000
Find information about the ICH addressing at this World Wide Web site: http://developer.intel.com/design/chipsets/datashts/

1.3 Design Specifications

Table 3 lists the specifications applicable to the CC820 board.
Table 3. Specifications
Reference Name
AC ‘97
ACPI
AGP
AMI BIOS
AMR
APM
ATA-3
Specification Title
Audio Codec ‘97
Advanced Configuration and Power Interface Specification
Accelerated Graphics Port Interface Specification
American Megatrends BIOS Specification
Audio/Modem Riser Specification
Advanced Power Management BIOS Interface Specification
Information Technology ­AT Attachment-3 Interface, X3T10/2008D
Version, Revision Date, and Ownership
Version 2.1, May 1998, Intel Corporation.
Version 1.0b, February 1, 1999, Intel Corporation, Microsoft Corporation, and Toshiba Corporation.
Version 2.0, May 4, 1998, Intel Corporation.
AMIBIOS 99, 1999 American Megatrends, Inc.
Version 1.01, September 10, 1998, Intel Corporation.
Version 1.2, February 1996, Intel Corporation, Microsoft Corporation.
Version 6, October 1995, ASC X3T10 Technical Committee.
The information is
available from…
ftp://download.intel.com/ pc-supp/platform/ac97
http://www.teleport.com/~acpi/
the Accelerated Graphics Implementers Forum at:: http://www.agpforum.org/
http://www.amibios.com, or http://www.ami.com/download/ amibios99.pdf
ftp://download.intel.com/ pc-supp/platform/ac97/ amr101.pdf
http://www.microsoft.com/ hwdev/busbios/amp_12.htm
ATA Anonymous FTP Site: ftp://www.dt.wdc.com/ata/ ata-3/
continued
16
Table 3. Specifications (continued)
Specification
Description
ATAPI
ATX
EPP
El Torito
IrDA
LPC
PCI
Plug and Play
SDRAM PC SDRAM Unbuffered
Title
Information Technology AT Attachment with Packet Interface Extensions T13/1153D
ATX Specification
Enhanced Parallel Port IEEE std 1284.1-1997
Bootable CD-ROM format specification
Serial Infrared Physical Layer Link specification
Low Pin Count Interface Specification
PCI Local Bus Specification
PCI Bus Power Management Interface Specification
Plug and Play BIOS specification
DIMM Specification
PC SDRAM DIMM Specification
PC Serial Presence Detect (SPD) Specification
Version, Revision Date and Ownership
Version 18, August 19, 1998, Contact: T13 Chair, Seagate Technology.
Version 2.01, February 1997, Intel Corporation.
Version 1.7, 1997, Institute of Electrical and Electronic Engineers.
Version 1.0, January 25, 1995, Phoenix Technologies Ltd., and IBM Corporation.
Version 1.1, October 17, 1995, Infrared Data Association.
Version 1.0, September 29, 1997, Intel Corporation.
Version 2.2, December 18, 1998, PCI Special Interest Group.
Version 1.1, December 18, 1998, PCI Special Interest Group.
Version 1.0a, May 5, 1994, Compaq Computer Corp., Phoenix Technologies Ltd., and Intel Corporation.
Revision 1.0, February, 1998, Intel Corporation.
Revision 1.5, November, 1997, Intel Corporation.
Revision 1.2A, December, 1997 Intel Corporation.
Product Description
The information is
available from…
T13 Anonymous FTP Site: ftp://fission.dt.wdc.com/ x3t13/project/ d1153r18.pdf
http://developer.intel.com/ design/motherbd/atx.htm
http://standards.ieee.org/ reading/ieee/std_public/ description/busarch/
1284.1-1997_desc.html the Phoenix Web site at:
http://www.ptltd.com/techs /specs.html
Phone: (510) 943-6546 Fax: (510) 943-5600 E-mail: irda@netcom.com
http://www.intel.com/ design/chipsets/industry/ lpc.htm
http://www.pcisig.com/
http://www.pcisig.com/
http://www.microsoft.com/ hwdev/respec/ pnpspecs.htm
http://www.intel.com/ design/chipsets/memory
http://www.intel.com/ design/chipsets/memory
http://www.intel.com/ design/pcisets/memory
continued
17
Intel Desktop Board CC820 Technical Product Specification
Table 3. Specifications (continued)
Description
SMBIOS
UHCI
USB
WfM
Specification Title
System Management BIOS
Universal Host Controller Interface Design Guide
Universal Serial Bus Specification
Wired for Management Baseline
Version, Revision Date and Ownership
Version 2.3, August 12, 1998, Award Software International Inc., Dell Computer Corporation, Hewlett-Packard Company, Intel Corporation, International Business Machines Corporation, Phoenix Technologies Limited, American Megatrends Inc., and SystemSoft Corporation.
Version 1.1, March 1996, Intel Corporation.
Version 1.1, September 23, 1998, Compaq Computer Corporation, Intel Corporation, Microsoft Corporation, and NEC.
Version 2.0, December 18, 1998, Intel Corporation.
The information is
available from…
http://developer.intel.com/ ial/wfm/design/ smbios
http://www.usb.org/ developers
http://www.usb.org/ developers
http://developer.intel.com/ ial/WfM/wfmspecs.htm
18
Product Description

1.4 Processor

CAUTION
The CC820 desktop board supports processors that have a 19.3 A maximum current draw (2 V core), or 18.4 A maximum current draw (1.6 V core). Using a processor not in compliance with the above guidelines can damage the processor, the CC820 board, and the power supply. See
the processor’s data sheet for current usage requirements.
The CC820 board supports a single Pentium III or Pentium II processor. The host bus speed is automatically selected. The processor must be secured by a retention mechanism attached to the CC820 board.
The CC820 board supports a single 242-contact slot type processor as listed in Table 4.
Table 4. Supported Processors
Processor Type
Pentium III processor 450, 500, 550, and 600 100 512
Pentium II processor 350, 400, and 450 100 512
Processor Designation (MHz)
550E, 600E, 650, and 700 100 256 533B and 600B 133 512 533EB, 600EB, 667, and 733 133 256
Host Bus Frequency (MHz)
L2 Cache Size (KB)
NOTE
66 MHz host bus frequency processors are not supported in this product. A hardware lockout is provided so that if such a processor is installed, the CC820 board will not power-up.
All supported onboard memory can be cached, up to the cachability limit of the processor. See the
processor’s data sheet for cachability limits.
For information about Refer to
Processor support Section 1.2, page 16 Processor data sheets Section 1.2, page 16
19
Intel Desktop Board CC820 Technical Product Specification

1.5 System Memory

CAUTION
To be fully compliant with all applicable Intel® SDRAM memory specifications, the CC820 board requires DIMMs that support the Serial Presence Detect (SPD) data structure. If non-SPD DIMMs are installed, the system will not boot properly.
The CC820 desktop board has two DIMM sockets supporting 168-pin SDRAM DIMMs. When installing memory in the CC820 desktop board, proper memory installation guidelines should be followed as described in Section 1.5.2.
The CC820 desktop board supports the following memory features:
168-pin SDRAM DIMMs with gold-plated contacts
100 MHz SDRAM (only)
64 Mbit and 128 Mbit SDRAM component density (see Table 5 below)
Minimum system memory: 32 MB
Maximum system memory: 512 MB
Unbuffered single or double-sided DIMMs
Serial Presence Detect (SPD) memory (only)
Non-ECC and ECC DIMMs (ECC DIMMs will operate in non-ECC mode only)
3.3 V memory (only)
Suspend to RAM
Table 5. Supported DIMM Sizes and Configurations (non-ECC specified)
Total Number of SDRAM Components
DIMM Size
32 MB 4 4M x 64 64 Mbit 4M x 16 64 MB 8 8M x 64 64 Mbit 8M x 8 64 MB 8 (double sided) 8M x 64 64 Mbit 4M x 16 64 MB 4 8M x 64 128 Mbit 8M x 16 128 MB 16 (double sided) 16M x 64 64 Mbit 8M x 8 128 MB 8 16M x 64 128 Mbit 16M x 8 128 MB 8 (double sided) 16M x 64 128 Mbit 8M x 16 256 MB 16 (double sided) 32M x 64 128 Mbit 16M x 8
* Non-ECC DIMMs are specified. ECC DIMM organization will be x72 and will have up to one additional SDRA M
component for each side of DI M M
on DIMM*
Non-ECC DIMM Organization*
SDRAM Component Density
SDRAM Component Organization

1.5.1 ECC Memory

The CC820 board supports both ECC and non-ECC DIMMs, however, ECC DIMMs will operate in non-ECC mode only.
20
Product Description

1.5.2 DIMM Installation Guidelines

CAUTION
To be fully compliant with all applicable Intel SDRAM memory specifications, the CC820 desktop board requires DIMMs that support the Serial Presence Detect (SPD) data structure.
The CC820 board requires supported DIMMs be installed under the guidelines listed below.
If you have one DIMM, install it in Bank 0 (the memory slot closest to the processor). If only
one DIMM is installed in Bank 1, the system will still boot, however STR will not work.
If you have two identical DIMMs (same size, same number of sides, both single-sided or both
double-sided), install them in either bank 0 or bank 1.
If you have two DIMMs of different sizes (e.g., a 64 MB and 128 MB DIMM), install the
larger DIMM in Bank 0, and the smaller DIMM in Bank 1.
If you have two DIMMs of the same size and one is single-sided and one is double-sided,
install the single-sided DIMM in Bank 0 and the double-sided DIMM in bank 1.
NOTE
An ECC-type DIMM may have one or two additional SDRAM devices per side for ECC bit storage. Do not count these when determining the number of SDRAM devices on the DIMM.
Table 6 summarizes the DIMM installation guidelines given above.
Table 6. Installation Guideline Summary
Types of DIMMs to be installed… Bank 0 Bank 1
One DIMM DIMM (Empty) Two DIMMs - Same size, same number of sides (both single-
or both double-sided) Two DIMMs - Different sizes Larger DIMM Smaller DIMM Two DIMMs - Same size, one is single-sided and one is
double-sided
For information about Refer to
The
PC Serial Presence Detect Specification
Obtaining copies of PC SDRAM specifications Section 1.3, page 16
Section 1.3, page 16
Either DIMM Either DIMM
Single-sided DIMM Double-sided DIMM
21
Intel Desktop Board CC820 Technical Product Specification

1.6 Intel® 820 Chipset

The Intel 820 chipset consists of the following devices:
82820 Memory Controller Hub (MCH) with Accelerated Hub Architecture (AHA) bus
82801AA I/O Controller Hub (ICH) with AHA bus
82802AB Firmware Hub (FWH)
82805AA Memory Translator Hub (MTH)
The chipset provides the host, memory, AGP, and I/O interfaces shown in Figure 3.
ATA33/66 USBHost Bus
820 Chipset
82805AA
Memory
Translator
Hub (MTH)
SDRAM Bus
AGP Interface
82820
Memory Controller
Hub (MCH)
AHA
Bus
82801AA I/O Controller Hub
(ICH)
SMBus
PCI Bus
AC Link
Figure 3. Intel 820 Chipset Block Diagram
For information about Refer to The Intel 820 chipset http://developer.intel.com The resources used by the chipset Chapter 2 The chipset’s compliance with ACPI, APM, AC ‘97 Section 1.3, page 16
82802AB
Firmware Hub
(FWH)
LPC Bus
OM08890
22
Product Description

1.6.1 AGP

AGP is a high-performance interface for graphics-intensive applications, such as 3D applications. While based on the PCI Local Bus Specification, Rev. 2.1, AGP is independent of the PCI bus and is intended for exclusive use with graphical display devices. AGP overcomes certain limitations of the PCI bus related to handling large amount of graphics data with the following features:
Pipelined memory read and write operations that hide memory access latency
Demultiplexing of address and data on the bus for nearly 100 percent efficiency
For information about Refer to
Obtaining the
Accelerated Graphics Port Interface Specification
Section 1.3, page 16

1.6.2 USB

The CC820 board has two USB ports; one USB peripheral can be connected to each port. For more than two USB devices, an external hub can be connected to either port. The two USB ports are implemented with stacked back panel connectors. The CC820 board fully supports UHCI and uses UHCI-compatible software drivers. USB features include:
Self-identifying peripherals that can be plugged in while the computer is running
Automatic mapping of function to driver and configuration
Support for isochronous and asynchronous transfer types over the same set of wires
Support for up to 127 physical devices
Guaranteed bandwidth and low latencies appropriate for telephony, audio, and other
applications
Error-handling and fault-recovery mechanisms built into the protocol
NOTE
Computer systems that have an unshielded cable attached to a USB port may not meet FCC Class B requirements, even if no device or a low-speed USB device is attached to the cable. Use shielded cable that meets the requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 9, page 50 The signal names of the USB connectors Table 18, page 51 The USB specification and UHCI Section 1.3, page 16
23
Intel Desktop Board CC820 Technical Product Specification

1.6.3 IDE Support

1.6.3.1 IDE Interfaces
The CC820 board has two independent bus-mastering IDE interfaces. These interfaces support:
ATA 33/66
ATAPI devices (such as CD-ROM drives)
ATA devices using the transfer modes listed in Table 64 on page 102
The BIOS supports logical block addressing (LBA) and extended cylinder head sector (ECHS) translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The CC820 board supports laser servo (LS-120) diskette technology through its IDE interfaces.
The LS-120 drive can be configured as a boot device by setting the BIOS Setup program’s Boot menu to one of the following:
ARMD-FDD (ATAPI removable media device – floppy disk drive)
ARMD-HDD (ATAPI removable media device – hard disk drive)
For information about Refer to
The location of the IDE connectors Figure 11, page 57 The signal names of the IDE connectors Table 31, page 58
BIOS Setup program’s Boot menu Table 70, page 108
1.6.3.2 SCSI Hard Drive Activity LED Connector
The SCSI hard drive activity LED connector is a 1 x 2-pin connector that allows add-in SCSI controller to use the same LED as the IDE controller. This connector can be connected to the LED output of the add-in controller card. The LED will indicate when data is being read or written using the add-in controller.
For information about Refer to
The location of the SCSI hard drive activity LED connector Figure 11, page 57 The signal names of the SCSI hard drive activity LED connector Table 30, page 58

1.6.4 Real-Time Clock, CMOS SRAM, and Battery

The real-time clock is compatible with DS1287 and MC146818 components. The clock provides a time-of-day clock and a multicentury calendar with alarm features and century rollover. The real­time clock supports 256 bytes of battery-backed CMOS SRAM in two banks that are reserved for BIOS use.
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer is not plugged into a wall socket, the battery has an estimated life of three years. When the computer is plugged in, the standby current from the power supply extends the life of the battery. The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
The time, date, and CMOS values can be specified in the BIOS Setup program. The CMOS values can be returned to their defaults by using the BIOS Setup program.
24
Product Description
NOTE
If the battery and AC power fail, standard defaults, not custom defaults, will be loaded into CMOS RAM at power-on.
NOTE
The recommended method of accessing the date in systems with CC820 boards is indirectly from the Real-Time Clock (RTC) via the BIOS. The BIOS on CC820 boards contains a century checking and maintenance feature. This feature checks the two least significant digits of the year stored in the RTC during each BIOS request (INT 1Ah) to read the date and, if less than 80 (i.e., 1980 is the first year supported by the PC), updates the century byte to 20. This feature enables operating systems and applications using the BIOS date/time services to reliably manipulate the year as a four-digit value.
For information about Refer to
Proper date access in systems with CC820 boards Section 1.2, page 16

1.7 I/O Controller

The SMSC LPC47M102 I/O Controller provides the following features:
Low pin count (LPC) interface
3.3V operation
Two serial ports
One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
Serial IRQ interface compatible with serialized IRQ support for PCI systems
PS/2-style mouse and keyboard interfaces
Interface for one 1.2 MB, 1.44 MB, or 2.88 MB diskette drive
Intelligent power management, including a programmable wake up event interface
PCI Power Management Support
IrDA
Fan control:
The BIOS Setup program provides configuration options for the I/O controller.
For information about Refer to
SMSC LPC47M102 I/O controller http://www.smsc.com
1.0 compliant
Two fan control outputsTwo fan tachometer inputs
25
Intel Desktop Board CC820 Technical Product Specification

1.7.1 Serial Ports

The CC820 board has two 9-pin D-Sub serial port connectors located on the back panel. The serial
ports’ NS16C550-compatible UARTs support data transfers at speeds up to 115.2 kbits/sec with BIOS support. The serial ports can be assigned as COM1 (3F8h), COM2 (2F8h), COM3 (3E8h), or COM4 (2E8h).
For information about Refer to
The location of the serial port connectors Figure 9, page 50 The signal names of the serial port connectors Table 20, page 52

1.7.2 Infrared Support

On the front panel connector, there are four pins that support Hewlett-Packard HSDL-1000 compatible infrared (IR) transmitters and receivers. In the BIOS Setup program, Serial Port B can be directed to a connected IR device. (In this case, the serial port B connector on the back panel cannot be used.) The IR connection can be used to transfer files to or from portable devices like laptops, PDAs, and printers. The Infrared Data Association (IrDA) specification supports data transfers of 115 Kbits/sec at a distance of 1 meter.
For information about Refer to
The infrared port connector Table 42, page 67 Configuring serial port B for infrared applications Section 4.4.3, page 99 The IrDA specification Section 1.3, page 16

1.7.3 Parallel Port

The connector for the multimode bidirectional parallel port is a 25-pin D-Sub connector located on the back panel. In the BIOS Setup program, the parallel port can be configured for the following:
Output only (PC AT
Bi-directional (PS/2 compatible)
EPP
ECP
For information about Refer to
The location of the parallel port connector Figure 9, page 50 The signal names of the parallel port connector Table 19, page 51
-compatible mode)
26
Product Description

1.7.4 Diskette Drive Controller

The I/O controller supports one diskette drive that is compatible with the 82077 diskette drive
controller and supports both PC-AT
For information about Refer to
The location of the diskette drive connector Figure 11, page 57 The signal names of the diskette drive connector Table 32, page 59 The supported diskette drive capacities and sizes Table 65, page 103
and PS/2 modes.

1.7.5 Keyboard and Mouse Interface

PS/2 keyboard and mouse connectors are located on the back panel. The +5 V lines to these
connectors are protected with a PolySwitch connection after an overcurrent condition is removed.
NOTE
The keyboard is supported in the bottom PS/2 connector and the mouse is supported in the top PS/2 connector. Power to the computer should be turned off before a keyboard or mouse is connected or disconnected.
circuit that, like a self-healing fuse, reestablishes the
The keyboard controller contains the AMI keyboard and mouse controller code, provides the keyboard and mouse control functions, and supports password protection for power-on/reset. A power-on/reset password can be specified in the BIOS Setup program.
The keyboard controller also supports the hot-key sequence <Ctrl><Alt><Del> for a software
reset. This key sequence resets the computer’s software by jumping to the beginning of the BIOS code and running the power-on self-test (POST).
For information about Refer to
The location of the keyboard and mouse connectors Figure 9, page 50 The signal names of the keyboard and mouse connectors Table 17, page 51
27
Intel Desktop Board CC820 Technical Product Specification

1.8 Audio

The CC820 desktop board offers two audio subsystems. The first is the basic audio subsystem present on all CC820 boards consisting of:
Intel 82801AA I/O Controller Hub (ICH)
AMR connector
The second is an optional enhanced PCI audio subsystem consisting of:
ICH
AMR connector
Creative Labs ES1373 digital controller with Crystal Semiconductor CS4297 (A) codec
Both audio subsystems include these features:
Split digital/analog architecture for improved S/N (signal-to-noise) ratio: 85dB
Power management support for APM 1.2 and ACPI 1.0 (driver dependant)
3-D stereo enhancement
The Enhanced PCI Audio Subsystem has additional features described in Section 1.8.2.

1.8.1 Audio/Modem Riser (AMR) Connector

The AMR is a 46-pin riser connector that supports adding modems and/or audio risers to CC820
boards. The AMR interface, utilizing an AC ’97 2.1 link, includes support for audio codec, modem codec, and audio/modem codec devices.
82801AA
I/O Controller Hub (ICH)
AMR Connector
Figure 4. Block Diagram of Audio Subsystem (with ICH and AMR)
For information about Refer to
The location of the Audio/Modem Riser connector Figure 13, page 63 The signal names of the Audio/Modem Riser connector Table 26, page 55 The AMR specification Section 1.3, page 16
AC ’97 Link
OM09038
28
Product Description

1.8.2 Enhanced PCI Audio Subsystem (Optional)

The CC820 board offers an optional subsystem of AC ’97 V 1.03 compliant audio features supported by the Creative Labs ES1373 digital controller with Crystal Semiconductor CS4297 (A) codec. The enhanced PCI audio subsystem supports the following audio connectors:
Audio inputs:Three analog line-level stereo inputs for connection from line in, CD and auxTwo analog line-level inputs for speakerphoneOne mono microphone input
Audio outputs:Stereo line-level outputMono output for speakerphone
Analog Codec
(Crystal Semiconductor
CS4297(A))
Modem Audio
CD-ROM
Line In
Audio In
Mic In
Line Out
AMR Connector
I/O Controller Hub (ICH)
AC ’97 Link
82801AA
PCI Bus
AC ’97 Link
Digital Controller
(Creative Labs ES1373)
Game Port
MIDI Interface
OM08843
Figure 5. Block Diagram of Audio Subsystem with Analog Codec and Digital Controller
The Creative Labs ES1373 digital controller with the Crystal Semiconductor CS4297 (A) codec support the following features:
Creative Labs ES1373 AC ’97 V1.03 Digital Controller:PCI 2.1 compliantPCI bus master for PCI audio64-voice wavetable synthesizer
Aureal A3D
API, Sound Blaster Pro†, Roland MPU-401 MIDI, joystick compatible
Ensoniq 3D positional audio and Microsoft DirectSound† 3D support
Crystal Semiconductor CS4297 (A) Stereo Audio Codec:High performance 18-bit stereo full-duplex audio codec with up to 48 kHz sampling rateConnects to the ES1373 digital controller using a five-wire digital interface
For information about Refer to
Obtaining audio software and utilities Paragraph 1.2, page 16
29
Intel Desktop Board CC820 Technical Product Specification

1.8.3 Audio Connectors

The audio connectors include the following:
CD-ROM (legacy-style 2-mm connector)
ATAPI-style connectors:CD-ROMTelephonyAuxiliary line inVideo source line in
Back panel audio connectors:MIDI/Game PortLine outLine inMic in
Audio/Modem Riser (AMR)
For information about Refer to
The back panel audio connectors Section 2.8.1, page 50
NOTE
Some of the audio connectors are optional and are not installed on all versions of the CC820 board.
1.8.3.1 CD-ROM (Legacy-style 2 -mm) Connector
A 1 x 4-pin legacy-style 2-mm connector connects an internal CD-ROM drive to the audio mixer.
For information about Refer to
The location of the legacy-style 2-mm connector Figure 10, page 54 The signal names of the legacy-style 2 mm connector Table 26, page 55
30
Product Description
1.8.3.2 ATAPI CD-ROM Audio Connector
A 1 x 4-pin ATAPI-style connector connects an internal ATAPI CD-ROM drive to the audio mixer.
For information about Refer to
The location of the ATAPI CD-ROM connector Figure 10, page 54 The signal names of the ATAPI CD-ROM connector Table 27, page 56
1.8.3.3 Telephony Connector
A 1 x 4-pin ATAPI-style connector connects the monoaural audio signals of an internal telephony device to the audio subsystem. A monaural audio-in and audio-out signal interface is necessary for telephony applications such as speakerphones, fax/modems, and answering machines.
For information about Refer to
The location of the telephony connector Figure 10, page 54 The signal names of the telephony connector Table 28, page 56
1.8.3.4 Auxiliary Line In Connector
A 1 x 4-pin ATAPI-style connector connects the left and right channel signals of an internal audio device to the audio subsystem.
For information about Refer to
The location of the auxiliary line in connector Figure 10, page 54 The signal names of the auxiliary line in connector Table 29, page 56
31
Intel Desktop Board CC820 Technical Product Specification

1.9 Hardware Management Features

The hardware management features enable the board to be compatible with the Wired for Management (WfM) specification. The board has several hardware management features, including the following:
Hardware monitor component
Chassis intrusion detection
Fan control and monitoring (implemented on the SMSC LPC47M102 I/O controller)
For information about Refer to
The WfM specification Table 3, page 16 Fan control functions of the SMSC LPC47M102 I/O controller Section 1.7, page 25

1.9.1 Hardware Monitor Component

The hardware monitor component provides low-cost instrumentation capabilities. The features of the component include:
Internal ambient temperature sensing
Remote thermal diode sensing for direct monitoring of processor temperature (if supported in
the processor)
Power supply monitoring (+12, +5, +3.3, +2.5, 3.3 VSB, VCCP) to detect levels above or below acceptable values
SMBus interface

1.9.2 Chassis Intrusion Detect Connector

The board supports a chassis security feature that detects if the chassis cover is removed and sounds an alarm (through the onboard speaker or PC chassis speaker, if either is present). For the
chassis intrusion circuit to function, the chassis’ power supply must be connected to AC power. The security feature uses a mechanical switch on the chassis that attaches to the chassis intrusion detect connector. The mechanical switch is closed for normal computer operation.
For information about Refer to
The location of the chassis intrusion detect connector Figure 12, page 60 The signal names of the chassis intrusion detect connector Table 38, page 62
32

1.10 Power Management Features

Power management is implemented at several levels, including:
Software support:Advanced Power Management (APM)Advanced Configuration and Power Interface (ACPI)
Hardware support:Power connectorFan connectorsWake on LAN technologyInstantly Available technologyWake on RingResume on RingWake from USBWake on KeyboardWake on PME#
Product Description

1.10.1 Software Support

The software support for power management includes:
APM
ACPI
If the CC820 board is used with an ACPI-aware operating system, the BIOS can provide ACPI support. Otherwise, it defaults to APM support.
1.10.1.1 APM
APM makes it possible for the computer to enter an energy-saving standby mode. The standby mode can be initiated in the following ways:
Time-out period specified in the BIOS Setup program
From the operating system, such as the Standby menu item in Windows† 98
In standby mode, the CC820 board can reduce power consumption by spinning down hard drives, and reducing power to, or turning off of, VESA DPMS-compliant monitors. Power management mode can be enabled or disabled in the BIOS Setup program.
While in standby mode, the system retains the ability to respond to external interrupts and service requests, such as incoming faxes or network messages. Any keyboard or mouse activity brings the system out of standby mode and immediately restores power to the monitor.
33
Intel Desktop Board CC820 Technical Product Specification
The BIOS enables APM by default; but the operating system must support an APM driver for the power management features to work. For example, Windows 98 supports the power management features upon detecting that APM is enabled in the BIOS.
For information about Refer to
Enabling or disabling power management in the BIOS Setup program Section 4.6, page 106
The CC820 board’s compliance level with APM Table 3, page 16
1.10.1.2 ACPI
ACPI gives the operating system direct control over the power management and Plug and Play functions of a computer. The use of ACPI with the CC820 board requires an operating system that provides full ACPI support. ACPI features include:
Plug and Play (including bus and device enumeration) and APM support normally contained in the BIOS
Power management control of individual devices, add-in boards (some add-in boards may require an ACPI-aware driver), video displays, and hard disk drives
Methods for achieving less than 30-watt system operation in the power-on/standby sleeping state
A Soft-off feature that enables the operating system to power-off the computer
Support for multiple wake up events (see Table 9 on page 36)
Support for a front panel power and sleep mode switch. Table 7 lists the system states based
on how long the power switch is pressed, depending on how ACPI is configured with an ACPI-aware operating system.
Table 7. Effects of Pressing the Power Switch
…and the power switch is
If the system is in this state…
Off (ACPI G2/G5 – Soft off) Less than four seconds Power-on
On (ACPI G0 – working state) Less than four seconds Soft-off/Standby
On (ACPI G0 – working state) More than four seconds Fail safe power-off
Sleep (ACPI G1–sleeping state) Less than four seconds Wake up
Sleep (ACPI G1–sleeping state) More than four seconds Power-off
For information about Refer to
The CC820 board’s compliance level with ACPI Section 1.3, page 16
pressed for …the system enters this state
(ACPI G0 – working state)
(ACPI G1 – sleeping state)
(ACPI G2/G5 – Soft off)
(ACPI G0 – working state)
(ACPI G2/G5 – Soft off)
34
Product Description
1.10.1.2.1 System States and Power States
Under ACPI, the operating system directs all system and device power state transitions. The operating system puts devices in and out of low-power states based on user preferences and knowledge of how devices are being used by applications. Devices that are not being used can be turned off. The operating system uses information from applications and user settings to put the system as a whole into a low-power state.
Table 8 lists the power states supported by the CC820 board along with the associated system power targets. See the ACPI specification for a complete description of the various system and power states.
Table 8. Power States and Targeted System Power
Global States Sleeping States CPU States Device States Targeted System Power*
G0 – working state
G1 – sleeping state
G1 – sleeping state
G2/S5 S5 – Soft off.
G3 – mechanical off.
AC power is disconnected from the computer.
* Total system power is dependent on the system configuration, including add-in boards and peripherals powered by the
system chassis’ power supply.
** Dependent on the standby power consumpt i on of wake-up devices used in the system.
S0 – working C0 – working D0 – working
state
S1 – CPU stopped C1 – stop
grant
S3 – Suspend to RAM. Context saved to RAM.
Context not saved. Cold boot is required.
No power to the system.
No power D3 – no power
No power D3 – no power
No power D3 – no power for
D1, D2, D3 – device specification specific.
except for wake up logic.
except for wake up logic.
wake up logic, except when provided by battery or external source.
Full power > 60 W
5 W < power < 30 W
Power < 5 W **
Power < 5 W **
No power to t he system so that service can be performed.
35
Intel Desktop Board CC820 Technical Product Specification
1.10.1.2.2 Wake Up Devices and Events
Table 9 lists the devices or specific events that can wake the computer from specific states.
Table 9. Wake Up Devices and Events
These devices/events can wake up the computer… …from this state
Power switch S1, S3, S5 RTC alarm S1, S3, S5 LAN (through Wake on LAN connector) S5 PME# S1, S3, S5 Modem S1, S3 IR command S1, S3 USB S1, S3 PS/2 keyboard S1, S3
NOTE
The use of these wake up events from an ACPI state requires an operating system that provides full ACPI support. In addition, software, drivers, and peripherals must fully support ACPI wake events.
1.10.1.2.3 Plug and Play
In addition to power management, ACPI provides controls and information so that the operating system can facilitate Plug and Play device enumeration and configuration. ACPI is used only to enumerate and configure CC820 board devices that do not have other hardware standards for enumeration and configuration. PCI devices on the CC820 board, for example, are not enumerated by ACPI.
36
Product Description

1.10.2 Hardware Support

CAUTION
If the Wake on LAN and Instantly Available technology features are used, ensure that the power supply provides adequate +5 V standby current. Failure to do so can damage the power supply. The total amount of standby current required depends on the wake devices supported and manufacturing options. Refer to Section 2.11.3 on page 76 for additional information.
The CC820 board provides several hardware features that support power management, including:
Power connector
Fan connectors
Wake on LAN technology
Instantly Available technology
Wake on Ring
Resume on Ring
Wake from USB
Wake from PS/2 keyboard
PME# wakeup support
Wake on LAN technology and Instantly Available technology require power from the +5 V standby line. The sections discussing these features describe the incremental standby power requirements for each.
Wake on Ring and Resume on Ring enable telephony devices to access the computer when it is in a power-managed state. The method used depends on the type of telephony device (external or internal) and the power management mode being used (APM or ACPI).
NOTE
The use of Wake on Ring, Resume on Ring, and Wake from USB technologies from an ACPI state requires an operating system that provides full ACPI support.
1.10.2.1 Power Connector
When used with an ATX-compliant power supply that supports remote power-on/ -off, the CC820 board can turn off the system power through software control. To enable soft-off control in software, advanced power management must be enabled in the BIOS Setup program and in the operating system. When the system BIOS receives the correct APM command from the operating system, the BIOS turns off power to the computer.
With soft-off enabled, if power to the computer is interrupted by a power outage or a disconnected power cord, when power resumes, the computer returns to the power state it was in before power was interrupted (on or off).
For information about Refer to
The location of the power connector Figure 12, page 60 The signal names of the power connector Table 35, page 61 The ATX specification Section 1.3, page 16
37
Intel Desktop Board CC820 Technical Product Specification
1.10.2.2 Fan Connectors
The CC820 board has three fan connectors. The functions of these connectors are described in Table 10.
Table 10. Fan Connector Descriptions
Connector Function
System fan (Fa n 1) Provides +12 V DC for a system or chassis fan. The fan voltage can be switched
on or off, depending on the power management state of the computer. A tachometer feedback connection is also provided.
Power supply fan control (Fan 2)
Processor fan (Fan 3) Provides +12 V DC for a processor fan or active fan heatsink.
For information about Refer to
The location of the fan connectors Figure 12, page 60 The signal names of the fan connectors Section 2.8.2.3, page 60
Provides +12 V DC for a system or chassis fan. Th e fan voltage can be switched on or off, depending on the power management state of the computer. A tachometer feedback connection is also provided.
38
Product Description
1.10.2.3 Wake on LAN Technology CAUTION
For Wake on LAN technology, the 5-V standby line for the power supply must be capable of providing adequate +5 V standby current. Failure to provide adequate standby current when implementing Wake on LAN technology can damage the power supply. Refer to Section 2.11.3 on page 76 for additional information.
Wake on LAN technology enables remote wakeup of the computer through a network. The LAN subsystem PCI bus network adapter monitors network traffic at the Media Independent Interface.
Upon detecting a Magic Packet the computer. Depending on the LAN implementation, the CC820 board supports Wake on LAN technology in one of two ways:
Through the Wake on LAN technology connector (APM or ACPI S5 only)
Through the PCI bus PME# signal (for PCI 2.2 compliant LAN designs)
The Wake on LAN technology connector can be used with PCI bus network adapters that have a remote wake up connector, as shown in Figure 6. Network adapters that are PCI 2.2 compliant assert the wakeup signal through the PCI bus signal PME# (pin A19 on the PCI bus connectors).
frame, the LAN subsystem asserts a wakeup signal that powers up
Network Interface Card
PCI Slot
Remote
Wake up
connector
Wake on
LAN
technology
connector
Motherboard
OM08827
Figure 6. Using the Wake on LAN Technology Connector
For information about Refer to
The location of the Wake on LAN technology connector Figure 12, page 60 The signal names of the Wake on LAN technology connector Table 37, page 62
39
Intel Desktop Board CC820 Technical Product Specification
1.10.2.4 Instantly Available Technology CAUTION
For Wake on LAN technology, the 5-V standby line for the power supply must be capable of providing adequate +5 V standby current. Failure to provide adequate standby current when implementing Wake on LAN technology can damage the power supply. Refer to Section 2.11.3 on page 76 for additional information.
Instantly Available technology enables the CC820 board to enter the ACPI S3 (Suspend-to-RAM) sleep-state. While in the S3 sleep-state, the computer will appear to be off (the power supply is off, the fans are off, and the front panel LED is amber if dual-color, or off if single-color.) When signaled by a wake-up device or event, the system quickly returns to its last known wake state. Table 9 on page 36 lists the devices and events that can wake the computer from the S3 state.
The CC820 board supports the PCI Bus Power Management Interface Specification. For information on the versions of this specification, see Section 1.3. Add-in boards that also support this specification can participate in power management and can be used to wake the computer.
The use of Instantly Available technology requires operating system support and PCI 2.2 compliant add-in cards and drivers.
The standby power indicator LED shows that power is still present at the DIMM and PCI bus connectors, even when the computer appears to be off. Figure 7 shows the location of the standby power indicator LED.
DS7E1
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40
Figure 7. Location of Standby Power Indicator LED
1.10.2.5 Wake on Ring
The operation of Wake on Ring can be summarized as follows:
Powers up the computer from either the APM soft-off mode or the ACPI S3 states
Requires two calls to access the computer:
First call restores the computerSecond call enables access (when the appropriate software is loaded)
Detects incoming calls differently for external as opposed to internal modems:
For external modems, the CC820 board hardware monitors the Ring-Indicate (RI) input of
serial port A (serial port B does not support this feature)
For internal modems, a cable must be routed from the modem to the Wake on Ring (WOR)
connector
The Wake on Ring connector is a manufacturing option.
For information about Refer to
The location of the Wake on Ring connector Figure 12, page 62 The signal names of the Wake on Ring connector Table 39, page 61
Product Description
1.10.2.6 Resume on Ring
The operation of Resume on Ring can be summarized as follows:
Resumes operation from either the APM sleep mode or the ACPI S1 state
Requires only one call to access the computer
Detects incoming call similarly for external and internal modems; does not use the Wake on
Ring connector
Requires modem interrupt be unmasked for correct operation
1.10.2.7 Wake from USB
USB bus activity wakes the computer from an ACPI S1 or S3 state.
NOTE
Wake from USB requires the use of a USB peripheral that supports Wake from USB.
1.10.2.8 Wake from PS/2 Keyboard
PS/2 keyboard activity wakes the computer from an ACPI S1 or S3 state.
1.10.2.9 PME# Wakeup Support
When the PME# signal on the PCI bus is asserted, the computer wakes from an ACPI S1 or S3 state.
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Intel Desktop Board CC820 Technical Product Specification
42

2 Technical Reference

What This Chapter Contains
2.1 Introduction................................................................................................................43
2.2 Memory Map ............................................................................................................. 43
2.3 I/O Map ..................................................................................................................... 44
2.4 DMA Channels .......................................................................................................... 46
2.5 PCI Configuration Space Map ................................................................................... 46
2.6 Interrupts...................................................................................................................47
2.7 PCI Interrupt Routing Map......................................................................................... 47
2.8 Connectors................................................................................................................ 49
2.9 Jumper Block............................................................................................................. 69
2.10 Mechanical Considerations........................................................................................ 71
2.11 Electrical Considerations........................................................................................... 74
2.12 Thermal Considerations............................................................................................. 77
2.13 Reliability................................................................................................................... 78
2.14 Environmental............................................................................................................ 79
2.15 Regulatory Compliance............................................................................................. 80

2.1 Introduction

Sections 2.2 - 2.6 contain several standalone tables. Table 11 describes the System Memory Map, Table 12 shows the I/O Map, Table 13 lists the DMA Channels, Table 14 defines the PCI Configuration Space Map, and Table 15 describes the Interrupts. The remaining sections in this chapter are introduced by text found with their respective section headings.

2.2 Memory Map

Table 11. System Memory Map
Address Range (decimal) Address Range (hex) Size Description
1024 K - 524288 K 100000 - 1FFFFFFF 511 MB Extended memory 960 K - 1024 K F0000 - FFFFF 64 KB Runtime BIOS 896 K - 960 K E0000 - EFFFF 64 KB Reserved 800 K - 896 K C8000 - DFFFF 96 KB Available high DOS memory (open
to the PCI bus) 640 K - 800 K A0000 - C7FFF 160 KB Video memory and BIOS 639 K - 640 K 9FC00 - 9FFFF 1 KB Extended BIOS data (movable by
memory manager software) 512 K - 639 K 80000 - 9FBFF 127 KB Extended conventional memory 0 K - 512 K 00000 - 7FFFF 512 K Conventional memory
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Intel Desktop Board CC820 Technical Product Specification

2.3 I/O Map

Table 12. I/O Map
Address (hex) Size Description
0000 - 000F 16 bytes DMA controller 0020 - 0021 2 bytes Programmable Interrupt Control (PIC) 0040 - 0043 4 bytes System timer 0060 1 byte Keyboard controller byte—reset IRQ
0061 1 byte System speaker 0064 1 byte Keyboard controller, CMD / STAT byte 0070 - 0071 2 bytes System CMOS / Real Time Clock 0072 - 0073 2 bytes System CMOS 0080 - 008F 16 bytes DMA controller 0092 1 byte Fast A20 and PIC 00A0 - 00A1 2 bytes PIC 00B2 - 00B3 2 bytes APM control 00C0 - 00DF 32 bytes DMA 00F0 1 byte Numeric data processor 0170 - 0177 8 bytes Secondary IDE channel 01F0 - 01F7 8 bytes Primary IDE channel
One of these ranges: 0200 - 0207 0208 - 020F 0210 - 0217 0218 - 021F
One of these ranges: Audio (Sound Blaster Pro-compatible) 0220 - 022F 16 bytes 0240 - 024F 16 bytes 0228 - 022F* 8 bytes LPT3
0278 - 027F* 8 bytes LPT2 02E8 - 02EF* 8 bytes COM4 / video (8514A) 02F8 - 02FF* 8 bytes COM2
One of these ranges: 0320 - 0327 0330 - 0337 0340 - 0347 0350 - 0357
0376 1 byte Secondary IDE channel command port 0377, bits 6:0 7 bits Secondary IDE channel status port 0378 - 037F 8 bytes LPT1 0388 - 038B 6 bytes AdLib† (FM synthesizer)
03B0 - 03BB 12 bytes Intel 82820 - Memory Controller Hub (MCH) 03C0 - 03DF 32 bytes Intel 82820 - Memory Controller Hub (MCH) 03E8 - 03EF 8 bytes COM3
Can vary from 1 byte to 8 bytes
8 bytes MPU-401 (MIDI)
Audio / game port
continued
44
Table 12. I/O Map (continued)
Address (hex) Size Description
03F0 - 03F5 6 bytes Diskette channel 1 03F6 1 byte Primary IDE channel command port 03F8 - 03FF 8 bytes COM1
04D0 - 04D1 2 bytes Edge/level triggered PIC One of these ranges:
0530 - 0537 0E80 - 0E87 0F40 - 0F47
LPTn + 400 8 bytes ECP port, LPTn base address + 400h 0CF8 - 0CFB** 4 bytes PCI configuration address register 0CF9*** 1 byte Turbo and reset control register 0CFC - 0CFF 4 bytes PCI configuration data register FFA0 - FFA7 8 bytes Primary bus master IDE registers FFA8 - FFAF 8 bytes Secondary bus master IDE registers 96 contiguous bytes starting on a 128-byte
divisible boundary 64 contiguous bytes starting on a 64-byte
divisible boundary 64 contiguous bytes starting on a 64-byte
divisible boundary 32 contiguous bytes starting on a 32-byte
divisible boundary 16 contiguous bytes starting on a 16-byte
divisible boundary 4096 contiguous bytes starting on a 4096-byte
divisible boundary
* Default, but can be changed to another address range. ** Dword access only
*** By t e ac cess only
8 bytes Windows Sound System
ICH (ACPI + TCO)
CC820 board resource
Onboard audio controller
ICH (USB)
ICH (SMBus)
Intel 82801AA PCI bridge
Technical Reference
NOTE
Some additional I/O addresses are not available due to ICH addresses aliassing. For information about the ICH addressing, refer to Section 1.2 on page 16.
45
Intel Desktop Board CC820 Technical Product Specification

2.4 DMA Channels

Table 13. DMA Channels
DMA Channel Number Data Width System Resource
0 8- or 16-bits Audio 1 8- or 16-bits Audio / parallel port 2 8- or 16-bits Diskette drive 3 8- or 16-bits Parallel port (for ECP or EPP) / audio 4 8- or 16-bits DMA controller 5 16-bits Open 6 16-bits Open 7 16-bits Open

2.5 PCI Configuration Space Map

Table 14. PCI Configuration Space Map
Bus Number (hex)
00 00 00 Memory controller of Intel 82820 component 00 01 00 AGP connector 00 1E 00 Link to PCI bridge 00 1F 00 PCI-to-LPC bridge 00 1F 01 IDE controller 00 1F 02 USB controller #1 00 1F 03 SMBus controller 00 1F 04 Reserved 00 1F 05 AC ’97 audio controller (optional)
00 1F 06 AC ’97 modem controller (optional) 01 00 00 AGP connector 02 07 00 PCI accelerated audio ES1373 (optional) 02 08 00 PCI slot 1 02 09 00 PCI slot 2 02 0A 00 PCI slot 3 02 0B 00 PCI slot 4 02 0C 00 PCI slot 5
Device Number (hex)
Function Number (hex) Description
46

2.6 Interrupts

Table 15. Interrupts
IRQ System Resource
NMI I/O channel check 0 Reserved, interval timer 1 Reserved, keyboard buffer full 2 Reserved, cascade interrupt from slave PIC 3COM2* 4COM1* 5 LPT2 (Plug and Play option) / Audio / User available 6 Diskette drive 7LPT1* 8 Real-time clock 9 Reserved for ICH system management bus 10 User available 11 User available 12 Onboard mouse port (if present, else user available) 13 Reserved, math coprocessor 14 Primary IDE (if present, else user available) 15 Secondary IDE (if present, else user available)
* Default, but can be changed to another IRQ
Technical Reference

2.7 PCI Interrupt Routing Map

This section describes interrupt sharing and how the interrupt signals are connected between the PCI bus connectors and onboard PCI devices. The PCI specification specifies how interrupts can be shared between devices attached to the PCI bus. In most cases, the small amount of latency added by interrupt sharing does not affect the operation or throughput of the devices. In some special cases where maximum performance is needed from a device, a PCI device should not share an interrupt with other PCI devices. Use the following information to avoid sharing an interrupt with a PCI add-in card.
PCI devices are categorized as follows to specify their interrupt grouping:
INTA: By default, all add-in cards that require only one interrupt are in this category. For
almost all cards that require more than one interrupt, the first interrupt on the card is also classified as INTA.
INTB: Generally, the second interrupt on add-in cards that require two or more interrupts is
classified as INTB. (This is not an absolute requirement.)
INTC and INTD: Generally, a third interrupt on add-in cards is classified as INTC and a
fourth interrupt is classified as INTD.
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Intel Desktop Board CC820 Technical Product Specification
The ICH PCI-to-LPC bridge has four programmable interrupt request (PIRQ) input signals. All PCI interrupt sources either onboard or from a PCI add-in card connect to one of these PIRQ signals. Because there are only four signals, some PCI interrupt sources are electrically tied together on the CC820 board and therefore share the same interrupt.
For example, using Table 16 as a reference, assume an add-in card using INTA is plugged into PCI Bus Connector 4. In PCI Bus Connector 4, INTA is connected to PIRQD. Since PIRQD is already connected to PCI Audio and the ICH USB Controller, the add-in card now shares interrupts with these onboard interrupt sources.
Table 16 lists the PIRQ signals used in the CC820 board and shows how the signals are connected to the PCI bus connectors and to the onboard PCI interrupt sources.
Table 16. PCI Interrupt Routing Map
ICH PIRQ Signal Name
PCI Interrupt Source
AGP Connector INTA INTB ICH Audio Controller INT ICH Modem Controller INT ICH USB Controller INT PCI Audio INT PCI Bus Connector 1 (J4E1) INTA INTB INTC INTD PCI Bus Connector 2 (J4D1) INTD INTA INTB INTC PCI Bus Connector 3 (J4C1) INTC INTD INTA INTB PCI Bus Connector 4 (J4B1) INTB INTC INTD INTA PCI Bus Connector 5 (J4A1) INTC INTD INTA INTB
PIRQA PIRQB PIRQC PIRQD
NOTE
The ICH can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 7, 10, 11, 14, and 15). Typically, a device that does not share a PIRQ line will have a unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or more of the PIRQ lines to be connected to the same IRQ signal.
48
Technical Reference

2.8 Connectors

CAUTION
Only the back panel connectors of the CC820 board have overcurrent protection. The CC820
board’s internal connectors are not overcurrent protected and should connect only to devices inside the computer’s chassis, such as fans and internal peripherals. Do not use these connectors to power devices external to the computer’s chassis. A fault in the load presented by the external devices could cause damage to the computer, the interconnecting cable, and the external devices themselves.
This section describes the CC820 board’s connectors. The connectors can be divided into three groups, as shown in Figure 8.
A
B
C
Figure 8. Connector Groups
A. Back panel connectors (see
page 50)
B. Midboard connectors (see
page 53)
C. Front panel connectors (see
page 66)
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Intel Desktop Board CC820 Technical Product Specification

2.8.1 Back Panel Connectors

Figure 9 shows the location of the back panel connectors. The back panel connectors are color­coded in compliance with PC 99 recommendations. The figure legend below lists the colors used.
E
B
Item Description Color For more information see:
A PS/2 mouse port Green Table 17 B PS/2 keyboard port Purple Table 17 C USB port 0 Black Table 18 D USB port 1 Black Table 18 E Parallel port Burgundy Table 19 F Serial port A Teal Table 20 G Serial port B Teal Table 20 H MIDI / Game port (optional) Gold Table 21 I Audio line out (optional) Lime green Table 22 J Audio line in (optional) Light blue Table 23 K Mic in (optional) Pink Table 24
F I JKA
GCD
H
OM08896
Figure 9. Back Panel Connectors
50
Technical Reference
NOTE
The back panel audio line out connector is designed to power headphones or amplified speakers only. Poor audio quality occurs if passive (non-amplified) speakers are connected to this output.
Table 17. PS/2 Keyboard/Mouse Connectors
Pin Signal Name
1Data 2 Not connected 3 Ground 4 Fused +5 V 5Clock 6 Not connected
Table 18. USB Connectors
Pin Signal Name
1 +5 V (fused) 2 USBP0# [USBP1#] 3 USBP0 [USBP1] 4 Ground
Signal names in brackets ([ ]) are for USB port 1.
Table 19. Parallel Port Connector
Pin Standard Signal Name ECP Signal Name EPP Signal Name
1 STROBE# STROBE# WRITE# 2 PD0 PD0 PD0 3 PD1 PD1 PD1 4 PD2 PD2 PD2 5 PD3 PD3 PD3 6 PD4 PD4 PD4 7 PD5 PD5 PD5 8 PD6 PD6 PD6 9 PD7 PD7 PD7 10 ACK# ACK# INTR 11 BUSY BUSY#, PERIPHACK WAIT# 12 PERROR PE, ACKREVERSE# PE 13 SELECT SELECT SELECT 14 AUDOFD# AUDOFD#, HOSTACK DATASTB# 15 FAULT# FAULT#, PERIPHREQST# FAULT# 16 INIT# INIT#, REVERSERQST# RESET# 17 SLCTIN# SLCTIN# ADDRSTB# 18 - 25 GND GND GND
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Intel Desktop Board CC820 Technical Product Specification
Table 20. Serial Port Connectors
Pin Signal Name
1 DCD (Data Carrier Detect) 2 SIN# (Serial Data In) 3 SOUT# (Serial Data Out) 4 DTR (Data Terminal Ready) 5 Ground 6 DSR (Data Set Ready) 7 RTS (Request to Send) 8 CTS (Clear to Send) 9 RI (Ring Indicator)
Table 21. MIDI/Game Port Connector
Pin Signal Name Pin Signal Name
1 +5 V (fused) 9 +5 V (fused) 2 JOY4 10 JOY6 3 JOYTIME0 11 JOYTIME2 4 Ground 12 MIDI-OUT 5 Ground 13 JOYTIME3 6 JOYTIME1 14 JOY7 7 JOY5 15 MIDI-IN 8 +5 V (fused)
Table 22. Audio Line Out Connector
Pin Signal Name
Tip Audio left out Ring Audio right out Sleeve Ground
Table 23. Audio Line In Connector
Pin Signal Name
Tip Audio left in Ring Audio right in Sleeve Ground
Table 24. Mic In Connector
Pin Signal Name
Tip Mono in Ring Mic bias voltage Sleeve Ground
52

2.8.2 Midboard Connectors

The midboard connectors are divided into the following functional groups:
Audio (see page 54)CD-ROM (legacy style 2 mm connector)AMR (Audio/Modem Riser)ATAPI CD-ROMTelephonyAuxiliary line in
Peripheral interfaces and indicators (see page 57)SCSI LEDSecondary IDEPrimary IDEDiskette drive
Hardware control (see page 60)Power supply fan control (Fan 2)Processor fan (Fan 3)PowerSystem fan (Fan 1)Wake on LAN technologyChassis intrusionWake on Ring
Add-in boards (see page 63)PCI bus (5)AGP
Technical Reference
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Intel Desktop Board CC820 Technical Product Specification
2.8.2.1 Audio
Figure 10 shows the location of the audio connectors.
ACDEB
1
1
1
1
Reference
Item Description Color
Designator
A CD-ROM, Legacy style, 2 mm (optional) (see Table 25) N/A J2C1 B AMR (Audio/Modem Riser) (see Table 26) N/A J3F1 C CD-ROM, ATAPI style (optional) (see Table 27) Black J1F1 D Telephony, ATAPI style (optional) (see Table 28) Green J2F1 E Auxiliary line in, ATAPI style (optional) (see Table 29) White J2F2
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Figure 10. Audio Connectors
Table 25. CD-ROM Legacy Style Connector
(J2C1)
Pin Signal Name
1 CD_Ground 2 CD_IN-Left 3 CD_Ground 4 CD_IN-Right
Table 26. Audio/Modem Riser Connector (J3F1)
Pin Signal Name
A1 AUDIO_PWRDN B1 AUDIO_MUTE A2 MONO_PHONE B2 GND A3 RESERVED B3 MONO_OUT/PB_BEEP A4 RESERVED B4 RESERVED A5 RESERVED B5 RESERVED A6 GND B6 PRIMARY_DN A7 +5VDUAL/+5VVSB B7 -12V A8 USB_OC B8 GND A9 GND B9 +12V A10 USB+ B10 GND A11 USB- B11 +5VD A12 GND B12 GND A13 S/P_DIF_IN B13 RESERVED A14 GND B14 RESERVED A15 +3.3VDUAL/+3.3VSB B15 +3.3VD A16 GND B16 GND A17 AC97_SYNC B17 AC97_SDATA_IN0 A18 GND B18 AC97_RESET A19 AC97_SDATA_IN1 B19 AC97_SDATA_IN1 A20 GND B20 GND A21 AC97_SDATA_IN0 B21 AC97_SDATA_IN2 A22 GND B22 GND A23 AC97_BITCLK B23 AC97_MSTRCLK
Pin Signal Name
Technical Reference
For information about Refer to
The Audio/Modem Riser Section 1.8.1, page 28
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Intel Desktop Board CC820 Technical Product Specification
Table 27. ATAPI CD-ROM Connector (J1F1)
Pin Signal Name
1 Left audio input from CD-ROM 2 CD audio differential ground 3 CD audio differential ground 4 Right audio input from CD-ROM
Table 28. Telephony Connector (J2F1)
Pin Signal Name
1 Analog audio mono input 2 Ground 3 Ground 4 Analog audio mono output
Table 29. Auxiliary Line In Connector (J2F2)
Pin Signal Name
1 Left auxiliary line in 2 Ground 3 Ground 4 Right auxiliary line in
56
2.8.2.2 Peripheral Interfaces and Indicators
Figure 11 shows the location of the peripheral interface and indicator connectors.
Technical Reference
39 40
39
1
2 1
A
CB D
1
2
1 240
34 33
Item Description Reference Designator
A SCSI LED (see Table 30) J7B3 B Secondary IDE (see Table 31) J6G1 C Primary IDE (see Table 31) J7G1 D Diskette drive (see Table 32) J8G1
Figure 11. Peripheral Interface and Indicator Connectors
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Intel Desktop Board CC820 Technical Product Specification
Table 30. SCSI LED Connector (J7B3)
Pin Signal Name
1 SCSI activity 2 Not connected
Table 31. PCI IDE Connectors (J7G1, Primary and J6G1, Secondary)
Pin Signal Name Pin Signal Name
1 Reset IDE 2 Ground 3 Data 7 4 Data 8 5 Data 6 6 Data 9 7 Data 5 8 Data 10 9 Data 4 10 Data 11 11 Data 3 12 Data 12 13 Data 2 14 Data 13 15 Data 1 16 Data 14 17 Data 0 18 Data 15 19 Ground 20 Key 21 DDRQ0 [DDRQ1] 22 Ground 23 I/O Write# 24 Ground 25 I/O Read# 26 Ground 27 IOCHRDY 28 P_ALE (Cable Select pull-up) 29 DDACK0# [DDACK1#] 30 Ground 31 IRQ 14 [IRQ 15] 32 Reserved 33 DAG1 (Address 1) 34 GPIO_DMA66_Detect_Pri (GPIO_DMA66_Detect_Sec) 35 DAG0 (Address 0) 36 DAG2Address 2 37 Chip Select 1P# [Chip Select 1S#] 38 Chip Select 3P# [Chip Select 3S#] 39 Activity# 40 Ground
Note: Signal names in brackets ([ ]) are for the secondary I DE connector.
58
Technical Reference
Table 32. Diskette Drive Connector (J8G1)
Pin Signal Name Pin Signal Name
1 Ground 2 DENSEL 3 Ground 4 Reserved 5Key 6FDEDIN 7 Ground 8 FDINDX# (Index) 9 Ground 10 FDM00# (Motor Enable A) 11 Ground 12 No connect 13 Ground 14 FDDS0# (Drive Select A) 15 Ground 16 No connect 17 No connect 18 FDDIR# (Stepper Motor Direction) 19 Ground 20 FDSTEP# (Step Pulse) 21 Ground 22 FDWD# (Write Data) 23 Ground 24 FDWE# (Write Enable) 25 Ground 26 FDTRK0# (Track 0) 27 No connect 28 FDWPD# (Write Protect) 29 Ground 30 FDRDATA# (Read Data) 31 Ground 32 FDHEAD# (Side 1 Select) 33 Ground 34 DSKCHG# (Diskette Change)
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Intel Desktop Board CC820 Technical Product Specification
2.8.2.3 Hardware Control and Power
Figure 12 shows the location of the hardware control and power connectors.
BA
1
20
10
1
1
1
1
1
FEG
D
Reference
Item Description
Designator
A Power supply fan control (Fan 2) (see Table 33) J5L1 B Processor fan (Fan 3) (see Table 34) J2M1 C Main power (see Table 35) J6M1 D System fan (Fan 1) (see Table 36) J8E1 E Wake on LAN technology (see Table 37) J7C2 F Chassis intrusion (see Table 38) J7C1 G Wake on Ring (see Table 39) J7B2
Figure 12. Hardware Control and Power Connectors
For information about Refer to
The power connector Section 1.10.2.1, page 37 The functions of the fan connectors Section 1.10.2.2, page 38 Wake on LAN technology Section 1.10.2.3, page 39 Wake on Ring technology Section 1.10.2.5, page 41
1
11
C
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60
Technical Reference
Table 33. Power Supply Fan 2 Control
Connector (J5L1)
Pin Signal Name
1 Ground 2 +12 V 3 FAN2_TACH
Table 34. Processor Fan 3 Connector (J2M1)
Pin Signal Name
1 Ground 2 +12 Volts 3 FAN3_CPU_HDR_GND_R
Table 35. Main Power Connector (J6M2)
Pin Signal Name Pin Signal Name
1 +3.3 V 11 +3.3 V 2 +3.3 V 12 -12 V 3 Ground 13 Ground 4 +5 V 14 PS-ON# (power supply remote on/off) 5 Ground 15 Ground 6 +5 V 16 Ground 7 Ground 17 Ground 8 PWRGD (Power Good) 18 TP_PWRCONN_18 9 +5 V (Standby) 19 +5 V 10 +12 V 20 +5 V
Table 36. System Fan 1 Connector (J8D1)
Pin Signal Name
1 Ground 2 +12 V 3FAN1-TACH
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Intel Desktop Board CC820 Technical Product Specification
Table 37. Wake on LAN Technology
Connector (J7C2)
Pin Signal Name
1 +5 VSB 2 Ground 3WOL
Table 38. Chassis Intrusion Connector (J7C1)
Pin Signal Name
1 INTRUDER# 2 Ground
Table 39. Wake on Ring Connector (J7B2)
Pin Signal Name
1 Ground 2RINGA#
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Technical Reference
2.8.2.4 Add-In Boards
Figure 13 shows the location of the add-in board connectors. Note the following considerations for the PCI bus connectors:
All of the PCI bus connectors are bus master capable.
PCI bus connector 2 has SMBus signals routed to it. This enables PCI bus add-in boards with
SMBus support to access sensor data on the CC820 board. The specific SMBus signals are as follows:
The SMBus clock line is connected to pin A40The SMBus data line is connected to pin A41
ABCDEF
Item Description Reference Designator
A PCI bus connector 5 (see Table 40) J4A1 B PCI bus connector 4 (see Table 40) J4B1 C PCI bus connector 3 (see Table 40) J4C1 D PCI bus connector 2 (see Table 40) J4D1 E PCI bus connector 1 (see Table 40) J4E1 F AGP universal connector (see Table 41) J5E1
Figure 13. Add-In Board Connectors
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Intel Desktop Board CC820 Technical Product Specification
Table 40. PCI Bus Connectors (J4A1, J4B1, J4C1, J4D1, J4E1)
Pin Signal Name Pin Signal Name Pin Signal Name Pin Signal Name
A1 Ground (TRST#)* B1 -12 V A32 AD16 B32 AD17 A2 +12 V B2 Ground (TCK)* A33 +3.3 V B33 C/BE2# A3 +5 V (TMS)* B3 Ground A34 FRAME# B34 Ground A4 +5 V (TDI)* B4 no connect (TDO)* A35 Ground B35 IRDY# A5 +5 V B5 +5 V A36 TRDY# B36 +3.3 V A6 INTA# B6 +5 V A37 Ground B37 DEVSEL# A7 INTC# B7 INTB# A38 STOP# B38 Ground A8 +5 V B8 INTD# A39 +3.3 V B39 LOCK# A9 Reserved B9 no connect (PRSNT1#)* A40 Reserved ** B40 PERR# A10 +5 V (I/O) B10 Reserved A41 Reserved *** B41 +3.3 V A11 Reserved B11 no connect (PRSNT2#)* A42 Ground B42 SERR# A12 Ground B12 Ground A43 PAR B43 +3.3 V A13 Ground B13 Ground A44 AD15 B44 C/BE1# A14 +3.3 V aux B14 Reserved A45 +3.3 V B45 AD14 A15 RST# B15 Ground A46 AD13 B46 Ground A16 +5 V (I/O) B16 CLK A47 AD11 B47 AD12 A17 GNT# B17 Ground A48 Ground B48 AD10 A18 Ground B18 REQ# A49 AD09 B49 Ground A19 PME# B19 +5 V (I/O) A50 Key B50 Key A20 AD30 B20 AD31 A51 Key B51 Key A21 +3.3 V B21 AD29 A52 C/BE0# B52 AD08 A22 AD28 B22 Ground A53 +3.3 V B53 AD07 A23 AD26 B23 AD27 A54 AD06 B54 +3.3 V A24 Ground B24 AD25 A55 AD04 B55 AD05 A25 AD24 B25 +3.3 V A56 Ground B56 AD03 A26 IDSEL B26 C/BE3# A57 AD02 B57 Ground A27 +3.3 V B27 AD23 A58 AD00 B58 AD01 A28 AD22 B28 Ground A59 +5 V (I/O) B59 +5 V (I/O) A29 AD20 B29 AD21 A60 REQ64C# B60 ACK64C# A30 Ground B30 AD19 A61 +5 V B61 +5 V A31 AD18 B31 +3.3 V A62 +5 V B62 +5 V
* These signals (in parentheses) are optional in the PCI s pec i fication and are not currently i m pl emented. ** On PCI bus connector 2, this pin is connected to the SM Bus clock line. *** On PCI bus connector 2, this pin is connected to the SMBus data line.
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Technical Reference
Table 41. AGP Interface Connector (J5E1)
Pin Signal Name Pin Signal Name Pin Signal Name Pin Signal Name
A1 +12V B1 No Connect A34 Vcc3.3 B34 Vcc3.3 A2 TYPEDET# B2 Vcc A35 AD22 B35 AD21 A3 Reserved B3 Vcc A36 AD20 B36 AD19 A4 No Connect B4 No Connect A37 Ground B37 Ground A5 Ground B5 Ground A38 AD18 B38 AD17 A6 INTA# B6 INTB# A39 AD16 B39 C/BE2# A7 RST# B7 CLK A40 Vcc3.3 B40 Vcc3.3 A8 GNT1# B8 REQ# A41 FRAME# B41 IRDY# A9 Vcc3.3 B9 Vcc3.3 A42 Reserved B42 +3.3 V aux A10 ST1 B10 ST0 A43 Ground B43 Ground A11 Reserved B11 ST2 A44 Reserved B44 Reserved A12 PIPE# B12 RBF# A45 Vcc3.3 B45 Vcc3.3 A13 Ground B13 Ground A46 TRDY# B46 DEVSEL# A14 WBF# B14 No Connect A47 STOP# B47 Vcc3.3 A15 SBA1 B15 SBA0 A48 PME# B48 PERR# A16 Vcc3.3 B16 Vcc3.3 A49 Ground B49 Ground A17 SBA3 B17 SBA2 A50 PAR B50 SERR# A18 SBSTB# B18 SB_STB A51 AD15 B51 C/BE1# A19 Ground B19 Ground A52 Vcc3.3 B52 Vcc3.3 A20 SBA5 B20 SBA4 A53 AD13 B53 AD14 A21 SBA7 B21 SBA6 A54 AD11 B54 AD12 A22 Key B22 Key A55 Ground B55 Ground A23 Key B23 Key A56 AD9 B56 AD10 A24 Key B24 +3.3 V aux A57 C/BE0# B57 AD8 A25 Key B25 Key A58 Vcc3.3 B58 Vcc3.3 A26 AD30 B26 AD31 A59 AD_STB0# B59 AD_STB0 A27 AD28 B27 AD29 A60 AD6 B60 AD7 A28 Vcc3.3 B28 Vcc3.3 A61 Ground B61 Ground A29 AD26 B29 AD27 A62 AD4 B62 AD5 A30 AD24 B30 AD25 A63 AD2 B63 AD3 A31 Ground B31 Ground A64 Vcc3.3 B64 Vcc3.3 A32 AD_STB1# B32 AD_STB1 A65 AD0 B65 AD1 A33 C/BE3# B33 AD23 A66 VRREFG_C B66 VREFC_G
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Intel Desktop Board CC820 Technical Product Specification

2.8.3 Front Panel Connectors

Figure 14 shows the location of the front panel connectors.
A
15 16
F
Front Panel Connector (see Table 42)
Auxiliary Front Panel Power LED Connector (see Table 45)
CB
1
2
15 1
13
G
DE
J8G2
Item Pins Description
A 9, 11, 13,
and 15 B 5 and 7 Reset switch C 1 and 3 Hard drive activity LED D 2 and 4 Power / Sleep / Message waiting LED E 6 and 8 Power switch F 10 and 12 No connect G 1 and 3 Auxiliary Power LED connector
216
Infrared port
(Pin 2 keyed)
J8J2
Figure 14. Front Panel Connectors
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Technical Reference
Table 42. Front Panel Connector (J8G2)
Pin Signal In/Out Description Pin Signal In/Out Description
1 HD_PWR Out Hard disk LED pull-
up (330 ) to +5 V
3 HDA# Out Hard disk active LED 4 HDR_BLNK_
5 GND Ground 6 FPBUT_IN In Power switch 7 FP_RESET# In Reset switch 8 GND Ground 9 +5 V Out IR Power 10 N/C 11 IRRX In IrDA serial input 12 GND Ground 13 GND Ground 14 (pin removed) Not connected 15 IRTX Out IrDA serial output 16 +5 V Out Power
2 HDR_BLNK_
GRN
YEL
Out Front panel green
LED
Out Front panel yellow
LED
2.8.3.1 Infrared Port Connector
Serial Port B can be configured to support an IrDA module connected to pins 9, 11, 13, and 15.
For information about Refer to
Infrared support Section 1.7.2, page 26 Configuring serial port B for infrared applications Section 4.4.3, page 99
2.8.3.2 Reset Switch Connector
Pins 5 and 7 can be connected to a momentary SPST type switch that is normally open. When the switch is closed, the CC820 board resets and runs the POST.
2.8.3.3 Hard Drive Activity LED Connector
Pins 1 and 3 can be connected to an LED to provide a visual indicator that data is being read from or written to a hard drive. For the LED to function properly, an IDE drive must be connected to the onboard IDE interface. The LED will also show activity for devices connected to the SCSI hard drive activity LED connector.
For information about Refer to
The SCSI hard drive activity LED connector Section 1.6.3.2, page 24
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Intel Desktop Board CC820 Technical Product Specification
2.8.3.4 Power/Sleep/Message Waiting LED Connector
Pins 2 and 4 can be connected to a single- or dual-colored LED. Table 43 shows the possible states for a single-colored LED. Table 44 shows the possible states for a dual-colored LED.
Table 43. States for a Single-Colored Power LED
LED State Description
Off Power off/sleeping Steady Green Running Blinking Green Running/message waiting
Table 44. States for a Dual-Colored Power LED
LED State Description
Off Power off Steady Green Running Blinking Green Running/message waiting Steady Yellow Sleeping Blinking Yellow Sleeping/message waiting
NOTE
To use the message waiting function, ACPI must be enabled in the operating system and a message-capturing application must be invoked.
2.8.3.5 Power Switch Connector
Pins 6 and 8 can be connected to a front panel momentary-contact power switch. The switch must pull the SW_ON# pin to ground for at least 50 ms to signal the power supply to switch on or off. (The time requirement is due to internal debounce circuitry on the CC820 board.) At least two seconds must pass before the power supply will recognize another on/off signal.
2.8.3.6 Auxiliary Front Panel Power LED Connector
This connector duplicates the signals on pins 2 and 4 of the front panel connector.
Table 45. Auxiliary Front Panel Power LED Connector (J8J2)
Pin Signal Name In/Out Description
1 HDR_BLNK_GRN Out Front panel green LED 2 No connect 3 HDR_BLNK_YEL Out Front panel yellow LED
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Technical Reference

2.9 Jumper Block

CAUTION
Do not move any jumper with the power on. Always turn off the power and unplug the power cord from the computer before changing a jumper setting. Otherwise, damage to the CC820 board could occur.
The CC820 board has one jumper block. Figure 15 shows the location of the CC820 board’s jumper block.
13
J7B1
Figure 15. Location of the Jumper Block
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Intel Desktop Board CC820 Technical Product Specification
This 3-pin jumper block determines the BIOS Setup program’s mode. Table 46 describes the jumper settings for the three modes: normal, configure, and recovery.
When the CC820 board jumper is set to configuration mode and the computer is powered-up, the BIOS compares the CPU version and the microcode version in the BIOS and reports if the two match.
Table 46. BIOS Setup Configuration Jumper Settings (J7B1)
Function/Mode Jumper Setting Configuration
Normal
1 3
1-2
The BIOS uses current configuration information and passwords for booting.
Configure
2-3
Recovery
None
For information about Refer to
How to access the BIOS Setup program Section 4.1, page 93 The maintenance menu of the BIOS Setup program Section 4.2, page 94 BIOS recovery Section 3.6, page 88
1 3
1 3
After the POST runs, Setup runs automatically. The maintenance menu is displayed.
The BIOS attempts to recover the BIOS configuration. A recovery diskette is required.
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Technical Reference

2.10 Mechanical Considerations

2.10.1 Form Factor

The CC820 board is designed to fit into an ATX-form-factor chassis. Figure 16 illustrates the mechanical form factor for the CC820 board. Dimensions are given in inches. The outer dimensions are 8.20 inches by 12.00 inches. Location of the I/O connectors and mounting holes are in compliance with the ATX specification (see Section 1.3).
6.50
6.10
5.20
0.00
1.70
0.65
0.00
11.35
4.90 11.10
OM08903
Figure 16. CC820 Board Dimensions
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Intel Desktop Board CC820 Technical Product Specification

2.10.2 I/O Shield

The back panel I/O shield for the CC820 board must meet specific dimension and material requirements. Systems based on this CC820 board need the back panel I/O shield to pass certification testing. Figure 17 and Figure 18 show the critical dimensions of the chassis­dependent I/O shield for CC820 boards with and without audio. Dimensions are given in inches,
to a tolerance of ±0.02 inches. These figures also indicate the position of each cutout. Additional design considerations for I/O
shields relative to chassis requirements are described in the ATX specification. See Section 1.3 for information about the ATX specification.
NOTE
An I/O shield compliant with the ATX chassis specification 2.01 is available from Intel.
6.39 Ref
0.78 ± .01 Typ.
0.61 Ref 6.27
0.00
0.94 Ref
0.88
0.28
0.39 Dia
0.00
0.46
0.47
0.56
8x R .02 Min
0.44
1.19
1.80
2.07
3.21
3x Dia 0.33
4.62
4.40
4.78
5.27
5.77
1.89 Ref
0.46
0.17
0.32
0.47
0.62
72
Pictorial View
OM08841
Figure 17. I/O Shield Dimensions (for CC820 Boards with Audio Connectors)
0.78 ± .01 Typ.
0.61 Ref 6.27
0.00
0.94 Ref
0.88
0.28
0.39 Dia
0.00
0.46
0.47
0.56
Technical Reference
6.39 Ref
1.89 Ref
8x R .02 Min
0.44
1.19
1.80
2.07
3.21
4.40
Pictorial View
Figure 18. I/O Shield Dimensions (for CC820 Boards without Audio Connectors)
0.17
0.32
0.47
0.62
OM08840
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Intel Desktop Board CC820 Technical Product Specification

2.11 Electrical Considerations

2.11.1 Power Consumption

Table 47 lists voltage and current measurements for a computer that contains the CC820 board and the following:
533 MHz Intel Pentium III processor with a 512 KB cache
128 MB SDRAM
3.5-inch diskette drive
1.6 GB IDE hard disk drive
32X IDE CD-ROM drive
This information is provided only as a guide for calculating approximate power usage with additional resources added.
Values for the Windows 98 desktop mode are measured at 640 x 480 x 256 colors and 60 Hz refresh rate. AC watts are measured with a typical 200 W power supply, nominal input voltage and frequency, with true RMS wattmeter at the line input.
NOTE
Actual system power consumption depends upon system configuration. The power supply should comply with the recommendations found in the ATX Form Factor Specification document (see Table 3 on page 16 for specification information).
Table 47. Power Usage
DC Current at:
Mode AC Power +3.3 V +5 V +12 V -12 V +5 VSB
Windows 98 APM full on 57.5 W 3.32 A 0.630 A 0.030 A 0.030 A 0.080 A Windows 98 APM Suspend 31.3 W 3.5 A 0.600 A 0.160 A 0.030 A 0.190 A Windows 98 ACPI S0 37.0 W 3.32 A 0.630 A 0.030 A 0.030 A 0.080 A Windows 98 ACPI S1 30.7 W 3.5 A 0.600 A 0.160 A 0.030 A 0.190 A Windows 98 ACPI S3 3.4 W 0.0 A 0.0 A 0.0 A 0.0 A 0.060 A

2.11.2 Add-in Board Considerations

The CC820 board is designed to provide 2 A (average) of +5 V current for each add-in board. The total +5 V current draw for add-in boards in a fully-loaded CC820 board (all seven expansion slots filled) must not exceed 14 A.
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Technical Reference

2.11.3 Standby Current Requirements

CAUTION
If the standby current necessary to support multiple wake events from the PCI and/or USB buses exceeds power supply capacity, the CC820 board may lose register settings stored in memory, etc. Calculate the standby current requirements using the steps described below.
Power supplies used with this CC820 desktop board must be able to provide enough standby current to support the Instantly Available (ACPI S3 sleep state) configuration as outlined in Table 48 below.
Values are determined by specifications such as PCI 2.2. Actual measured values may vary. To estimate the amount of standby current required for a particular system configuration, standby
current requirements of all installed components must be added to determine the total standby current requirement. Refer to the descriptions in Table 48 and review the following steps.
1. Note the total CC820 desktop board standby current requirement.
2. Add to that the total PS/2 port standby current requirement if a wake-enabled device is
connected.
3. Add, from the PCI 2.2 slots (wake enabled) row, the total number of wake-enabled devices
installed (PCI and AGP) and multiply by the standby current requirement.
4. Add, from the PCI 2.2 slots (non-wake enabled) row, the total number of wake-enabled
devices installed (PCI and AGP) and multiply by the standby current requirement.
5. Add all additional wake enabled devices’ and non-wake enabled devices’ standby current
requirements as applicable.
6. Add all the required current totals from steps 1 through 5 to determine the total estimated
standby current power supply requirement.
Table 48. Standby Current Requirements
Instantly Available Current Support (Estimated for integrated board components)
Instantly Available Stand-by Current Support
Estimated for add-on
Components
Add to Instantly Available
total current requirement
(See instructions above)
* Dependent upon system configuration
Description
Total for CC820 board 200 PS/2 Ports* 345 PCI 2.2 slots (wake enabled) 375 PCI 2.2 slots (non-wake enabled) 20 WOL header 225 AMR* 150 USB Ports* 607.5 (maximum for both ports)
Standby Current Requirements (mA)
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Intel Desktop Board CC820 Technical Product Specification
NOTE
IBM PS/2 Port Specification (Sept 1991) states:
275 mA for keyboard
70 mA for the mouse (not wake-enable device)
PCI/AGP requirements are calculated by totaling the following:
One wake-enabled device @ 375 mA, plus
Five non wake-enabled devices @ 20 mA each, plus
USB requirements are calculated as:
One wake-enabled device @ 500 mA
USB hub @ 100 mA
Three USB non wake-enabled devices connected @ 2.5 mA each
NOTE
Both USB ports are capable of providing up to 500 mA during normal G0/S0 operation. Only one USB port will support up to 500 mA of stand-by-current (wake enabled device) during G1/S3 suspended operation. The other port may provide up to 7.5 mA (three non-wake enabled devices.) during G1/S3 suspended operation.

2.11.4 Fan Power Requirements

The CC820 Desktop Board is capable of supplying 174 mA per fan connector (maximum).

2.11.5 Power Supply Considerations

CAUTION
The 5-V standby line for the power supply must be capable of providing adequate +5 V standby current. Failure to do so can damage the power supply. The total amount of standby current required depends on the wake devices supported and manufacturing options. Refer to Section 2.11.3 on page 75 for additional information.
System integrators should refer to the power usage values listed in Table 47 when selecting a power supply for use with the CC820 board.
Measurements account only for current sourced by the CC820 board while running in idle modes of the started operating systems.
Additional power required will depend on configurations chosen by the integrator. The power supply must comply with the following recommendations found in the indicated
sections of the ATX form factor specification.
The potential relation between 3.3 VDC and +5 VDC power rails (Section 4.2)
The current capability of the +5 VSB line (Section 4.2.1.2)
All timing parameters (Section 4.2.1.3)
All voltage tolerances (Section 4.2.2)
For information about Refer to
The ATX form factor specification Section 1.3, page 16
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Technical Reference

2.12 Thermal Considerations

CAUTION
An ambient temperature that exceeds the CC820 board’s maximum operating temperature by 5 oC
o
C could cause components to exceed their maximum case temperature and malfunction. For
to 10 information about the maximum operating temperature, see the environmental specifications in Section 2.14.
CAUTION
System integrators should ensure that proper airflow is maintained in the voltage regulator circuit. The voltage regulator area can reach a temperature of up to 85 Figure 19). Failure to do so may result in damage to the voltage regulator circuit.
Figure 19 shows the locations of the thermally sensitive components.
o
C in an open chassis (item A in
A B
C
F
D
E
OM08904
A Processor voltage regulator area B Processor C Intel 82820 MCH D Intel E Intel 82801AA ICH F ES1373 digital controller (optional)
®
82805 MTH
Figure 19. Thermally-sensitive Components
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Intel Desktop Board CC820 Technical Product Specification
Table 49 provides maximum case temperatures for CC820 board components that are sensitive to thermal changes. Case temperatures could be affected by the operating temperature, current load, or operating frequency. Maximum case temperatures are important when considering proper airflow to cool the CC820 board.
Table 49. Thermal Considerations for Components
Processor / Host
Type
processor
Component Type Maximum Component Temperature
Intel 82820 MCH 110 oC Intel 82801AA ICH 100 oC ES 1373 70 oC
Bus Frequency
450 / 100 MHz N/A 85º C (max thermal junction)Pentium III 500 / 100 MHz N/A 85º C (max thermal junction) 550 / 100 MHz N/A 85º C (max thermal junction) 600 / 100 MHz N/A 85º C (max thermal junction) 550E / 100 MHz NA 82º C (max thermal junction) 600E / 100 MHz NA 82º C (max thermal junction) 650 / 100 MHz NA 82º C (max thermal junction) 700 / 100 MHz NA 80º C (max thermal junction) 533B / 133 MHz N/A 90º C (max thermal junction) 600B / 133 MHz N/A 85º C (max thermal junction) 533EB / 133 MHz NA 82º C (max thermal junction) 600EB / 133 MHz NA 82º C (max thermal junction) 667 / 133 MHz NA 82º C (max thermal junction) 733 / 133 MHz NA 80º C (max thermal junction) 350 / 100 MHz 75º C (max thermal plate) NAPentium II processor 400 / 100 MHz 75º C (max thermal plate) NA 450 / 100 MHz 75º C (max thermal plate) 80º C (max thermal junction)
SECC SECC2
Maximum Processor TemperatureProcessor

2.13 Reliability

The mean time between failures (MTBF) prediction is calculated using component and subassembly random failure rates. The calculation is based on the Bellcore Reliability Prediction Procedure, TR-NWT-000332, Issue 4, September 1991. The MTBF prediction is used to estimate repair rates and spare parts requirements.
The Mean Time Between Failures (MTBF) data is calculated from predicted data at 55 ºC. CC820 board MTBF: 169013.13 hours
78

2.14 Environmental

Table 50 lists the environmental specifications for the CC820 board.
Table 50. CC820 Desktop Board Environmental Specifications
Parameter Specification Temperature
Non-Operating -40 °C to +70 °C Operating 0 °C to +55 °C
Shock
Unpackaged 30 g trapezoidal waveform
Velocity change of 170 inches/second
Packaged Half sine 2 millisecond
Product Weight (pounds) Free Fall (inches) Velocity Change (inches/sec) <20 36 167 21-40 30 152 41-80 24 136 81-100 18 118
Vibration
Unpackaged 5 Hz to 20 Hz : 0.01 g² Hz sloping up to 0.02 g² Hz
20 Hz to 500 Hz : 0.02 g² Hz (flat)
Packaged 10 Hz to 40 Hz : 0.015 g² Hz (flat)
40 Hz to 500 Hz : 0.015 g² Hz sloping down to 0.00015 g² Hz
Technical Reference
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Intel Desktop Board CC820 Technical Product Specification

2.15 Regulatory Compliance

This section describes the CC820 board’s compliance with safety and EMC regulations.

2.15.1 Safety Regulations

Table 51 lists the safety regulations the CC820 board complies with when it is correctly installed in a compatible host system.
Table 51. Safety Regulations
Regulation Title
UL 1950/CSA950, 3rd edition, Dated 07-28-95
EN 60950, 2nd Edition, 1992 (with Amendments 1, 2, 3, and 4)
IEC 950, 2nd edition, 1991 (with Amendments 1, 2, 3, and 4)
EMKO-TSE (74-SEC) 207/94 Summary of Nordic deviations to EN 60950. (Norway, Sweden,
Bi-National Standard for Safety of Information Technology Equipment including Electrical Business Equipment. (USA and Canada)
The Standard for Safety of Information Technology Equipment including Electrical Business Equipment. (European Community)
The Standard for Safety of Information Technology Equipment including Electrical Business Equipment. (International)
Denmark, and Finland)

2.15.2 EMC Regulations

Table 52 lists the EMC regulations with which the CC820 board complies when it is correctly installed in a compatible host system.
Table 52. EMC Regulations
Regulation Title
FCC Class B Title 47 of the Code of Federal Regulations, Parts 2 and 15, Subpart B,
pertaining to unintentional radiators. (USA)
CISPR 22, 2nd Edition, 1993 (Class B)
VCCI Class B (ITE) Implementation Regulations for Voluntary Control of Radio Interference
EN55022 (1994) (Class B) Limits and methods of measurement of Radio Interference
EN50082-1 (1992) Generic Immunity Standard; currently compliance is determined via
ICES-003 (1997) Interference-Causing Equipment Standard, Digital Apparatus, Class B
AS/NZ 3548 Australian Communications Authority (ACA), Standard for
Limits and methods of measurement of Radio Interference Characteristics of Information Technology Equipment. (International)
by Data Processing Equipment and Electronic Office Machines. (Japan)
Characteristics of Information Technology Equipment. (Europe)
testing to IEC 801-2, -3, and -4. (Europe)
(Including CRC c.1374). (Canada)
Electromagnetic Compatibility.
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Technical Reference

2.15.3 Certification Markings

This printed circuit assembly has the following markings related to product certification:
UL Joint Recognition Mark: Consists of small c followed by a stylized backward UR and
followed by a small US (Component side)
Manufacturer’s recognition mark: Consists of a unique UL recognized manufacturer’s logo,
along with a flammability rating (94V-0) (Solder side)
UL File Number for CC820 boards: E139761 (Component side)
PB Part Number: Intel bare circuit board part number (Solder side) PB743409-004
Battery “+ Side Up” marking: located on the component side of the CC820 board in close
proximity to the battery holder
FCC Logo/Declaration: (Solder side)
ACA (C-Tick) mark: Consists of a unique letter C, with a tick mark; followed by N-232.
Located on the component side of the CC820 board and on the shipping container
CE Mark: (Component side) The CE mark should also be on the shipping container
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Intel Desktop Board CC820 Technical Product Specification
82

3 Overview of BIOS Features

What This Chapter Contains
3.1 Introduction................................................................................................................83
3.2 BIOS Flash Memory Organization............................................................................. 84
3.3 Resource Configuration............................................................................................. 84
3.4 System Management BIOS (SMBIOS)...................................................................... 86
3.5 BIOS Upgrades ......................................................................................................... 87
3.6 Recovering BIOS Data.............................................................................................. 88
3.7 Boot Options.............................................................................................................. 89
3.8 USB Legacy Support................................................................................................. 90
3.9 BIOS Security Features............................................................................................. 91

3.1 Introduction

The CC820 board uses an Intel/AMI BIOS, which is stored in flash memory and can be upgraded using a disk-based program. In addition to the BIOS, the flash memory contains the BIOS Setup program, POST, APM, the PCI auto-configuration utility, and Plug and Play support.
The CC820 board supports system BIOS shadowing, allowing the BIOS to execute from 64-bit onboard write-protected DRAM.
The BIOS displays a message during POST identifying the type of BIOS and a revision code. The initial production BIOS is identified as CC82010A.86A.
When the CC820 board jumper is set to configuration mode and the computer is powered-up, the BIOS compares the CPU version and the microcode version in the BIOS and reports if the two match.
For information about Refer to
The CC820 board’s compliance level with APM and Plug and Play Section 1.3, page 16
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Intel Desktop Board CC820 Technical Product Specification

3.2 BIOS Flash Memory Organization

The Intel 82802AB Firmware Hub (FWH) includes a 4 Mbit (512 KB) symmetrical flash memory device. Internally, the device is grouped into eight 64-KB blocks that are individually erasable, lockable, and unlockable. Figure 20 shows the organization of the flash memory.
The last two 8 KB blocks of the fault tolerance area are the parameter blocks. These blocks contain data such as BIOS updates, vital product data (VPD), logo, System Management BIOS (SMBIOS) interface, and extended system configuration data (ESCD) information. The backup block contains a copy of the fault tolerance block.
080000
07FFFF
070000
06FFFF
060000
05FFFF
050000
04FFFF
040000
03FFFF
030000
02FFFF
020000
01FFFF
010000
00FFFF 000000
64 KB Block 64 KB Block 64 KB Block 64 KB Block 64 KB Block 64 KB Block 64 KB Block 64 KB Block
7 6 5 4 3 2 1 0
Boot Block
Main System BIOS
Fault Tolerance
Backup
8 KB - Parameter Block 2 8 KB - Parameter Block 1
48 KB - Reserved
Figure 20. Memory Map of the Flash Memory Device

3.3 Resource Configuration

3.3.1 PCI Autoconfiguration

The BIOS can automatically configure PCI devices. PCI devices may be onboard or add-in cards. Autoconfiguration lets a user insert or remove PCI cards without having to configure the system. When a user turns on the system after adding a PCI card, the BIOS automatically configures interrupts, the I/O space, and other system resources. Any interrupts set to Available in Setup are considered to be available for use by the add-in card.
PCI interrupts are distributed to available ISA interrupts that have not been assigned to system resources. The assignment of PCI interrupts to ISA IRQs is non-deterministic. PCI devices can share an interrupt, but an ISA device cannot share an interrupt allocated to PCI or to another ISA device. Autoconfiguration information is stored in ESCD format.
For information about the versions of PCI and Plug and Play supported by the BIOS, see Section 1.3.
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Overview of BIOS Features

3.3.2 PCI IDE Support

If you select Auto in the BIOS Setup program, the BIOS automatically sets up the two PCI IDE connectors with independent I/O channel support. The IDE interface supports hard drives up to Ultra ATA/66 and recognizes any ATAPI devices, including CD-ROM drives, tape drives, and Ultra DMA drives (see Section 1.3 for the supported version of ATAPI). The BIOS determines the capabilities of each drive and configures them to optimize capacity and performance. To take advantage of the high capacities typically available today, hard drives are automatically configured for Logical Block Addressing (LBA) and to PIO Mode 3 or 4, depending on the capability of the drive. You can override the auto-configuration options by specifying manual configuration in the BIOS Setup program.
To use Ultra ATA-66 features the following items are required:
An Ultra ATA-66 peripheral device
An Ultra ATA-66 compatible cable
Ultra ATA-66 operating system device drivers
NOTE
Ultra ATA-66 compatible cables are backward compatible with drives using slower IDE transfer protocols. If an Ultra ATA/66 disk drive and a disk drive using any other IDE transfer protocol are attached to the same cable, the maximum transfer rate between the drives is 33 MB/sec.
NOTE
Do not connect an ATA device as a slave on the same IDE cable as an ATAPI master device. For example, do not connect an ATA hard drive as a slave to an ATAPI CD-ROM drive.
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Intel Desktop Board CC820 Technical Product Specification

3.4 System Management BIOS (SMBIOS)

SMBIOS is a Desktop Management Interface (DMI) compliant method for managing computers in a managed network.
The main component of SMBIOS is the management information format (MIF) database, which contains information about the computing system and its components. Using SMBIOS, a system administrator can obtain the system types, capabilities, operational status, and installation dates for system components. The MIF database defines the data and provides the method for accessing this
®
information. The BIOS enables applications such as Intel SMBIOS. The BIOS stores and reports the following SMBIOS information:
BIOS data, such as the BIOS revision level
Fixed-system data, such as peripherals, serial numbers, and asset tags
Resource data, such as memory size, cache size, and processor speed
Dynamic data, such as event detection and error logging
Non-Plug and Play operating systems, such as Windows NT obtaining the SMBIOS information. The BIOS supports an SMBIOS table interface for such operating systems. Using this support, an SMBIOS service-level application running on a non­Plug and Play operating system can obtain the SMBIOS information.
LANDesk® Client Manager to use
, require an additional interface for
For information about Refer to
The CC820 board’s compliance level with SMBIOS Section 1.3, page 16
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Overview of BIOS Features

3.5 BIOS Upgrades

A new version of the BIOS can be upgraded from a diskette using the Intel® Flash Memory Update utility that is available from Intel. This utility supports the following BIOS maintenance functions:
Update the flash BIOS from a file on a diskette
Verify that the upgrade BIOS matches the target system to prevent accidentally installing an
incompatible BIOS
BIOS boot block update BIOS upgrades and the Intel Flash Memory Update Utility are available from Intel through the
Intel World Wide Web site.
NOTE
Please review the instructions distributed with the upgrade utility before attempting a BIOS upgrade.
For information about Refer to
The Intel World Wide Web site Section 1.2, page 16

3.5.1 Language Support

The BIOS Setup program and help messages can be supported in 32 languages. Five languages are available in the BIOS: US English, German, Italian, French, and Spanish. The default language is US English that is present unless another language is selected in the BIOS Setup program.
The BIOS includes extensions to support the Kanji character set and other non-ASCII character sets. Translations of other languages may become available at a later date.

3.5.2 Custom Splash Screen

During POST, an Intel splash screen is displayed by default. This splash screen can be replaced with a custom splash screen. A utility is available from Intel to assist with creating a custom splash screen. The custom splash screen can be programmed into the flash memory using the BIOS upgrade utility. Information about this capability is available on the Intel Support World Wide Web site. See Section 1.2 for more information about this site.
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Intel Desktop Board CC820 Technical Product Specification

3.6 Recovering BIOS Data

Some types of failure can destroy the BIOS. For example, the data can be lost if a power outage occurs while the BIOS is being updated in flash memory. The BIOS can be recovered from a diskette using the BIOS recovery mode. When recovering the BIOS, be aware of the following:
Because of the small amount of code available in the non-erasable boot block area, there is no
video support. You can only monitor this procedure by listening to the speaker or looking at the diskette drive LED.
The recovery process may take several minutes; larger BIOS flash memory devices require
more time.
Two beeps and the end of activity in the diskette drive indicate successful BIOS recovery.
A series of continuous beeps indicates a failed BIOS recovery.
To create a BIOS recovery diskette, a bootable diskette must be created and the BIOS update files copied to it. BIOS upgrades and the Intel Flash Memory Upgrade utility are available from Intel Customer Support through the Intel World Wide Web site.
NOTE
If the computer is configured to boot from an LS-120 diskette (in the Setup program’s Removable Devices submenu), the BIOS recovery diskette must be a standard 1.44 MB diskette not a 120 MB diskette.
For information about Refer to
The BIOS recovery mode jumper settings Table 46, page 12 The Boot menu in the BIOS Setup program Section 4.7, page 108 Contacting Intel customer support Section 1.2, page 16
88
Overview of BIOS Features

3.7 Boot Options

In the BIOS Setup program, the user can choose to boot from a diskette drive, hard drives, CD-ROM, or the network. The default setting is for the diskette drive to be the first boot device, the hard drive second, and the ATAPI CD-ROM third. The fourth device is disabled.

3.7.1 CD-ROM and Network Boot

Booting from CD-ROM is supported in compliance to the El Torito bootable CD-ROM format specification. Under the Boot menu in the BIOS Setup program, ATAPI CD-ROM is listed as a boot device. Boot devices are defined in priority order. If the CD-ROM is selected as the boot device, it must be the first device with bootable media.
The network can be selected as a boot device. This selection allows booting from a network add-in card with a remote boot ROM installed.
For information about Refer to
The El Torito specification Section 1.3, page 16

3.7.2 Booting Without Attached Devices

For use in embedded applications, the BIOS has been designed so that after passing the POST, the operating system loader is invoked even if the following devices are not present:
Video adapter
Keyboard
Mouse
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Intel Desktop Board CC820 Technical Product Specification

3.8 USB Legacy Support

USB legacy support enables USB devices such as keyboards, mice, and hubs to be used even when no operating system USB drivers are in place. USB legacy support is used in accessing the BIOS Setup program and installing an operating system that supports USB. By default, USB legacy support is set to Auto. The Auto setting enables USB legacy support if a supported USB device is connected to the USB port.
This sequence describes how USB legacy support operates in the Auto (default) mode.
1. When you power up the computer, USB legacy support is disabled.
2. POST begins.
3. USB legacy support is temporarily enabled by the BIOS. This allows you to use a USB
keyboard to enter the BIOS Setup program or the maintenance mode.
4. POST completes and disables USB legacy support (unless it was set to Enabled or Auto while
in the BIOS Setup program).
5. The operating system loads. While the operating system is loading, USB keyboards and mice
are not recognized (unless USB legacy support was set to Enabled or Auto while in the BIOS Setup program). After the operating system loads the USB drivers, the USB devices are recognized by the operating system.
To install an operating system that supports USB, enable USB Legacy support or set it to Auto in
the BIOS Setup program and follow the operating system’s installation instructions. Once the operating system is installed and the USB drivers have been configured, USB legacy support is no longer used. USB Legacy support can be left enabled or set to Auto in the BIOS Setup program if needed.
Notes on using USB legacy support:
Do not use USB devices with an operating system that does not support USB. USB legacy is
not intended to support the use of USB devices in a non-USB aware operating system.
USB legacy support is for keyboards, mice, and hubs only. Other USB devices are not
supported.
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Overview of BIOS Features

3.9 BIOS Security Features

The BIOS includes security features that restrict access to the BIOS Setup program and who can boot the computer. A supervisor password and a user password can be set for the BIOS Setup program and for booting the computer, with the following restrictions:
The supervisor password gives unrestricted access to view and change all the Setup options in
the BIOS Setup program. This is supervisor mode.
The user password gives restricted access to view and change Setup options in the BIOS Setup
program. This is user mode.
If only the supervisor password is set, pressing the <Enter> key at the password prompt of the
BIOS Setup program allows the user restricted access to Setup.
If both the supervisor and user passwords are set, users can enter either the supervisor
password or the user password to access Setup. Users have access to Setup respective to which password is entered.
Setting the user password restricts who can boot the computer. The password prompt will be
displayed before the computer is booted. If only the supervisor password is set, the computer boots without asking for a password. If both passwords are set, the user can enter either password to boot the computer.
Table 53 shows the effects of setting the supervisor password and user password. This table is for reference only and is not displayed on the screen.
Table 53. Supervisor and User Password Functions
Supervisor
Password Set
Neither Can change all
Supervisor only
User only N/A Can change all
Supervisor and user set
* If no password is set, any user can change all Setup options.
For information about Refer to
Setting user and supervisor passwords Section 4.5, page 106
Mode User Mode Setup Options
options * Can change all
options
Can change all options
Can change all options *
Can change a limited number of options
options Can change a
limited number of options
None None None
Supervisor Password Supervisor None
Enter Password Clear User Password
Supervisor Password Enter Password
Password to Enter Setup
User User
Supervisor or user
Password During Boot
Supervisor or user
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Intel Desktop Board CC820 Technical Product Specification
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4 BIOS Setup Program

What This Chapter Contains
4.1 Introduction................................................................................................................93
4.2 Maintenance Menu.................................................................................................... 94
4.3 Main Menu................................................................................................................. 95
4.4 Advanced Menu......................................................................................................... 96
4.5 Security Menu..........................................................................................................106
4.6 Power Menu............................................................................................................ 107
4.7 Boot Menu............................................................................................................... 108
4.8 Exit Menu................................................................................................................ 109

4.1 Introduction

The BIOS Setup program can be used to view and change the BIOS settings for the computer. The BIOS Setup program is accessed by pressing the <F2> key after the Power-On Self-Test (POST) memory test begins and before the operating system boot begins. The menu bar is shown below.
Maintenance Main Advanced Security Power Boot Exit
Table 54 lists the BIOS Setup program menu features.
Table 54. BIOS Setup Program Menu Bar
Maintenance Main Advanced Security Power Boot Exit
Selects boot options and power supply controls
Clears passwords and enables extended configuration mode
NOTE
Allocates resources for hardware components
Configures advanced features available through the chipset
Sets passwords and security features
Configures power management features
In this chapter, all examples of the BIOS Setup Program menu bar include the maintenance menu; however, the maintenance menu is displayed only when the board is in configuration mode. Section 2.9 on page 69 tells how to put the board in configuration mode.
Saves or discards changes to Setup program options
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Intel Desktop Board CC820 Technical Product Specification
Table 55 lists the function keys available for menu screens.
Table 55. BIOS Setup Program Function Keys
BIOS Setup Program Function Key Description
<> or <> Selects a different menu screen (Moves the cursor left or right) <> or <> Selects an item (Moves the cursor up or down) <Tab> Selects a field (Not implemented) <Enter> Executes command or selects the submenu <F9> Load the default configuration values for the current menu <F10> Save the current values and exits the BIOS Setup program <Esc> Exits the menu

4.2 Maintenance Menu

Maintenance
Main Advanced Security Power Boot Exit
Extended Configuration
The menu shown in Table 56 is for clearing Setup passwords and enabling extended configuration mode. Setup only displays this menu in configuration mode. See Section 2.9 on page 69 for configuration mode setting information.
Table 56. Maintenance Menu
Feature Options Description
Clear All Passwords No options Clears the user and administrative passwords Extended
Configuration
CPU Information No options Displays CPU Information. CPU Stepping
Signature CPU Microcode
Update Revision
Default (default)
User-Defined
No options Displays CPU’s Stepping Signature.
No options Displays CPU’s Microcode Update Revision.
User Defined allows setting system control and video memory cache mode. If selected here, will also display in the
Advanced Menu as: “Extended Menu:
Used
.”
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4.2.1 Extended Configuration Submenu

BIOS Setup Program
Maintenance
Main Advanced Security Power Boot Exit
Extended Configuration
The submenu represented by Table 57 is for setting video memory cache mode. This submenu becomes available when User Defined is selected under Extended Configuration.
Table 57. Extended Configuration Submenu
Feature Options Description
System Control: Video Memory Cache Mode
USWC
UC (default)
Selects Uncacheable Speculative Write-Combining (USWC) video memory cache mode. Full 32 byte contents of the Write Combining buffer are written to memory as required. Cache lookups are not performed. Both the video driver and the application must support Write Combining.
Selects UnCachable (UC) video memory cache mode. This setting identifies the video memory range as uncacheable by the processor. Memory writes are performed in program order. Cache lookups are not performed. Well suited for applications not supporting Write Combining.

4.3 Main Menu

Maintenance
Main
Advanced Security Power Boot Exit
Table 58 describes the Main Menu. This menu reports processor and memory information and is for configuring the system date and system time.
Table 58. Main Menu
Feature Options Description
BIOS Version No options Displays the version of the BIOS. Processor Type No options Displays processor type. Processor Speed No options Displays processor speed. System Bus
Frequency Cache RAM No options Displays the size of second-level cache and whether it is
Total Memory No options Displays the total amount of RAM. Processor Serial
Number System Time Hour, minute, and
System Date Day of week
No options Displays the speed of the system Front Side Bus.
ECC-capable.
Disabled (default)
Enabled
second
Month/day/year
Enables and disables the processor serial number.
Specifies the current time.
Specifies the current date.
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Intel Desktop Board CC820 Technical Product Specification

4.4 Advanced Menu

Maintenance Main
Advanced
Security Power Boot Exit PCI Configuration Boot Configuration Peripheral Configuration IDE Configuration Diskette Configuration Event Log Configuration Video Configuration
Table 59 describes the Advanced Menu. This menu is used for setting advanced features that are available through the chipset.
Table 59. Advanced Menu
Feature Options Description
Extended Configuration Used
Not Used (default)
PCI Configuration No options Configures individual PCI slot’s IRQ priority. When
Boot Settings Configuration
Peripheral Configuration No options Configures peripheral ports and devices. When selected,
IDE Configuration No options Specifies type of connected IDE device. Diskette Configuration No options When selected, displays the Floppy Options submenu. Event Log Configuration No options Configures Event Logging. When selected, displays the
Video Configuration No options Configures video features. When selected, displays the
No options Configures Plug and Play and the Numlock key, and resets
If
Used
is highlighted,
Extended Configuration under the Maintenance Menu.
selected, displays the PCI Configuration submenu.
configuration data. When selected, displays the Boot Configuration submenu.
displays the Peripheral Configuration submenu.
Event Log Configuration submenu.
Video Configuration submenu.
User-Defined
has been selected in
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4.4.1 PCI Configuration Submenu

BIOS Setup Program
Maintenance Main
Advanced
Security Power Boot Exit
PCI Configuration
Boot Configuration Peripheral Configuration IDE Configuration Diskette Configuration Event Log Configuration Video Configuration
The submenu represented by Table 61 is for configuring the IRQ priority of PCI slots individually.
Table 60. PCI Configuration Submenu
Feature Options Description
PCI Slot 1 IRQ Priority
PCI Slot 2 IRQ Priority
PCI Slot 3 IRQ Priority
PCI Slot 4 IRQ Priority
PCI Slot 5 IRQ Priority Whatever is
Auto (default) 9 10 11
Auto (default) 9 10 11
Auto (default) 9 10 11
Auto (default) 9 10 11
selected in slot 3
Allows selection of IRQ priority.
Allows selection of IRQ priority.
Allows selection of IRQ priority. IRQ Priority selections for PCI slots 3 and 5 are linked. Selections made to PCI Slot 3 IRQ Priority are repeated in PCI Slot 5 IRQ Priority.
Allows selection of IRQ priority.
No selections can be made to PCI Slot 5 IRQ Priority. Selections made to PCI Slot 3 repeat in PCI Slot 5.
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Intel Desktop Board CC820 Technical Product Specification

4.4.2 Boot Configuration Submenu

Maintenance Main
Advanced
Security Power Boot Exit
PCI Configuration
Boot Configuration
Peripheral Configuration IDE Configuration Diskette Configuration Event Log Configuration Video Configuration
The submenu represented by Table 61 is for setting Plug and Play options, resetting configuration data, and the power-on state of the Numlock key.
Table 61. Boot Configuration Submenu
Feature Options Description
Plug & Play O/S
Reset Config Data
Numlock Off
No (default)
Yes
No (default)
Yes
On (default)
Specifies if manual configuration is desired.
No
lets the BIOS configure all devices. This setting is
appropriate when using a Plug and Play operating system.
Yes
lets the operating system configure Plug and Play devices not required to boot the system. This option is available for use during lab testing.
No
does not clear the PCI/PnP configuration data stored in
flash memory on the next boot.
Yes
clears the PCI/PnP configuration data stored in flash memory on the next boot.
Specifies the power-on state of the Numlock feature on the numeric keypad of the keyboard.
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4.4.3 Peripheral Configuration Submenu

BIOS Setup Program
Maintenance Main
Advanced
Security Power Boot Exit PCI Configuration Boot Configuration
Peripheral Configuration
IDE Configuration Diskette Configuration Event Log Configuration Video Configuration
The submenu represented in Table 62 is used for configuring computer peripherals.
Table 62. Peripheral Configuration Submenu
Feature Options Description
Serial port A (Note: If Plug and Play
OS is enabled in the Boot menu, serial port A will automatically be enabled.)
Base I/O address (Visible only if enabled selected in serial port A)
Interrupt (Visible only if enabled selected in serial port A)
Serial port B Disabled
Mode
Base I/O address (Visible only if enabled selected in serial port B)
Disabled
Enabled
Auto (default)
3F8 (default)
2F8
3E8
2E8
IRQ 3
IRQ 4
(default)
Enabled
Auto (default)
Normal
(default)
IrDA SIR-A
ASK_IR
3F8
2F8 (default)
3E8
2E8
Configures serial port A.
Auto
assigns the first free COM port, normally COM1, the
address 3F8h, and the interrupt IRQ4. An * (asterisk) displayed next to an address indicates a
conflict with another device.
Specifies the base I/O address for serial port A, if serial port A is Enabled.
Specifies the interrupt for serial port A, if serial port A is Enabled.
Configures serial port B.
Auto
assigns the first free COM port, normally COM2, the
address 2F8h, and the interrupt IRQ3. An * (asterisk) displayed next to an address indicates a
conflict with another device. If either serial port address is set, that address will not appear
in the list of options for the other serial port. Specifies the mode for serial port B for normal (COM 2) or
infrared applications. This option is not available if serial port B has been disabled.
Specifies the base I/O address for serial port B.
continued
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Intel Desktop Board CC820 Technical Product Specification
Table 62. Peripheral Configuration Submenu (continued)
Feature Options Description
Interrupt (Visible only if enabled is selected in serial port B)
Parallel port Disabled
Mode Out put Only
Base I/O address (Visible only if enabled is selected in parallel port)
Interrupt (Visible only if enabled is selected in parallel port)
DMA Channel (Visible only if ECP mode is selected.)
Audio Device Disabled
Modem Device (Visible only if AMR device is installed.)
Legacy USB Support Disabled
IRQ 3
(default)
IRQ 4
Enabled
Auto (default)
Bi-directional
(default)
EPP
ECP
378 (default)
278
228
IRQ 5
IRQ 7
(default)
1
3 (default)
Enabled
(default)
Disabled
Enabled
(default)
Enabled
Auto (default)
Specifies the interrupt for Serial port B.
Configures the parallel port.
Auto
assigns LPT1 the address 378h and the interrupt IRQ7.
An * (asterisk) displayed next to an address indicates a conflict with another device.
Selects the mode for the parallel port. Not available if the parallel port is disabled.
Output Only Bi-directional EPP
is Extended Parallel Port mode, a high-speed
bi-directional mode.
ECP
is Enhanced Capabilities Port mode, a high-speed bi-
directional mode. Specifies the base I/O address for the parallel port.
Specifies the interrupt for the parallel port.
Specifies the DMA channel.
Enables or disables the onboard audio subsystem.
Enables or disables the modem.
Enables or disables USB legacy support. (See Section 3.8 on page 90 for more information.)
operates in AT†-compatible mode.
operates in PS/2-compatible mode.
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