The Intel® Desktop Board CC820 may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current characterized
errata are documented in the Intel Desktop Board CC820 Specification Update.
This product specification applies to only standard CC820 boards with BIOS identifier
CC82010A.86A.
Changes to this specification will be published in the Intel Desktop Board CC820 Specification
Update before being incorporated into a revision of this document.
Information in this doc um ent is provided in connection wi t h Intel® products. No license, express or implied, by est oppel or
otherwise, to any intell ectual property rights is granted by this document. E x cept as provided in Intel’s Terms and
Conditions of Sale for such products, Intel assumes no liability whatsoever, and I nt el dis claims any express or implied
warranty, relating to sale and/or use of I ntel products including liability or warranties relat i ng t o f i t ness for a particular
purpose, merchantability, or infringement of any patent, copyright or other int ellec t ual propert y right. Intel products are not
intended for use in medical, l i f e saving, or life sustai ni ng appl i cations.
Intel may make changes t o specifications and produc t descriptions at any tim e, without notice.
The Intel Desktop Board CC820 may contain design defects or errors known as errata that may cause t he product to
deviate from published spec i fications. Current charac terized errata are available on request.
Contact your local Int el sales office or your distributor to obtain the latest specifications before pl acing your product order.
Copies of documents whic h hav e an orderi ng number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation
P.O. Box 5937
Denver, CO 80217-9808
or call in North America 1-800-548-4725, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany 44-0-1793-421-333, other Countries 708-296-9333.
†
Third-party brands and names are the property of their respective owners.
Copyright 1999, Intel Corporation. All rights reserved.
Preface
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
power and environmental requirements, and the BIOS for the Intel Desktop Board CC820. It
describes the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the CC820 board and its
components to the vendors, system integrators, and other engineers and technicians who need this
level of information. It is specifically not intended for general audiences.
What This Document Contains
ChapterDescription
1A description of the hardware used on the CC820 board
2A map of the resources of the board
3The features supported by the BIOS Setup program
4The contents of the BIOS Setup program’s menus and submenus
5A description of the BIOS error messages, beep codes, POST codes, and enhanced
diagnostics
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
✏
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
#Used after a signal name to identify an active-low signal (such as USBP0#)
(NxnX)When used in the description of a component, N indicates component type, xn are the relative
coordinates of its location on the CC820 board, and X is the instance of the particular part at that
general location. For example, J5J1 is a connector, located at 5J. It is the first connector in the
5J area.
KBKilobyte (1024 bytes)
KbitKilobit (1024 bits)
MBMegabyte (1,048,576 bytes)
MbitMegabit (1,048,576 bits)
GBGigabyte (1,073,741,824 bytes)
xxhAn address or data value ending with a lowercase h indicates a hexadecimal value.
x.x VVolts. Voltages are DC unless otherwise specified.
†
This symbol is used to indicate third-party brands and names that are the property of their
The board’s compliance level with APM, ACPI, Plug and Play, and SMBIOS.Section 1.3, page 16
†
Support for system wake up using an add-in network interface card with remote
wake up capability
Support for system wake up using an add-in telephony device, such as a modem
Allows add-in SCSI controllers to use the same LED as the onboard I/O controller
Audio/Modem Riser connector
1.1.2 Manufacturing Option
Table 2 describes the CC820 board’s manufacturing option.
Table 2.Manufacturing Option
Audio
Audio Codec ’97 (AC ’97) compatible. The audio subsystem includes Creative Labs’
ES1373 AC ’97 Digital Controller with Crystal Semiconductor’s CS4297 Stereo Audio
Codec.
Version 2.3,
August 12, 1998,
Award Software International Inc.,
Dell Computer Corporation,
Hewlett-Packard Company,
Intel Corporation,
International Business Machines
Corporation,
Phoenix Technologies Limited,
American Megatrends Inc.,
and SystemSoft Corporation.
Version 1.1,
March 1996,
Intel Corporation.
Version 1.1,
September 23, 1998,
Compaq Computer Corporation,
Intel Corporation, Microsoft
Corporation, and NEC.
Version 2.0,
December 18, 1998,
Intel Corporation.
The CC820 desktop board supports processors that have a 19.3 A maximum current draw
(2 V core), or 18.4 A maximum current draw (1.6 V core). Using a processor not in compliance
with the above guidelines can damage the processor, the CC820 board, and the power supply. See
the processor’s data sheet for current usage requirements.
The CC820 board supports a single Pentium III or Pentium II processor. The host bus speed is
automatically selected. The processor must be secured by a retention mechanism attached to the
CC820 board.
The CC820 board supports a single 242-contact slot type processor as listed in Table 4.
Table 4.Supported Processors
Processor
Type
Pentium III processor450, 500, 550, and 600100512
Pentium II processor350, 400, and 450100512
Processor Designation
(MHz)
550E, 600E, 650, and 700100256
533B and 600B133512
533EB, 600EB, 667, and 733133256
Host Bus Frequency
(MHz)
L2 Cache Size
(KB)
NOTE
✏
66 MHz host bus frequency processors are not supported in this product. A hardware lockout is
provided so that if such a processor is installed, the CC820 board will not power-up.
All supported onboard memory can be cached, up to the cachability limit of the processor. See the
To be fully compliant with all applicable Intel® SDRAM memory specifications, the CC820 board
requires DIMMs that support the Serial Presence Detect (SPD) data structure. If non-SPD
DIMMs are installed, the system will not boot properly.
The CC820 desktop board has two DIMM sockets supporting 168-pin SDRAM DIMMs. When
installing memory in the CC820 desktop board, proper memory installation guidelines should be
followed as described in Section 1.5.2.
The CC820 desktop board supports the following memory features:
• 168-pin SDRAM DIMMs with gold-plated contacts
• 100 MHz SDRAM (only)
• 64 Mbit and 128 Mbit SDRAM component density (see Table 5 below)
• Minimum system memory: 32 MB
• Maximum system memory: 512 MB
• Unbuffered single or double-sided DIMMs
• Serial Presence Detect (SPD) memory (only)
• Non-ECC and ECC DIMMs (ECC DIMMs will operate in non-ECC mode only)
• 3.3 V memory (only)
• Suspend to RAM
Table 5.Supported DIMM Sizes and Configurations (non-ECC specified)
Total Number of
SDRAM Components
DIMM Size
32 MB44M x 6464 Mbit4M x 16
64 MB88M x 6464 Mbit8M x 8
64 MB8 (double sided)8M x 6464 Mbit4M x 16
64 MB48M x 64128 Mbit8M x 16
128 MB16 (double sided)16M x 6464 Mbit8M x 8
128 MB816M x 64128 Mbit16M x 8
128 MB8 (double sided)16M x 64128 Mbit8M x 16
256 MB16 (double sided)32M x 64128 Mbit16M x 8
*Non-ECC DIMMs are specified. ECC DIMM organization will be x72 and will have up to one additional SDRA M
component for each side of DI M M
on DIMM*
Non-ECC DIMM
Organization*
SDRAM Component
Density
SDRAM
Component
Organization
1.5.1 ECC Memory
The CC820 board supports both ECC and non-ECC DIMMs, however, ECC DIMMs will operate
in non-ECC mode only.
20
Product Description
1.5.2 DIMM Installation Guidelines
CAUTION
To be fully compliant with all applicable Intel SDRAM memory specifications, the CC820 desktop
board requires DIMMs that support the Serial Presence Detect (SPD) data structure.
The CC820 board requires supported DIMMs be installed under the guidelines listed below.
• If you have one DIMM, install it in Bank 0 (the memory slot closest to the processor). If only
one DIMM is installed in Bank 1, the system will still boot, however STR will not work.
• If you have two identical DIMMs (same size, same number of sides, both single-sided or both
double-sided), install them in either bank 0 or bank 1.
• If you have two DIMMs of different sizes (e.g., a 64 MB and 128 MB DIMM), install the
larger DIMM in Bank 0, and the smaller DIMM in Bank 1.
• If you have two DIMMs of the same size and one is single-sided and one is double-sided,
install the single-sided DIMM in Bank 0 and the double-sided DIMM in bank 1.
NOTE
✏
An ECC-type DIMM may have one or two additional SDRAM devices per side for ECC bit storage.
Do not count these when determining the number of SDRAM devices on the DIMM.
Table 6 summarizes the DIMM installation guidelines given above.
Table 6.Installation Guideline Summary
Types of DIMMs to be installed…Bank 0Bank 1
One DIMMDIMM(Empty)
Two DIMMs - Same size, same number of sides (both single-
or both double-sided)
Two DIMMs - Different sizesLarger DIMMSmaller DIMM
Two DIMMs - Same size, one is single-sided and one is
double-sided
For information aboutRefer to
The
PC Serial Presence Detect Specification
Obtaining copies of PC SDRAM specificationsSection 1.3, page 16
The Intel 820 chipset consists of the following devices:
• 82820 Memory Controller Hub (MCH) with Accelerated Hub Architecture (AHA) bus
• 82801AA I/O Controller Hub (ICH) with AHA bus
• 82802AB Firmware Hub (FWH)
• 82805AA Memory Translator Hub (MTH)
The chipset provides the host, memory, AGP, and I/O interfaces shown in Figure 3.
ATA33/66USBHost Bus
820 Chipset
82805AA
Memory
Translator
Hub (MTH)
SDRAM Bus
AGP Interface
82820
Memory Controller
Hub (MCH)
AHA
Bus
82801AA I/O Controller Hub
(ICH)
SMBus
PCI Bus
AC Link
Figure 3. Intel 820 Chipset Block Diagram
For information aboutRefer toThe Intel 820 chipsethttp://developer.intel.comThe resources used by the chipsetChapter 2The chipset’s compliance with ACPI, APM, AC ‘97Section 1.3, page 16
82802AB
Firmware Hub
(FWH)
LPC Bus
OM08890
22
Product Description
1.6.1 AGP
AGP is a high-performance interface for graphics-intensive applications, such as 3D applications.
While based on the PCI Local Bus Specification, Rev. 2.1, AGP is independent of the PCI bus and
is intended for exclusive use with graphical display devices. AGP overcomes certain limitations of
the PCI bus related to handling large amount of graphics data with the following features:
• Pipelined memory read and write operations that hide memory access latency
• Demultiplexing of address and data on the bus for nearly 100 percent efficiency
For information aboutRefer to
Obtaining the
Accelerated Graphics Port Interface Specification
Section 1.3, page 16
1.6.2 USB
The CC820 board has two USB ports; one USB peripheral can be connected to each port. For
more than two USB devices, an external hub can be connected to either port. The two USB ports
are implemented with stacked back panel connectors. The CC820 board fully supports UHCI and
uses UHCI-compatible software drivers. USB features include:
• Self-identifying peripherals that can be plugged in while the computer is running
• Automatic mapping of function to driver and configuration
• Support for isochronous and asynchronous transfer types over the same set of wires
• Support for up to 127 physical devices
• Guaranteed bandwidth and low latencies appropriate for telephony, audio, and other
applications
• Error-handling and fault-recovery mechanisms built into the protocol
NOTE
✏
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device or a low-speed USB device is attached to the cable. Use
shielded cable that meets the requirements for full-speed devices.
For information aboutRefer to
The location of the USB connectors on the back panelFigure 9, page 50
The signal names of the USB connectorsTable 18, page 51
The USB specification and UHCISection 1.3, page 16
The CC820 board has two independent bus-mastering IDE interfaces. These interfaces support:
• ATA 33/66
• ATAPI devices (such as CD-ROM drives)
• ATA devices using the transfer modes listed in Table 64 on page 102
The BIOS supports logical block addressing (LBA) and extended cylinder head sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The CC820 board supports laser servo (LS-120) diskette technology through its IDE interfaces.
The LS-120 drive can be configured as a boot device by setting the BIOS Setup program’s Boot
menu to one of the following:
• ARMD-FDD (ATAPI removable media device – floppy disk drive)
• ARMD-HDD (ATAPI removable media device – hard disk drive)
For information aboutRefer to
The location of the IDE connectorsFigure 11, page 57
The signal names of the IDE connectorsTable 31, page 58
BIOS Setup program’s Boot menuTable 70, page 108
1.6.3.2 SCSI Hard Drive Activity LED Connector
The SCSI hard drive activity LED connector is a 1 x 2-pin connector that allows add-in
SCSI controller to use the same LED as the IDE controller. This connector can be connected to the
LED output of the add-in controller card. The LED will indicate when data is being read or written
using the add-in controller.
For information aboutRefer to
The location of the SCSI hard drive activity LED connectorFigure 11, page 57
The signal names of the SCSI hard drive activity LED connectorTable 30, page 58
1.6.4 Real-Time Clock, CMOS SRAM, and Battery
The real-time clock is compatible with DS1287 and MC146818 components. The clock provides a
time-of-day clock and a multicentury calendar with alarm features and century rollover. The realtime clock supports 256 bytes of battery-backed CMOS SRAM in two banks that are reserved for
BIOS use.
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
The time, date, and CMOS values can be specified in the BIOS Setup program. The CMOS values
can be returned to their defaults by using the BIOS Setup program.
24
Product Description
✏ NOTE
If the battery and AC power fail, standard defaults, not custom defaults, will be loaded into CMOS
RAM at power-on.
✏ NOTE
The recommended method of accessing the date in systems with CC820 boards is indirectly from
the Real-Time Clock (RTC) via the BIOS. The BIOS on CC820 boards contains a century checking
and maintenance feature. This feature checks the two least significant digits of the year stored in
the RTC during each BIOS request (INT 1Ah) to read the date and, if less than 80 (i.e., 1980 is the
first year supported by the PC), updates the century byte to 20. This feature enables operating
systems and applications using the BIOS date/time services to reliably manipulate the year as a
four-digit value.
For information aboutRefer to
Proper date access in systems with CC820 boardsSection 1.2, page 16
1.7 I/O Controller
The SMSC LPC47M102 I/O Controller provides the following features:
• Low pin count (LPC) interface
• 3.3V operation
• Two serial ports
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
• Serial IRQ interface compatible with serialized IRQ support for PCI systems
• PS/2-style mouse and keyboard interfaces
• Interface for one 1.2 MB, 1.44 MB, or 2.88 MB diskette drive
• Intelligent power management, including a programmable wake up event interface
• PCI Power Management Support
• IrDA
• Fan control:
The BIOS Setup program provides configuration options for the I/O controller.
For information aboutRefer to
SMSC LPC47M102 I/O controllerhttp://www.smsc.com
†
1.0 compliant
Two fan control outputs
Two fan tachometer inputs
The CC820 board has two 9-pin D-Sub serial port connectors located on the back panel. The serial
ports’ NS16C550-compatible UARTs support data transfers at speeds up to 115.2 kbits/sec with
BIOS support. The serial ports can be assigned as COM1 (3F8h), COM2 (2F8h), COM3 (3E8h),
or COM4 (2E8h).
For information aboutRefer to
The location of the serial port connectorsFigure 9, page 50
The signal names of the serial port connectorsTable 20, page 52
1.7.2 Infrared Support
On the front panel connector, there are four pins that support Hewlett-Packard HSDL-1000
compatible infrared (IR) transmitters and receivers. In the BIOS Setup program, Serial Port B can
be directed to a connected IR device. (In this case, the serial port B connector on the back panel
cannot be used.) The IR connection can be used to transfer files to or from portable devices like
laptops, PDAs, and printers. The Infrared Data Association (IrDA) specification supports data
transfers of 115 Kbits/sec at a distance of 1 meter.
For information aboutRefer to
The infrared port connectorTable 42, page 67
Configuring serial port B for infrared applicationsSection 4.4.3, page 99
The IrDA specificationSection 1.3, page 16
1.7.3 Parallel Port
The connector for the multimode bidirectional parallel port is a 25-pin D-Sub connector located on
the back panel. In the BIOS Setup program, the parallel port can be configured for the following:
†
• Output only (PC AT
• Bi-directional (PS/2 compatible)
• EPP
• ECP
For information aboutRefer to
The location of the parallel port connectorFigure 9, page 50
The signal names of the parallel port connectorTable 19, page 51
-compatible mode)
26
Product Description
1.7.4 Diskette Drive Controller
The I/O controller supports one diskette drive that is compatible with the 82077 diskette drive
†
controller and supports both PC-AT
For information aboutRefer to
The location of the diskette drive connectorFigure 11, page 57
The signal names of the diskette drive connectorTable 32, page 59
The supported diskette drive capacities and sizesTable 65, page 103
and PS/2 modes.
1.7.5 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel. The +5 V lines to these
†
connectors are protected with a PolySwitch
connection after an overcurrent condition is removed.
NOTE
✏
The keyboard is supported in the bottom PS/2 connector and the mouse is supported in the top
PS/2 connector. Power to the computer should be turned off before a keyboard or mouse is
connected or disconnected.
circuit that, like a self-healing fuse, reestablishes the
The keyboard controller contains the AMI keyboard and mouse controller code, provides the
keyboard and mouse control functions, and supports password protection for power-on/reset. A
power-on/reset password can be specified in the BIOS Setup program.
The keyboard controller also supports the hot-key sequence <Ctrl><Alt><Del> for a software
reset. This key sequence resets the computer’s software by jumping to the beginning of the BIOS
code and running the power-on self-test (POST).
For information aboutRefer to
The location of the keyboard and mouse connectorsFigure 9, page 50
The signal names of the keyboard and mouse connectorsTable 17, page 51
• Power management support for APM 1.2 and ACPI 1.0 (driver dependant)
• 3-D stereo enhancement
The Enhanced PCI Audio Subsystem has additional features described in Section 1.8.2.
1.8.1 Audio/Modem Riser (AMR) Connector
The AMR is a 46-pin riser connector that supports adding modems and/or audio risers to CC820
boards. The AMR interface, utilizing an AC ’97 2.1 link, includes support for audio codec,
modem codec, and audio/modem codec devices.
82801AA
I/O Controller Hub (ICH)
AMR Connector
Figure 4. Block Diagram of Audio Subsystem (with ICH and AMR)
For information aboutRefer to
The location of the Audio/Modem Riser connectorFigure 13, page 63
The signal names of the Audio/Modem Riser connectorTable 26, page 55
The AMR specificationSection 1.3, page 16
AC ’97 Link
OM09038
28
Product Description
1.8.2 Enhanced PCI Audio Subsystem (Optional)
The CC820 board offers an optional subsystem of AC ’97 V 1.03 compliant audio features
supported by the Creative Labs ES1373 digital controller with Crystal Semiconductor CS4297 (A)
codec. The enhanced PCI audio subsystem supports the following audio connectors:
• Audio inputs:
Three analog line-level stereo inputs for connection from line in, CD and aux
Two analog line-level inputs for speakerphone
One mono microphone input
Figure 5. Block Diagram of Audio Subsystem with Analog Codec and Digital Controller
The Creative Labs ES1373 digital controller with the Crystal Semiconductor CS4297 (A) codec
support the following features:
• Creative Labs ES1373 AC ’97 V1.03 Digital Controller:
PCI 2.1 compliant
PCI bus master for PCI audio
64-voice wavetable synthesizer
†
Aureal A3D
API, Sound Blaster Pro†, Roland MPU-401 MIDI, joystick compatible
Ensoniq 3D positional audio and Microsoft DirectSound† 3D support
• Crystal Semiconductor CS4297 (A) Stereo Audio Codec:
High performance 18-bit stereo full-duplex audio codec with up to 48 kHz sampling rate
Connects to the ES1373 digital controller using a five-wire digital interface
For information aboutRefer to
Obtaining audio software and utilitiesParagraph 1.2, page 16