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-002 Minor edits and formatting throughout. June 2008
-003 Added Intel 82G41 GMCH September 2008
-004 Added Intel 82Q43 GMCH and 82Q45 GMCH September 2008
Description Date
§
5 Thermal and Mechanical Design Guidelines
Thermal and Mechanical Design Guidelines 6
Introduction
1 Introduction
As the complexity of computer systems increases, so do power dissipation
requirements. The additional power of next generation systems must be properly
dissipated. Heat can be dissipated using improved system cooling, selective use of
ducting, and/or passive heatsinks.
The objective of thermal management is to ensure that the temperatures of all
components in a system are maintained within functional limits. The functional
temperature limit is the range within which the electrical circuits can be expected to
meet specified performance requirements. Operation outside the functional limit can
degrade system performance, cause logic errors, or cause component and/or system
damage. Temperatures exceeding the maximum operating limits may result in
irreversible changes in the operating characteristics of the component.
This document is for the following devices:
®
• Intel
• Intel
• Intel
• Intel
P45 Chipset MCH (82P45 MCH)
®
P43 Chipset MCH (82P43 MCH)
®
G45 Chipset GMCH (82G45 GMCH)
®
G43 Chipset GMCH (82G43 GMCH)
• Intel® G41 Chipset GMCH (82G41 GMCH)
• Intel® Q45 Chipset GMCH (82Q45 GMCH)
• Intel® Q43 Chipset GMCH (82Q43 GMCH)
This document presents the conditions and requirements to properly design a cooling
solution for systems that implement the (G)MCH. Properly designed solutions provide
adequate cooling to maintain the (G)MCH case temperature at or below thermal
specifications. This is accomplished by providing a low local-ambient temperature,
ensuring adequate local airflow, and minimizing the case to local-ambient thermal
resistance. By maintaining the (G)MCH case temperature at or below those
recommended in this document, a system designer can ensure the proper
functionality, performance, and reliability of this component.
Note: Unless otherwise specified the information in this document applies to all
configurations of Intel
®
P45, P43, Q45, Q43, G45, G43, and G41 Chipsets. The Intel®
Q45, Q43, G45, G43, and G41 Chipsets are available with integrated graphics and
associated SDVO and digital display ports. In this document the integrated graphics
version is referred to as GMCH. In addition a version will be offered using discrete
graphics and is referred to as the MCH. The term (G)MCH will be used to when
referring to all configurations.
Note: In this document the Intel P45, P43, Q45, Q43, G45, and G43 Chipsets refer to the
combination of the (G)MCH and the Intel
®
ICH10. For ICH10 thermal details, refer to
the Intel® I/O Controller Hub 10 (ICH10) Thermal Design Guidelines. The Intel G41
Chipset refers to the combination of the GMCH and Intel ICH7. For ICH7 details, refer
to the Intel® I/O Controller Hub 7 (ICH7) Thermal Design Guidelines.
7 Thermal and Mechanical Design Guidelines
1.1 Terminology
Term Description
FC-BGA Flip Chip Ball Grid Array. A package type defined by a plastic substrate where a
die is mounted using an underfill C4 (Controlled Collapse Chip Connection)
attach style. The primary electrical interface is an array of solder balls attached
to the substrate opposite the die. Note that the device arrives at the customer
with solder balls attached.
Intel® ICH7 Intel® I/O Controller Hub 7. The chipset component that contains the primary
PCI interface, LPC interface, USB2, SATA, and/or other legacy functions.
Intel® ICH10 Intel® I/O Controller Hub 10. The chipset component that contains the primary
The (G)MCH is available in a 34 mm [1.34 in] x 34 mm [1.34 in] Flip Chip Ball Grid
Array (FC-BGA) package with 1254 solder balls. The die size is currently 10.80 mm
[0.425 in] x 9.06 mm [0.357 in] and is subject to change. A mechanical drawing of
the package is shown in
2.1.1 Non-Grid Array Package Ball Placement
The (G)MCH package utilizes a “balls anywhere” concept. Minimum ball pitch is
0.7 mm [0.028 in], but ball ordering does not follow a 0.7 mm grid. Board designers
should ensure correct ball placement when designing for the non-grid array pattern.
For exact ball locations relative to the package, refer to the IntelFamily Datasheet.
Table 1 provides static load specifications for the package. This mechanical maximum
load limit should not be exceeded during heatsink assembly, shipping conditions, or
standard use conditions. Also, any mechanical system or component testing should
not exceed the maximum limit. The package substrate should not be used as a
mechanical reference or load-bearing surface for the thermal and mechanical solution.
Table 1. Package Loading Specifications
Parameter Maximum Notes
Static
NOTES:
1. These specifications apply to uniform compressive loading in a direction normal to the
package.
2. This is the maximum force that can be applied by a heatsink retention clip. The clip
must also provide the minimum specified load on the package.
3. These specifications are based on limited testing for design characterization. Lo ading
limits are for the package only.
To ensure the package static load limit is not exceeded, the designer should
understand the post reflow package height. The following figure shows the nominal
post-reflow package height assumed for calculation of a heatsink clip preload of the
reference design. Refer to the package drawing in
analysis.
15 lbf
1,2,3
Appendix B to perform a detailed
Product Specifications
Figure 2. Package Height
2.3 Thermal Specifications
To ensure proper operation and reliability of the (G)MCH, the case temperature must
be at or below the maximum value specified in
thermal enhancements are required to dissipate the heat generated and maintain the
(G)MCH within specifications. Chapter 3 provides the thermal metrology guidelines for
case temperature measurements.
Table 2. System and component level
Thermal and Mechanical Design Guidelines 12
Product Specifications
2.3.1 Thermal Design Power (TDP)
2.3.1.1 Definition
Thermal design power (TDP) is the estimated power dissipation of the (G)MCH based
on normal operating conditions including V
case power intensive applications. This value is based on expected worst-case data
traffic patterns and usage of the chipset and does not represent a specific software
application. TDP attempts to account for expected increases in power due to variation
in (G)MCH current consumption due to silicon process variation, processor speed,
DRAM capacitive bus loading and temperature. However, since these variations are
subject to change, there is no assurance that all applications will not exceed the TDP
value.
The system designer must design a thermal solution for the (G)MCH such that it
maintains T
specification is a requirement for a sustained power level equal to TDP, and that
T
C-MAX
below T
C
the case temperature must be maintained at temperatures less than T
operating at power levels less than TDP. This temperature compliance is to ensure
component reliability. The TDP value can be used for thermal design if the thermal
protection mechanisms are enabled. The (G)MCH incorporate a hardware-based failsafe mechanism to keep the product temperature in spec in the event of unusually
strenuous usage above the TDP power.
for a sustained power level equal to TDP. Note that the
C-MAX
and T
CC
while executing real worst-
C-MAX
C-MAX
when
2.3.2 TDP Prediction Methodology
2.3.2.1 Pre-Silicon
To determine TDP for pre-silicon products in development, it is necessary to make
estimates based on analytical models. These models rely on knowledge of the past
(G)MCH power dissipation behavior along with knowledge of planned architectural and
process changes that may affect TDP. Knowledge of applications available today and
their ability to stress various aspects of the (G)MCH is also included in the model. The
projection for TDP assumes (G)MCH operation at T
accounts for normal manufacturing process variation.
2.3.2.2 Post-Silicon
Once the product silicon is available, post-silicon validation is performed to assess the
validity of pre-silicon projections. Testing is performed on both commercially available
and synthetic high power applications and power data is compared to pre-silicon
estimates. Post-silicon validation may result in a small adjustment to pre-silicon TDP
estimates.
. The TDP estimate also
C-MAX
13 Thermal and Mechanical Design Guidelines
2.3.3 Thermal Specifications
The data in Table 2 is based on post-silicon power measurements for the (G)MCH. The
TDP values are based on system configuration with two (2) DIMMs per channel, DDR3
(or DDR2) and the FSB operating at the top speed allowed by the chipset with a
processor operating at that system bus speed. Intel recommends designing the
(G)MCH thermal solution to the highest system bus speed and memory frequency for
maximum flexibility and reuse. The (G)MCH packages have poor heat transfer
capability into the board and have minimal thermal capability without thermal
solutions. Intel requires that system designers plan for an attached heatsink when
using the (G)MCH.
Table 2. Thermal Specifications
Product Specifications
Component Mem
Intel® G45
Type
DDR3 1333
Chipset
Intel® G43
DDR3 1333
Chipset
Intel® G41
DDR3 1333
Chipset
Intel® Q45 /
DDR3 1333
Q43 Chipset
Intel® Q45 /
DDR2 1333
Q43 Chipset
Intel® Q43
DDR3 1333
Chipset
Intel® P45
DDR3 1333
Chipset
Intel® P43
DDR3 1333
Chipset
NOTES:
1. Thermal specifications assume an attached heatsink is present.
2. Max Idle power is the worst case idle power in the system booted to Windows* with no
3. Intel
4. When an external graphic card is installed in a system with the Intel
5. The Idle and TDP numbers are assuming Internal Graphics is disabled on the Intel Q43
6. Idle data is measured on Intel P45, P43 Chipset when an external graphics card is
Sys
Bus
Speed
MT/s
MT/s
MT/s
MT/s
MT/s
MT/s
MT/s
MT/s
background applications running.
®
P45, P43, G45, G43, Q45, and Q43 Chipset TDP is measured with DDR3 (or
DDR2) with 2 channels, 2 DIMMs per channel and Max Idle power is measured with
DDR3 (or DDR2) with 2 channels, 1 DIMM per channel. Intel
Idle power are measured with DDR3 with 2 channels, 1 DIMM per channel.
Mem
Freq
1333
MT/s
1067
MT/s
1067
MT/s
1067
MT/s
800
MT/s
1067
MT/s
1333
MT/s
1067
MT/s
Max Idle
Power
(C1/C2
Enabled)
Max Idle
Power
(C3/C4
Enabled)
TDP T
C-MIN
T
C-MAX
Notes
9 W 7.7 W 24 W 0 °C 103°C 1,2,3,4
9 W 7.7 W 24 W 0 °C 103 °C 1,2,3,4
11.5 W N/A 25 W 0 °C 102 °C 1,2,3
6W 4.7 W 17 W 0 °C 105 °C 1,2,3
6W 4.7 W 17 W 0 °C 105 °C 1,2,3
5W 3.8 W 13 W 0 °C 105 °C 1,2,3,5
9 W 7.5 W 22 W 0 °C 103 °C 1,2,3,6
9 W 7.5 W 22 W 0 °C 103 °C 1,2,3,6
®
G41 Chipset TDP and Max
®
G45, G43
Chipsets, the TDP for these parts will drop to approximately 22 W. The GMCH will
detect the presence of the graphics card and disable the on-board graphics resulting in
the lower TDP for these components.
Chipset.
installed in a system wherein this card must support L0s /L1 ASPM.
Thermal and Mechanical Design Guidelines 14
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