WIDEBAND RECEIVER
S-14510XZ-C1
Aug. 2008
INTRODUCTION
This service manual describes the latest service information
for the IC-RX7 WIDEBAND RECEIVER at the time of
publication.
MODEL VERSION RX FREQUENCY RANGE (MHz)
[EUR01]
[UK-01]
IC-RX7
To upgrade quality, any electrical or mechanical parts and
internal circuits are subject to change without notice or
obligation.
[USA-01]
[EXP-01]
[CAN-01]
UNIT ABBREVIATIONS:
L=LOGIC UNIT
M=MAIN UNIT
0.150–1300.000
0.150–821.995
851.000–866.995
896.000–1300.000
0.150–1300.000[CHN-01]
CAUTION
NEVER connect the receiver to an AC outlet or to a DC
power supply that uses more than specifed. This will ruin
the receiver.
DO NOT expose the receiver to rain, snow or any liquids.
DO NOT reverse the polarities of the power supply when
connecting the receiver.
DO NOT apply an RF signal of more than 20 dBm (100 mW)
to the antenna connector. This could damage the receiver’s
front-end.
ORDERING PARTS
Be sure to include the following four points when ordering
replacement parts:
1. 10-digit Icom parts numbers
2. Component name
3. Equipment model name and unit name
4. Quantity required
<ORDER EXAMPLE>
1110003491 S.IC TA31136FNG IC-RX7 MAIN UNIT 5 pieces
8820001210 Screw 2438 screw IC-RX7 Top cover 10 pieces
REPAIR NOTES
1. Make sure that the problem is internal before
disassembling the receiver.
2. DO NOT open the receiver until the receiver is
disconnected from its power source.
3. DO NOT force any of the variable components. Turn
them slowly and smoothly.
4. DO NOT short any circuits or electronic parts. An
insulated tuning tool MUST be used for all adjustments.
5. DO NOT keep power ON for a long time when the
receiver is defective.
6. READ the instructions of test equipment throughly
before connecting a test equipment to the receiver.
Addresses are provided on the inside back cover for your
convenience.
Icom, Icom Inc. and
Kingdom, Germany, France, Spain, Russia and/or other countries.
logo are registered trademarks of Icom Incorporated (Japan) in the United States, the United
TABLE OF CONTENTS
SECTION 1 SPECIFICATIONS
SECTION 2 INSIDE VIEWS
SECTION 3 DISASSEMBLY INSTRUCTION
SECTION 4 CIRCUIT DESCRIPITON
4-1 MAIN UNIT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
4-2 1st VCO UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
4-3 2nd VCO UNIT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
4-4 VOLTAGE DIAGRAMS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
4-5 PORT ALLOCATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
SECTION 5 ADJUSTMENT PROCEDURES
5-1 PREPARATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
5-2 FREQUENCY ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
SECTION 6 PARTS LIST
SECTION 7 MECHANICAL PARTS
SECTION 8 BOARD LAYOUTS
SECTION 9 BLOCK DIAGRAM
SECTION 10 VOLTAGE DIAGRAMS
LOGIC UNIT (Left side) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
LOGIC UNIT (Right side). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2
MAIN UNIT (Left side) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3
MAIN UNIT (Right side). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-4
1st VCO UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-5
2nd VCO UNIT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-5
SECTION 1. SPECIFICATIONS
D General
• Frequency coverage : (Unit: MHz)
USA 0.150–821.995, 851.000–866.995,
896.000–1300.000
Other than USA 0.150–1300.000
• Number of memory channels : 1600 channels (Memory channels)
200 channels (Auto write channels)
• Receive modes : FM, AM, WFM
• Frequency resolution : 5, 6.25, 7.5, *8.33,*9, 10, 12.5, 15, 20,
*selectable depending on the operating frequency band.
• Operating temperature range : –10°C to +60˚C; +14˚F to +140˚F
• Reference frequency stability : ±6 ppm
• Power supply requirement : BP-244 (Li-Ion battery pack),
(Negative ground) BP-262 (3 AA (LR6) alkaline cells) or
• Current drain (backlight OFF with BP-244 (3.7 V DC):
rated audio 150 mA typical
receive standby 100 mA typical
power saved 35 mA typical
• Antenna connector type : SMA
• Antenna impedance :
• Dimensions (proj. not included) : 57(W) × 128(H) × 23(D) mm
(approx.) : 200 g; 7.1 oz (with the ant. and BP-244)
• Weight
• AF output power
• Ext. speaker connector : 3-conductor 3.5 (d) mm (1⁄8″)/8 Ω
(at 3.7 V DC) : More than 600 mW at 70% modulation,
25 channels (Scan edge channels)
25, 30, 50, 100, 125, 200
(–10˚C to +60˚C; +14˚F to +140˚F)
5.1 to 6.9 V DC
50 Ω (unbalanced)
1
⁄4(W)×51⁄32(H)×29⁄32(D) in
2
10% distortion with an 8 Ω load
kHz
(with CP-18A/E)
D Receiver
• Receive system : Triple-conversion superheterodyne
• Intermediate frequencies : 1st : 429.1 MHz,
2nd : 19.65 MHz (FM/AM),
3rd : 450 kHz (FM/AM),
• Sensitivity
• Selectivity :
(except spurious points) :
(1 kHz/3.5 kHz Dev.; 12 dB SINAD)
FM
1.625–4.995 MHz Less than 0.56 μV
5.000–246.995 MHz Less than 0.4 μV
247.000–832.995 MHz Less than 0.56 μV
833.000–1300.000 MHz Less than 0.79 μV (Except USA version)
851.000–866.995 MHz Less than 1.3 μV (USA version only)
896.000–1300.000 MHz Less than 0.79 μV (USA version only)
(1 kHz/52.5 kHz Dev.; 12 dB SINAD)
WFM
76.000–108.000 MHz Less than 1.8 μV
175.000–221.995 MHz Less than 1.8 μV
470.000–770.000 MHz Less than 2.5 μV
EXT-ANT (DX) (1 kHz/30% MOD.; 10 dB S/N)
AM
0.495–4.995 MHz Less than 2.5 μV
5.000–29.995 MHz Less than 1.8 μV
118.000–136.000 MHz Less than 1.8 μV
222.000–246.995 MHz Less than 1.8 μV
247.000–329.995 MHz Less than 1.8 μV
AM/FM More than 15 kHz/–9 dB
WFM More than 150 kHz/–6 dB
20.75 MHz (WFM)
1.55 MHz (WFM)
Less than 30 kHz/–60 dB
1 - 1
SECTION 2. INSIDE VIEWS
• LOGIC UNIT
EEPROM
(IC14)
EEPROM
(IC15)
CPU
(IC17)
3V REG
(IC4)
3.2V REGULATOR
(IC3)
TONE FILTER
(IC12)
3V line SW
(Q28)
CLONE BUFFER
(IC8)
TONE CONTROLER (AF SW)
(IC20)
• MAIN UNIT
2ND VCO
1ST VCO
REFERENCE FREQUENCY
OSCILLATOR
(X1)
DISCRIMINATOR
(X3)
3rd IF FILTER
(FI3)
2 - 1
SECTION 3. DISASSEMBLY INSTRUCTION
1. Removing the front panel
q Unscrew 4 screws from the rear panel.
4 screws
Rear panel
w Release the both sides of notches, and remove the front
panel.
2. Removing the LOGIC UNIT
q Unscrew total of 4 screws from the LOGIC UNIT.
w Unsolder 3 points at the rotary encoder (CONTROL
DIAL), then remove the LOGIC UNIT from the rear panel.
Unsolder
2 screws
2 screws
LOGIC UNIT
Rear panel
3. Removing the MAIN UNIT
q Unscrew 5 screws from the MAIN UNIT
w Unsolder 1 point at the bottom of antenna conector, then
remove the MAIN UNIT from the rea panel.
Unscrew×5
Antenna connector
MAIN UNIT
Unsolder
3 - 1
SECTION 4. CIRCUIT DESCRIPTION
4-1 MAIN UNIT
MAIN UNIT has RF circuits, 1st and 2nd IF circuits, FM and
AM demodulator circuits. The RX signals from the antenna
are fi ltered, amplifi ed and converted into the 1st and 2nd IF
signals in sequence, then FM/AM-demodulated.
ATTENUATOR CIRCUIT
RF signals from the antenna are passed through the limiter
(D1) and ATT SW (D2), then applied to the band SWs which
select the appropriate bandpass/low-pass filter according to
the RX frequency.
When the attenuator is inactivated, Q2 is OFF and the RX
signals are passed through D2. When the attenuator is
activated, Q2 is ON and the RX signals are passed through
the attenuator for 20 dB attenuation. The switching of Q2
and D2 is carried out by Q3 with the control signal "ATT."
RF AMP/FILTER CIRCUITS (BC/HF BAND)
The 0.15–76 MHz RX signals are passed through the diode
SW (D4) and LPF for unwanted signal removal and diode
SW (D28), then applied to the RF AMP (Q12, D33, 34).
When the “external antenna” is selected for AM broadcast
RX, the 0.5–3 MHz RX signals are passed through the
diode SW (D5) and the BPF (D53, etc.), then applied to the
RF AMP (Q12, D33, 34) via the diode SW (D29).
When the “internal bar antenna” is selected, the 0.5–1.6
MHz RX signal is passed through the diode SW (D27) and
applied to the RF AMP (Q12, D33, 34) via the diode SW
(D29).
The amplified RX signals from the RF AMP (Q12, D33, 34)
are applied to the wide band RF AMP (IC1) via the diode
SW (D37).
RF AMP/ FILTER CIRCUITS (VHF BAND)
The 76–350 MHz RX signals are passed through the diode
SW (D7) and HPF/LPF (D57, etc.) for unwanted signal
removal, and applied to the RF AMP (Q7, D14, 15).
The amplified RX signals are passed through the tuned BPF
(D31, 35, 58, etc.) for unwanted signal removal, and applied
to the wide band RF AMP (IC1) via the diode SW (D38).
When the RX frequency is 160 MHz and higher, the center
frequency of BPF is shifted to higher by D51 and D52.
RF AMP/FILTER CIRCUITS (1 GHz BAND)
The 833–1300 MHz RX signals are passed through the
diode SW (D10) and HPF/LPF for unwanted signal removal,
and applied to the RF AMP (Q6, D22, 23).
The amplified RX signals are applied to the wide band RF
AMP (IC1) via the diode SW (D42).
REGULATOR SWs
The power supply for each RF circuit (3V) is switched by
Q11, 17, 18 and 19.
1st MIXER and 2nd MIXER
The RX signals from each RF circuit are amplified by the
wideband RF AMP (IC1) and passed through the attenuator,
then applied to the 1st mixer (IC5). The RX signals are
mixed with the 1st LO signals from the 1st VCO UNIT to be
converted into the 429.1 MHz 1st IF signal.
The 429.1 MHz 1st IF signal is filtered by the 1st IF filter (FI1)
to remove unwanted signals, then applied to the 2nd mixer (IC8).
The 2nd IF signal is mixed with 2nd LO signals from the 2nd
VCO UNIT to be converted into the 2nd IF signal; 19.65 MHz
for AM/FM mode, 20.75 MHz for WFM mode.
In AM/FM mode operation, the 2nd IF signal is filtered by
the 2nd IF filter (FI2) to remove unwanted signals, then
applied to the 2nd IF AMP (Q31).
In WFM mode operation, the 2nd IF signal is by-passed the
2nd IF filter (FI2).
The path of 1st IF signal is switched by diode SWs (D44, 49).
3rd IF, DEMODULATOR and AGC CIRCUITS
The 2nd IF signal from the 2nd IF AMP (Q11) is applied
to IC13. IC is the IF IC which contains mixer, limiter,
quadrature detector and RSSI circuit in its package.
The 2nd IF signal is mixed with the 3rd LO signal from the LO
AMP (Q36) to be converted into the 3rd IF signal; 450 kHz for
AM/FM mode, 1.55 MHz for WFM mode.
• AM/FM MODE
The 3rd IF signal is filtered by the 3rd IF filter (FI3) to
remove unwanted signals, and applied to the each detector
circuit (AM or FM detector).
RF AMP/FILTER CIRCUITS (UHF BAND)
The 350–470 MHz RX signals are passed through the diode
SW (D8) and HPF/LPF for unwanted signal removal, and
applied to the RF AMP (Q41, 42, D18, 19).
The amplified RX signals are passed through the tuned BPF
(D32, 36, etc.) for unwanted signal removal, and applied to
the wide band RF AMP (IC1) via the diode SW (D40).
RF AMP/FILTER CIRCUITS (800 MHz BAND)
The 470–833 MHz RX signals are passed through the diode
SW (D9) and tuned BPF (D12, 13, etc.) for unwanted signal
removal, and applied to the RF AMP (Q5, D20, 21).
The amplified RX signals are passed through the tuned BPF
(D25, 26, etc.) for unwanted signal removal, and applied to
the wide band RF AMP (IC1) via the diode SW (D41)
• WFM MODE
The 3rd IF signal is by-passed FI3, and applied to the FM
demodulator circuit.
diode SWs (D47, 48) controlled by Q37.
In FM mode operation, the 3rd IF signal (450 kHz) is
FM-demodulated by the ceramic discriminator (X3).
In WFM mode operation, the 3rd IF signal (1.55 MHz) is
FM-demodulated by the LC resonator for WFM demodulation.
The switching of mode (WFM) is controlled by Q38, 40.
• AM MODE
The 3rd IF signal is amplified by Q26 and AM-demodulated
by Q25.
In each mode, the detected DC components are feedback
4 - 1
The path of 3rd IF signal
is switched by
to the RF AMP and IF AMP for AGC operation. The
demodulated AF signals are entered to the LOGIC UNIT via
AF SW (IC9).
REFERENCE FREQUENCY CIRCUIT
The reference frequency for both of 1st and 2nd VCO UNITs
is generated by the reference frequency oscillator TCXO
(X1).
The reference frequency signal is used as the 3rd LO signal
too.
4-3 2nd VCO UNIT
The 2nd VCO UNIT oscillates the 2nd LO signals. The VCO
oscillates 409.4500/448.7500 MHz signal in FM/AM mode,
and oscillates 408.3500/449.8500 MHz signal in WFM mode .
• VCO
The oscillator is composed by Q1, D1, C2–5, L1.
The VCO output signals are passed through the LPF that
composed by L3, C8, C9 and C10, and then applied to IC1
and MAIN UNIT as the 2nd LO signals.
• INTERMEDIATE FREQUENCIES (IF)
WFM FM AM
1st IF Frequency 429.1 MHz
2nd IF Frequency 20.75 MHz 19.65 MHz
3rd IF Frequency 1.55 MHz 450 kHz
4-2 1st VCO UNIT
The 1st VCO UNIT has 4 VCOs and each VCO oscillates 1st
LO signals for each band (SW, BC, VHF, UHF, 800 MHz and
1 GHz).
• Loop Filter
IC3 is a PLL IC, and the resulting signal of phase-comparison
is DC converted by the loop fi lter; active-fi lter (Q6, Q7, R24,
C38, C39) and passive fi lter (R35, C48), then the voltage (Lock
voltage) controls the oscillation frequency of VCOs.
• OSC AMP
Q12 is a OSC AMP, and amplifi es the OSC signals from the
MAIN UNIT, then the OSC signals are applied to IC3.
• 1VCO
1 VCO is the oscillator composed by Q1, D1, D2, L3, C3,
C4, and oscillates the 1st LO signals for receiving 510–741.5
MHz .
• OSC AMP
Q3 is the OSC AMP and amplifi es the reference frequency
signal from the MAIN UNIT, then the reference signal is
applied to PLL IC (IC1).
• Loop Filter
The pulse-type signal from the PLL IC is DC-converted by
the loop fi lter (the lug lead fi lter) which is composed by C21,
R15 and R22, C1, to control the oscillating frequency of the
VCO.
• Ripple Filter
The ripple filter is composed by Q4, C32 and R21, and
removes ripples contained in the voltage line for regulated
voltage for the VCO.
• 2VCO
2 VCO is the oscillator composed by Q2, D3, L6, C11, C16,
and oscillates the 1st LO signals for receiving 283–510 MHz
and 1130–1300MHz.
• 3VCO
3 VCO is the oscillator composed by Q3, D4, L9, C20, and
oscillates the 1st LO signals for receiving 83.5–283 MHz and
950–1130MHz.
• 4VCO
4VCO is the oscillator composed by Q4, D5, L12, C27, C28,
and oscillates the 1st LO signals for receiving 0.15–83.5
MHz and 741.5–950MHz.
• BUFFER AMP
The each VCO output signals are passed through the LO SW
(D7–10) and amplifi ed by the buffer AMP (IC2), then applied
to the both of PLL IC (IC3, via Q8) and MAIN UNIT as the 1st
LO signals.
• VCO OSCILLATION FREQUENCY
OSCILLATION FREQUENCY RX FREQUENCY
VCO1 939.1000–1170.1495 MHz
VCO2
VCO3
VCO4
712.1000–939.0999 MHz
700.9000–875.8999 MHz
512.6000–712.0995 MHz
525.9000–700.8999 MHz
429.25–512.5999 MHZ
311.9500–520.8999 MHz
510–741.0499 MHz
283–509.9999 MHz
1130–1304.9999 MHz
83.5–282.9999 MHz
950–1129.9999 MHz
0.15–83.4999 MHz
741.05–949.9999 MHz
4 - 2
4-4 LOGIC UNIT
The LOGIC UNIT has CPU, D/A converter (DAC), AF circuits
and power supply circuits. The CPU and DAC control the
whole operation of the receiver (RX frequency setting, BPF
tuning etc.), and the AF circuits filter, amplify and tonecontrol the demodulated AF signals. The power supply
circuits supply the voltage for each circuits.
CPU
IC17 is a 16 bits CPU that integrated ROM, RAM, the intrude
controller, real time pulse unit, serial interface and A/D
converter on the chip, and the CPU and external EEPROM
(IC14 and IC15) compose the main control system of
receiver.
RESET CIRCUIT
RESET CIRCUIT power-detects of ON/OFF with IC6, and
resets the CPU when the receiver is turned ON/OFF.
CLOCK CIRCUIT
The clock frequency (around 12.288 MHz) of the CPU is
oscillated by X1, C19 and 22. The clock frequency is able to
be shifted to prevent spurious interference.
DAC
IC16 is a 3-ch 8-bit D/A converter. The DAC controls the LO
frequencies, gain of RF AMP, tuning voltage, etc. according
to the serial data from the CPU.
AF CIRCUITS
Other than WFM mode operation, and when the AF fi lter is
activated, the demodulated AF signals are passed through
the AF fi lter (Q20) and applied to Q18.
In WFM mode operation, and when the AF filter is
inactivated, the demodulated AF signals are passed through
Q23 and applied to Q18.
The amplifi ed AF signals from Q18 are applied to the tone
controller (IC19). The tone controller adjusts the frequency
characteristic of the AF signals. The output signals of tone
controller are then applied to the electric VR IC (IC10) and
level-adjusted.
AF AMP
The level-adjusted AF signals are power-amplified by the
speaker AMP (IC9), then applied to the external/internal
speaker.
CHARGING CONTROL CIRCUIT
IC18 is a charge control IC that contains battery connect
detection, full charge detection, charging current control,
temperature detection, etc. The remaining battery capacity
and type of battery is detected by the voltage to be
applied to pin 2, and the IC interpret whether pre-charge is
necessary or not.
DC UPCONVERTER
The clock signal from the CPU is upconverted to 12 V DC
by the full-wave rectification circuit (IC11, D24 to 27). The
upconverted voltage is passed through the ripple fi lter (Q24,
C158, 195) then applied to the VP terminal of PLL IC as the
charge pump voltage.
POWER SUPPLY CIRCUITS
IC3 is a 3.2 V 3-terminal regulator and supplies voltage to
CPU, EEPROM and RESET IC. While the receiver’s power
is ON, +3 V DC is provided by Q2.
IC4 is also 3.2 V 3-terminal regulator and supplies 3 V (as
R3V) in power save mode.
BAR ANTENNA TUNING CIRCUIT
The internal bar antenna for AM broadcast band RX is tuned
to the frequency to receive by varying the capacitance of
D19 using the voltage from DC-DC upconverter via Q21 and
D37.
DECODE CIRCUIT
The demodulated AF signals “DET” from each detector
circuit are passed through the tone fi lter (1/2 of IC12) and
applied to the CPU for tone signal interpretation.
The charging period is set by resisters connected to the pins
2 and 6, and the temperature is ministered by the voltage to
be applied to pin 8 with external thermostat.
While charging, pin 3 outputs “L” level to the CPU for charging
indication on the LCD. Only when an external power supply
is connected and chargeable batteries are detected through
“BDET” terminal, the IC permits to start charging.
Another 1/2 of IC12 composes the LPF for VSC function,
and cut the AF line when unwanted continuous audible
signals is out there.
The demodulated AF signals from detector circuit are also
applied to the CPU for other tone signals interpretation (WX/
MSK) via some LPFs.
4 - 3
4-5 VOLTAGE DIAGRAM
Voltage from the power supply is routed to the whole of the receiver via the regulators and switches.
LOGIC UNIT
Padding voltage to the loop filter (1stV), Tuned BPFs (M: D53, 58)
Tone controller (L: IC19), Reference frequency oscillator (M: X1), PLL IC (1stV: IC3), PLL IC (2ndV: IC1), etc.
CPU (L: IC7), EEPROM (L: IC14, 15), RESET IC (L: IC6), etc.
Main power line; RF circuits,1st and 2nd IF circuits, AF circuits,etc.
IC11:TC7W04FU
Q24:2SC4738
D24-D27:1SS372
+10V
VP
DC-DC
REG
CKO
AF power AMP (L: IC9)
Q2:2SA1588
+3V
1stVCO UNIT
+3V
REG
PCON
CPU3V
IC4:NJU7775F32
R3V
AFVCC
Q43:2SA1577
Q44:2SC4738
D54:MA2S111
D55:MA2S728
VCO3V
IC3:NJU7775F3
CPU3V
REG
R3V
REG
R3C
Q11:2SB1201
Q12:XP1501
AF
REG
AFON
1stVCO
3VREG
VCC
VCC
VCC
VCC
CHARGE
CONTROL
Q27:HAT1023R
D2:SB07-03C
D35:MA2S728
D401:RR264M
IC18:BQ24064
Q26:UNR9213J
MAIN UNIT
J5
1
1
22
[DC 6V]
+
BATTERY
-
LCD backlight (L: DS10–12)
VCC
4 - 4
4-6 CPU PORT ALLOCATION
Pin
No.
4–7 KS0–KS3 Key matrix. I
LINE
NAME
1 KR0 Key matrix. I
2 PCON
3 TCON
8 TREBLE_B
9 BASS_B
10 ESIO EEPROM data I/O. I/O
11 ECK EEPROM clock. O
13 TREBLE_C
15 BASS_C
16 TRUTH
17 SHIFT
18 LCK DAC (L: IC16) clock. O
19 AM
20 AGCC
21 WFM
22 ANTSW
23 B2C
24 B1C
25 ATT
26 NOISE Detected noise level (D/A value). I
27 800MC
28 GC
29 UHFC
30 EAR
34 DUD [DIAL] (rotary encoder; L S21) I
35 DCK [DIAL] (rotary encoder; L S21) I
36 LDATA DAC (L: IC16) data. I
37 CKO
38 POWER [POWER] key. I
39 DATAC Common data to the buffer (L: IC1). O
40 LIGHT
41 AFON
44 BEEP Beep sounds (square waves). I
45 RSSI RSSI voltage (A/D value). I
46 RTONE Demodulated tone signals. I
+3V line SW
"L"=Power ON
Tone fi lter (L: IC12) SW
"L"=Filter activated.
Tone control circuit SW.
"H"=Treble-B
Tone control circuit SW.
"H"=Bass-B
Tone control circuit SW.
"H"=Treble-C
Tone control circuit SW.
"H"=Bass-C
AF fi lter (L: Q20) by-pass SW.
"H"=FM mode.
RX frequency shift.
"L"=200 MHz RX.
AF line SW (M: IC9) control.
"L"=Receiving in AM mode.
AGC function switching.
"L"=AGC activated.
RX mode switching (phase shifter
switching; discriminator/LC resonator).
"H"= WFM mode.
AM broadcast antenna switching.
"L"=Internal bar antenna.
RF circuit (BC band) control.
"L"=BC band RX (Ext. LOCAL antenna).
RF circuit (SW band) control.
"L"=SW band RX (Ext. DX antenna).
Attenuator (M: D2, R2 to 4) control.
"L"=Attenuator ON.
RF circuit (800 MHz band) control.
"L"=800 MHz band RX.
RF circuit (1 GHz band) control.
"L"=1 GHz band RX.
RF circuit (UHF band) control.
"L"=UHF band RX.
Earphone antenna control.
"L"=Earphone antenna activated.
CPU clock signal to converter (L: IC11,
D24–27).
LCD backlight driver (L: Q5) control.
"H"=Backlight (L: DS10 to 12) ON.
AF power AMP SW (L: Q11, 12) control.
"H"=AF power AMP (L: IC9) ON.
DESCRIPTION I/O
Pin
No.
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
96–
100
LINE
NAME
47 CTONE Demodulated tone signals. I
48 VSCAF
49 CHG
50 TEMP
51 BATTI Battery voltage input (AD value). I
52 HVIN
59 RESET CPU reset signal. I
CPU
70
CLOCK
SHIFT
71 VCO1
72 VCO2
73 VCO3
74 VCO4
75 BDET
76 LCDDT Serial data to the LCD (L: DS13). O
77 LCDCS Serial data to the LCD (L: DS13). O
78 LCDCK Serial clock to the LCD (L: DS13). O
79 CL_OUT Cloning data. O
80 CL_IN Cloning data. I
83 DASTB Strobe to the DAC (L: IC16). O
84 VRSTB Strobe to the VR IC (L: IC10). O
85 PCK PLL clock. O
86 PLDATA PLL data. O
87 PSTB1 PLL (1st VCO UNIT; IC3) strobe. O
88 PSTB2 PLL (2ND VCO UNIT; IC1) strobe. O
89 PS
90 CHGC
91 HVDET
92 CL_IN Cloning data. I
93 VHF_C
94 HFC
95 R3C
KR5–KR1 Key matrix. I
Filtered demodulated signal (extracted
voice signal).
Charge status.
"H"=While pre/fast charging.
Internal temparature according divided
voltage by thermister (L: R189)
DC input voltage monitor (divided
voltage of HV line).
CPU clock frequency shift. O
VCO switching signal.
"L"= VCO1 activated (=receiving
VCO switching signal.
"L"= VCO1 activated (=receiving
VCO switching signal.
"L"= VCO1 activated (=receiving
VCO switching signal.
"L"= VCO1 activated (=receiving
Battery pack attachment detect.
"L"=Battery pack is attached.
Power save mode control for PLL IC.
"L"=While in power save mode.
Charge management IC (L: IC18) control.
"H"=While charging.
HV line voltage detect.
"H"=3 V is applied.
RF circuit (VHF band) control.
"L"=VHF band RX.
RF circuit (HF band) control.
"L"=HF band RX.
R3V line SW. (regurator (L: IC4) control
signal)
"H"= R3V line is ON. (the regulator is
DESCRIPTION I/O
741 MHz
).
510 MHz/1130–1368 MHz
283 MHz/950–1130 MHz
83.5 MHz/741–950 MHz
enable)
510–
283–
).
83.5–
).
0.15–
).
I
I
I
I
O
O
O
O
I
O
O
I
O
O
O
4 - 5
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