5
4
3
2
1
01
PCB 10L STACK UP
D D
SATA - 1st NGFF SSD
C C
Package : 9.5 (mm)
Power :
Pike Intel SKYLAKE ULT Platform Block Diagram
LPDDR3 1600MHz
16Gb x64 1PCS
LPDDR3 1600MHz
16Gb x64 1PCS
PAGE 26
LPDDR3L x1600MHz 1.2V
PAGE 17
LPDDR3L x1600MHz 1.2V
PAGE 18
SATA0/PCIE 4XLANE
SKYLAKE U
Processor
Processor : Daul Core
Power : 15 (Watt)
Package : BGA1356
Size : 40 X 24 (mm)
eDP X4
DP Port 2
DP Port 1
USB3.0 Interface
USB2.0 Interface
USB 3.0* Port 1,2 ,3
PS8330B
Package : QFN-40
PS8201A
Package : QFN-40
TP2546
Package : QFN-16 3x3
PAGE 25
eDP
PAGE 20
Mini-DP
PAGE 21
HDMI Conn
PAGE 22
USB3.0 Port x 3
(total 3.5A)
Port1,2,3
PAGE 25
LAYER 1 : TOP
LAYER 2 : SGND
LAYER 3 : IN1(High)
LAYER 4 : IN2(High)
LAYER 5 : SGND
LAYER 6 : SVCC
LAYER 7 : IN3(Low)
LAYER 8 : IN4(High)
LAYER 9 : SGND
LAYER 10 : BOT
Camera
Port6
System BIOS
SPI ROM
PAGE 10
SPI Interface
HP
PAGE 2~16
TPM
SLB9665 V2.0
B B
Home Capacitve button
PAGE 24
ITE 8987
Embedded Controller
Power :
Keyboard
Touch Pad
PAGE 27
PS2
Package : BGA128
Size : 7x 7 (mm)
SMBUS
PAGE 27
A A
5
FAN
PAGE 26
PAGE 30
PAGE 24
CX7501
Power :
Package : MQFN
Size : 7 x 7 (mm)
PAGE 23
Speaker
Headphone amplifier
HPA0022642RTJR
Digital MIC
4
PCIE Gen 1 x 1 Lane
Port2
Carde Reader
RTS5237
PAGE 23
PAGE 24
PAGE 20
PCIE Port5
PAGE 26
Combo Jack
iPHONE type
PAGE 20
Touch Screen
Port8
PAGE 20
Halt Mini Card
Intel Rambo Peak
WLAN / BT Combo
PCIE Port6
USB20 Port7
PAGE 28
3
ISH
EC
G-Sensor
HP3DC2TR
COLAY
PAGE 29
Size : 14 x 14 (mm)
Port4
Accelerometer/Compass/Gryoscope
HP9DS0TR
SM BUS
IT8350
Sensor Hub
PAGE 29
www.schematic-x.blogspot.com
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Block Diagram
Block Diagram
Block Diagram
1
1 41Tuesday, May 26, 2015
1 41Tuesday, May 26, 2015
1 41Tuesday, May 26, 2015
1A
1A
1A
5
+3V <4,10,11,12,13,14,15,16,20,21,22,23,25,26,27,29,30,31,37,38>
+1.0V <4,6,16,30,36>
+VCCSTPLL <4,5,6,9,36,38>
+VCCIO <6,16,36>
D D
DDPB_CTRLDATA/ GPP_E19
Display Port B Detected
This signal has a weak internal pull-down.
0 = Port B is not detected.
1 = Port B is detected.
This signal has a weak internal pull-down.
0 = Port C and D is not detected.
1 = Port C and D is detected.
DDPD_CTRLDATA
C C
INT_DP_SCL
INT_DP_SDA
R51 10K_2
R245 2.2K_2
R246 2.2K_2
HDMI
+3V
eDP_COMPIO and ICOMPO signals should be shorted near
balls and routed with typical impedance <25 mohms
SDVO_CLK<22>
SDVO_DATA<22>
INT_DP_SCL<21>
INT_DP_SDA<21>
+VCCIO
IN_D2#<22>
IN_D2<22>
IN_D1#<22>
IN_D1<22>
IN_D0#<22>
IN_D0<22>
IN_CLK#<22>
IN_CLK<22>
4
IN_D2#
IN_D2
IN_D1#
IN_D1
IN_D0#
IN_D0
IN_CLK#
IN_CLK
INT_DP_TXN0<21>
INT_DP_TXP0<21>
INT_DP_TXN1<21>
INT_DP_TXP1<21>
INT_DP_TXN2<21>
INT_DP_TXP2<21>
INT_DP_TXN3<21>
INT_DP_TXP3<21>
DDPD_CTRLDATA
R47 24.9/F_2
EDP_RCOMP
U11A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
*SKL_ULT
REV = 1
SKL_ULT
DDI
DISPLAY SIDEBANDS
3
?
Need apply PN
EDP
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
?1 OF 20
C47
C46
D46
C45
A45
B45
A47
B47
E45
F45
B52
G50
F50
E48
F48
G46
F46
L9
L7
L6
N9
L10
R12
R11
U13
INT_EDP_TXN0
INT_EDP_TXP0
INT_EDP_TXN1
INT_EDP_TXP1
INT_EDP_TXN2
INT_EDP_TXP2
INT_EDP_TXN3
INT_EDP_TXP3
INT_EDP_AUXN
INT_EDP_AUXP
EDP_DISP_UTIL
HDMI_HPD_CON
ULT_EDP_HPD
PCH_LVDS_BLON
PCH_DPST_PWM
PCH_DISP_ON
2
INT_EDP_TXN0 <20>
INT_EDP_TXP0 <20>
INT_EDP_TXN1 <20>
INT_EDP_TXP1 <20>
INT_EDP_TXN2 <20>
INT_EDP_TXP2 <20>
INT_EDP_TXN3 <20>
INT_EDP_TXP3 <20>
INT_EDP_AUXN <20>
INT_EDP_AUXP <20>
TP46
INT_DP_AUXN <21>
INT_DP_AUXP <21>
HDMI_HPD_CON <22>
INT_DP_HPD_Q <21>
ULT_EDP_HPD <20>
PCH_LVDS_BLON <20>
PCH_DPST_PWM <20>
PCH_DISP_ON <20>
Reserve EDP_HPD opposites circuit!
ULT_EDP_HPD
Mini-DP
+3V
R188
*10K_2
R187
100K_2
1
02
?
4 OF 20
Need apply PN
JTAG
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
JTAGX
PDC
B61
XDP_TCK0
D60
XDP_TDI_CPU
A61
XDP_TDO_CPU
C60
XDP_TMS_CPU
B59
XDP_TRST#_CPU
B56
JTAG_TCK_PCH
D59
JTAG_TDI_PCH
A56
JTAG_TDO_PCH
C59
JTAG_TMS_PCH
C61
XDP_TRST#_CPU
A59
JTAGX_PCH
XDP_TCK0 <16>
XDP_TDI_CPU <16>
XDP_TDO_CPU <16>
XDP_TMS_CPU <16>
XDP_TRST#_CPU <2,16>
JTAG_TCK_PCH <16>
JTAG_TDI_PCH <16>
JTAG_TDO_PCH <16>
JTAG_TMS_PCH <16>
XDP_TRST#_CPU <2,16>
JTAGX_PCH <16>
2
Close to EC
PM_THRMTRIP#
Processor pull-up (CPU)
TO BE REPLACED WITH 1K OHMS FOR SKL .
470 OHM IS FOR I/P
PLACE NEAR CPU
XDP_TMS_CPU
XDP_TDI_CPU
XDP_TDO_CPU
H_PROCHOT#
XDP_TCK0
XDP_TRST#_CPU
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
R213 1K_4
R36 *51_2
R31 *51_2
R28 *51_2
R142 1K_2
R177 51_2
R27 51_2
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
SKLU (1/14)
SKLU (1/14)
SKLU (1/14)
1
+VCCSTPLL
+1.0V
+1.0V
2 41Tuesday, May 26, 2015
2 41Tuesday, May 26, 2015
2 41Tuesday, May 26, 2015
1A
1A
1A
U11D
AT16
AU16
D63
A54
C65
C63
A65
C55
D55
B54
C56
A6
A7
BA5
AY5
H66
H65
CATERR#
PECI
PROCHOT#
THERMTRIP#
SKTOCC#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
PROC_POPIRCOMP
PCH_OPIRCOMP
OPCE_RCOMP
OPC_RCOMP
*SKL_ULT
REV = 1
CATERR#
H_PROCHOT#<30,32,38>
+VCCSTPLL
R165 *49.9/F_2
+1.0V
B B
A A
CATERR#
R29 *51_2
R30 51_2
R35 51_2
R25 51_2
R23 51_2
Close to Chipset
5
JTAGX_PCH
JTAG_TMS_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TCK_PCH
R164 499/F_4
4
EC_PECI<30>
PM_THRMTRIP#<30>
XDP_BPM0<16>
XDP_BPM1<16>
TP45
TP47
TP35
TP34
R61 49.9/F_2
R58 49.9/F_2
R48 49.9/F_2
R45 49.9/F_2
EC_PECI
PROCHOT#
PM_THRMTRIP#
CPU_GP0
CPU_GP1
CPU_GP2
CPU_GP3
PROC_POPIRCOMP
PCH_OPI_RCOMP
EDRAM_OPIO_RCOMP
EOPIO_RCOMP
SKL_ULT
CPU MISC
3
5
M_A_DQSN[7:0]<17>
M_A_DQSP[7:0]<17>
M_B_DQSN[7:0]<18>
M_B_DQSP[7:0]<18>
M_A_DQ[63:0]<17>
M_B_DQ[63:0]<18>
D D
C C
B B
+1.2VSUS <6,17,18,34,36>
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
U11B
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
AF65
DDR1_DQ[0]/DDR0_DQ[16]
AF64
DDR1_DQ[1]/DDR0_DQ[17]
AK65
DDR1_DQ[2]/DDR0_DQ[18]
AK64
DDR1_DQ[3]/DDR0_DQ[19]
AF66
DDR1_DQ[4]/DDR0_DQ[20]
AF67
DDR1_DQ[5]/DDR0_DQ[21]
AK67
DDR1_DQ[6]/DDR0_DQ[22]
AK66
DDR1_DQ[7]/DDR0_DQ[23]
AF70
DDR1_DQ[8]/DDR0_DQ[24]
AF68
DDR1_DQ[9]/DDR0_DQ[25]
AH71
DDR1_DQ[10]/DDR0_DQ[26]
AH68
DDR1_DQ[11]/DDR0_DQ[27]
AF71
DDR1_DQ[12]/DDR0_DQ[28]
AF69
DDR1_DQ[13]/DDR0_DQ[29]
AH70
DDR1_DQ[14]/DDR0_DQ[30]
AH69
DDR1_DQ[15]/DDR0_DQ[31]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AT66
DDR1_DQ[16]/DDR0_DQ[48]
AU66
DDR1_DQ[17]/DDR0_DQ[49]
AP65
DDR1_DQ[18]/DDR0_DQ[50]
AN65
DDR1_DQ[19]/DDR0_DQ[51]
AN66
DDR1_DQ[20]/DDR0_DQ[52]
AP66
DDR1_DQ[21]/DDR0_DQ[53]
AT65
DDR1_DQ[22]/DDR0_DQ[54]
AU65
DDR1_DQ[23]/DDR0_DQ[55]
AT61
DDR1_DQ[24]/DDR0_DQ[56]
AU61
DDR1_DQ[25]/DDR0_DQ[57]
AP60
DDR1_DQ[26]/DDR0_DQ[58]
AN60
DDR1_DQ[27]/DDR0_DQ[59]
AN61
DDR1_DQ[28]/DDR0_DQ[60]
AP61
DDR1_DQ[29]/DDR0_DQ[61]
AT60
DDR1_DQ[30]/DDR0_DQ[62]
AU60
DDR1_DQ[31]/DDR0_DQ[63]
*SKL_ULT
REV = 1
Need apply PN
?
SKL_ULT
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
NIL-DDR CH A
2 OF 20
4
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
3
SkyLake ULT Processor (DDR3L)
AU53
AT53
AU55
AT55
BA56
BB56
AW56
AY56
AU45
AU43
AT45
AT43
BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54
AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52
AM70
AM69
AT69
AT70
AH66
AH65
AG69
AG70
BA64
AY64
AY60
BA60
AR66
AR65
AR61
AR60
AW50
AT52
AY67
AY68
BA67
AW67
M_A_CKE2
M_A_CKE3
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_B0
M_A_B1
M_A_B2
M_A_B3
M_A_B4
M_A_B5
M_A_B6
M_A_B7
M_A_B8
M_A_B9
M_A_DQSN0
M_A_DQSP0
M_A_DQSN1
M_A_DQSP1
M_A_DQSN2
M_A_DQSP2
M_A_DQSN3
M_A_DQSP3
M_A_DQSN4
M_A_DQSP4
M_A_DQSN5
M_A_DQSP5
M_A_DQSN6
M_A_DQSP6
M_A_DQSN7
M_A_DQSP7
DDR_VTT_CNTL
M_A_CKE2 <17,19>
M_A_CKE3 <17,19>
M_A_A0 <17,19>
M_A_A1 <17,19>
M_A_A2 <17,19>
M_A_A3 <17,19>
M_A_A4 <17,19>
M_A_A5 <17,19>
M_A_A6 <17,19>
M_A_A7 <17,19>
M_A_A8 <17,19>
M_A_A9 <17,19>
M_A_B0 <17,19>
M_A_B1 <17,19>
M_A_B2 <17,19>
M_A_B3 <17,19>
M_A_B4 <17,19>
M_A_B5 <17,19>
M_A_B6 <17,19>
M_A_B7 <17,19>
M_A_B8 <17,19>
M_A_B9 <17,19>
M_A_CLKN0 <17,19>
M_A_CLKP0 <17,19>
M_A_CLKN1 <17,19>
M_A_CLKP1 <17,19>
M_A_CKE0 <17,19>
M_A_CKE1 <17,19>
M_A_CS#0 <17,19>
M_A_CS#1 <17,19>
M_A_ODT0 <17,19>
20mils width
SM_VREF_CA <17>
SM_VREF_DQ0 <17>
SM_VREF_DQ1 <18>
DDR_VTT_CNTL <4,34>
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
U11C
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AU40
DDR1_DQ[32]/DDR1_DQ[16]
AT40
DDR1_DQ[33]/DDR1_DQ[17]
AT37
DDR1_DQ[34]/DDR1_DQ[18]
AU37
DDR1_DQ[35]/DDR1_DQ[19]
AR40
DDR1_DQ[36]/DDR1_DQ[20]
AP40
DDR1_DQ[37]/DDR1_DQ[21]
AP37
DDR1_DQ[38]/DDR1_DQ[22]
AR37
DDR1_DQ[39]/DDR1_DQ[23]
AT33
DDR1_DQ[40]/DDR1_DQ[24]
AU33
DDR1_DQ[41]/DDR1_DQ[25]
AU30
DDR1_DQ[42]/DDR1_DQ[26]
AT30
DDR1_DQ[43]/DDR1_DQ[27]
AR33
DDR1_DQ[44]/DDR1_DQ[28]
AP33
DDR1_DQ[45]/DDR1_DQ[29]
AR30
DDR1_DQ[46]/DDR1_DQ[30]
AP30
DDR1_DQ[47]/DDR1_DQ[31]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
AU27
DDR1_DQ[48]
AT27
DDR1_DQ[49]
AT25
DDR1_DQ[50]
AU25
DDR1_DQ[51]
AP27
DDR1_DQ[52]
AN27
DDR1_DQ[53]
AN25
DDR1_DQ[54]
AP25
DDR1_DQ[55]
AT22
DDR1_DQ[56]
AU22
DDR1_DQ[57]
AU21
DDR1_DQ[58]
AT21
DDR1_DQ[59]
AN22
DDR1_DQ[60]
AP22
DDR1_DQ[61]
AP21
DDR1_DQ[62]
AN21
DDR1_DQ[63]
*SKL_ULT
REV = 1
2
?
SKL_ULT
Need apply PN
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
NIL-DDR CH B
3 OF 20
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_MA[3]
DDR1_MA[4]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSP[7]/DDR1_DQSP[5]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DDR1_PAR
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
PDC
AN45
AN46
AP45
AP46
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
BA38
AY38
AY34
BA34
AT38
AR38
AT32
AR32
BA30
AY30
AY26
BA26
AR25
AR27
AR22
AR21
AN43
AP43
AT13
AR18
AT18
AU18
M_B_CKE2
M_B_CKE3
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_B0
M_B_B1
M_B_B2
M_B_B3
M_B_B4
M_B_B5
M_B_B6
M_B_B7
M_B_B8
M_B_B9
M_B_DQSN0
M_B_DQSP0
M_B_DQSN1
M_B_DQSP1
M_B_DQSN2
M_B_DQSP2
M_B_DQSN3
M_B_DQSP3
M_B_DQSN4
M_B_DQSP4
M_B_DQSN5
M_B_DQSP5
M_B_DQSN6
M_B_DQSP6
M_B_DQSN7
M_B_DQSP7
SM_DRAMRST#
M_B_CLKN0 <18,19>
M_B_CLKN1 <18,19>
M_B_CLKP0 <18,19>
M_B_CLKP1 <18,19>
M_B_CKE0 <18,19>
M_B_CKE1 <18,19>
M_B_CKE2 <18,19>
M_B_CKE3 <18,19>
M_B_CS#0 <18,19>
M_B_CS#1 <18,19>
M_B_ODT0 <18,19>
M_B_A0 <18,19>
M_B_A1 <18,19>
M_B_A2 <18,19>
M_B_A3 <18,19>
M_B_A4 <18,19>
M_B_A5 <18,19>
M_B_A6 <18,19>
M_B_A7 <18,19>
M_B_A8 <18,19>
M_B_A9 <18,19>
M_B_B0 <18,19>
M_B_B1 <18,19>
M_B_B2 <18,19>
M_B_B3 <18,19>
M_B_B4 <18,19>
M_B_B5 <18,19>
M_B_B6 <18,19>
M_B_B7 <18,19>
M_B_B8 <18,19>
M_B_B9 <18,19>
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
1
+1.2VSUS
R65 200/F_2
R66 80.6/F_2
R64 162/F_2
03
R69
0_2
PV
A A
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
SKL U (2/14)
SKL U (2/14)
NB5
NB5
5
4
3
2
NB5
SKL U (2/14)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
3 41Tuesday, May 26, 2015
3 41Tuesday, May 26, 2015
3 41Tuesday, May 26, 2015
1A
1A
1A
5
+3V_DEEP_SUS<10,11,12,14,15,16>
+3V<2,10,11,12,13,14,15,16,20,21,22,23,25,26,27,29,30,31,37,38>
+3VS5<15,16,22,28,30,31,33,35,36,37>
+VCCSTPLL<2,5,6,9,36,38>
+1.0V<2,6,16,30,36>
+3V_RTC<13,15,27,31,32>
D D
RSMRST#<30>
SI
R4120_4
EC26
*220P/50V_4
SYS_RESET#<16>
R161 *10K_2
SYS_PWROK<16>
EC_PWROK<16,30>
SUSWARN#_EC<30>
PCIE_WAKE#<26,28,30>
RF_OFF_PCH<28>
DDR_VTT_CNTL<3,34>
C229 *0.1U/10V_2
R410 *0_2/S
SI
4
PLTRST#
SYS_RESET#
RSMRST#
PROCPWRGD
H_VCCST_PWRGD
SYS_PWROK
PCH_PWROK
DSWROK_EC_R
SUSWARN#
SUSACK#SUSWARN#
PCIE_WAKE#
RF_OFF_PCH
U11K
SYSTEM POWER MANAGEMENT
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PW ROK
AR13
GPP_A13/SUSW ARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
*SKL_ULT
REV = 1
SKL_ULT
?
11 OF 20
3
Need apply PN
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
GPD9/SLP_WLAN#
GPD6/SLP_A#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW #
GPP_A11/PME#
GPP_B11/EXT_PW R_GATE#
INTRUDER#
GPP_B2/VRALERT#
SLP_SUS#
SLP_LAN#
2
1
04
AT11
PCH_SLP_S0_N
AP15
BA16
AY16
AN15
SLP_SUS#_EC
AW15
BB17
PCH_SLP_WLAN#
AN16
BA15
DNBSWON#
AY15
AC_PRESENT_EC
AU13
BATLOW#
AU11
AP16
INTRUDER#_R
AM10
AM11
GPP_B2
?
TP21
PCH_SLP_S0_N <16,36>
SUSB# <16,30>
SUSC# <16,30>
SLP_S5# <16>
SLP_SUS#_EC <30>
PCH_SLP_WLAN# <30>
SLP_A# <16,30>
DNBSWON# <30>
AC_PRESENT_EC <30>
R621M_2
+3V_RTC
PCH Pull-high/low(CLG)
SUSWARN#
SUSACK#
BATLOW#
PCIE_WAKE#
AC_PRESENT_EC
SYS_RESET#
RSMRST#
DSWROK_EC_R
R409 *10K/F_4
R413 *10K/F_4
R59 10K_2
R391 1K_2
R387 *10K_2
R169 10K_2
R411 10K_2
R384 100K_2
+3V_DEEP_SUS
PV
+3VS5
+3V
C C
For DS3 Sequence
For DS3 -->Ra
Non-DS3 -->Rb
RSMRST#
DPWROK_EC<30>
PLTRST#(CLG)
Check Q2010 Rise/Fall time less than 100ns
R60
B B
100K_2
Rb
R382 *0_2
R376 0_2
Ra
PLTRST# <16,26,28,30>
SI
C558
0.1U/25V_4
DSWROK_EC_R
+1.0V
HWPG<16,30,33,34,35,37>
D2 RB501V-40
21
R10479 close to CPU side
H_VCCST_PWRGD trace 0.3" - 1.5"
1218 Reserve
+VCCSTPLL and R523
+VCCSTPLL
R127
1K_2
H_VCCST_PWRGD_R
C164
*10P/50V_4
R134
*1K_2
R128 60.4_4
H_VCCST_PWRGD
System PWR_OK(CLG)
R170 *0_2/S
A A
EC_PWROKSYS_PWROK
R156
10K/F_2
+1.0V +3VS5+5VS5
R440
15K/F_4
+1.0V_PWRGD_G1
C458
0.1U/10V_2
R437
100K_2
2
R425
100K_2
+1.0V_PWRGD_G2
Q23
METR3904-G
1 3
R423
10K_2
3
2
Q24
2N7002K
1
1110 Add Citcuit for +1.0V Power Good
1118 Change Change Q7062 P/N from BA051440000 to
BA039040020, Del D7002,D7003, R10526, R10527
R426
100K_4
HWPG
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
SKL U (3/14)
SKL U (3/14)
SKL U (3/14)
1
4 41Tuesday, May 26, 2015
4 41Tuesday, May 26, 2015
4 41Tuesday, May 26, 2015
1A
1A
1A
5
+VCC_CORE<39>
+1.0V<2,4,6,16,30,36>
+VCCSTG<6>
+VCCSTPLL<2,4,6,9,36,38>
C174
C219
10U/6.3V_4
C172
22U/6.3V_6
R145 *0_4C28
VID0_VCC_EDRAM<41>
VID1_VCC_EDRAM<41>
C47
*1uF/6.3_2
C193
22U/6.3V_6
C158
10U/6.3V_4
C154
22U/6.3V_6
C24
*1uF/6.3_2
TP28
TP24
22U/6.3V_6
C36
*1uF/6.3_2
C187
C225
10U/6.3V_4
+V1.8S_EDRAM
10U/6.3V_4
C150
22U/6.3V_6
C152
22U/6.3V_6
C149
10U/6.3V_4
C134
22U/6.3V_6
C3
*1uF/6.3_2
C42
*1uF/6.3_2
C23
*1uF/6.3_2
+1.8V
22U/6.3V_6
C198
*1uF/6.3_2
C44
*1uF/6.3_2
C30
*1uF/6.3_2
C141
C221
10U/6.3V_4
C148
22U/6.3V_6
22U/6.3V_6
C1
*1uF/6.3_2
C160
22U/6.3V_6
+VCC_EDRAM
*1uF/6.3_2
10U/6.3V_6
C224
10U/6.3V_4
C175
22U/6.3V_6
+VCC_EDRAM
C25
*1uF/6.3_2
C2
*1uF/6.3_2
C29
*1uF/6.3_2
D D
+VCC_EOPIO
C C
4
C151
22U/6.3V_6
3A
50mA
VID0_VCC_EDRAM
VID1_VCC_EDRAM
3A
VID0_VCC_EOPIO
VID1_VCC_EOPIO
3
?
SKL_ULT
CPU POWER 1 OF 4
12 OF 20
Need apply PN
VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43
VCC_SENSE
VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
VCCSTG_G20
PDC
?
G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43
E32
E33
B63
H_CPU_SVIDALRT#
A63
VR_SVID_CLK_R
D64
H_CPU_SVIDDAT
G20
AK33
AK35
AK37
AK38
AK40
AL33
AL37
AL40
AM32
AM33
AM35
AM37
AM38
G30
K32
AK32
AB62
P62
V62
H63
G61
AC63
AE63
AE62
AG62
AL63
AJ62
A30
A34
A39
A44
U11L
VCC_A30
VCC_A34
28A
VCC_A39
VCC_A44
VCC_AK33
VCC_AK35
VCC_AK37
VCC_AK38
VCC_AK40
VCC_AL33
VCC_AL37
VCC_AL40
VCC_AM32
VCC_AM33
VCC_AM35
VCC_AM37
VCC_AM38
VCC_G30
RSVD_K32
RSVD_AK32
VCCOPC_AB62
VCCOPC_P62
VCCOPC_V62
VCC_OPC_1P8_H63
VCC_OPC_1P8_G61
VCCOPC_SENSE
VSSOPC_SENSE
VCCEOPIO
VCCEOPIO
VCCEOPIO_SENSE
VSSEOPIO_SENSE
*SKL_ULT
REV = 1
+VCC_CORE +VCC_CORE
Close U9052
+VCC_CORE
C188
C153
22U/6.3V_6
+VCC_CORE
C186
22U/6.3V_6
C192
22U/6.3V_6
C156
22U/6.3V_6
22U/6.3V_6
C64
1uF/6.3_2
C53
1uF/6.3_2
C133
22U/6.3V_6
C16
1uF/6.3_2
C18
1uF/6.3_2
R50 100/F_2
R49 100/F_2
+VCCSTG
C162
22U/6.3V_6
2
C65
1uF/6.3_2C143
C17
1uF/6.3_2
100- ±1%
pull-up to VCC
near processor.
C55
1uF/6.3_2
C33
1uF/6.3_2
+VCC_CORE
VCC_SENSE <38>
VSS_SENSE <38>
C19
1uF/6.3_2
C13
1uF/6.3_2C218
C14
1uF/6.3_2
C39
1uF/6.3_2
C15
1uF/6.3_2
C63
1uF/6.3_2
C54
1uF/6.3_2
Layout note: need routing together and ALERT need between CLK and DATA.
+VCCSTPLL
CLOSE TO CPU
PLACE THE PU RESISTORS
C163
22U/6.3V_6
H_CPU_SVIDALRT#
1119 Update R10372 P/N to
CS12202FB06
R178 220/F_4
R167
56.2/F_4
C234
*0.1U/10V_2
SVID ALERT
1
05
VR_SVID_ALERT# <38>
R181
100/F_2
+VCCSTPLL
1014 Change to empty
R157
*54.9/F_4
SVID CLK
VR_SVID_CLK <38>
R175 0_2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
SVID DATA
VR_SVID_DATA <38>
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
SKL U (4/14)
SKL U (4/14)
SKL U (4/14)
1
1A
1A
5 41Tuesday, May 26, 2015
5 41Tuesday, May 26, 2015
5 41Tuesday, May 26, 2015
1A
C223
B B
A A
5
4
10U/6.3V_4
C222
10U/6.3V_4
C217
10U/6.3V_4
C171
10U/6.3V_4
C220
10U/6.3V_4
3
C159
10U/6.3V_4
C191
10U/6.3V_4
C199
10U/6.3V_4
PLACE THE PU RESISTORS
CLOSE TO VR
PULL UP IS IN THE VR MODULE
CLOSE TO CPU
PLACE THE PU RESISTORS
VR_SVID_CLK_R
H_CPU_SVIDDAT
2
R174 0_2
+VCCSTPLL
5
+VCCSTPLL <2,4,5,9,36,38>
+VCCSA <38,39>
+1.2VSUS <3,17,18,34,36>
+1.0V_DEEP_SUS <9,13,15,16,35,36>
+1.0V <2,4,16,30,36>
+3VPCU <13,15,27,28,30,31,32,33,41>
+1.2V_VCCPLL_OC <36>
+1.2VSUS
D D
10U/6.3V_4
C C
C422
+1.0V
+1.2V_VCCPLL_OC
C416
10U/6.3V_4
C409
10U/6.3V_4
+VCCSTPLL
10U/6.3V_4
10U/6.3V_4
C404
C428
R1300_4
R129*0_4
PV
C71
1uF/6.3_2
C407
10U/6.3V_4
C74
1uF/6.3_2
1uF/6.3_2
C397
*10U/6.3V_4
+VCCSTG
Close U11 Under U11
+VCCPLL_OC+1.2VSUS
R544*0_2
R5790_4
C76
C77
1uF/6.3_2
C73
1U/6.3V_2
+VCCSTPLL
+VCCSTG
+VCCPLL_OC
+VCCPLL
4
120mA
3
2
1
06
Need apply PN
?
SKL_ULT
U11N
CPU POWER 3 OF 4
AU23
VDDQ_AU23
AU28
VDDQ_AU28
AU35
VDDQ_AU35
AU42
VDDQ_AU42
BB23
VDDQ_BB23
BB32
VDDQ_BB32
BB41
VDDQ_BB41
BB47
VDDQ_BB47
BB51
VDDQ_BB51
AM40
VDDQC
A18
0.12A
VCCST
A22
VCCSTG_A22
AL23
VCCPLL_OC
K20
VCCPLL_K20
K21
VCCPLL_K21
+VCCPLL+VCCSTPLL
*SKL_ULT
REV = 1
2A
0.04A
0.12A
14 OF 20
3.1A
5A
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
AK28
AK30
AL30
AL42
AM28
AM30
AM42
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
H21
H20
C50
1uF/6.3_2
+VCCSA
C38
1uF/6.3_2
VCCIO_VCCSENSE
VCCIO_VSSSENSE
C51
1uF/6.3_2
C9
1uF/6.3_2
C212
10U/6.3V_4
C226
C52
10U/6.3V_4
1uF/6.3_2
C37
C27
1uF/6.3_2
1U/6.3V_2
C168
C170
10U/6.3V_4
10U/6.3V_4
VSSSA_SENSE <38>
VCCSA_SENSE <38>
C247
10U/6.3V_4
C66
1U/6.3V_2
C173
10U/6.3V_4
C239
10U/6.3V_4
C31
1U/6.3V_2
C213
10U/6.3V_4
VCCIO_VCCSENSE
VCCIO_VSSSENSE
C58
1uF/6.3_2
C21
1uF/6.3_2
C232
10U/6.3V_4
C49
1uF/6.3_2
C169
10U/6.3V_4
R57 100/F_2
R56 100/F_2
C48
1uF/6.3_2
C189
10U/6.3V_4
+VCCIO
C57
1uF/6.3_2
C196
10U/6.3V_4
+VCCIO
C190
10U/6.3V_4
C195
10U/6.3V_4
C157
10U/6.3V_4
C231
10U/6.3V_4
Under U11 Close U11
+VCCSTG +VCCPLL_OC +VCCPLL
C10
1U/6.3V_2
C72
1uF/6.3_2
C227
1U/6.3V_2
+VCCSTPLL
C194
1uF/6.3_2
+3VPCU
IO Thrm Protect
For 65 degree, 1.8v limit, (SW)
Close A18 Ball
+VCCSTPLL
PV
R137
20K/F_4
For 75 degree, 1.2v limit, (HW)
C238
B B
A A
*1U/6.3V_2
C197
*22U/6.3V_6
THER_CPU
R138
100K_4 NTC
+1.2VSUS
C421
10U/6.3V_6
5
4
C415
10U/6.3V_6
10U/6.3V_6
C178
0.1U/10V_4
1 2
3
C398
THRM_MOINTOR1 <30>
C406
10U/6.3V_6
10U/6.3V_6
C429
C408
10U/6.3V_6
Close to CPU
C70
1uF/6.3_2
1uF/6.3_2
C69
C75
1uF/6.3_2
2
C67
1uF/6.3_2
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
SKL U (5/14)
SKL U (5/14)
SKL U (5/14)
1
1A
1A
6 41Tuesday, May 26, 2015
6 41Tuesday, May 26, 2015
6 41Tuesday, May 26, 2015
1A
5
+VCCGT <38,40>
D D
C C
B B
C400
22U/6.3V_6
C419
10U/6.3V_4
C11
1uF/6.3_2
C20
1uF/6.3_2
C401
22U/6.3V_6
C399
10U/6.3V_4
C413
22U/6.3V_6
C347
10U/6.3V_4
1uF/6.3_2
VCCGT_SENSE<38>
VSSGT_SENSE<38>
4
C402
22U/6.3V_6
C273
10U/6.3V_4
C7
1uF/6.3_2
C414
22U/6.3V_6
C430
10U/6.3V_4
C12
1uF/6.3_2
+VCCGT
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
M62
N63
N64
N66
N67
N69
A48
A53
A58
A62
A66
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
J70
J69
SKL_ULT
U11M
CPU POWER 2 OF 4
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT_SENSE
VSSGT_SENSE
*SKL_ULT
REV = 1
57A
PDC
13 OF 20
?
Need apply PN
VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
VCCGTX_SENSE
VSSGTX_SENSE
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
3
+VCCGT
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AK62
AL61
+VCC_GTX
C393
*22U/6.3V_6
C364
22U/6.3V_6
C403
22U/6.3V_6
C288
22U/6.3V_6
C411
22U/6.3V_6
C424
22U/6.3V_6
C384
22U/6.3V_6
C358
22U/6.3V_6
C309
22U/6.3V_6
C359
22U/6.3V_6
7A
C395
C388
*22U/6.3V_6
+VCC_GTX +VCCGT
*22U/6.3V_6
C390
*22U/6.3V_6C6
R383 *0_8
R373 *0_8
2
C363
22U/6.3V_6
C380
22U/6.3V_6
C425
22U/6.3V_6
Close U11
C394
*22U/6.3V_6
C427
22U/6.3V_6
C426
22U/6.3V_6
C389
22U/6.3V_6
C271
22U/6.3V_6
C412
22U/6.3V_6
C379
22U/6.3V_6
1
07
A A
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
SKL U (6/14)
SKL U (6/14)
SKL U (6/14)
1
7 41Tuesday, May 26, 2015
7 41Tuesday, May 26, 2015
7 41Tuesday, May 26, 2015
1A
1A
1A
5
4
3
2
1
08
AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW6
AW60
AW62
AW64
AW66
AW8
AY66
BA10
BA14
BA18
BA23
BA28
BA32
BA36
BA45
U11Q
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AV1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B10
VSS
B14
VSS
B18
VSS
B22
VSS
B30
VSS
B34
VSS
B39
VSS
B44
VSS
B48
VSS
B53
VSS
B58
VSS
B62
VSS
B66
VSS
B71
VSS
BA1
VSS
VSS
VSS
VSS
BA2
VSS
VSS
VSS
VSS
VSS
F68
VSS
VSS
*SKL_ULT
REV = 1
SKL_ULT
GND 2 OF 3
?
17 OF 20
Need apply PNNeed apply PN
BA49
VSS
BA53
VSS
BA57
VSS
BA6
VSS
BA62
VSS
BA66
VSS
BA71
VSS
BB18
VSS
BB26
VSS
BB30
VSS
BB34
VSS
BB38
VSS
BB43
VSS
BB55
VSS
BB6
VSS
BB60
VSS
BB64
VSS
BB67
VSS
BB70
VSS
C1
VSS
C25
VSS
C5
VSS
D10
VSS
D11
VSS
D14
VSS
D18
VSS
D22
VSS
D25
VSS
D26
VSS
D30
VSS
D34
VSS
D39
VSS
D44
VSS
D45
VSS
D47
VSS
D48
VSS
D53
VSS
D58
VSS
D6
VSS
D62
VSS
D66
VSS
D69
VSS
E11
VSS
E15
VSS
E18
VSS
E21
VSS
E46
VSS
E50
VSS
E53
VSS
E56
VSS
E6
VSS
E65
VSS
E71
VSS
F1
VSS
F13
VSS
F2
VSS
F22
VSS
F23
VSS
F27
VSS
F28
VSS
F32
VSS
F33
VSS
F35
VSS
F37
VSS
F38
VSS
F4
VSS
F40
VSS
F42
VSS
BA41
VSS
PDC
?
AA65
AA68
AB15
AB16
AB18
AB21
AD13
AD16
AD19
AD20
AD21
AD62
AE64
AE65
AE66
AE67
AE68
AE69
AF10
AF15
AF17
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH63
AH64
AH67
AJ15
AJ18
AJ20
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AL28
AL32
AL35
AL38
AL45
AL48
AL52
AL55
AL58
AL64
A67
A70
AA2
AA4
AB8
AD8
AF1
AF2
AF4
AH6
AJ4
AK8
AL2
AL4
U11P
A5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
*SKL_ULT
REV = 1
SKL_ULT
GND 1 OF 3
Need apply PN
?
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
16 OF 20
?
AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58
U11R
?
D D
C C
B B
SKL_ULT
GND 3 OF 3
F8
VSS
G10
VSS
G22
VSS
G43
VSS
G45
VSS
G48
VSS
G5
VSS
G52
VSS
G55
VSS
G58
VSS
G6
VSS
G60
VSS
G63
VSS
G66
VSS
H15
VSS
H18
VSS
H71
VSS
J11
VSS
J13
VSS
J25
VSS
J28
VSS
J32
VSS
J35
VSS
J38
VSS
J42
VSS
J8
VSS
K16
VSS
K18
VSS
K22
VSS
K61
VSS
K63
VSS
K64
VSS
K65
VSS
K66
VSS
K67
VSS
K68
VSS
K70
VSS
K71
VSS
L11
VSS
L16
VSS
L17
VSS
18 OF 20
*SKL_ULT
REV = 1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
?
A A
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
SKL U (7/14)
SKL U (7/14)
SKL U (7/14)
1
8 41Tuesday, May 26, 2015
8 41Tuesday, May 26, 2015
8 41Tuesday, May 26, 2015
1A
1A
1A
5
4
3
2
1
09
?
U11S
CFG0-19 need Reserve TP
D D
+1.0V_DEEP_SUS
C C
CFG0<16>
CFG1<16>
CFG2<16>
CFG3<16>
CFG4<16>
CFG5<16>
CFG6<16>
CFG7<16>
CFG8<16>
CFG9<16>
CFG10<16>
CFG11<16>
CFG12<16>
CFG13<16>
CFG14<16>
CFG15<16>
CFG16<16>
CFG17<16>
CFG18<16>
CFG19<16>
R46 49.9/F_2
R183 *1K_2
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG_RCOMP
G69
G68
G71
G70
AY2
AY1
AL25
AL27
BA70
BA68
G65
E68
B67
D65
D67
E70
C68
D68
C67
F71
F70
H70
H69
E63
F63
E66
F66
E60
E8
D1
D3
K46
K45
C71
B70
F60
A52
J71
J68
F65
F61
E61
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMODE
RSVD_AY2
RSVD_AY1
RSVD_D1
RSVD_D3
RSVD_K46
RSVD_K45
RSVD_AL25
RSVD_AL27
RSVD_C71
RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68
RSVD_J71
RSVD_J68
VSS_F65
VSS_G65
RSVD_F61
RSVD_E61
SKL_ULT
RESERVED SIGNALS-1
PDC
B B
*SKL_ULT
REV = 1
19 OF 20
Need apply PN
RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_BB2
RSVD_BA3
RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2
RSVD_B3
RSVD_A3
RSVD_AW1
RSVD_E1
RSVD_E2
RSVD_BA4
RSVD_BB4
RSVD_A4
RSVD_C4
RSVD_A69
RSVD_B69
RSVD_AY3
RSVD_D71
RSVD_C70
RSVD_C54
RSVD_D54
VSS_AY71
RSVD_TP_AW71
RSVD_TP_AW70
PROC_SELECT#
ZVM#
MSM#
TP5
TP6
TP4
TP1
TP2
?
BB68
BB69
AK13
AK12
BB2
BA3
AU5
AT5
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
BB5
A69
B69
AY3
R375 *0_2/S
D71
C70
C54
D54
AY4
BB3
AY71
R385 *0_2/S
AR56
AW71
AW70
AP56
C64
R159 *100K_2
0112 unmount
+1.8V_DEEP_SUS
SI
+VCCSTPLL
R556 *0_2
C559
*1uF/6.3_2
AW69
AW68
AU56
AW48
C7
U12
U11
H11
U11T
RSVD_AW69
RSVD_AW68
RSVD_AU56
RSVD_AW48
RSVD_C7
RSVD_U12
RSVD_U11
RSVD_H11
*SKL_ULT
REV = 1
SKL_ULT
?
SPARE
20 OF 20
Need apply PN
F6
RSVD_F6
E3
RSVD_E3
C11
RSVD_C11
B11
RSVD_B11
A11
RSVD_A11
D12
RSVD_D12
C12
RSVD_C12
F52
RSVD_F52
?
Processor Strapping
CFG3
(Physcial Debug Enable)
DFX Privacy
CFG4
(DP Presence Strap)
A A
5
The CFG signals have a default value of '1' if not terminated on the board.
1 0
Disable: Enable: Set DFX Enable in DFX interface MSR
Disable; No physical DP attached to eDP
4
Enable; An ext DP device is connected to eDP
3
CFG3
CFG4
Circuit
R143 *1K_2
R42 *1K_2
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
SKL U (8/14)
SKL U (8/14)
SKL U (8/14)
1
9 41Tuesday, May 26, 2015
9 41Tuesday, May 26, 2015
9 41Tuesday, May 26, 2015
1A
1A
1A
5
+3V_DEEP_SUS <4,11,12,14,15,16>
+3V <2,4,11,12,13,14,15,16,20,21,22,23,25,26,27,29,30,31,37,38>
+5V <22,23,24,27,37,38>
+1.0V <2,4,6,16,30,36>
+3VS5 <4,15,16,22,28,30,31,33,35,36,37>
D D
C C
4
3
2
1
10
?
U11E
SPI - FLASH
PCH_SPI1_CLK
PCH_SPI1_SO
PCH_SPI1_SI
PCH_SPI_IO2
PCH_SPI_IO3
PCH_SPI_CS0#
Support Vpro
CL_CLK<28>
CL_DAT<28>
CL_RST#<28>
SERIRQ<26,30>
GPP_D1
SIO_EXT_SMI#
PCI_SERR#
GPP_D21
GPP_D22
GPP_D0
GPP_D1<21>
SIO_EXT_SMI#<30>
PCI_SERR#<30>
GPP_D21<24>
GPP_D22<24>
GPP_D0<24>
EC_RCIN#<30>
AW3
AW2
AW13
AY11
AV2
AV3
AU4
AU3
AU2
AU1
M2
M3
J4
V1
V2
M1
G3
G2
G1
SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#
SPI - TOUCH
GPP_D1/SPI1_CLK
GPP_D2/SPI1_MISO
GPP_D3/SPI1_MOSI
GPP_D21/SPI1_IO2
GPP_D22/SPI1_IO3
GPP_D0/SPI1_CS#
C LINK
CL_CLK
CL_DATA
CL_RST#
GPP_A0/RCIN#
GPP_A6/SERIRQ
*SKL_ULT
REV = 1
SKL_ULT
LPC
PDC
5 OF 20
Need apply PN
SMBUS, SMLINK
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
?
R7
R8
R10
R9
W2
W1
W3
V3
AM7
AY13
BA13
BB13
AY12
BA12
BA11
AW9
AY9
AW11
SMB_PCH_CLK
SMB_PCH_DAT
SML0ALERT#
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#
SMB_ME1_CLK
SMB_ME1_DAT
GPP_B23
CLK_PCI_EC_R
CLK_PCI_LPC_R
CLKRUN#
SML0ALERT# <11>
SML1ALERT# <11>
LAD0 <26,28,30>
LAD1 <26,28,30>
LAD2 <26,28,30>
LAD3 <26,28,30>
LFRAME# <26,28,30>
R408 22/F_4
CLKRUN# <30>
TP15
R404 22/F_4
R405 22/F_4
EC25 18P/50V_4
EC24 18P/50V_4
EC23
18P/50V_4
CLK_24M_KBC <30>
CLK_24M_DEBUG <28>
EMI(near PCH)
CLK_PCI_TPM <26>
EMI(near PCH)
GPIO Pull UP
+3V +3V_DEEP_SUS
SERIRQ
CLKRUN#
SIO_EXT_SMI#
EC_RCIN#
PCI_SERR#
B B
R377 10K_2
R380 8.2K/F_4
R205 10K_2
R378 10K_2
R202 10K_2
SMBus/Pull-up(CLG)
SI 2
DEL Q20
A A
R356 4.7K_2
+3V
SMB_RUN_DAT<16,27>
R364 4.7K_2
+3V
SMB_RUN_CLK<16,27>
5
Q21
4 3
1
2N7002KDW
+3V
5
2
6
ACC_LED#<12>
SMB_PCH_DAT
SMB_PCH_CLK
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SMB_ME1_CLK
SMB_ME1_DAT
Touch Pad
XDP
LPDDR3 thermal sensor
4
R360 2.2K_2
R366 2.2K_2
R232 499/F_4
R257 499/F_4
R341 1K_2
R333 1K_2
R173 10K_2
SI
PCH SPI ROM(CLG)
Vender P/N
EON
Winbond
GigaDevice
Socket
TP66-71 need place to TOP
3
Size
8MB
8MB
TP65
TP68
TP71
TP67
TP70
TP66
R457/R453/R450/R451/R546/R548 close to U15 pin
C376 1U/10V_4
AKE3EZN0Q01 (EN25QH64-104HIP)8MB
AKE3EFP0N07 (W25Q64FVSSIQ)
AKE3EGN0Q01 (GD25B64BSIGR)
DFHS08FS023
U23&U24 footprint
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
BIOS_WP#
HOLD#
R340 15/F_4
R361 15/F_4
R367 15/F_4
R354 15/F_4
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_RPCH_SPI1_SI
PCH_SPI1_SO_RPCH_SPI1_SO
C373
22P/50V_4
PCH_SPI_CS0#
PCH_SPI1_CLK
+3VSPI
PCH_SPI_IO2
R359 1K_4
R365 15/F_4
PCH_SPI_CS0#_R<30>
PCH_SPI1_CLK_R<30>
PCH_SPI1_SI_R<30>
PCH_SPI1_SO_R<30>
PCH SPI ROM(CLG)
+3V_M
U17
1
CE#
VDD
6
SCK
5
SI
2
SO
HOLD#
3
WP#
VSS
GD25B64BSIGR
AKE3EFP0N07
BIOS_WP#
2
4M SPI ROM Socket
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
BIOS_WP#
8
+3VSPI
R343 1K_4
7
HOLD#
R342 15/F_4
4
C346
0.1U/10V_4
PCH_SPI_IO3
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
+3VSPI
SI
HOLD#
+3V_M<15>
SKL U (9/14)
SKL U (9/14)
SKL U (9/14)
1
1A
1A
10 41Tuesday, May 26, 2015
10 41Tuesday, May 26, 2015
10 41Tuesday, May 26, 2015
1A
5
4
3
2
1
11
D D
DESIGN NOTE:
WEAK PULL UP RESISTOR PRESENT ON THIS NET
ACZ_SPKR<14,23>
C C
1212 change R95 pull-high from
+3V to +3V_DEEP_SUS
B B
GSPI1_MOSI<14>
ACZ_SPKR
GSPI1_MOSI
R381
*20K/F_2
+3V_DEEP_SUS
R231
1K_2
R233
*20K/F_2
R63
*20K/F_2
Functional Strap Definitions
TOP SWAP OVERRIDE
HIGH - TOP SWAP ENABLE
LOW-DISABLED
HIGH: LPC SELECTED FOR SYSTEM FLASH
WEAK INTERNAL PD
No Boot:
The signal has a weak internal pull-down.
0 = Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality).
1 = Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). Must be
pulled up to support Intel AMT with TLS and Intel
SBA (Small Business Advantage) with TLS.
No Boot:
The signal has a weak internal pull-down.
This field determines the destination of accesses to the
BIOS memory range. Also controllable using Boot BIOS
Destination bit (Chipset Configuration Registers: Offset
3410h:Bit 10). This strap is used in conjunction with Boot
BIOS Destination Selection 0 strap.
Bit 10 Boot BIOS Destination
0 SPI
1 LPC
ACZ_SDOUT<14>
GPIO33_EC<30>
GPP_B18<14>SML0ALERT#<10>
SML1ALERT#<10>
ACZ_SDOUT
R401 1K_2
GPP_B18SML0ALERT#
+3V_DEEP_SUS
SML1ALERT#
+3V_DEEP_SUS
R397
*4.7K_2
ACZ_SDOUT
+3V
R363
*4.7K_2
R362
10K_2
R260
*10K_2
R267
20K/F_2
No Boot:
The signal has a weak internal pull-down.
0 = Enable security measures defined in the Flash
Descriptor.
1 = Disable Flash Descriptor Security (override). This
strap should only be asserted high using external
pull-up in manufacturing/debug environments ONLY.
This function is useful when running ITP/XDP.
No Boot:
The signal has a weak internal pull-down.
0 = Disable No Reboot mode.
1 = Enable No Reboot mode
(PCH will disable the TCO
Timer system reboot feature).
This function is useful when running ITP/XDP.
No Boot:
The signal has a weak internal pull-down.
0 = LPC Is selected for EC.
1 = eSPI Is selected for EC.
A A
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
SKL U (10/14)
SKL U (10/14)
SKL U (10/14)
1
11 41Tuesday, May 26, 2015
11 41Tuesday, May 26, 2015
11 41Tuesday, May 26, 2015
1A
1A
1A
5
+3V <2,4,10,11,13,14,15,16,20,21,22,23,25,26,27,29,30,31,37,38>
+3VS5 <4,15,16,22,28,30,31,33,35,36,37>
+3V_DEEP_SUS <4,10,11,14,15,16>
BB11
H13
G13
B17
A17
G11
F11
D16
C16
H16
G16
D17
C17
G15
F15
B19
A19
F16
E16
C19
D19
G18
F18
D20
C20
F20
E20
B21
A21
G21
F21
D21
C21
E22
E23
B23
A23
F25
E25
D23
C23
F5
E5
D56
D61
E28
E27
D24
C24
E30
F30
A25
B25
PCIE_RXN5_CARD<26>
PCIE_RXP5_CARD<26>
D D
C C
B B
WLAN
HDD
Cardreader
PCIE_TXN5_CARD<26>
PCIE_TXP5_CARD<26>
PCIE_RXN6_WLAN<28>
PCIE_RXP6_WLAN<28>
PCIE_TXN6_WLAN<28>
PCIE_TXP6_WLAN<28>
SATA_RXN3<26>
SATA_RXP3<26>
SATA_TXN3<26>
SATA_TXP3<26>
SATA_RXN2<26>
SATA_RXP2<26>
SATA_TXN2<26>
SATA_TXP2<26>
SATA_RXN1<26>
SATA_RXP1<26>
SATA_TXN1<26>
SATA_TXP1<26>
SATA_RXN0<26>
SATA_RXP0<26>
SATA_TXN0<26>
SATA_TXP0<26>
XDP_PRDY#_CPU<16>
XDP_PREQ#_CPU<16>
+3V_DEEP_SUS
C176 0.1U/16V_4
C177 0.1U/16V_4
C216 0.1U/16V_4
C215 0.1U/16V_4
R379 10K_2
PCIE_TXN5_CARD_C
PCIE_TXP5_CARD_C
PCIE_TXN6_WLAN_C
PCIE_TXP6_WLAN_C
R44 100/F_2
PIRQA#
PCI-E Port Mapping Table
PCI-E Port
Port1
Port2
Port3
Port4
Port5
A A
5
Port6
Port7
Port8
Port9
Port10 Un-used
4
U11H
PCIE/USB3/SATA
PCIE1_RXN/USB3_5_RXN
PCIE1_RXP/USB3_5_RXP
PCIE1_TXN/USB3_5_TXN
PCIE1_TXP/USB3_5_TXP
PCIE2_RXN/USB3_6_RXN
PCIE2_RXP/USB3_6_RXP
PCIE2_TXN/USB3_6_TXN
PCIE2_TXP/USB3_6_TXP
PCIE3_RXN
PCIE3_RXP
PCIE3_TXN
PCIE3_TXP
PCIE4_RXN
PCIE4_RXP
PCIE4_TXN
PCIE4_TXP
PCIE5_RXN
PCIE5_RXP
PCIE5_TXN
PCIE5_TXP
PCIE6_RXN
PCIE6_RXP
PCIE6_TXN
PCIE6_TXP
PCIE7_RXN/SATA0_RXN
PCIE7_RXP/SATA0_RXP
PCIE7_TXN/SATA0_TXN
PCIE7_TXP/SATA0_TXP
PCIE8_RXN/SATA1A_RXN
PCIE8_RXP/SATA1A_RXP
PCIE8_TXN/SATA1A_TXN
PCIE8_TXP/SATA1A_TXP
PCIE9_RXN
PCIE9_RXP
PCIE9_TXN
PCIE9_TXP
PCIE10_RXN
PCIE10_RXP
PCIE10_TXN
PCIE10_TXP
PCIE_RCOMPN
PCIE_RCOMPP
PROC_PRDY#
PROC_PREQ#
GPP_A7/PIRQA#
PCIE11_RXN/SATA1B_RXN
PCIE11_RXP/SATA1B_RXP
PCIE11_TXN/SATA1B_TXN
PCIE11_TXP/SATA1B_TXP
PCIE12_RXN/SATA2_RXN
PCIE12_RXP/SATA2_RXP
PCIE12_TXN/SATA2_TXN
PCIE12_TXP/SATA2_TXP
*SKL_ULT
REV = 1
Function
CardReader
WLAN
Un-used
Un-used
SSD
SSD
SSD
SSD
Un-used
4
SKL_ULT
CLK RQ Port
Port0
Port1
Port2
Port3
Port4
Port5
?
USB2
PDC
8 OF 20
Function
Un-used
CardReader
WLAN
Un-used
Un-used
SSD
Need apply PN
SSIC / USB3
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_COMP
USB2_ID
USB2_VBUSSENSE
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E8/SATALED#
?
3
H8
G8
C13
D13
J6
H6
B13
A13
J10
H10
B15
A15
E10
F10
C15
D15
AB9
AB10
AD6
AD7
AH3
AJ3
AD9
AD10
AJ1
AJ2
AF6
AF7
AH1
AH2
AF8
AF9
AG1
AG2
AH7
AH8
AB6
AG3
AG4
A9
C9
D9
B9
J1
J2
J3
H2
H3
G4
H1
USB2_COMP
TS_OFF
TS_INT#
TS_RST
DEVSLP1
DEVSLP2
SATAGP0
SATAGP1
SATAGP2
SATA_LED#
USB30_RX1USB30_RX1+
USB30_TX1USB30_TX1+
USB30_RX2USB30_RX2+
USB30_TX2USB30_TX2+
USB30_RX3USB30_RX3+
USB30_TX3USB30_TX3+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP6USBP6+
USBP7USBP7+
USBP8USBP8+
R326 113/F_4
DEVSLP1 <26>
TP52
USB30_RX1- <25>
USB30_RX1+ <25>
USB30_TX1- <25>
USB30_TX1+ <25>
USB30_RX2- <25>
USB30_RX2+ <25>
USB30_TX2- <25>
USB30_TX2+ <25>
USB30_RX3- <25>
USB30_RX3+ <25>
USB30_TX3- <25>
USB30_TX3+ <25>
USBP1- <25>
USBP1+ <25>
USBP2- <25>
USBP2+ <25>
USBP3- <25>
USBP3+ <25>
USBP4- <29>
USBP4+ <29>
USBP6- <20>
USBP6+ <20>
USBP7- <28>
USBP7+ <28>
USBP8- <20>
USBP8+ <20>
ACC_LED# <10>
TS_OFF <20>
TS_INT# <20>
TS_RST <20>
TP53
USB3.0 Port Mapping Table
USB3.0 Function
PORT-1
PORT-2
PORT-3
USB3.0 MB-1
USB3.0 MB-2
USB3.0 MB-3
PORT-4 NC
3
2
USB3.0 (M/B-1)
USB3.0 (M/B-2)
USB3.0 (M/B-3)
Combo USB3.0 MB-1
Combo USB3.0 MB-2
Combo USB3.0 MB-3
Sensor Hub
Camera
BT
Touch Screen
PLACE 'R10387' WITHIN 500 MILS
FROM USB2_COMP PIN WITH
TRACE IMPEDANCE LESS THAN 0.5 OHMS
SI
2
TS_OFF
TS_INT#
TS_RST
SATA_LED#
SATAGP0
SATAGP1
SATAGP2
GPIO34 <26>
GPIO35 <26>
GPIO36 <26>
USB2.0 Port Mapping Table
USB2.0 Function
PORT-1
PORT-2
PORT-3
PORT-4
PORT-5
PORT-6
PORT-7
PORT-8
PORT-9
PORT-10
USB3.0 MB-1
USB3.0 MB-2
USB3.0 MB-3
Sensor Hub
NC
Camera
WLAN
Touch Screen
NC
NC
NB5
NB5
NB5
1
12
+3V
R171 *10K_2
R148 10K_2
R172 10K_2
R194 *10K_2
R126 10K_2
R15 10K_2
R14 10K_2
R16 *10K_2
R17 *10K_2
R131 *10K_2
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
SKL U (11/14)
SKL U (11/14)
SKL U (11/14)
1
12 41Tuesday, May 26, 2015
12 41Tuesday, May 26, 2015
12 41Tuesday, May 26, 2015
1A
1A
1A
5
4
3
2
1
+1.8V_DEEP_SUS <9,15,35,37>
+3V <2,4,10,11,12,14,15,16,20,21,22,23,25,26,27,29,30,31,37,38>
?
10 OF 20
?
PDC
9 OF 20
Need apply PN
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XCLK_BIASREF
TBT
Need apply PN
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP
?
XTAL24_IN
XTAL24_OUT
RTCX1
RTCX2
SRTCRST#
RTCRST#
C37
D37
C32
D32
C29
D29
B26
A26
E13
B7
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
AM2
AM3
AP4
AT1
?
F43
E43
BA17
PCH_SUSCLK
E37
XTAL24_IN
E35
XTAL24_OUT
E42
XCLK_BIASREF
AM18
RTC_X1
AM20
RTC_X2
AN18
SRTC_RST#PCIE_CLKREQ_VGA#
AM16
RTC_RST#
GPP_D4
EMMC_RCOMP
R168 2.7K/F_4
R166 *60.4/F_4
TP69
R144 100/F_2
TP49
R337 200/F_4
RTC_RST# <16>
CK_XDP_N <16>
CK_XDP_P <16>
PCH_SUSCLK <26,28>
+1.0V_DEEP_SUS
CLK_REQ/Strap Pin(CLG)
PCIE_CLKREQ_VGA#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ_CR#
PCIE_CLKREQ_SSD#
PCIE_CLKREQ0#
R371 10K_2
R372 10K_2
R68 10K_2
R369 10K_2
R386 10K_2
R67 10K_2
U11J
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
D D
Cardreader
WLAN
SSD
C C
B B
CLK_PCIE_SSDN<26>
CLK_PCIE_SSDP<26>
PCIE_CLKREQ_SSD#<26>
CLK_PCIE_CRN<26>
CLK_PCIE_CRP<26>
PCIE_CLKREQ_CR#<26>
CLK_PCIE_WLANN<28>
CLK_PCIE_WLANP<28>
PCIE_CLKREQ_WLAN#<28>
PCIE_CLKREQ_SSD#
PCIE_CLKREQ0#
CLK_PCIE_CRN
CLK_PCIE_CRP
PCIE_CLKREQ_CR#
CLK_PCIE_WLANN
CLK_PCIE_WLANP
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_LAN#
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
*SKL_ULT
REV = 1
A36
B36
C38
D38
C36
D36
A38
B38
C31
D31
C33
D33
A31
B31
A33
B33
A29
B29
C28
D28
A27
B27
C27
D27
U11I
CSI-2
CSI2_DN0
CSI2_DP0
CSI2_DN1
CSI2_DP1
CSI2_DN2
CSI2_DP2
CSI2_DN3
CSI2_DP3
CSI2_DN4
CSI2_DP4
CSI2_DN5
CSI2_DP5
CSI2_DN6
CSI2_DP6
CSI2_DN7
CSI2_DP7
CSI2_DN8
CSI2_DP8
CSI2_DN9
CSI2_DP9
CSI2_DN10
CSI2_DP10
CSI2_DN11
CSI2_DP11
*SKL_ULT
SKL_ULT
CLOCK SIGNALS
SKL_ULT
REV = 1
13
+3V
RTC Clock 32.768KHz
C357 15P/50V_4
Y2
32.768KHz
A A
SI
RTC_X1
12
R350
10M_4
RTC_X2
5
RTC Circuitry(RTC)
RTC Power trace width 20mils.
+3VPCU
4
D7
MEK500V-40
1U/6.3V_4
+3V_RTC <4,15,27,31,32>
+3VPCU <6,15,27,28,30,31,32,33,41>
30mils
+3V_RTC
C306
R286
20K/F_2
R301
20K/F_2C362 15P/50V_4
R304 *0_6
C293
1U/6.3V_4
C341
1U/6.3V_4
R302 *0_6
RTC_RST#
SRTC_RST#
SRTC_RST#RTC_RST#
3
RTC_RST#
3
2
Q18
2N7002K
1
R282
10K_2
EC_RTC_RST <30>
External Crystal
2
XTAL24_IN
XTAL24_OUT
TP50
C207 33P/50V_4
1
2
R176
24MHZ +-30PPM
1M_2
Y1
4
3
C208 33P/50V_4
TP51
SI 2
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
SKL U (12/14)
SKL U (12/14)
NB5
NB5
NB5
SKL U (12/14)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
13 41Tuesday, May 26, 2015
13 41Tuesday, May 26, 2015
13 41Tuesday, May 26, 2015
1A
5
+3V <2,4,10,11,12,13,15,16,20,21,22,23,25,26,27,29,30,31,37,38>
+3V_DEEP_SUS <4,10,11,12,15,16>
D D
BT_OFF
PCH_TEMPALERT#
SIO_EXT_SCI#
ACCEL_INTA#
UART2_RXD
UART2_TXD
1227 Add R536 and R537 for
UART2 function reserved
C C
Model
B B
Y0DD
R311 10K_2
R307 10K_2
R315 10K_2
R274 10K_2
R289 10K_2
R291 10K_2
R290 10K_2
R317 10K_2
R392 *10K_2
BOARD_ID8
0:VPRO
1:non-VPRO
R219 10K_2
R249 10K_2
R338 10K_2
R327 *10K_2
R306 49.9K_4
R314 49.9K_4
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
BOARD_ID8 ACZ_SYNC
0:2+2 CPU
1:2+3E CPU
+3V_DEEP_SUS
PV
R313 *10K_2
R322 *10K_2
R328 *10K_2
R275 *10K_2
R273 *10K_2
R288 *10K_2
R303 *10K_2
R316 *10K_2
R396 10K_2
Reserve
(Default = 00)
+3V_DEEP_SUS
BOARD_ID[3:1]BOARD_ID7 BOARD_ID0Board ID [6:4]
000:H9CCNNNBKTMLBR-NTD Hynix 4G 1600
001:EDFA164A2MA-GD-F ELPIDA 4G 1600
010:K3QF2F20EM-AGCF Samsung 4G 1866
011: Hynix 4G 1866
100:ELPIDA 4G 1866
000:H9CCNNNCPTMLBR-NTD Hynix 8G 1600
001:EDFB164A1MA-GD-F Micron 8G 1600
010: Samsung 8G 1866
011:H9CCNNNCPTMLBR-NUD Hynix 8G 1866
100: ELPIDA 8G 1866
A A
5
4
U11F
GPP_B15
TP18
GPP_B16
TP30
GPP_B17
TP33
TP25
TP27
TP29
TP64
TP62
TP61
TP12
GPP_B18
GPP_B19
GPP_B20
GPP_B21
GSPI1_MOSI
GPP_C8
GPP_C9
GPP_C10
GPP_C11
UART2_RXD
UART2_TXD
ACCEL_INTA#
SIO_EXT_SCI#
I2C1_SDA
I2C1_SCL
GPP_B18<11>
GSPI1_MOSI<11>
UART2_RXD<25>
UART2_TXD<25>
SIO_EXT_SCI#<30>
TP9
TP10
AN8
GPP_B15/GSPI0_CS#
AP7
GPP_B16/GSPI0_CLK
AP8
GPP_B17/GSPI0_MISO
AR7
GPP_B18/GSPI0_MOSI
AM5
GPP_B19/GSPI1_CS#
AN7
GPP_B20/GSPI1_CLK
AP5
GPP_B21/GSPI1_MISO
AN5
GPP_B22/GSPI1_MOSI
AB1
GPP_C8/UART0_RXD
AB2
GPP_C9/UART0_TXD
W4
GPP_C10/UART0_RTS#
AB3
GPP_C11/UART0_CTS#
AD1
GPP_C20/UART2_RXD
AD2
GPP_C21/UART2_TXD
AD3
GPP_C22/UART2_RTS#
AD4
GPP_C23/UART2_CTS#
U7
GPP_C16/I2C0_SDA
U6
GPP_C17/I2C0_SCL
U8
GPP_C18/I2C1_SDA
U9
GPP_C19/I2C1_SCL
AH9
GPP_F4/I2C2_SDA
AH10
GPP_F5/I2C2_SCL
AH11
GPP_F6/I2C3_SDA
AH12
GPP_F7/I2C3_SCL
AF11
GPP_F8/I2C4_SDA
AF12
GPP_F9/I2C4_SCL
*SKL_ULT
REV = 1
0:4G
1:8G
ACZ_SYNC
ACZ_BCLK
ACZ_SDOUT<11>
ACZ_SDIN0<23>
TP22
TP16
TP13
TP26
TP7
TP44
TP48
TP43
ACZ_SPKR<11,23>
4
ACZ_SDOUT
ACZ_SDIN0
ACZ_RST#
SSP2_SFRM
SSP2_SCLK
SSP2_TXD
SSP2_RXD
GPP_D19
GPP_D20
GPP_D17
GPP_D18
ACZ_SPKR
3
Skylake (GPIO)
?
LPSS ISH
SKL_ULT
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
6 OF 20
HDA Bus(CLG)
+3V_DEEP_SUS
ACZ_SYNC_AUDIO<23>
ACZ_RST#_AUDIO<23>
ACZ_SDOUT_AUDIO<23>
BIT_CLK_AUDIO<23>
C423
*10P/50V_4
U11G
HDA_SYNC/I2S0_SFRM
HDA_BLK/I2S0_SCLK
HDA_SDO/I2S0_TXD
HDA_SDI0/I2S0_RXD
HDA_SDI1/I2S1_RXD
HDA_RST#/I2S1_SCLK
J5
GPP_D23/I2S_MCLK
I2S1_SFRM
I2S1_TXD
GPP_F1/I2S2_SFRM
GPP_F0/I2S2_SCLK
GPP_F2/I2S2_TXD
GPP_F3/I2S2_RXD
H5
GPP_D19/DMIC_CLK0
D7
GPP_D20/DMIC_DATA0
D8
GPP_D17/DMIC_CLK1
C8
GPP_D18/DMIC_DATA1
GPP_B14/SPKR
*SKL_ULT
AUDIO
REV = 1
BA22
AY22
BB22
BA21
AY21
AW22
AY20
AW20
AK10
AW5
AK7
AK6
AK9
3
Need apply PN
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D15/ISH_UART0_RTS#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_A12/BM_BUSY#/ISH_GP6
R390 *1K_4
R394 33_4
R388 33_4
R400 33_4
R402 33_4
?
SKL_ULT
7 OF 20
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
?
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
ACZ_BCLK
Need apply PN
SDIO/SDXC
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_A16/SD_1P8_SEL
2
P2
P3
P4
P1
M4
N3
N1
N2
AD11
AD12
U1
PCH_TEMPALERT#
U2
U3
U4
AC1
AC2
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
GPP_G7/SD_WP
SD_RCOMP
GPP_F23
?
2
GPP_D9
GPP_D10
GPP_D11
ISH_I2C0_SDA
ISH_I2C0_SCL
ISH_I2C1_SDA
ISH_I2C1_SCL
ISH_I2C2_SDA
ISH_I2C2_SCL
SML0BDATA
SML0BCLK
SML0BALERT#
UART1_RXD
UART1_TXD
UART1_RTS
UART1_CTS
GPP_A12
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
AB7
AF13
TP76
TP77
GPP_D11 <26>
BT_OFF
ISH_I2C0_SDA <29>
ISH_I2C0_SCL <29>
TP14
TP11
TP59
TP58
TP57
TP60
TP19
TP20
TP23
TP17
1207
Add Sensors Debug CONN
1209
Change CN5012 footprint from
88511-180n-18p-l to
fg-12x59-20-18p
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
BOARD_ID8
GPP_A16
R54 200/F_2
R8 *10K_2
R6 *10K_2
R4 *10K_2
COOL SENSE
DISABLE KB
CN1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
*ACES_88511-180N
GPP_A16 <25>
NB5
NB5
NB5
BT_OFF <28>
COOL SENSE
ISH_GYRO_DRDY
ISH_GYRO_INT
ISH_AE_INT
ISH_ACC_INT
DISABLE KB
GPP_A12
ISH_I2C0_SDA
ISH_I2C0_SCL
ISH_I2C2_SDA
ISH_I2C2_SCL
ISH_GYRO_DRDY <29>
ISH_GYRO_INT <29>
ISH_AE_INT <29>
ISH_ACC_INT <29>
DISABLE KB <29>
1
ISH_I2C0_SCL
2
ISH_I2C0_SDA
3
ISH_I2C1_SCL
4
ISH_I2C1_SDA
5
6
ISH_GYRO_DRDY
7
ISH_GYRO_INT
8
ISH_AE_INT
9
ISH_ACC_INT
10
11
COOL SENSE
12
DISABLE KB
13
14
15
16
17
18
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
TP5
TP3
TP2
+3V
TP1
SKL U (13/14)
SKL U (13/14)
SKL U (13/14)
1
R2 *10K_2
R9 *10K_2
R7 10K_2
R5 10K_2
R3 10K_2
R1 *10K_2
R414 *10K_2
R210 10K_2
R212 10K_2
R53 10K_2
R52 10K_2
14 41Tuesday, May 26, 2015
14 41Tuesday, May 26, 2015
14 41Tuesday, May 26, 2015
14
+3V
1A
1A
1A
5
4
+3V_DEEP_SUS<4,10,11,12,14,16>
+1.0V_DEEP_SUS<9,13,16,35,36>
+1.8V_DEEP_SUS<9,35,37>
+3V_RTC<4,13,27,31,32>
+3VS5<4,16,22,28,30,31,33,35,36,37>
+3V_M<10>
3
2
1
15
D D
+VCCPRIM
C40 1uF/6.3_2
+1.0V_DEEP_SUS
C820 and C690 close to cpu less then 100 mils
+3VS5
+3VPCU
+V3.3DX_1.5DX_ADO
+VCCDSW_1.0V
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
R582 *0_2/S
+1.0V_DEEP_SUS
R395 0_2
R398 *0_2
+1.0V_DEEP_SUS
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
+3V_M
PCH Internal VRM
+1.0V_DEEP_SUS
C C
PV
+VCCAPLL_1.0V
L26
L27
C563 *0.1U/10V_2
C564 *0.1U/10V_2
+V3.3DX_1.5DX_ADO
*BLM15BD601SN1D(600,200MA)
+V3.3DX_1.5DX_ADO
*BLM15BD601SN1D(600,200MA)
B B
C22 1uF/6.3_2
C345 1uF/6.3_2
C250 1uF/6.3_2
C35 1uF/6.3_2
C292 22U/6.3V_6
C8 1U/6.3V_2
C46 1uF/6.3_2
C59 1uF/6.3_2
C43 1uF/6.3_2
R55 *0_4/S
C211 1uF/6.3_2
C45
*1U/6.3V_2
+3V
+1.0V_DEEP_SUS
C301
*22U/6.3V_6
+VCCMPHYAON_1P0
+VCCAMPHYPLL_1P0
+VCCAPLL_1.0V
+VCCPRIM
+VCCSPI
+VCCSRAM_1.0V
+VCCPRIM_3.3V
+VCCPRIM_1.0V
+VCCAPLLEBB
U11O
AB19
VCCPRIM_1P0
AB20
VCCPRIM_1P0
P18
VCCPRIM_1P0
AF18
VCCPRIM_CORE
AF19
VCCPRIM_CORE
V20
VCCPRIM_CORE
V21
VCCPRIM_CORE
AL1
DCPDSW_1P0
K17
VCCMPHYAON_1P0
L1
VCCMPHYAON_1P0
N15
VCCMPHYGT_1P0_N15
N16
VCCMPHYGT_1P0_N16
N17
VCCMPHYGT_1P0_N17
P15
VCCMPHYGT_1P0_P15
P16
VCCMPHYGT_1P0_P16
K15
VCCAMPHYPLL_1P0
L15
VCCAMPHYPLL_1P0
V15
VCCAPLL_1P0
AB17
VCCPRIM_1P0_AB17
Y18
VCCPRIM_1P0_Y18
AD17
VCCDSW_3P3_AD17
AD18
VCCDSW_3P3_AD18
AJ17
VCCDSW_3P3_AJ17
AJ19
VCCHDA
AJ16
VCCSPI
AF20
VCCSRAM_1P0
AF21
VCCSRAM_1P0
T19
VCCSRAM_1P0
T20
VCCSRAM_1P0
AJ21
VCCPRIM_3P3_AJ21
AK20
VCCPRIM_1P0_AK20
N18
VCCAPLLEBB
*SKL_ULT
REV = 1
CPU POWER 4 OF 4
SKL_ULT
2.899A
2.57A
0.03A
1.714A
0.09A
?
Need apply PN
15 OF 20
VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
VCCPGPPG
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
VCCRTCPRIM_3P3
VCCRTC_AK19
VCCRTC_BB14
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
?
AK15
AG15
Y16
Y15
T16
AF16
AD15
V19
T1
AA1
AK17
AK19
BB14
BB10
A14
K19
L21
N20
L19
A10
AN11
AN13
+VCCPGPPA
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPF
+VCCPGPPG
+VCCPRIM_1.0V_T1
+VCCATS_1.8V
+VCCRTCPRIM_3.3V
DCPRTC
+VCCCLK1
+VCCCLK2
+VCCCLK3
+VCCCLK4
+VCCCLK5
+VCCCLK6
CORE_VID0
CORE_VID1
C32 1uF/6.3_2
C392 0.1U/10V_2
C206 1uF/6.3_2
TP31
TP32
1uF/6.3_2
1uF/6.3_2
+VCCPGPPA
C41
1uF/6.3_2
+VCCRTCPRIM_3.3V+VCCATS_1.8V +3V_RTC
C60
1uF/6.3_2
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPG
+VCCPGPPF
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+1.8V_DEEP_SUS
+3V_DEEP_SUS
+3V_RTC
+1.0V_DEEP_SUS
+VCCPGPPB +VCCPGPPC +VCCPGPPE
C56
C289
C62
1uF/6.3_2
C61
0.1U/10V_2R583 *0_2/S
C391
1uF/6.3_2
C68
0.1U/10V_2
+3V_DEEP_SUS
+1.8V_DEEP_SUS
PV
Q27
4 3
1
*2N7002kDW
A A
5
2
6
R551 *22_8
5
+3V_M
+VIN
R550
*1M_4
R552
*1M_4
PV
+3V_DEEP_SUS
4
+3VS5
+3V_M
R577 *0_4
R580 0_4
3
SI 2
+3V_DEEP_SUS+3VS5
R576
100K_4
SLP_SUS_ON<30,35,36>
2
C562
1U/6.3V_4
C561
*10P/50V_4
U18
5
IN
4
IN
3
ON/OFF
IC(5P) G5243AT11U
NB5
NB5
NB5
1
OUT
2
GND
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
C560
0.1U/10V_4
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
SKL U (14/14)
SKL U (14/14)
SKL U (14/14)
1
15 41Tuesday, May 26, 2015
15 41Tuesday, May 26, 2015
15 41Tuesday, May 26, 2015
1A
1A
1A
5
4
3
+1.0V_DEEP_SUS
2
1
CN3
XDP_PREQ#_CPU<12>
XDP_PRDY#_CPU<12>
CFG0<9>
CFG1<9>
CFG2<9>
ON/OFFBTN_KBC#<16>
CK_XDP_P<13>
CK_XDP_N<13>
SMB_RUN_DAT<10,27>
SMB_RUN_CLK<10,27>
XDP_TCK0<2>
R41 1K_2
C5
0.1U/10V_2
CFG3<9>
CFG4<9>
CFG5<9>
CFG6<9>
CFG7<9>
D D
1016 Add R10577
with 1K from CFG0
to PWR_DEBUG
C C
XDP_DBRESET_N
+3V_DEEP_SUS
+3VS5
CFG0
R43 1K_2
R38 1K_2
R40 1K_2
SYS_PWROK
+3V
PWR_DEBUG
XDP_DBRESET_N
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_TCK0
APS
CN2
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
B B
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
*ACES_88511-180N
R403 *0_2
1114 unstuff R283
SUSB# <4,16,30>
SLP_S5# <4>
SUSC# <4,30>
SLP_A# <4,30>
RTC_RST# <13>
ON/OFFBTN_KBC# <16>
SYS_RESET# <4>
PCH_SLP_S0_N <4,36>
SUSB# <4,16,30>
+3VS5
3
OBSFN_A0
5
OBSFN_A1
9
OBSDATA_A0
11
OBSDATA_A1
15
OBSDATA_A2
17
OBSDATA_A3
27
OBSDATA_B0
29
OBSDATA_B1
33
OBSDATA_B2
35
OBSDATA_B3
41
HOOK1
45
HOOK2
40
ITPCLK/HOOK4
42
ITPCLK#/HOOK5
48
DBR#/HOOK7
51
SDA
53
SCL
52
TDO
54
TRSTN
56
TDI
58
TMS
57
TCK0
60
GND17
59
GND16
50
CPU XDP
GND15
49
GND14
38
GND13
37
GND12
32
GND11
31
GND10
*Samtec BSH-030-01
R70 *1K_2 R199
C78
0.1U/10V_2
HWPG<4,30,33,34,35,37>
+3V_DEEP_SUS
XDP_TDO
XDP_TDI
XDP_TMS
XDP_TRST#
PWRGOOD/HOOK0
+3V
VCC_OBS_CD
VCC_OBS_AB
OBSFN_C0
OBSFN_C1
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3
OBSFN_D0
OBSFN_D1
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
RESET#/HOOK6
C4
0.1U/10V_2
14
10
12
13
1217
Change CN5002 footprint from
88511-180n-18p-l to
fg-12x59-20-18p
A A
SYS_PWROK<4>
PLTRST#<4,26,28,30>
R39 1K_2
44
43
21
OBSFN_B0
23
OBSFN_B1
4
6
10
12
16
18
22
24
28
30
34
36
47
HOOK3
55
TCK1
39
46
1
GND0
2
GND1
7
GND2
8
GND3
13
GND4
14
GND5
19
GND6
20
GND7
25
GND8
26
GND9
+1.0V_DEEP_SUS
C26
0.1U/10V_2
U1
VCC
2
1A
1
1OE
5
2A
4
2OE
9
3A
3OE
4A
4OE
*SN74CBTLV3126RGYR
SYS_PWROK
XDP_RST
XDP_TCK1
SYS_PWROK
XDP_RST
DPAD
TP55
C34
0.1U/10V_2
1B
2B
3B
4B
GND
3
6
8
11
15
7
XDP_BPM0 <2>
XDP_BPM1 <2>
CFG17 <9>
CFG16 <9>
CFG8 <9>
CFG9 <9>
CFG10 <9>
CFG11 <9>
CFG19 <9>
CFG18 <9>
CFG12 <9>
CFG13 <9>
CFG14 <9>
CFG15 <9>
EC_PWROK <4,30>
+VCCIO
XDP_TDO_CPU <2>
XDP_TDI_CPU <2>
XDP_TMS_CPU <2>
XDP_TRST#_CPU <2>
150/F_4
PWR_DEBUG
R37
*10K_2
JTAGX_PCH<2>
JTAG_TMS_PCH<2>
JTAG_TDI_PCH<2>
JTAG_TDO_PCH<2>
JTAG_TCK_PCH<2>
+1.0V
R26 51_2
R24 *0_2
R32 *0_2
R22 *0_2
XDP_TDO
XDP_TCK0
XDP_TMS
XDP_TDI
XDP_TDO
XDP_TDI
XDP_TCK0
XDP_TCK1
16
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
NB5
NB5
5
4
3
NB5
2
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
XDP/APS
XDP/APS
XDP/APS
16 41Tuesday, May 26, 2015
16 41Tuesday, May 26, 2015
16 41Tuesday, May 26, 2015
1
1A
1A
1A
5
1 2
R421 243/F_4
1 2
R428 243/F_4
1 2
R503 243/F_4
1 2
M_A_B[9:0]<3,19>
M_A_ODT0<3,19>
M_A_DQ[31:0]<3>
M_A_DQSN3<3>
M_A_DQSP3<3>
M_A_DQSN0<3>
M_A_DQSP0<3>
M_A_DQSN2<3>
M_A_DQSP2<3>
M_A_DQSN1<3>
M_A_DQSP1<3>
R502 243/F_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_B0
M_A_B1
M_A_B2
M_A_B3
M_A_B4
M_A_B5
M_A_B6
M_A_B7
M_A_B8
M_A_B9
M_A_ODT0
M_A_ODT0
M_A_DQ5
M_A_DQ0
M_A_DQ6
M_A_DQ3
M_A_DQ4
M_A_DQ1
M_A_DQ2
M_A_DQ7
M_A_DQ9
M_A_DQ8
M_A_DQ13
M_A_DQ10
M_A_DQ14
M_A_DQ12
M_A_DQ11
M_A_DQ15
M_A_DQSN3
M_A_DQSP3
M_A_DQSN0
M_A_DQSP0
M_A_DQSN2
M_A_DQSP2
M_A_DQSN1
M_A_DQSP1
M_A_DQ25
M_A_DQ26
M_A_DQ28
M_A_DQ24
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ27
M_A_DQ20
M_A_DQ19
M_A_DQ23
M_A_DQ17
M_A_DQ21
M_A_DQ18
M_A_DQ22
M_A_DQ16
M_A_A[9:0]<3,19>
D D
C C
U20A
C11
ZQ1_A
B11
ZQ0_A
E3
ZQ1_B
E2
ZQ0_B
B5
CA0_A
C5
CA1_A
D5
CA2_A
B6
CA3_A
C6
CA4_A
C9
CA5_A
D9
CA6_A
B10
CA7_A
C10
CA8_A
D10
CA9_A
L2
CA0_B
L3
CA1_B
L4
CA2_B
K2
CA3_B
K3
CA4_B
G3
CA5_B
G4
CA6_B
F2
CA7_B
F3
CA8_B
F4
CA9_B
N8
ODT_A
H13
ODT_B
N4
DQ0_A
T5
DQ1_A
R5
DQ2_A
P5
DQ3_A
N5
DQ4_A
T6
DQ5_A
R6
DQ6_A
P6
DQ7_A
T9
DQ8_A
R9
DQ9_A
T10
DQ10_A
R10
DQ11_A
P10
DQ12_A
N10
DQ13_A
T11
DQ14_A
R11
DQ15_A
T2
DQ16_A
R2
DQ17_A
P2
DQ18_A
N2
DQ19_A
T3
DQ20_A
R3
DQ21_A
P3
DQ22_A
N3
DQ23_A
N11
DQ24_A
N12
DQ25_A
P12
DQ26_A
T13
DQ27_A
R13
DQ28_A
P13
DQ29_A
T14
DQ30_A
R14
DQ31_A
N7
DQS0_C_A
P7
DQS0_T_A
N9
DQS1_C_A
P9
DQS1_T_A
R4
DQS2_C_A
T4
DQS2_T_A
R12
DQS3_C_A
T12
DQS3_T_A
253pin 1 of 2
H9CCNNN8KTALBR-NTD
4
LPDDR3
CK_C_A
CK_T_A
CK_C_B
CK_T_B
CKE0_A
CKE1_A
CKE0_B
CKE1_B
CS0_N_A
CS1_N_A
CS0_N_B
CS1_N_B
DM0_A
DM1_A
DM2_A
DM3_A
DM0_B
DM1_B
DM2_B
DM3_B
DQ0_B
DQ1_B
DQ2_B
DQ3_B
DQ4_B
DQ5_B
DQ6_B
DQ7_B
DQ8_B
DQ9_B
DQ10_B
DQ11_B
DQ12_B
DQ13_B
DQ14_B
DQ15_B
DQ16_B
DQ17_B
DQ18_B
DQ19_B
DQ20_B
DQ21_B
DQ22_B
DQ23_B
DQ24_B
DQ25_B
DQ26_B
DQ27_B
DQ28_B
DQ29_B
DQ30_B
DQ31_B
DQS0_C_B
DQS0_T_B
DQS1_C_B
DQS1_T_B
DQS2_C_B
DQS2_T_B
DQS3_C_B
DQS3_T_B
3
C550
+1.8VSUS +1.2VSUS
C8
M_A_CLKN0
B8
M_A_CLKP0
H2
M_A_CLKN1
H3
M_A_CLKP1
C7
M_A_CKE0
D7
M_A_CKE1
J3
M_A_CKE2
J4
M_A_CKE3
D6
M_A_CS#0
B7
M_A_CS#1
K4
M_A_CS#0
J2
M_A_CS#1
N6
P8
P4
P11
H14
F13
L14
D14
L15
M_A_DQ32
L16
M_A_DQ36
K13
M_A_DQ33
K14
M_A_DQ37
K15
M_A_DQ35
K16
M_A_DQ34
J15
M_A_DQ39
J16
M_A_DQ38
F14
M_A_DQ61
F15
M_A_DQ56
F16
M_A_DQ63
E13
M_A_DQ60
E14
M_A_DQ57
E15
M_A_DQ59
E16
M_A_DQ58
D13
M_A_DQ62
P15
M_A_DQ53
P16
M_A_DQ54
N14
M_A_DQ51
N15
M_A_DQ48
N16
M_A_DQ55
M13
M_A_DQ52
M14
M_A_DQ49
L13
M_A_DQ50
C13
M_A_DQ43
C14
M_A_DQ47
C15
M_A_DQ44
C16
M_A_DQ41
B13
M_A_DQ42
B14
M_A_DQ46
B15
M_A_DQ45
B16
M_A_DQ40
J13
M_A_DQSN4
J14
M_A_DQSP4
G13
M_A_DQSN7
G14
M_A_DQSP7
M15
M_A_DQSN6
M16
M_A_DQSP6
D15
M_A_DQSN5
D16
M_A_DQSP5
M_A_CLKN0 <3,19>
M_A_CLKP0 <3,19>
M_A_CLKN1 <3,19>
M_A_CLKP1 <3,19>
M_A_CKE0 <3,19>
M_A_CKE1 <3,19>
M_A_CKE2 <3,19>
M_A_CKE3 <3,19>
M_A_CS#0 <3,19>
M_A_CS#1 <3,19>
M_A_DQ[63:32] <3>
+1.2VSUS
+
330U/2V/E9/7343
M_A_DQSN4 <3>
M_A_DQSP4 <3>
M_A_DQSN7 <3>
M_A_DQSP7 <3>
M_A_DQSN6 <3>
M_A_DQSP6 <3>
M_A_DQSN5 <3>
M_A_DQSP5 <3>
C431
C453
1U/6.3V_4
+1.2VSUS
C483
1U/6.3V_4
C522
1U/6.3V_4
C469
1U/6.3V_4
C418
22U/6.3V_8
C542
22U/6.3V_8
SI
10uF/10V_4
1uF/6.3_2
100mA
C479
10uF/10V_4
240mA/1.2V
C444
1U/6.3V_4
C436
1U/6.3V_4
C460
C420
C537
22U/6.3V_8
C543
C544
22U/6.3V_8
C551
1uF/6.3_2
10uF/10V_4
1U/6.3V_4
1U/6.3V_4
C450
10uF/10V_4
22U/6.3V_8
22U/6.3V_8
C452
C443
C456
C528
C545
SI
A15
A16
B2
R1
T1
T16
A7
A11
B17
C3
C17
H1
H16
L1
R15
T8
U2
U3
D8
D11
E4
H4
J12
M9
A1
A17
U1
U17
A2
A3
A4
A5
A8
A12
A14
B1
22U/6.3V_8
22U/6.3V_8
B3
B4
C1
C2
C4
D1
D2
D3
D4
D12
D17
E5
E6
E7
E8
E9
E10
E11
E12
F1
F5
F12
F17
G1
G5
G15
2
U20B
LPDDR3
VDD1_0
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD2_0
VDD2_1
VDD2_2
VDD2_3
VDD2_4
VDD2_5
VDD2_6
VDD2_7
VDD2_8
VDD2_9
VDD2_10
VDD2_11
RFU0
RFU1
RFU2
RFU3
RFU4
RFU5
NC0
NC1
NC2
NC3
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
253B 2 of 2
H9CCNNN8KTALBR-NTD
VDDCA0
VDDCA1
VDDCA2
VDDCA3
VDDCA4
VDDCA5
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VREF_CA_A
VREF_CA_B
VREF_DQ_A
VREF_DQ_B
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
A6
A9
B9
E1
G2
K1
A13
B12
C12
E17
G12
G17
K12
K17
L17
M2
M3
M7
M10
M12
N1
P17
U5
U7
U10
U11
U14
A10
J1
U8
H17
G16
H5
H12
H15
J5
K5
L5
L12
M1
M4
M5
M6
M8
M11
M17
N13
N17
P1
P14
R7
R8
R16
R17
T7
T15
T17
U4
U6
U9
U12
U13
U15
U16
J17
30mA/1.2V
C471
10uF/10V_4
230mA/1.2V
C499
0.1U/10V_4
C502
1U/6.3V_4
C461
10uF/10V_4
+SMDDR_VREF_CA
+SMDDR_VREF_CA
+SMDDR_VREF_DQA
+SMDDR_VREF_DQA
C465
C462
0.047U/6.3V_2
0.047U/6.3V_2
C491
10uF/10V_4
C441
0.1U/10V_4
C503
1U/6.3V_4
10uF/10V_4
C474
C500
0.1U/10V_4
C517
1U/6.3V_4
10uF/10V_4
C79
0.047U/6.3V_2
1
C440
C546
1uF/6.3_2
+1.2VSUS
C442
C547
1uF/6.3_2
+SMDDR_VREF_CA <18>
0.047U/6.3V_2
17
SI
B B
M1 VREFM3 VREF + M1 VREFM3 VREF +
+V_VREF_VD1 VREFF_CA_A
1 2
A A
5
4
R434 *0_4/S
R441 10/F_4 R420 5.1/F_4
C455
0.022U/16V_4
R431
24.9/F_2
SM_VREF_DQ0 <3>
+SMDDR_VREF_DQA
C464
*0.01U/25V_4
3
+SMDDR_VREF_DQA
+1.2VSUS
R442
8.2K/F_4
R446
8.2K/F_4
C447
0.022U/16V_4
1 2
R429
24.9/F_2
2
R422 *0_4/S
SM_VREF_CA <3>
+SMDDR_VREF_CA
C446
*0.01U/25V_4
NB5
NB5
NB5
+1.2VSUS
R418
8.2K/F_4
R417
8.2K/F_4
+SMDDR_VTERM
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LPDDR3 CHA
LPDDR3 CHA
LPDDR3 CHA
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
17 41Tuesday, May 26, 2015
17 41Tuesday, May 26, 2015
17 41Tuesday, May 26, 2015
1A
1A
1A
5
4
3
2
1
LPDDR3
1 2
R505 243/F_4
1 2
R504 243/F_4
1 2
R491 243/F_4
1 2
M_B_B[9:0]<3,19>
M_B_DQ[31:0]<3>
M_B_DQSN0<3>
M_B_DQSP0<3>
M_B_DQSN3<3>
M_B_DQSP3<3>
M_B_DQSN2<3>
M_B_DQSP2<3>
M_B_DQSN1<3>
M_B_DQSP1<3>
R474 243/F_4
M_B_ODT0<3,19>
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_B0
M_B_B1
M_B_B2
M_B_B3
M_B_B4
M_B_B5
M_B_B6
M_B_B7
M_B_B8
M_B_B9
M_B_ODT0
M_B_ODT0
M_B_DQ1
M_B_DQ0
M_B_DQ5
M_B_DQ3
M_B_DQ7
M_B_DQ4
M_B_DQ2
M_B_DQ6
M_B_DQ24
M_B_DQ25
M_B_DQ29
M_B_DQ31
M_B_DQ28
M_B_DQ30
M_B_DQ27
M_B_DQ26
M_B_DQ19
M_B_DQ23
M_B_DQ21
M_B_DQ20
M_B_DQ22
M_B_DQ18
M_B_DQ16
M_B_DQ17
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ8
M_B_DQ14
M_B_DQ9
M_B_DQ15
M_B_DQSN0
M_B_DQSP0
M_B_DQSN3
M_B_DQSP3
M_B_DQSN2
M_B_DQSP2
M_B_DQSN1
M_B_DQSP1
M_B_A[9:0]<3,19>
D D
C C
B B
U21A
C11
ZQ1_A
B11
ZQ0_A
E3
ZQ1_B
E2
ZQ0_B
B5
CA0_A
C5
CA1_A
D5
CA2_A
B6
CA3_A
C6
CA4_A
C9
CA5_A
D9
CA6_A
B10
CA7_A
C10
CA8_A
D10
CA9_A
L2
CA0_B
L3
CA1_B
L4
CA2_B
K2
CA3_B
K3
CA4_B
G3
CA5_B
G4
CA6_B
F2
CA7_B
F3
CA8_B
F4
CA9_B
N8
ODT_A
H13
ODT_B
N4
DQ0_A
T5
DQ1_A
R5
DQ2_A
P5
DQ3_A
N5
DQ4_A
T6
DQ5_A
R6
DQ6_A
P6
DQ7_A
T9
DQ8_A
R9
DQ9_A
T10
DQ10_A
R10
DQ11_A
P10
DQ12_A
N10
DQ13_A
T11
DQ14_A
R11
DQ15_A
T2
DQ16_A
R2
DQ17_A
P2
DQ18_A
N2
DQ19_A
T3
DQ20_A
R3
DQ21_A
P3
DQ22_A
N3
DQ23_A
N11
DQ24_A
N12
DQ25_A
P12
DQ26_A
T13
DQ27_A
R13
DQ28_A
P13
DQ29_A
T14
DQ30_A
R14
DQ31_A
N7
DQS0_C_A
P7
DQS0_T_A
N9
DQS1_C_A
P9
DQS1_T_A
R4
DQS2_C_A
T4
DQS2_T_A
R12
DQS3_C_A
T12
DQS3_T_A
253pin 1 of 2
H9CCNNN8KTALBR-NTD
CK_C_A
CK_T_A
CK_C_B
CK_T_B
CKE0_A
CKE1_A
CKE0_B
CKE1_B
CS0_N_A
CS1_N_A
CS0_N_B
CS1_N_B
DM0_A
DM1_A
DM2_A
DM3_A
DM0_B
DM1_B
DM2_B
DM3_B
DQ0_B
DQ1_B
DQ2_B
DQ3_B
DQ4_B
DQ5_B
DQ6_B
DQ7_B
DQ8_B
DQ9_B
DQ10_B
DQ11_B
DQ12_B
DQ13_B
DQ14_B
DQ15_B
DQ16_B
DQ17_B
DQ18_B
DQ19_B
DQ20_B
DQ21_B
DQ22_B
DQ23_B
DQ24_B
DQ25_B
DQ26_B
DQ27_B
DQ28_B
DQ29_B
DQ30_B
DQ31_B
DQS0_C_B
DQS0_T_B
DQS1_C_B
DQS1_T_B
DQS2_C_B
DQS2_T_B
DQS3_C_B
DQS3_T_B
C8
M_B_CLKN0
B8
M_B_CLKP0
H2
M_B_CLKN1
H3
M_B_CLKP1
C7
M_B_CKE0
D7
M_B_CKE1
J3
M_B_CKE2
J4
M_B_CKE3
D6
M_B_CS#0
B7
M_B_CS#1
K4
M_B_CS#0
J2
M_B_CS#1
N6
P8
P4
P11
H14
F13
L14
D14
L15
M_B_DQ33
L16
M_B_DQ37
K13
M_B_DQ36
K14
M_B_DQ39
K15
M_B_DQ35
K16
M_B_DQ32
J15
M_B_DQ38
J16
M_B_DQ34
F14
M_B_DQ57
F15
M_B_DQ62
F16
M_B_DQ59
E13
M_B_DQ56
E14
M_B_DQ60
E15
M_B_DQ63
E16
M_B_DQ58
D13
M_B_DQ61
P15
M_B_DQ51
P16
M_B_DQ50
N14
M_B_DQ52
N15
M_B_DQ55
N16
M_B_DQ54
M13
M_B_DQ53
M14
M_B_DQ49
L13
M_B_DQ48
C13
M_B_DQ46
C14
M_B_DQ42
C15
M_B_DQ45
C16
M_B_DQ44
B13
M_B_DQ43
B14
M_B_DQ47
B15
M_B_DQ41
B16
M_B_DQ40
J13
M_B_DQSN4
J14
M_B_DQSP4
G13
M_B_DQSN7
G14
M_B_DQSP7
M15
M_B_DQSN6
M16
M_B_DQSP6
D15
M_B_DQSN5
D16
M_B_DQSP5
M_B_CLKN0 <3,19>
M_B_CLKP0 <3,19>
M_B_CLKN1 <3,19>
M_B_CLKP1 <3,19>
M_B_CKE0 <3,19>
M_B_CKE1 <3,19>
M_B_CKE2 <3,19>
M_B_CKE3 <3,19>
M_B_CS#0 <3,19>
M_B_CS#1 <3,19>
M_B_DQ[63:32] <3>
M_B_DQSN4 <3>
M_B_DQSP4 <3>
M_B_DQSN7 <3>
M_B_DQSP7 <3>
M_B_DQSN6 <3>
M_B_DQSP6 <3>
M_B_DQSN5 <3>
M_B_DQSP5 <3>
+1.8VSUS +1.2VSUS
C477
C451
1U/6.3V_4
1U/6.3V_4
+1.2VSUS
C459
1U/6.3V_4
C437
1U/6.3V_4
10uF/10V_4
C554
1uF/6.3_2
100mA
C448
C487
10uF/10V_4
10uF/10V_4
240mA/1.2V 230mA/1.2V
C504
C510
1U/6.3V_4
1U/6.3V_4
C482
10uF/10V_4
C439
C470
1U/6.3V_4
1U/6.3V_4
C457
C555
1uF/6.3_2
SI
A15
A16
T16
A11
B17
C17
H16
R15
D11
J12
A17
U17
A12
A14
D12
D17
E10
E11
E12
F12
F17
G15
U21B
VDD1_0
VDD1_1
B2
VDD1_2
R1
VDD1_3
T1
VDD1_4
VDD1_5
A7
VDD2_0
VDD2_1
VDD2_2
C3
VDD2_3
VDD2_4
H1
VDD2_5
VDD2_6
L1
VDD2_7
VDD2_8
T8
VDD2_9
U2
VDD2_10
U3
VDD2_11
D8
RFU0
RFU1
E4
RFU2
H4
RFU3
RFU4
M9
RFU5
A1
NC0
NC1
U1
NC2
NC3
A2
VSS0
A3
VSS1
A4
VSS2
A5
VSS3
A8
VSS4
VSS5
VSS6
B1
VSS7
B3
VSS8
B4
VSS9
C1
VSS10
C2
VSS11
C4
VSS12
D1
VSS13
D2
VSS14
D3
VSS15
D4
VSS16
VSS17
VSS18
E5
VSS19
E6
VSS20
E7
VSS21
E8
VSS22
E9
VSS23
VSS24
VSS25
VSS26
F1
VSS27
F5
VSS28
VSS29
VSS30
G1
VSS31
G5
VSS32
VSS33
H9CCNNN8KTALBR-NTD
LPDDR3
253B 2 of 2
VDDCA0
VDDCA1
VDDCA2
VDDCA3
VDDCA4
VDDCA5
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VREF_CA_A
VREF_CA_B
VREF_DQ_A
VREF_DQ_B
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
A6
A9
B9
E1
G2
K1
A13
B12
C12
E17
G12
G17
K12
K17
L17
M2
M3
M7
M10
M12
N1
P17
U5
U7
U10
U11
U14
A10
J1
U8
H17
G16
H5
H12
H15
J5
K5
L5
L12
M1
M4
M5
M6
M8
M11
M17
N13
N17
P1
P14
R7
R8
R16
R17
T7
T15
T17
U4
U6
U9
U12
U13
U15
U16
J17
30mA/1.2V
C438
10uF/10V_4
C505
0.1U/10V_4
C472
1U/6.3V_4
C454
10uF/10V_4
+SMDDR_VREF_CA
+SMDDR_VREF_CA
+SMDDR_VREF_DQB
+SMDDR_VREF_DQB
C80
C435
0.047U/6.3V_2
0.047U/6.3V_2
C507
10uF/10V_4
C509
0.1U/10V_4
C449
1U/6.3V_4
10uF/10V_4
C433
C508
0.1U/10V_4
C434
1U/6.3V_4
10uF/10V_4
C466
0.047U/6.3V_2
+1.2VSUS
C473
C556
1uF/6.3_2
C463
0.047U/6.3V_2
18
SI
C557
1uF/6.3_2
+SMDDR_VREF_CA <17>
M1 VREFM3 VREF +
+V_VREF_VD2
R416 *0_4/S
R419 10/F_4
C432
0.022U/16V_4
1 2
R415
A A
5
4
24.9/F_2
3
+SMDDR_VREF_DQB
+SMDDR_VREF_DQB
C445
*0.01U/25V_4
SM_VREF_DQ1 <3>
+1.2VSUS
R424
8.2K/F_4
R427
8.2K/F_4
2
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LPDDR3 CHB
LPDDR3 CHB
NB5
NB5
NB5
LPDDR3 CHB
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
18 41Tuesday, May 26, 2015
18 41Tuesday, May 26, 2015
18 41Tuesday, May 26, 2015
1A
5
4
3
2
1
19
+0.65V_DDR_VTT +0.65V_DDR_VTT
D D
C C
B B
R480 68/F_2
R489 68/F_2
R507 68/F_2
R463 68/F_2
R472 68/F_2
R447 68/F_2
R444 68/F_2
R436 68/F_2
R439 68/F_2
R432 68/F_2
R494 68/F_2
R492 68/F_2
R499 68/F_2
R496 68/F_2
R495 68/F_2
R76 68/F_2
R75 68/F_2
R78 68/F_2
R79 68/F_2
R77 68/F_2
R456 80.6/F_2
R501 80.6/F_2
R497 80.6/F_2
R493 80.6/F_2
R71 80.6/F_2
R468 80.6/F_2
M_A_CLKP0<3,17>
M_A_CLKN0<3,17>
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
M_A_A0 <3,17>
M_A_A1 <3,17>
M_A_A2 <3,17>
M_A_A3 <3,17>
M_A_A4 <3,17>
M_A_A5 <3,17>
M_A_A6 <3,17>
M_A_A7 <3,17>
M_A_A8 <3,17>
M_A_A9 <3,17>
M_A_B0 <3,17>
M_A_B1 <3,17>
M_A_B2 <3,17>
M_A_B3 <3,17>
M_A_B4 <3,17>
M_A_B5 <3,17>
M_A_B6 <3,17>
M_A_B7 <3,17>
M_A_B8 <3,17>
M_A_B9 <3,17>
M_A_CKE0 <3,17>
M_A_CKE1 <3,17>
M_A_CKE2 <3,17>
M_A_CKE3 <3,17>
M_A_CS#0 <3,17>
M_A_CS#1 <3,17>
M_A_ODT0 <3,17>
R452
37.4/F_2
R449
37.4/F_2
+0.65V_DDR_VTT
R84 68/F_2
R85 68/F_2
R80 68/F_2
R82 68/F_2
R83 68/F_2
R91 68/F_2
R92 68/F_2
R94 68/F_2
R93 68/F_2
R95 68/F_2
R438 68/F_2
R433 68/F_2
R430 68/F_2
R445 68/F_2
R443 68/F_2
R469 68/F_2
R479 68/F_2
R488 68/F_2
R500 68/F_2
R81 68/F_2
R88 80.6/F_2
R86 80.6/F_2
R451 80.6/F_2
R448 80.6/F_2
R435 80.6/F_2
R87 80.6/F_2
R96 80.6/F_2
M_B_CLKP0<3,18>
M_B_CLKN0<3,18>
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
M_B_A0 <3,18>
M_B_A1 <3,18>
M_B_A2 <3,18>
M_B_A3 <3,18>
M_B_A4 <3,18>
M_B_A5 <3,18>
M_B_A6 <3,18>
M_B_A7 <3,18>
M_B_A8 <3,18>
M_B_A9 <3,18>
M_B_B0 <3,18>
M_B_B1 <3,18>
M_B_B2 <3,18>
M_B_B3 <3,18>
M_B_B4 <3,18>
M_B_B5 <3,18>
M_B_B6 <3,18>
M_B_B7 <3,18>
M_B_B8 <3,18>
M_B_B9 <3,18>
M_B_CKE0 <3,18>
M_B_CKE1 <3,18>
M_B_CKE2 <3,18>
M_B_CKE3 <3,18>
M_B_CS#0 <3,18>
M_B_CS#1 <3,18>
M_B_ODT0 <3,18>
+0.65V_DDR_VTT
R89
37.4/F_2
R90
37.4/F_2
+0.65V_DDR_VTT
C488
1uF/6.3_2
+0.65V_DDR_VTT
C496
1uF/6.3_2
+0.65V_DDR_VTT
EC28
*10U/6.3V_4
C518
C514
1uF/6.3_2
1uF/6.3_2
C520
C521
1uF/6.3_2R72 80.6/F_2
1uF/6.3_2
RF Solution
EC29
EC27
*10U/6.3V_4
10U/6.3V_4
C511
1uF/6.3_2
C493
1uF/6.3_2
C519
10U/6.3V_4
C513
10U/6.3V_4
C498
10U/6.3V_4
M_A_CLKP1<3,17>
R74
+0.65V_DDR_VTT
37.4/F_2
R73
37.4/F_2
M_A_CLKN1<3,17>
A A
5
4
M_B_CLKP1<3,18>
+0.65V_DDR_VTT
R461
37.4/F_2
R455
37.4/F_2
M_B_CLKN1<3,18>
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
NB5
NB5
3
2
NB5
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
LPDDR3 TERMINATION
LPDDR3 TERMINATION
LPDDR3 TERMINATION
1
19 41Tuesday, May 26, 2015
19 41Tuesday, May 26, 2015
19 41Tuesday, May 26, 2015
1A
1A
1A
1
2
3
4
5
6
7
8
LID Switch
BLON_CON
D1 MEK500V-40
100mA
C114 0.1U/25V_6
C99 0.01U/25V_6
C115
0.1U/25V_6
C135
0.1U/25V_6
+VIN_BLIGHT
C100
0.1U/25V_6
LVDS_BLON1
+VIN
+VIN
PN_BLON
R120 1K_2
R117 100K_2
+VIN
4.7U/25V_6
4.7U/25V_6
R119 *0_4/S
LVDS_BLON1
L2 *0_6/S
L4 *0_6/S
C123
C131
PCH_DPST_PWM<2>
EMU_LID<30>
A A
B B
C C
PCH_LVDS_BLON<2>
C117 22P/50V_4
R110 100K_2
+VIN_BLIGHT
C139
0.1U/25V_6
R116
1K/F_2
C98 33P/50V_4
C145
0.1U/25V_6
R115
100K_2
C112 *0.047U/10V_4
1 2
INT_eDP_TXP3_R
INT_eDP_TXN3_R
INT_eDP_TXP2_R
INT_eDP_TXN2_R
INT_eDP_TXP1_R
INT_eDP_TXN1_R
INT_eDP_TXP0_R
INT_eDP_TXN0_R
INT_eDP_AUXP_R
INT_eDP_AUXN_R
1 2
C101 *0.047U/10V_4
+3V_CS
+3V
INT_eDP_AUXN_R
INT_eDP_AUXP_R
INT_eDP_TXN1_R
INT_eDP_TXP1_R
INT_eDP_TXN0_R
INT_eDP_TXP0_R
INT_eDP_TXN2_R
INT_eDP_TXP2_R
INT_eDP_TXN3_R
INT_eDP_TXP3_R
2
ULT_EDP_HPD_R
+3V_CAM
DIGITAL_CLK_L
GYRO_INT
GYRO_DRDY
AE_INT
SMDAT4
SMCLK4
VADJ1
BLON_CON
R111 1K_2
4 3
1
L6 MCM2012B900GBE
+3V_HOME
TS_OFF<12>
TS_INT#<12>
TS_RST<12>
GYRO_INT<29>
GYRO_DRDY<29>
AE_INT<29>
SMDAT4<29>
SMCLK4<29>
+VIN_BLIGHT
C129
*10P/50V_4
2
*MCM2012B900GBE
+3V_HOME
+3V_CAM
C132
*10U/6.3V_4
ULT_EDP_HPD<2>
USBP6-<12>
USBP6+<12>
L3
FCM1005KF-301T02
USBP8USBP8+
+3VLCD_CON
DIGITAL_D1<23>
DIGITAL_CLK<23>
USBP8-<12>
USBP8+<12>
*10P/50V_4
C128
*0.01U/16V_4
C122
L5
1
4 3
INT_eDP_TXP3<2>
INT_eDP_TXN3<2>
INT_eDP_TXP2<2>
INT_eDP_TXN2<2>
INT_eDP_TXP1<2>
INT_eDP_TXN1<2>
INT_eDP_TXP0<2>
INT_eDP_TXN0<2>
INT_eDP_AUXP<2>
INT_eDP_AUXN<2>
C106 0.1U/10V_4
C107 0.1U/10V_4
C124 0.1U/10V_4
C125 0.1U/10V_4
C110 0.1U/10V_4
C111 0.1U/10V_4
C108 0.1U/10V_4
C109 0.1U/10V_4
C103 0.1U/10V_4
C104 0.1U/10V_4
LVDS Conn.
CN4
USBP6-_LC
USBP6+_LC
USBP8USBP8+
51519-04041-001
LVDS-51519-04001-001-40P-L
DFFC40FR067
+3V
R118 *1K_2
R121 1K_2
SI modify
R74 non-stuff
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
42 41
BRIGHT
LVDS_BLON1VADJ1BRIGHT
+3V
+3VLCD_CON
C146
1uF/6.3_2
D D
PCH_DISP_ON<2>
R123
100K_2
1
U3
5
IN
4
IN
3
ON/OFF
IC(5P) G5243AT11U
OUT
GND
2
1
2
L8
TI160808U600
C113
0.01U/16V_4
2 1
C102
0.1U/10V_4
2 1
3
2 1
C121
10U/6.3V_4
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
+3V<2,4,10,11,12,13,14,15,16,21,22,23,25,26,27,29,30,31,37,38>
+3VPCU<6,13,15,27,28,30,31,32,33,41>
+5V<22,23,24,27,37,38>
+VIN<15,27,30,32,33,34,35,38,39,40,41>
4
5
6
NB5
NB5
NB5
7
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
LCD CONN/CAM/LID
LCD CONN/CAM/LID
LCD CONN/CAM/LID
20 41Tuesday, May 26, 2015
20 41Tuesday, May 26, 2015
20 41Tuesday, May 26, 2015
8
1A
1A
1A
5
+5V <22,23,24,27,37,38>
+3V <2,4,10,11,12,13,14,15,16,20,22,23,25,26,27,29,30,31,37,38>
4
3
Mini Display
2
1
21
+3V_DP
D D
INT_DP_SCL<2>
INT_DP_SDA<2>
PEQ
CFG0_DP
CFG1_DP
INT_DP_TXP0
INT_DP_TXN0
INT_DP_TXP1
INT_DP_TXN1
INT_DP_TXP2
INT_DP_TXN2
INT_DP_TXP3
INT_DP_TXN3
+3V_DP
R278
*4.7K_4
R281
*4.7K_4
INT_DP_TXP0<2>
INT_DP_TXN0<2>
C C
INT_DP_TXP1<2>
INT_DP_TXN1<2>
INT_DP_TXP2<2>
INT_DP_TXN2<2>
INT_DP_TXP3<2>
INT_DP_TXN3<2>
B B
C383.1U/10V_4
C378.1U/10V_4
C350.1U/10V_4
C343.1U/10V_4 C351.1U/10V_4
C339.1U/10V_4
C334.1U/10V_4 C340.1U/10V_4
C303.1U/10V_4
C296.1U/10V_4
R357
*4.7K_4
R368
10K/F_4
RST#
C385
2.2U/6.3V_4
C382
.1U/10V_4
C_INT_DP_TXP0
C_INT_DP_TXN0
C_INT_DP_TXP1
C_INT_DP_TXN1
C_INT_DP_TXP2
C_INT_DP_TXN2
C_INT_DP_TXP3
C_INT_DP_TXN3
C297
0.01U/50V_4
CFG1_DP
+3V_DP
AUX_SRCP
AUX_SRCN
+3V_DP
U13
58
57
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
+3V_DP +3V_DP
34
35
36
EGND
RST#
VDD33
EGND
NC
IN0p
IN0n
CFG1
IN1p
IN1n
PS8330B
NC
IN2p
IN2n
NC
IN3p
IN3n
EPAD
EGND
EGND
VDD331CEXT2I2C_ADDR3SCL_CTL/PEQ4SDA_CTL/CFG05VDD336REXT7CAD_SRC8HPD_SRC9CAD_SNK10HPD_SNK11VDD33
R277
C300
*0_4/S
2.2U/6.3V_4
33
SCL_DDC
SDA_DDC
PEQ
+3V_DP
DP_PD#
3.3V
GND
25
26
28
30
31
32
PD#
GND
VDD33
AUX_SNKn27AUX_SNKp
AUX_SRCn29AUX_SRCp
12
CFG0_DP
R272
4.99K/F_4
EGND
VDD33
EGND
OUT0p
OUT0n
OUT1p
OUT1n
OUT2p
OUT2n
OUT3p
OUT3n
EGND
EGND
EGND
GND
NC
GND
NC
C386 .1U/10V_4
C381 .1U/10V_4
C_INT_DP_AUXP
C_INT_DP_AUXN
R297*0_4
+3V_DP
SI
56
55
24
23
OUT_DP_TXP0
22
OUT_DP_TXN0
21
20
OUT_DP_TXP1
19
OUT_DP_TXN1
18
17
OUT_DP_TXP2
16
OUT_DP_TXN2
15
14
OUT_DP_TXP3
13
OUT_DP_TXN3
54
53
52
INT_DP_HPD
CAD_SNK
GPP_D1 <10>
TP63
INT_DP_AUXP <2>
INT_DP_AUXN <2>
GPP_D1
C374.1U/10V_4
C360.1U/10V_4
C356.1U/10V_4
C344.1U/10V_4
C335.1U/10V_4
C304.1U/10V_4
INT_DP_HPD_Q <2>
C_OUT_DP_TXP0
C_OUT_DP_TXN0
C_OUT_DP_TXP1
C_OUT_DP_TXN1
C_OUT_DP_TXP2
C_OUT_DP_TXN2
R207 *10K_2
C_OUT_DP_TXP0
C_OUT_DP_TXN0
C_OUT_DP_TXP1
C_OUT_DP_TXN1
C_OUT_DP_TXP2
C_OUT_DP_TXN2
C_OUT_DP_TXP3
C_OUT_DP_TXN3
CN15
1
MINI DISPLAY PORT
GND
3
L0+
5
L0-
7
GND
9
L1+
11
L1-
13
GND
15
L2+
17
L2-
19
GND
SHELL121SHELL222SHELL323SHELL4
24
HPD
Config1
Config2
GND
L3+
L3-
GND
AUX_CH+
AUX_CHDP_PWR
MAR21-20K5200
2
INT_DP_HPD
4
CAD_SNK
6
R457 5.1M_4
8
10
12
14
16
18
20
+3V_HDMI
R476 100K/F_4
C_OUT_DP_TXP3
C_OUT_DP_TXN3
C_INT_DP_AUXP
C_INT_DP_AUXN
C475
10U/6.3V_8
R554 *0_6/S
+3V_DPL
C468
.1U/10V_4
R464 1M/F_4
12
F2 FUSE1.1A8V_POLY
1.1A/6V
+3V_DP+3V
SI
+3V_DP
C_INT_DP_AUXN
C_INT_DP_AUXP
for intel recommend
+3V_DPL
R450
100K/F_4
R454
100K/F_4
R280
R279
*4.7K_4
A A
5
*4.7K_4
R351
*4.7K_4
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
Re-driver RS8330B
Re-driver RS8330B
Re-driver RS8330B
1
21 41Tuesday, May 26, 2015
21 41Tuesday, May 26, 2015
21 41Tuesday, May 26, 2015
1A
1A
1A
5
U12
R298
4.3K/F_4
6
IN_D0+
7
IN_D0-
4
IN_D1+
5
IN_D1-
1
IN_D2+
2
IN_D2-
9
IN_CLK+
10
IN_CLK-
38
SCL_SRC
39
SDA_SRC
3
HPD_SRC
36
PD#
8
I2C_STL_EN
16
PRE
34
ISET
14
DDCBUF/SDA_CTL
13
DCIN_EN/SCL_STL
17
EQ/I2C_ADDR0
23
CFG/I2C_ADDR1
18
REXT
PS8201A
HDMI_HPD
MAINON<25,30,34,35,36,37>
IN_D0<2>
IN_D0#<2>
IN_D1<2>
IN_D1#<2>
IN_D2<2>
IN_D2#<2>
SDVO_CLK<2>
SDVO_DATA<2>
HDMI_HPD_CON<2>
+3V
+3V
IN_CLK<2>
IN_CLK#<2>
R358 *10K/F_4
R339 2.2K_4
SDVO_CLK
SDVO_DATA
R344 2.2K_4
D D
+3V_HDMI
C C
B B
C368 0.1U/10V_4
C367 0.1U/10V_4
C370 0.1U/10V_4
C369 0.1U/10V_4
C372 0.1U/10V_4
C371 0.1U/10V_4
C366 0.1U/10V_4
C365 0.1U/10V_4
HDMI_HPD_DC
TP78
PV
HDMI_HPD_DC
IN_D0_C
IN_D0#_C
IN_D1_C
IN_D1#_C
IN_D2_C
IN_D2#_C
IN_CLK_C
IN_CLK#_C
HDMI_PD#
PRE
ISET
DDCBUF
DCIN_EN
EQ
CFG
4
OUT_D0+
OUT_D0-
OUT_D1+
OUT_D1-
OUT_D2+
OUT_D2-
OUT_CLK+
OUT_CLK-
SCL_SINK
SDA_SINK
HPD_SINK
VDD33[1]
VDD33[2]
VDDTX15[1]
VDDTX15[2]
VDDRX15[1]
VDDRX15[2]
VDDTA15[1]
GND1]
GND[2]
PAD(GND1)
PAD(GND2)
PAD(GND3)
PAD(GND4)
PAD(GND5)
PAD(GND6)
PAD(GND7)
PAD(GND8)
PAD(GND9)
PAD(GND10)
R266
20K/F_4
PV
R578 0_4
25
24
27
26
30
29
22
21
32
33
28
11
37
20
31
12
40
19
15
35
41
42
43
44
45
46
47
48
49
50
R346
*100K_4
C375
*1U/6.3V_4
TX0_HDMI+
TX0_HDMI-
TX1_HDMI+
TX1_HDMI-
TX2_HDMI+
TX2_HDMI-
TXC_HDMI+
TXC_HDMI-
HDMI_SCLK
HDMI_SDATA
HDMI_HPD
+3V_HDMI
+1.5V_CS
+3V
+3VS5
PV
R347 *0_6
R581 0_6
C361
1U/6.3V_4
TX2_HDMI+
TX1_HDMI+
TX0_HDMI+
TXC_HDMI+
+5V_HDMIC
U15
5
IN
4
IN
3
ON/OFF
IC(5P) G5243AT11U
3
EMI Solution
R336 120/F_4
R370 120/F_4
R355 120/F_4
R374 120/F_4
2
3
1
D10
BAT54A-7-F
C396 0.1U/10V_4
1
OUT
2
GND
TX2_HDMITX1_HDMITX0_HDMITXC_HDMI-
R399 2.2k_4
R393 2.2k_4
C405 *10P/50V_4
C410 *10P/50V_4
F1
+5V
C387
0.1U/10V_4
FUSE1A6V_POLY
*Clamp-Diode
12
HDMI_HPD
TX2_HDMI+
TX2_HDMITX1_HDMI+
TX1_HDMITX0_HDMI+
TX0_HDMI-
TXC_HDMI+
TXC_HDMI-
HDMI_SCLK
HDMI_SDATA
+5V_HDMIC
C417
1
3
4
6
7
9
10
12
15
16
18
19
12
HDMI CONN
NM3 type
footprint check OK
CN14
D2+
D2D1+
D1D0+
D0-
CK+
CK-
DDC CLK
DDC DATA
+5V
HP DET
+3V_HDMI<21>
2
SHELL1
SHELL2
SHELL3
SHELL4
D2 Shield
D1 Shield
D0 Shield
CK Shield
GND
CE Remote
+1.5V<35>
+3V<2,4,10,11,12,13,14,15,16,20,21,23,25,26,27,29,30,31,37,38>
1
20
21
22
23
2
5
8
11
17
13
14
NC
+1.5V_CS+3V_HDMI +1.5V
22
+3V_HDMI +3V_HDMI
C342
C349
0.01U/50V_4
R324
R312
R320
*4.7K_4
*4.7K_4
PRE
ISET
DDCBUF
DCIN_EN
EQ
CFG
A A
R305
R321
*4.7K_4
*4.7K_4
5
*4.7K_4
R325
*4.7K_4
R335
*4.7K_4
R308
*4.7K_4
R309
*4.7K_4
R259
*4.7K_4
0.1U/10V_4
4
+1.5V_CS
C302
0.1U/10V_4
C298
0.1U/10V_4
C355
0.1U/10V_4
C348
0.1U/10V_4
C305
0.01U/50V_4
3
C354
0.01U/50V_4
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
HDMI
HDMI
HDMI
22 41Tuesday, May 26, 2015
22 41Tuesday, May 26, 2015
1
22 41Tuesday, May 26, 2015
1A
1A
1A
5
4
3
2
1
2
+5V
C140
1uF/10V_4
AGND
HPOUT_R <24>
HPOUT_L <24>
C244
2.2U/6.3V_4
C516 1000P/50V_4
C497 1000P/50V_4
C82 1000P/50V_4
C83 1000P/50V_4
C243
0.1U/16V_4
R_SPK+_R
R_SPK-_R
L_SPK-_R
L_SPK+_R
SENSE_A <24>
To the HP amp
+1.8V
NB5
NB5
NB5
23
CN20
L_SPK+_R
L_SPK-_R
R_SPK-_R
R_SPK+_R
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
AUDIO CODEC CX7501
AUDIO CODEC CX7501
AUDIO CODEC CX7501
2
1
Right Speaker CONN
CN18
2
1
Left Speaker CONN
1
23 41Tuesday, May 26, 2015
23 41Tuesday, May 26, 2015
23 41Tuesday, May 26, 2015
1A
1A
1A
+1.8V
R200 *0_4/S
C248
+3V
D D
R227 *0_4/S
set the DMIC/GPIO/EAPD level
+3V
connect with PCH HDA power
C253
C264 *1000P/50V_4
C256 *22P/50V_4
ACZ_RST#_AUDIO<14,23>
BIT_CLK_AUDIO<14>
ACZ_SYNC_AUDIO<14>
C C
MUTE_LED_CNTL<27>
TO Digital MIC
B B
DIGITAL_CLK<20>
DIGITAL_D1<20>
ACZ_SDIN0<14>
ACZ_SDOUT_AUDIO<14>
DIGITAL_CLK DMIC_CLK_R
DIGITAL_D1 DMIC0
HP_EAPD<24>
R230 *0_4/S
R206 0_4
R208 0_4
R217 33_4
R215 0_4
TP56
R225 *0_4/S
R228 33_4
R250 0_4
+3V
+5V_AVDD
Close to PIN34
+3V
+5V
R229
100K/F_4
21
C241
0.1U/16V_4
HP_EAPD
21
C233
*0.01U/25V_4
R214
*10K_4
check value
R158 10K_4
R186
10K_4
conexant recommand conexant recommand
ACZ_RST#_AUDIO<14,23>
VOLMUTE#<30>
A A
AMP_BEEP AMP_BEEP_L
Check layout
mount location
D5 *MEK500V-40
D6 MEK500V-40
5
L18 *0_8/S
C263
10U/6.3V_4
ACZ_SPKR <11,14>
4
0.47u/6.3V_4
HD_SDIN0
RECORD_MUTE_LED_CNTRL
AMP_BEEP
MUTE_LED_CNTL_R2
R226 10K_4
AGND
C246
4.7U/6.3V_4
C252
4.7U/6.3V_4
C185
1uF/10V_4
PVDD5
2.2U/6.3V_4
C265
2.2U/6.3V_4
C262
1uF/10V_4
LDO_1V2
U7
2
RESET#
48
HDA_BCLK
49
HDA_SYNC
50
HDA_SDI
1
HDA_SDO
7
SPKR MUTE/GPIO1
44
PC_BEEP
6
MUSIC REQ/SPDIF/GPIO0
10
DMIC_CLK1/GPIO2
8
DMIC_DAT1/GPIO3
12
DMIC_CLK2/GPIO4
13
DMIC_DAT2/GPIO5
4
TEST1
5
TEST2
11
EAPD
+5V_AVDD
C255
0.1U/16V_4
ACZ_SDIN0
ACZ_SDOUT_AUDIO
ACZ_SYNC_AUDIO
BIT_CLK_AUDIO
C249
0.1U/16V_4
C261
0.1U/16V_4
3
47
LDO_12
HDA_VDDIO
CX7501
CX7501-11Z
SPK_LEFT+14SPK_LEFT-16SPK_RIGHT-17SPK_RIGHT+
AVDD5
PVDD5_L15PVDD5_R
34
18
C259
0.1U/16V_4
EC15 *33P/50V_4
EC17 *10P/50V_4
EC14 *10P/50V_4
EC13 *33P/50V_4
46
9
DVDD_IO
19
VDD18
45
LDO_AVDD
EP
51
3
+5V_AVDD
32
33
MICBIASE
VREFP
MICBIASB
VREF_DAC
PORTM_MONO
PORTF_R
PORTF_L
PORTE_R
PORTE_L
PORTB_R
PORTB_L
PORTD_B_MIC
PORTD_A_MIC
PORTA_R
PORTA_L
CP_VDD18
CP_VNEG
CP_VPOS
CP_FLYN
CP_FLYP
R_SPK+
R_SPKL_SPKL_SPK+
JSENSE
HGNDB
HGNDA
C161
0.1U/16V_4
AGND
C245 1uF/10V_4
C184 1uF/10V_4
37
38
43
SENSE_A_1
27
42
41
29
28
40
39
36
35
31
30
26
25
20
23
24
22
21
R506 0_8
R487 0_8
R534 0_8
R542 0_8
CAP-
CAP+
HPOUT_R_R
HPOUT_L_R
AGND
R180 5.11K/F_4
R160 39.2K/F_4
PORTD_B
EXT_MIC_L
HGNDB
2.2U/6.3V_4
C240
R_SPK+_R
R_SPK-_R
L_SPK-_R
L_SPK+_R
L12 *0_4/S
C214 2.2U/6.3V_4
R139 0_4
R146 0_4
C209
2.2U/6.3V_4
AGND
AGND
+1.8V
Close to codec
EXT_MIC_L <24>
To Audio Jack MIC
HGNDB <24>
AGND
HPOUT_R
HPOUT_L
C230
2.2U/6.3V_4
EC3 *1000P/50V_4
EC12 *1000P/50V_4
EC5 *1000P/50V_4
EC6 *1000P/50V_4
EC11 *1000P/50V_4
Close to CODEC
place to under codec
R34 *0_6/S
R33 *0_6/S
1
2
3
4
5
6
7
8
Head Phone out
A A
HPOUT_L<23>
HPOUT_R<23>
HPOUT_L
AGND
HPOUT_R
C182 2.2U/6.3V_4
C181 2.2U/6.3V_4
C180 2.2U/6.3V_4
C179 2.2U/6.3V_4
Placement close the CODEC
B B
HP_EAPD<23>
+5V_AMP
HPOUT_L_C
HPOUT_R_C
R124 0_4
C155 1uF/10V_4
20
U4
VDD
1
LEFTINML-
2
LEFTINP+
3
HPA022642RTJR
GND
4
RIGHTINP+
5
RIGHTINM-
TEST27TEST18GND9GND
SD#
6
10
HPA022642RTJR
AMP_CLK
AMP_DAT
19
+5V_AMP +5V
L11 *0_6/S
AGND
C137 1U/10V_4
C130 1U/10V_4
18
16
GND
17
CPP
AGND21AGND22AGND23AGND24AGND
CPM
HPRIGHT
25
AGNDAGND
CPVSS
HPLEFT
CPVSS
GND
VDD
AGND
AGND
AGND
AGND
AGND
HPA022642RTJR
15
14
13
12
11
30
29
28
27
26
LINEOUT_L
LINEOUT_R
+5V_AMP
R122
10K_4
AGND
+5V_AMP
AGND
C119
1uF/10V_4
AGND SHIELD
AGND SHIELD
AGND SHIELD
LINEOUT_R
LINEOUT_L
R112 30.1/F_4
R113 30.1/F_4
C120
*100P/50V_4
AGND AGND
LINEOUT_R_C
LINEOUT_L_C
C118
*100P/50V_4
24
FANAudio combo JACK & Volume up/down Button
SW1
VOLUME_UP
C C
VOLUME_UP<30>
GPP_D21<10>
R99 *0_4/S
R97 *0_4
R98 1K/F_4
C81
.1U/10V_4
1 2
Volume_UP_R
Volume up/down Buttons
3
Volume_DOWN_L
SENSE_A
LINEOUT_L_C
LINEOUT_R_C
C183 2.2U/6.3V_4
VOLUME_DOWN<30>
GPP_D22<10>
VOLUME_DOWN
PV
HOME_BUTTON_INT#<30>
GPP_D0<10>
D D
R100 *0_4/S
R102 *0_4
R223 *0_4/S
R261 *0_4
R101 1K/F_4
C84
.1U/10V_4
1 2
R252 1K/F_4
C274
.1U/10V_4
1 2
SENSE_A<23>
AUDIO COMBO JACK
EXT_MIC_L<23>
HGNDB<23>
1
2
EXT_MIC_L
HGNDB
1 2
R147 100/F_4
2 1
4 3
7
NTC325-AA1J-A160T
2 1
4 3
7
NTC325-AA1J-A160T
2 1
4 3
7
NTC325-AA1J-A160T
Audio Jack_6P
6
AGND
AGND
C138 *1000P/50V_4
5
4
3
2
1
AGND
4
SW3
SW4
56
FAN1_PWM<30>
56
56
6
5
4
3
2
7
1
8
CN7
5
FAN1SIG<30>
FAN1_PWM
FAN1SIG
+5V
C529 4.7U/6.3VS_6
C530 0.1U/10V_4
C531 *220P/50V_4
C532 *220P/50V_4
6
FAN CONN
1
2
3
4
CN17
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
AUDIO AMP
AUDIO AMP
AUDIO AMP
+3V<2,4,10,11,12,13,14,15,16,20,21,22,23,25,26,27,29,30,31,37,38>
+5V<22,23,27,37,38>
+5VS5<4,25,33,34,35,36,37>
1A
1A
24 41Tuesday, May 26, 2015
24 41Tuesday, May 26, 2015
24 41Tuesday, May 26, 2015
8
1A
5
4
3
2
1
Right side USB 2.0/3.0 Combo
PV ADD R554/R555/R556 10k for USB 3.0 PU
VC1 *AVLC 5S_4
C167 470P/50V_4
D D
+5VS5
R520 *10K_4
MAINON_R
C228
220U/6.3V/ESR35_3528
+5V_USBP0
+
470P/50V_4
C235
+5VS5
C237 4.7U/6.3V_6
C210 0.1U/10V_4
80 mils (Iout=2A)
USB_STATE1<30>
R141 100K/F_4
USB_SEL1<30>
+5VS5
12
14
17
R189 20K/F_4
R190 48.7K/F_4
16
15
13
SI modify R149 to 48.7k
for USB 3.0 spec 0.9A
1
9
4
U5
IN
OUT
GND
/STATUS
PADGND
ILIM_HI
ILIMI_LO
ILIM_SEL
/FAULT
TPS2546
5
EN
6
CTL1
7
CTL2
8
CTL3
11
DM_IN
10
DP_IN
2
DM_OUT
3
DP_OUT
high active
USBPW_ON
USBP0-_CHA
USBP0+_CHA
USBP1USBP1+
R135 10K_4
USBP1- <12>
USBP1+ <12>
+5VS5
USBPW_ON <30>
MAINON <22,25,30,34,35,36,37>
USB_CTRL2 <30>
+5VS5
USBP0-_CHA
USBP0+_CHA
USB30_RX1-<12>
USB30_RX1+<12>
USB30_TX1-_DC
USB30_TX1+_DC
HOST
USB30_TX1-<12>
USB30_TX1+<12>
L9
1
2
4 3
MCM2012B900GBE
L7
1
4 3
*MCM2012B900GBE
USBP0-_C
USBP0+_C
2
C142 0.1U/10V_4
C147 0.1U/10V_4
C165 0.1U/10V_4
C166 1000P/50V_4R136 10K_4
L10
1
2
4 3
*MCM2012B900GBE
+5V_USBP0
USBP0-_C
USBP0+_C
USB30_RX1USB30_RX1+
USB30_TX1-_DC
USB30_TX1+_DC
USB30_TX1-_DC
USB30_TX1+_DC
1.5A
25
USB 3.0
CN8
USB3.0 CONN
1
VBUS
1
2
D-
2
3
D+
3
4
4
GND
5
SSRX-
5
6
6
SSRX+
7
7
GND
8
8
SSTX-
9
SSTX+
9
11111010131312
12
DFHS09FR595
ub3-tnbnrac70047009-9p
Y11 type
L17
1
2
4 3
*MCM2012B900GBE
2
VC3 *AVLC 5S_4
C283 470P/50V_4
C295 0.1U/10V_4
C294 1000P/50V_4
+5V_USBP5
USBP5-_C
USBP5+_C
USB30_RX2USB30_RX2+
USB30_TX2+_DC
USB30_TX2-_DC
USB30_TX2+_DC
VC4 *AVLC 5S_4
C489 470P/50V_4
C481 0.1U/10V_4
C480 1000P/50V_4
+5V_USBP1
USBP1-_C
USBP1+_C
USB30_RX3USB30_RX3+
USB30_TX3+_DC
USB 3.0
CN10
USB3.0 CONN
1.5A
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
DFHS09FR595
ub3-tnbnrac70047009-9p
USB 3.0
CN16
USB3.0 CONN
1.5A
1
VBUS
1
2
D-
2
3
D+
3
4
4
GND
5
SSRX-
5
6
6
SSRX+
7
7
GND
8
8
SSTX-
9
SSTX+
9
DFHS09FR597
ub3-tnbnrac70047009-9p
12
VBUS
DD+
GND
SSRXSSRX+
GND
SSTXSSTX+
12
11111010131312
11111010131312
C338 4.7U/6.3V_6
USB_STATE2<30>
R255 100K/F_4
USB_SEL2<30>
C506 4.7U/6.3V_6
C494 0.1U/10V_4
80 mils (Iout=2A)
R484 20K/F_4
R483 48.7K/F_4
C337 0.1U/10V_4
80 mils (Iout=2A)
C C
*2P DIP JUMPER
*2P DIP JUMPER
SI 2
1
2
CN22
DFHD02MS114
c18301-10201-l-2p-l
1
2
CN23
DFHD02MS114
c18301-10201-l-2p-l
Intel UART
UART2_RXD
UART2_TXD
B B
C476
220U/6.3V/ESR35_3528
C291
220U/6.3V/ESR35_3528
+5V_USBP1
+
470P/50V_4
+5V_USBP5
+
470P/50V_4
C515
+5VS5
C285
+5VS5
USB_STATE3<30>
R519 100K/F_4
USB_SEL3<30>
+5VS5
U9
1
IN
12
OUT
14
GND
9
/STATUS
17
PADGND
R310 20K/F_4
R283 48.7K/F_4
+5VS5
SI modify R401 to 48.7k
for USB 3.0 spec 0.9A
16
ILIM_HI
15
ILIMI_LO
4
ILIM_SEL
13
/FAULT
TPS2546
SI modify R243 to 48.7k
for USB 3.0 spec 0.9A
U23
1
IN
12
OUT
14
GND
9
/STATUS
17
16
15
13
4
PADGND
ILIM_HI
ILIMI_LO
ILIM_SEL
/FAULT
TPS2546
DM_IN
DP_IN
DM_OUT
DP_OUT
high active
5
EN
6
CTL1
7
USB_CTRL2
CTL2
8
CTL3
11
USBP5-_CHA
DM_IN
10
USBP5+_CHA
DP_IN
2
DM_OUT
DP_OUT
USBP2-
3
USBP2+
high active
USBP1+_CN15 USBP1+_UART
R513 *0_2
USBP1-_CN15 USBP1-_UART
R512 *0_2 R524 *0_2
CTL1
CTL2
CTL3
UART2_RXD<14>
UART2_TXD<14>
5
USBPW_ON
EN
6
7
USB_CTRL2
8
11
USBP1-_CHA
10
USBP1+_CHA
2
3
MAINON_R
USBP3-_CN15
USBP3+_CN15
UART2_RXD
UART2_TXD
R521 10K_4
R528 0_2
R527 0_2
R254 10K_4
R518 *0_4/S
USBP2- <12>
USBP2+ <12>
U25
1
D+
2
D-
3
GND
4
HSD-
5
HSD+
*FSUSB42UMX
MAINON <22,25,30,34,35,36,37>
+5VS5
USBP3- <12>
USBP3+ <12>
MAINON <22,25,30,34,35,36,37>
+5VS5
6
USBP3-_UART
HSD2-
7
USBP3+_UART
HSD2+
8
OE
9
VCC
10
SEL
C526
*0.1U/10V_4
USB30_RX3-<12>
USB30_RX3+<12>
USB30_TX3-<12>
USB30_TX3+<12>
USBP1-_CHA
USBP1+_CHA
R525 *0_2
R523 *0_2
R517 *100K/F_4
R509 0_2
R510 0_2
C501 0.1U/10V_4
C495 0.1U/10V_4
L16
1
USBP5-_CHA
USBP5+_CHA
USB30_RX2-<12>
USB30_RX2+<12>
USB30_TX2-_DC USB30_TX2-_DC
USB30_TX2+_DC
HOST
USB30_TX2-<12>
USB30_TX2+<12>
USBP3USBP3+
+3V
GPP_A16 <14>
+3V
USBP1-_CN15
USBP1+_CN15
2
USBP5-_C
4 3
USBP5+_CUSBPW_ON
MCM2012B900GBE
L15
1
2
4 3
*MCM2012B900GBE
C269 0.1U/10V_4
C272 0.1U/10V_4
Left side USB 2.0/3.0 Combo
L23
1
2
USBP1-_C
4 3
USBP1+_C
MCM2012B900GBE
L24 *MCM2012B900GBE
4 3
1
2
USB30_TX3-_DC USB30_TX3-_DC
USB30_TX3+_DC
4 3
1
L22 *MCM2012B900GBE
A A
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
+3VS5<4,15,16,22,28,30,31,33,35,36,37>
+5VS5<4,33,34,35,36,37>
+3VPCU<6,13,15,27,28,30,31,32,33,41>
5
4
3
2
NB5
NB5
NB5
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
USB20/30
USB20/30
USB20/30
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
25 41Tuesday, May 26, 2015
25 41Tuesday, May 26, 2015
25 41Tuesday, May 26, 2015
1A
1A
1A
A
B
C
D
E
CN6
26
AS0BC56-S15BP-7H
NGFF
1
CONFIG3/GND
3
GND
5
PERN3
7
PERP3
9
GND
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
ngff-nfsm0-s6710-tp20-75p-km
DAS/DSS#(O)(OD)
PETN3
PETP3
GND
PERN2
PERP2
CONFIG0/GND
PETN2
PETP2
GND
PERN1
PERP1
GND
PETN1
PETP1
GND
SATA RX+/PERN0
SATA RX-/PERP0
GND
SATA TX-/PETN0
SATA TX+/PETP0
GND
REFCLKN
REFCLKP
GND
KEY
KEY
KEY
KEY
N/A
PEDET(NC-PCIE/GND-SATA)
GND
GND
GND
PEWAKE#/NC
SATA_RXP0
SATA_RXN0
Q3
SATA_RXN3
SATA_RXP3
SATA_TXP3
SATA_RXN2
SATA_RXP2
SATA_TXP2
SATA_RXN1
SATA_RXP1
SATA_TXP1
SATA_TXN0
SATA_TXP0
3
2
1
C90 0.22U/6.3V_2
C91 0.22U/6.3V_2
C92 0.22U/6.3V_2
C93 0.22U/6.3V_2
C94 0.22U/6.3V_2
C95 0.22U/6.3V_2
R108 *0_2/S
R109 *0_2/S
C96 0.22U/6.3V_2
C105 0.22U/6.3V_2
R133*0_2
+3V
SATA_TXN3_CSATA_TXN3
SATA_TXP3_C
SATA_TXN2_CSATA_TXN2
SATA_TXP2_C
SATA_TXN1_CSATA_TXN1
SATA_TXP1_C
SATA_RXP0_C
SATA_RXN0_C
SATA_TXN0_C
SATA_TXP0_C
R125
100K_2
PEDET
PEDET
PV
SATA_RXN3<12>
4 4
3 3
GPIO34<12>
GPIO35<12>
GPIO36<12>
GPIO34
GPIO35
GPIO36
SATA_RXP3<12>
SATA_TXN3<12>
SATA_TXP3<12>
SATA_RXN2<12>
SATA_RXP2<12>
SATA_TXN2<12>
SATA_TXP2<12>
SATA_RXN1<12>
SATA_RXP1<12>
SATA_TXN1<12>
SATA_TXP1<12>
SATA_RXP0<12>
SATA_RXN0<12>
SATA_TXN0<12>
SATA_TXP0<12>
CLK_PCIE_SSDN<13>
CLK_PCIE_SSDP<13>
R12*0_2
R130_2
R132*0_2
DMG1012T-7
del SATA LED
3.3Vaux
3.3Vaux
3.3Vaux
3.3Vaux
3.3Vaux
3.3Vaux
DEVSLP
PERST#
CLKREQ#
MFGDAT
MFGCLK
SUSCLK
3.3Vaux
3.3Vaux
3.3Vaux
KEY
KEY
KEY
KEY
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
R18 *0_4
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
EC22
470p/50V/X7R_4
R10 *0_8/S
TP4
R19 *0_4/S
R20 *0_4/S
R21 *0_4
R11 *0_8/S
EC30
10U/6.3V_6
C136
.01U/25V_4
+3V
C144
0.1U/25V_4
DEVSLP1 <12>
PCIE_CLKREQ_SSD# <13>
+3V
EC4
10U/6.3V_6
C126
4.7U/6.3V_6
PLTRST# <4,16,26,28,30>
PCH_SUSCLK <13,28>
TPM (2.0)
2 2
+3V
C266
0.1U/10V_4
+3V
+3V
C267
0.1U/10V_4
C236
R179 4.7K/F_4
TPM_PP
No install for SLB9635
install for SLB9656
0.1U/10V_4
C251
0.1U/10V_4
R209*0_4
U6
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
28
NC
27
SERIRQ
9
TESTBI/LRESET#
15
TEST
1
NC_1
3
NC_3
12
NC_4
SLB9665TT2.0
R203
*4.7K/F_4
R192
*0_4/S
LAD0
LAD1
LAD2
LAD3
LFRAME#
CLK_PCI_TPM<10>
PLTRST#<4,16,26,28,30>
R195
*33_4
C242
*10P/50V_4
A
SERIRQ<10,30>
CLK_PCI_TPM
FOR
EMI
CLK_PCI_TPM
PLTRST#
SERIRQ
TPM_TESTB1
LAD0<10,28,30>
LAD1<10,28,30>
LAD2<10,28,30>
LAD3<10,28,30>
LFRAME#<10,28,30>
+3V
1 1
TPM_PP
10
VDD_2
19
VDD_3
24
VDD_4
5
VDD_1
4
GND_1
11
GND_2
18
GND_3
25
GND_4
6
GPIO
7
PP
8
TESTI
2
NC_2
13
NC_5
14
NC_6
TPM_TESTB1 PLTRST#
B
Card Reader CON
GPP_D11<14>
PCIE_TXP5_CARD<12>
PCIE_TXN5_CARD<12>
PCIE_RXP5_CARD<12>
PCIE_RXN5_CARD<12>
CLK_PCIE_CRP<13>
CLK_PCIE_CRN<13>
PLTRST#<4,16,26,28,30>
PCIE_CLKREQ_CR#<13>
PCIE_WAKE#<4,28,30>
C
R508*0_4
R515*0_4/S
+3V
CR CONN
C525
*0.1U/10V_4
D
CN19
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
+3V<2,4,10,11,12,13,14,15,16,20,21,22,23,25,27,29,30,31,37,38>
+5V<22,23,24,27,37,38>
+3VPCU<6,13,15,27,28,30,31,32,33,41>
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
NGFF HDD/TPM/CR
NGFF HDD/TPM/CR
NGFF HDD/TPM/CR
26 41Tuesday, May 26, 2015
26 41Tuesday, May 26, 2015
E
26 41Tuesday, May 26, 2015
1A
1A
1A
A
Power Botton
SW2
5 6
4 4
NTC325-AA1J-A160T
+3V_RTC
2
VDD
S
21
43
7
1
N
GND
3
R104
1K_4
OUT
HE1
APX9132H AI-TRG
NBSWON1#
C87
0.1U/10V_4
LIDEC#
SI Add for solve leakage
NBSWON1# <30>
LID_EC# <31>
+3VPCU
2
3
2N7002EPT_SC70
DEEP_PWRLED#
Q13
1
Q_LID_EC# <29,30>
B
PWR LED
3P WHITE LED
C86 *AVLC 5S
Q_LID_EC#
LED1
21
DEEP_PWRLED#
C97
*2.2U/6.3V_6
PWR_LED#
+3VPCU
C85
0.1U/10V_4
R105 200/F_4
Change from 360ohn to 200ohm for ID
+3VPCU
R103
10K/F_4
2
Q1
1 3
DDTC144EUA-7-F
PWR_LED# <30>
C
D
+3VSUS
E
+3V_TP
27
Q22A 2N7002KDW
SMB_RUN_CLK<10,16>
+3V +3VSUS
SMB_RUN_DAT<10,16>
34
Dual
5
2
61
Q22B 2N7002KDW
R348 4.7K_2
R349 4.7K_2
TP_SMB_CLK
TP_SMB_DATA
+3V_TP
SUPPORT S3
R318 4.7K_2
R319 4.7K_2
TPDATA<30>
TPCLK<30>
R345 *0_6/S
TPDATA
TPCLK
R331 *0_4/S
R332 *0_4/S
C352 10P/50V_2
C353 10P/50V_2
+3V_TP
TPDATA-1
TPCLK-1LID_EC#
TPDATA-1
TPCLK-1
TP_SMB_CLK
TP_SMB_DATA
C336 0.1U/10V_4
CN13
1
1
8
2
2
7
3
3
4
4
5
5
6
6
TP_CONN_6P
PV modify
MY5
KEYBOARD Con.
MY[0..17]<30>
MX[0..7]<30>
3 3
MUTE_LED_CNTL<23>
CAPSLED#<30>
KB_LED<30>
2 2
MY[0..17]
MX[0..7]
MUTE_LED_CNTL_R1
3
2
Q15
R299
10K/F_4
2N7002K
1
R294 200/F_6
R293 200/F_6
12
+3V
MX1
MX7
MX6
MY9
MX4
MX5
MY0
MX2
MX3
MY5
MY1
MX0
MY2
MY4
MY7
MY8
MY6
MY3
MY12
MY13
MY14
MY11
MY10
MY15
12
MUTE_LED_CNTL_RMUTE_LED_CNTL_R1
CAPSLED#_R
LED_PW
12
R292 200/F_6
CN11
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
KB CONN
DFFC32FR041
51586-03241-001-32p-l
KEYBOARD PULL-UP
C321 220P/50V_4
MY6
C314 220P/50V_4
MY3
C331 220P/50V_4
MY7
C316 220P/50V_2
MY8
C315 220P/50V_2
MY9
C327 220P/50V_4
MY10
C311 220P/50V_4
MY11
C312 220P/50V_4
MY1
C320 220P/50V_2
MY2
C318 220P/50V_4
MY4
C317 220P/50V_2
MY0
C324 220P/50V_4
MX4
C326 220P/50V_4
MX6
C328 220P/50V_4
MX3
C322 220P/50V_4
MX2
C323 220P/50V_4
MX7
C307 220P/50V_4
MX0
C319 220P/50V_4
MX5
C325 220P/50V_4
MX1
C308 220P/50V_4
MY12
C330 220P/50V_4
MY13
C329 220P/50V_2
MY14
C313 220P/50V_4
MY15
C310 220P/50V_4
SI
KB backlight
+VIN
R296
1M_4
3
R295
2
KB_LED_EN#<30>
1 1
A
Q17
2N7002k
2M_4
1
Q16
AO3404
B
+5V
3
2
1
C332
0.1U/10V_4
+5V_LED_KBLIGHT
C333
0.1U/10V_4
KB_LIGHT_CONN
CN12
1
2
3
4
+3V<2,4,10,11,12,13,14,15,16,20,21,22,23,25,26,29,30,31,37,38>
+5V<22,23,24,37,38>
+3VPCU<6,13,15,28,30,31,32,33,41>
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
C
D
Date: Sheet of
KB/PB/TP
KB/PB/TP
KB/PB/TP
27 41Tuesday, May 26, 2015
27 41Tuesday, May 26, 2015
E
27 41Tuesday, May 26, 2015
1A
1A
1A
A
B
C
D
E
WLAN/BT
CN9
NGFF
1
4 4
PCIE_TXP6_WLAN<12>
PCIE_TXN6_WLAN<12>
PCIE_RXP6_WLAN<12>
PCIE_RXN6_WLAN<12>
CLK_PCIE_WLANP<13>
CLK_PCIE_WLANN<13>
PCIE_CLKREQ_WLAN#<13>
3 3
CLK_24M_DEBUG<10>
LFRAME#<10,26,30>
USBP7+<12>
USBP7-<12>
R235 *0_4/S
LFRAME#
REQ_WLAN#
MINICAR_PME# INT_RF_OFF#
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
GND
USB_D+
USB_DGND
SDIO CLK(O)
SDIO CMDIO)
SDIO DAT0(IO)
SDIO DAT1(IO)
SDIO DAT2(IO)
SDIO DAT3(IO)
SDIO Wake(I)
SDIO Reset
KEY1
KEY2
KEY3
KEY4
GND
PETp0
PETn0
GND
PERp0
PERn0
GND
REFCLKP0
REFCLKN0
GND
CLKREQ0#
PEWake0#
GND
PETp1
PETn1
GND
PERp1
PERn1
GND
Reserved1
Reserved2
GND
Clink RESET
SUSCLK(32KHz)
W_DISABLE2#
W_DISABLE1#
NFC I2C SM DATA
NFC I2C SM CLK
UIM_SWP/PERST1#
UIM_POWER_SNK
UIM_POWER_SRC
GND76GND
WLAN_NGFF CONN (E-Key)
77
3.3Vaux
3.3Vaux
LED#1
PCM_CLK
PCM_SYNC
PCM_IN
PCM_OUT
LED#2
GND
UART Wake
UART Rx
Key 5
Key 6
Key 7
Key 8
UART Tx
UART CTS
UART RTS
CLink DATA
CLink CLK
COEX3
COEX2
COEX1
PERST0#
ALERT#
RESERVED
3.3Vaux
3.3Vaux
+3V_WLAN_P
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
WLAN_LED#
Support Vpro
CL_RST# <10>
CL_DAT <10>
CL_CLK <10>
R243 22_4
PLTRST#
INT_BT_OFF#
LAD0
LAD1
LAD2
LAD3
R271 4.7K_4
R276 *0_4/S
+3V_WLAN_P
R241
10K_4
3
PCH_SUSCLK <13,26>
PLTRST# <4,16,26,30>
LAD0 <10,26,30>
LAD1 <10,26,30>
LAD2 <10,26,30>
LAD3 <10,26,30>
+3V_WLAN_P
2
2N7002EPT_SC70
R242 10K_4
Q11
2N7002EPT_SC70
3
1
Q7
C276
0.1U/10V_4
2
C277
0.1U/10V_4
BT_OFF <14>
+3VSUS
1
R268 *1K_4
R264 100K_4
PV
+3V_WLAN_P
C278
0.1U/10V_4
C275
22U/6.3V_6
C284
*22U/6.3VS_8
Support Vpro
WLAN_VPRO_ON<30>
For EMI Suggestion
CLK_24M_DEBUG
R236 *0_4
C282 *33P/50V_4
2
Support Wake Function(Reserve)
+3VSUS
RF_OFF_PCH <4>
PCIE_WAKE#<4,26,30>
EC_PCIE_WAKE#<30>
R269
10K_4
R270 200K_4
3
Q5
2N7002EPT_SC70
1
+3VS5+3VPCU
C290
*0.1U/10V_4
C287
0.022U/25V_4
Q9 DDTC144EUA-7-F
1
Q6
AO3409
2
24mil
3
+3V_AOCS
+3V_WLAN_P
2
13
Q10 *DDTC144EUA-7-F
MINICAR_PME#
+3V_WLAN_P
2
13
28
+3V_WLAN_P
PV
C286
*0.1U/10V_4
R244 10K/F_4
MINICAR_PME#
Hole
H1
*H-TC315BC236D106P2
1
H10
*H-TC315IC182BC142D142PT
SPAD1
*SPAD-C236
SPAD11
*SPAD-C236
1
1
SPAD2
*SPAD-C236
1
1
1
H12
*H-Y0DX-1
1
H9
*H-TC315IC182BC142D142PT
1
SPAD6
*spad-pike-1
1
1
1
1
H8
*H-C315D142P2
SPAD3
*SPAD-C236
1
SPAD9
*spad-pike-3
1
H14
*H-TC315BC213X217D181P2
2 2
1
SPAD7
*spad-pike-2
1
H6
*H-TC315IC182BC142D142PT
SPAD5
*SPAD-C236
SPAD8
*SPAD-C236
A
H5
*H-TC315IC182BC142D142PT
1
SPAD13
*SPAD-C236
1
1 1
H4
*H-C315D91P2
1
H16
H-TC236BC315D142P2
1
SPAD4
*SPAD-C236
1
H15
*H-C315D161P2
1
B
H3
*H-PIKE-4
H13
*H-Y0DX-2
H2
H-C157D118P2
1
1
H7
*H-PIKE-2
1
1
H11
*H-PIKE-1
1
2
2
C
GND GUARD
PAD5
RFPAD
123
PAD4
RFPAD
123
PAD10
RFPAD
123
PAD8
RFPAD
123
PAD9
RFPAD
123
PAD7
*RFPAD
123
PAD6
*RFPAD
123
PAD11
*RFPAD
123
PAD12
RFPAD
123
D
PAD3
RFPAD
+3VPCU<6,13,15,27,30,31,32,33,41>
123
+3V<2,4,10,11,12,13,14,15,16,20,21,22,23,25,26,27,29,30,31,37,38>
+5V<22,23,24,27,37,38>
PAD1
RFPAD
123
PAD2
*RFPAD
123
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
WLAN/HOLE
WLAN/HOLE
WLAN/HOLE
E
1A
1A
28 41Tuesday, May 26, 2015
28 41Tuesday, May 26, 2015
28 41Tuesday, May 26, 2015
1A
5
20MIL
D D
L20
*BLM15PX181SN1D
L21
*BLM15PX181SN1D
20MIL
C C
+3V_HUB
R511
*1.5K_4
USBP4+
USBP4-<12>
USBP4+<12>
B B
A A
C490
*1000P/50V_4
+3V_HUB
R541
*100K_4
C539
*1U/6.3V_4X
TP42
TP40
TP41
TP37
TP72
AVCC+3V_HUB
C484
*0.1U/10V_4
IT8350_AGND
USBP4USBP4+
PWRSW
KSI0
KSI6
KSI7
GPG6
D13
*RB500V-40
WRST#
Note: Place all capacitors close to IT8350.
+3V_HUB
C535
*0.1U/10V_4
U24
*IT8350E_LQFP-48
11
WRST#
40
FSCE#/GPG3
41
FMOSI/GPG4
42
FMISO/GPG5
44
FSCK/GPG7
37
GPH5/ID5/DM
38
GPH6/ID6/DP
6
PWRSW /GPE4
21
KSI0
20
KSI6
26
KSI7
43
GPG6
FSPI
4
C524
*0.1U/10V_4
+3V_HUB
1
4
16
23
36
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
IT8350E
LQFP-48
USB
GPIO
VSS
5
24
C523
*0.1U/10V_4
7
VSS
VSS
35
10MIL20MIL
+3VPLL
C536
*0.1U/10V_4
VSTBY(PLL)
VCORE
10
C540
*0.1U/10V_4
IT8350_AGND
C538
*0.1U/10V_4
C486
*0.1U/10V_4
(For PLL Power)
33
AVCC
SM BUS
PWM
UART
A/D
SSPI
AVSS
34
L25
*BLM15PX181SN1D
AVCC
SMCLK0/GPB3
SMDAT0/GPB4
SMCLK2/GPF6
SMDAT2/GPF7
SMCLK4/GPE0
SMDAT4/GPE7
PWM4/SMCLK5/GPA4
PWM5/SMDAT5/GPA5
PWM6/SSCK/GPA6
RXD/SIN0/GPB0
TXD/SOUT0/GPB1
ADC1/SMINT0/GPI1
ADC2/SMINT1/GPI2
ADC3/SMINT2/GPI3
ADC4/SMINT3/GPI4
SSCE0#/GPG2
KSO17/SMISO/GPC5
KSO16/SMOSI/GPC3
CLOCK
3
SMCLK0
SMDAT0
SMCLK2
SMDAT2
SMCLK4
SMDAT4
HUB_SENSOR
+3V_HUB
Reserved SMBus channel 0 for debugging & updating FW
Reserved
SMbus channel 4 for connecting the Sensor (G-sensor)
PWM0/GPA0
PWM1/GPA1
47
48
2
3
13
12
15
14
17
19
18
SMCLK0
SMDAT0
SMCLK2
SMDAT2
SMCLK4_HUB
SMDAT4_HUB
Reserved TX/RX for debugging
45
46
27
ADC0/GPI0
28
29
30
31
32
ADC5/GPI5
39
25
22
CK32KE/GPJ7
CK32K/GPJ6
9
8
External crystal is must be item
when USB func. is used !
RXD
TXD
if no use ADC function,
please pull down to GND
SMINTx for sensor interrupt
GPI0
SMINT0
R486 *0_2
SMINT1
R478 *0_2
SMINT2
R467 *0_2
SMINT3
R459 *0_2
GPI5
R460 *0_2
GPG2 can't floating
GPIOG2
GPIOC5
GPIOC3
CK32KE
CK32K
R530 *4.7K_4
R529 *4.7K_4
R540 *4.7K_4
R539 *4.7K_4
R532 4.7K_4
R526 4.7K_4
R536 4.7K_4
Q_LID_EC# <27,30>
*32.768KHZ_10
Y3
C534
*22P/50V_4
TP73
TP74
GYRO_DRDY
GYRO_INT
AE_INT
ACC_INT
TP38
TP39
C533
*27P/50V_4
SI
2
+3V_HUB
R535*0_6/S
TP36
GYRO_DRDY <20>
GYRO_INT <20>
AE_INT <20>
DISABLE KB_EC <30>
+3V_HUB
R516
*100K_4
R514
GPG2 Pull High Enable mirror function.
GPG2 Pull Low Disable mirror function.
*100K_4
GPI0
SMINT0
SMINT1
SMINT2
SMINT3
GPI5
R498 *4.7K_4
R481 *4.7K_4
R475 *4.7K_4
R465 *4.7K_4
R470 *4.7K_4
R471 *4.7K_4
+3V_HUB+3V_CS
Accelerometer Sensor
+3V_HUB
+3V_HUB
SMDAT4
SMCLK4
MBDATA2<30>
MBCLK2<30>
SMCLK4_R
SMDAT4_R
C527
0.1U/10V_4
+3V_HUB
ACC_INT
TP75
R531 0_2
R537 0_2
Q25
4 3
1
2N7002kDW
C541
10U/6.3V_4
PV add for EC request
ISH_GYRO_DRDY<14>
ISH_GYRO_INT<14>
ISH_AE_INT<14>
ISH_ACC_INT<14>
DISABLE KB<14>
To Sensor Hub SMBUS
SMCLK4_HUB SMCLK4_R
ISH_I2C0_SCL<14>
ISH_I2C0_SDA<14>
ISH_I2C0_SCL
ISH_I2C0_SDA
U26
HP3DC2TR
1
Vdd_IO
14
VDD
RESERVED
11
RESERVED
INT1
9
INT2
RESERVED
RESERVED
7
SDO
6
SDA
4
SCL
8
CS
5
SMCLK4
2
6
SMDAT4
R533 *0_2
R522 *0_2
Q26
4 3
1
2N7002kDW
1
Put it on MB side
2
NC
3
NC
10
13
15
16
5
GND
12
GND
SMDAT4
SMCLK4
HUB_SENSOR <30>
SMCLK4 <20>
SMDAT4 <20>
+3V
SMCLK4_R
SMDAT4_R
GYRO_DRDY
GYRO_INT
AE_INT
ACC_INT
DISABLE KB_EC
R485 0_2
R477 0_2
R466 0_2
R453 0_2
R389 0_2
5
2
6
29
SMDAT4_RSMDAT4_HUB
PROJECT : Y0DD
PROJECT : Y0DD
L19 *BLM18BA470SN1D/S
IT8350_AGND
5
4
3
2
NB5
NB5
NB5
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
SENSOR HUB
SENSOR HUB
SENSOR HUB
1
29 41Tuesday, May 26, 2015
29 41Tuesday, May 26, 2015
29 41Tuesday, May 26, 2015
1A
1A
1A
5
+3V +3V_VSTBY
C280 0.1U/10V_4
J5
D10
D D
For DDR Thermal IC/GPU thermal
iAMT
C C
B B
A A
iAMT
USBPW_ON<25>
PCH_SPI1_CLK_R<10>
PCH_SPI1_SO_R<10>
PCH_SPI1_SI_R<10>
PCH_SPI_CS0#_R<10>
S5_ON<33>
5VS5_ON<33>
USB_SEL3<25>
L14 BLM15AG121SN1D
+3V_ECACC
+3V_VSTBY
LAD0<10,26,28>
LAD1<10,26,28>
LAD2<10,26,28>
LAD3<10,26,28>
PLTRST#<4,16,26,28>
CLK_24M_KBC<10>
LFRAME#<10,26,28>
PCIE_WAKE#<4,26,28>
SIO_EXT_SMI#<10>
SIO_EXT_SCI#<14>
Q_LID_EC#<27,29>
DPWROK_EC<4>
SLP_SUS#_EC<4>
DISABLE KB_EC<29>
C201
1U/6.3V_4
C254
0.1U/10V_4
EC_RCIN#<10>
SLP_A#<4,16>
TP54
SERIRQ<10,26>
GPUT_CLK<31>
TP79
TPDATA<27>
TPCLK<27>
SUSB#<4,16>
RSMRST#<4>
MAINON<22,25,34,35,36,37>
GPIO33_EC<11>
R154 15/F_4
R152 15/F_4
R153 15/F_4
R150 15/F_4
MY0<27>
MY1<27>
MY2<27>
MY3<27>
MY4<27>
MY5<27>
MY6<27>
MY7<27>
MY8<27>
MY9<27>
MY10<27>
MY11<27>
MY12<27>
MY13<27>
MY14<27>
MY15<27>
MX0<27>
MX1<27>
MX2<27>
MX3<27>
MX4<27>
MX5<27>
MX6<27>
MX7<27>
IT8987_AGND
L13 *HCB1608KF-181T15/S
C200
1000P/50V_4
L1 *HCB1608KF-181T15/S
5
PLTRST#
CLK_24M_KBC
LFRAME#
PCH_PCIE_WAKE# AC_PRESENT_EC
SERIRQ
SIO_EXT_SMI#
SIO_EXT_SCI#
EC_WRST
GPUT_CLK
Q_LID_EC#
DPWROK_EC
SLP_SUS#_EC
RSMRST#
MAINON
D3 MEK500V-40
DISABLE KB_EC
USBPW_ON
BIOS_SPI_CLK
BIOS_RD#
BIOS_WR#
BIOS_CS#
3VS5_ON
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
5VS5_ON
LAD0
LAD1
LAD2
LAD3
RCIN#
TPDATA
TPCLK
SUSB#
U8
K1
LAD0
J2
LAD1
J1
LAD2
H2
LAD3
M4
LPCRST#/WUI4/GPD2
K2
LPCCLK
H1
LFRAME#
M1
LPCPD#/WUI6/GPE6
F1
GA20/GPB5
G2
SERIRQ
L2
ECSMI#/GPD4
N4
ECSCI#/GPD3
L1
WRST#
H4
KBRST#/GPB6
M2
PWUREQ#/BBO/GPC7
E5
CRX0/GPC0
D2
TMA0/GPB2
B11
PS2DAT0/TMB1/GPF1
A11
PS2CLK0/TMB0/GPF0
B10
PS2DAT1/RTS0#/GPF3
A10
PS2CLK1/DTR0#/GPF2
B9
PS2DAT2/WUI21/GPF5
D9
PS2CLK2/WUI20/GPF4
D1
DSR0#/GPG6
N7
GINT/CTS0#/GPD5
A4
RXD/SIN0/GPB0
A3
TXD/SOUT0/GPB1
E2
SSCE1#/GPG0
B5
FSCK/GPG7
A6
FMISO/GPG5
B6
FMOSI/GPG4
A7
FSCE#/GPG3
E7
SSCE0#/GPG2
M8
KSO0/PD0
J7
KSO1/PD1
N9
KSO2/PD2
M9
KSO3/PD3
K8
KSO4/PD4
J8
KSO5/PD5
N10
KSO6/PD6
M10
KSO7/PD7
N11
KSO8/ACK#
K9
KSO9/BUSY
N12
KSO10/PE
N13
KSO11/ERR#
M13
KSO12/SLCT
L12
KSO13
L13
KSO14
K12
KSO15
J12
KSI0/STB#
J13
KSI1/AFD#
J9
KSI2/INIT#
H12
KSI3/SLIN#
H9
KSI4
H10
KSI5
H13
KSI6
G9
KSI7
F2
GPJ6
G1
GPJ7
AL008987T00
IT8987E/AX
+3VPCU
+3VPCU
VCC
+3VPCU
E6
K10
D5
K4
VSTBY
VSTBYD4VSTBY
VSTBY
VSTBY
VSTBY_FSPI
LPC
IT8987
PS/2
UART
FLASH
KBMX
RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7
CLOCK
VSS
VSSF5VSS
VSS
D6
G4
G5
R140 *4.7K_4
VPRO_ID:
HI--> Vpro
Low-->non-Vpro
4
+3V_ECACC
+3V_VSTBY
E4
E9
EGCLK/WUI27/GPE3
AVCC
EGCS#/WUI26/GPE2
VSTBY
EGAD/WUI25/GPE1
KSO16/SMOSI/GPC3
KSO17/SMISO/GPC5
L80HLAT/BAO/W UI24/GPE0
L80LLAT/WUI7/GPE7
GPIO
DTR1/SBUSY/GPG1/ID7
HSCE#/WUI19/GPH3/ID3
CTX1/WUI18/GPH2/SMDAT3/ID2
CRX1/WUI17/GPH1/SMCLK3/ID1
CLKRUN#/WUI16/GPH0/ID0
SMCLK2/WUI22/GPF6/PECI
SMDAT2/WUI23/GPF7
SM_BUS
PWM6/SSCK/GPA6
PWM
TACH1/TMA1/GPD7
WAKE UP
A/D D/A
AVSS
E10
DAC4/DCD0#/GPJ4
VCORE
K5
C281
0.1U/10V_4
VPRO_ID
4
VSS
H5
IT8987_AGND
HMOSIGPH6/ID6
HMISO/GPH5/ID5
HSCK/GPH4/ID4
GPH7
SMCLK0/GPB3
SMDAT0/GPB4
SMCLK1/GPC1
SMDAT1/GPC2
PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5
PWM7/GPA7
TACH0/GPD6
DAC1/GPJ1
DAC0/GPJ0
TMR0/WUI2/GPC4
TMR1/WUI3/GPC6
PWRSW /GPE4
RI1#/WUI0/GPD0
RI2#/WUI1/GPD1
WUI5/GPE5
ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
ADC4/WUI28/GPI4
ADC5/WUI29/GPI5
ADC6/WUI30/GPI6
ADC7/WUI31/GPI7
DAC5/RIG0#/GPJ5
DAC3/GPJ3
DAC2/GPJ2
R155 4.7K_4
B12
A12
VRON
A13
K13
J10
N2
M3
EC_PWROK
F4
B7
PCI_SERR#
A8
HWPG
B8
ACIN
A9
D7
E8
D8
CLKRUN#
J4
SUSWARN#_EC
B1
EC_PECI_R
C1
GPUT_DATA
B4
MBCLK
A2
MBDATA
B3
MBCLK2
B2
MBDATA2
M5
PWR_LED#
N5
MBATLED0#
M6
AC_LED_ON#
N6
PCH_SLP_S0#
K6
FAN1_PWM
J6
KB_LED_EN#
M7
VOLMUTE#
K7
CAPSLED#
M11
FAN1SIG
M12
D13
E12
C2
E1
H_PROCHOT#_EC
A5
NBSWON1#
N1
SUSC#
N3
DNBSWON#
N8
SUSON
A1
G10
G13
AD_TYPE
G12
SYS_I
F9
VPRO_ID
F13
TEMP_MBAT
F10
F12
E13
C12
EMU_LID
B13
THRM_ALERT_HW#1
C13
EC_PCIE_WAKE#
D12
iAMT
3
C205 0.1U/10V_4
C257 0.1U/10V_4
C204 0.1U/10V_4
C203 0.1U/10V_4 R224
C279 0.1U/10V_4
C258 0.1U/10V_4
WLAN_VPRO_ON <28>
VRON <38,41>
USB_SEL1 <25>
EC_RTC_RST <13>
USB_CTRL2 <25>
AC_PRESENT_EC <4>
EC_PWROK <4,16>
VOLUME_DOWN <24>
PCI_SERR# <10>
HWPG <4,16,33,34,35,37>
ACIN <32>
VOLUME_UP <24>
KB_LED <27>
TP6
CLKRUN# <10>
SUSWARN#_EC <4>
R198 43_4
EC_PECI <2>
GPUT_DATA <31>
MBCLK <31,32>
MBDATA <31,32>
MBCLK2 <29>
MBDATA2 <29>
PWR_LED# <27>
MBATLED0# <32>
AC_LED_ON# <32>
FAN1_PWM <24>
KB_LED_EN# <27>
VOLMUTE# <23>
CAPSLED# <27>
FAN1SIG <24>
HOME_BUTTON_INT# <24>
USB_STATE1 <25>
HUB_SENSOR <29>
USB_STATE2 <25>
NBSWON1# <27>
SUSC# <4,16>
DNBSWON# <4>
SUSON <34,36,37>
USB_STATE3 <25>
BAT_I <32>
SYS_I <32>
TEMP_MBAT <32>
USB_SEL2 <25>
THRM_MOINTOR1 <6>
PCH_SLP_WLAN# <4>
EMU_LID <20>
EC_PCIE_WAKE# <28>
SLP_SUS_ON <15,35,36>
AD_TYPE AD_ID
R490 2K/F_4
D11
2 1
PDZ5.6B
+3V_VSTBY
iAMT
ACIN
VC2
*AVLC 5S_4
H_PECI (50ohm)
Route on microstrip only
Spacing >18 mils
Trace Length: 0.4~6.125 iches
For DDR Thermal IC/GPU thermal
for Battery charge/charge
PV modify from PCH_SLP_S0# to HUB_PWR
HUB_PWR <31>
iAMT
iAMT
adapter Type check
D12
*1SS355
2 1
R462 100/F_4
R482
12.1K/F_4
C467
100P/50V_4
C485
0.1U/25V_4
3
+3VPCU
3VPCU discharge
PV EC request add.
AD_ID <32>
EC_WRST
1 3
Q4
METR3904-G
Q12
METR3904-G
2
2
R285 4.7K_4
D9 MEK500V-40
R284 10K/F_4
THRM_ALERT_HW#1
R222 4.7K_4
C268 220P/50V_4
2
13
Q19
4 3
1
*2N7002kDW
R162 *10K_4
R182 *4.7K_4
R185 *4.7K_4
R248 4.7K_4
R163 4.7K_4
R184 4.7K_4
R262 4.7K_4
R197 10K/F_4
R239 10K/F_4
R238 100K/F_4
R237 100K/F_4
R149 100K/F_4
2
2 1
EC_PWROKOVT_DETC
Open Drain need pu high
+1.0V
PM_THRMTRIP# <2>
5
DIS_3VPCU
2
6
R323 *22_8
GPIO33_EC
MBCLK2
MBDATA2
FAN1SIG
VOLUME_UP
VOLUME_DOWN
HOME_BUTTON_INT#
GPUT_DATA
GPUT_CLK
NB5
NB5
NB5
+3V
+3VPCU
H_PROCHOT#
3
H_PROCHOT#_EC
+3VPCU
MAINON
SUSON
VRON
CLK_24M_KBC
HWPG
2
R240
*10K/F_4
1
+VIN +VIN
R329
*1M_4
R330
*1M_4
+3VPCU+3V
PV
+3VS5
C202 0.1U/10V_4
+1.0V<2,4,6,16,36>
+3V<2,4,10,11,12,13,14,15,16,20,21,22,23,25,26,27,29,31,37,38>
+3VPCU<6,13,15,27,28,31,32,33,41>
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
EC IT8987
EC IT8987
EC IT8987
1
+3VPCU
100K_4
EC_WRST
C270
1U/6.3V_4
C299
Q8
2N7002K
R196 *4.7K_4
R191 *4.7K_4
R193 10K/F_4
R201 47K/F_4
R151 10K/F_4
R204 *10K/F_4
R220 *10K/F_4
R543 10K/F_4
*47P/50V_4
DIS_3VPCU
SI
R555 10K_4
R218*10_4
1
30
H_PROCHOT# <2,32,38>
R287
*1M_4
R300
*30K_4
MBCLK
MBDATA
EC_PCIE_WAKE#
Q_LID_EC#
3VS5_ON
5VS5_ON
USB_CTRL2
NBSWON1#
DNBSWON#
C260*10P/50V_4
1A
1A
30 41Tuesday, May 26, 2015
30 41Tuesday, May 26, 2015
30 41Tuesday, May 26, 2015
1A
5
4
3
2
1
+3VPCU +3V_RTC
31
SI
D D
HUB_PWR<30>
GPUT_CLK<30>
C C
GPUT_DATA<30>
+3V
R473 0_4
GPUT_CLK
GPUT_DATA
R114 10K/F_4
R458
100K_4
U2
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
EMC1412-1-ACZL-TR
Need Check PN(EOD)
C478
1U/6.3V_4
C492
*10P/50V_4
VCC
DXP
DXN
GND
1
2
3
5
for CS
U22
5
IN
4
IN
3
ON/OFF
IC(5P) G5243AT11U
C116 0.01U/50V_4
DDR_THERMDA
C127
2200P/50V_4
DDR_THERMDC
OUT
GND
+3V
2
Main:AL001412003 EMC1412-1-ACZL-TR(98h)
1
2
Q2
METR3904-G
1 3
+3V_CS+3VS5
R263 *0_4/S
C512
0.1U/10V_4
LID_EC#<27>
R247 10K_4
2nd:AL000431014 TMP431ADGKR(98h)
2nd:AL000781039
2
1 3
Q14 DDTC144EUA-7-F
+3V_RTC
U10
1
CP
2
D
3
Q#
4
GND
74LVC1G74DP
VCC
SD#
RD#
8
7
6
5
Q
+3VPCU
R251
100K_4
+3V_RTC
R234
10K_4
2 1
D8 MEK500V-40
2 1
D4 MEK500V-40
R265
4.7K_4
R258
4.7K_4
MBCLK <30,32>
MBDATA <30,32>
B B
A A
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
CS
CS
CS
31 41Tuesday, May 26, 2015
31 41Tuesday, May 26, 2015
1
31 41Tuesday, May 26, 2015
1A
1A
1A
5
DC_JACK
90W
EC2
1000P/50V_4
D D
5
GND
8
LED2
WLED
7
LED1
ALED
DC-IN CONN
+5VPCU
PR124
2.43K/F_6
C C
PC100
1000P/50V_4
1 3
6
CN5
VDD
VDD
AD_ID
GND
GND
GND
GND
AD_ID <30>
1
2
3
4
9
10
2
PQ10
DRC5144E0L
+VA_AC
PC41
0.1U/25V_4
PR42
220K_4
PR36
220K_4
MBATLED0# <30>
PL9
*0_8/S
PL10
*0_8/S
+VAD
+VA
PQ4
EMB20P03V
6
7
8
EC1
0.1U/25V_4
PQ6
4
Q2
2 1
Q1
MMDT2907A
15
2
3
4
PC36
0.1U/25V_4
Place this ZVS close
to Diode away +VIN
PR34
IDEA_G
1M_4
3
65
PR40
+VA
1K_6
ACDET=16.83V
PR121
430K/F_4
PD7
2 1
+5VPCU
PR44
2.43K/F_6
PC51
B B
1000P/50V_4
2
AC_LED_ON# <30>
PQ7
DRC5144E0L
1 3
+VA
1N4448WS-7-F
VIDCHG = 8 or 16 × (VSRN – VSRP)
A A
5
4
Do Not add test pad on BATDIS_G signal
PQ5
P4SMAJ20A
+VAD
PR123
*430K/F_4
PR122
82K/F_4
SYS_I<30>
PC98
0.01U/50V_4
PC125
0.01U/50V_4
4
AP0203GMT-HF
5
PC47
2200P/50V_4
BATDIS_G
+3VPCU
+3VPCU
D
3
S
2
1
G
4
+VAD
MBDATA BQDATA
MBCLK BQCLK
PR61 *100K/F_4
PR62 *100K/F_4
REGN6V
ACIN<30>
PR102
10/F_4
PR95
10/F_4
+PRWSRC +VIN
PC49
0.1U/50V_6
PR109
4.02K/F_4
PC95
PR101
1U/25V_6
10/F_8
PR71
*0_4/S
PR67 *0_4/S
PR75
0_4/P
PR108
100K/F_4
PR107
100K/F_4
PC111
100P/50V_4
PC93
100P/50V_4
PR110
4.02K/F_4
BQACDET
PC112
*1000P/50V_4
BQPROCHOT
BQBATPRES
BQTB_STAT
+3VPCU
+VAD
PD5
2 1
PR35
1M_4
H_PROCHOT#<2,30,38>
Place this cap
close to EC
BAT_I<30>
Place this cap
close to EC
BQCMSRC
BQACDRV
BQVCC
PR60
0_4/P
ACIN
BQIADP
BQIBAT
RC1206-R010
PR43
*0_2/S
PC122
1U/25V_6
PR115
0_4/P
PU7
3
CMSRC
4
ACDRV
BQ24780SRUYR
28
VCC
6
ACDET
20150112 updated
11
SDA
12
SCL
10
PROCHOT
15
BATPRES
16
TB_STAT
5
ACOK
7
IADP
8
IDCHG
ILIM
21
BQILIM
PR55
100K/F_4
PR56
43.2K/F_4
PR41
BQACP_N
PC134
0.1U/25V_4
BQACP
2
ACP
CMPOUT
CMPIN
14
13
PR63
*0_2/S
3
21
PR39
*0_2/S
Place this ZVS close to
Far-Far away +VIN
BQACN_N
PC117
0.1U/25V_4
PR116
0_4/P
BQACN
1
ACN
REGN
HIDRV
BTST
PHASE
LODRV
GND
PAD
BATSRC
SRP
SRN
BATDRV
PAD
PAD
PAD
PAD
PAD
PAD
PMON
PAD36PAD37PAD
9
38
PR81
0_4/P
3
PD9
*P4SMAJ20A
2 1
REGN6V
PD6
PDZ8.2B
PC72
24
2.2U/10V_6
26
BQHIDRV
PR78
0_6
25
BQB_2 BQB_1
27
BQPHASE
23
BQLODRV
22
29
17
BQBATSRC
20
BQSRP
19
BQSRN
18
BQBATDRV
30
31
32
33
34
35
PC84
*100P/50V_4
BQBATDRV
21
PR57
10/F_6
PR59
10/F_6
PR58
10/F_6
PMON <38>
PR237
4.02K/F_4
EC10
*1U/25V_4
PC89
0.047U/25V_4
2
PQ21
+BAT_DIS
FDMS7698
3
D
S
2
5
1
G
PC248
4
0.01U/50V_4
+PRWSRC
0.1U/25V_4
0.1U/25V_4
For EMI
EC9
EC8
*1U/25V_4
*1U/25V_4
678
AON7408
35241
678
PQ8
AON7408
PC57
PC55
+VIN <15,20,27,30,33,34,35,38,39,40,41>
+3VPCU <6,13,15,27,28,30,31,33,41>
+5VPCU <33,38,39,40>
35241
PC56
0.1U/25V_4
2
Place this cap
close to EC
TEMP_MBAT<30>
+BATCHG BATT+
+3V_RTC
+BAT_RTC<4,13,15,27,31>
PC154
*100P/50V_4
EC7
*1U/25V_4
+VIN
PC147
PC131
4.7U/25V_8
2200P/50V_4
PQ11
PL14
3.3uH/3.5A(PCMB061H-3R3MS)
7x7x1.8mm
PR77
2.2_6
PC73
2200P/50V_4
CSOP
CSON
0.01U/50V_4
PC1
0.1U/25V_4
PC162
1000P/50V_4
PC88
PL3
*0_8/S
PL4
*0_8/S
2 1
PD1
PDZ5.6B
PC161
0.1U/25V_4
+BAT_DIS
NB5
NB5
NB5
1
PR5
1K/F_4
PC5
0.01U/50V_4
PC4
0.1U/25V_4
PR1
470/F_4
MBDATA<30,31>
MBCLK<30,31>
PC59
*100P/50V_4
PD4
PDZ5.6B
PR4
200K/J_4
PR3
330_4
+3VPCU
1
2
3
4
BATT+
5
6
7
8
SMD
9
SMC
10
PR2
330_4
PC67
*100P/50V_4
PD3
2 1
2 1
PDZ5.6B
For ISN
EC20
10U/25V_8
EC18
EC21
10U/25V_8
PR235
RC1206-R010
PR236
*0_2/S
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
EC19
10U/25V_8
10U/25V_8
21
PC3
PR234
*0_2/S
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Charger
Charger
Charger
PC2
10U/25V_8
10U/25V_8
1
32
CN21
51279-0100T-V01
BATBATB/I
BAT+
BAT+
BAT+
RTC
SMD
GND
SMC
GND
BAT-
+BATCHG
PC247
0.1U/25V_4
32 41Tuesday, May 26, 2015
32 41Tuesday, May 26, 2015
32 41Tuesday, May 26, 2015
12
11
PD2
2 1
RB500V-40
1A
1A
1A
5
DC/DC +3VS5/+5VS5
4
3
2
1
33
Do Not add test pad on VCC & LDO pin
D D
+3VS5
PR93
*10K/F_4
HWPG<4,16,30,34,35,37>
PR83
*0_4/S
S5_ON SY8208BEN
+3VPCU
PD8
C C
*UDZVTE-173.6B
PR140
*4.99K/F_4
PR141
*4.02K/F_4
2 1
SY8208CEN
2
PQ14
*METR3904-G
1 3
+VIN
PR130
499K/F_4
Do Not add test pad on VCC & LDO pin
B B
PR97
1K/F_4
5VS5_ON<30>
S5_ON<30>
Rb
PR98
Ra
*1K/F_4
USB Charge Support
A A
No support
Support
5
Stuff NA
NA Stuff
PR90
1M_4
PR96
1M_4
2.2U/6.3V_4
PR103
0_4/P
PR129
150K/F_4
RbRa
PC137
2.2U/6.3V_4
PR128
0_4/P
+3VPCU
SY8208BPGHWPG
PC99
*0.1U/16V_4
+5VPCU
PC145
SY8208CPGHWPG
SY8208CEN
PC106
*0.1U/16V_4
PC135
2.2U/6.3V_4
Do Not add test pad
on VCC & LDO pin
PU11
5
LDO
2
PGOOD
1
EN1
7
EN2
SY8208BQNC
7
2
1
5
PU10
LDO
PGOOD
EN
VCC
SY8208CQNC
+VIN_3VS5
8
VIN
PC118
9
GND
BST
SW
VOUT
FB
4
GND
BST
VOUT
6
10
4
3
VIN
SW
FB
0.1U/25V_4
SY8208BBST
SY8208BSW
SY8208BVOUT
SY8208BFBSY8208BLDOEN
+VIN <15,20,27,30,32,34,35,38,39,40,41>
+3VS5 <4,15,16,22,28,30,31,35,36,37>
+5VS5 <4,25,34,35,36,37>
+3VPCU <6,13,15,27,28,30,31,32,41>
+5VPCU <32,38,39,40>
8
9
6
SY8208CBST
10
SY8208CSW
4
3
SY8208CFB
PC116
4.7U/25V_8
PR131
0_6
SY8208BBST_S
PC113
0.1U/25V_4
PR132
0_6
PC115
4.7U/25V_8
PR112
1K/F_4
PC109
4.7U/25V_8
SY8208CBST_S
PR114
1K/F_4
PC119
2200P/50V_4
0.1U/25V_4
PL20
*0_8/S
PC142
+VIN_5VS5
PC108
4.7U/25V_8
PC144
0.1U/25V_4
+VIN
PC120
0.1U/25V_4
2.2uH/7A(PCMB061H-2R2MS)
PR85
*2.2_6
PC79
*2200P/50V_4
PL19
*0_8/S
PC114
2200P/50V_4
PR82
*2.2_6
PC78
*2200P/50V_4
EC16
*1000P/50V_4
PL17
7x7x1.8mm
PC129
0.01U/50V_4
+VIN
PC138
0.1U/25V_4
PL16
2.2uH/7A(PCMB061H-2R2MS)
7x7x1.8mm
PC130
6800P/50V_4
3
PR46
*0_2/S
PR45
*0_2/S
+3.3VS5_S
+5VS5_S
+3.3 Volt +/- 5%
TDC:8A
EDP:9A
+3VS5
1 2
PC58
PC80
0.1U/16V_4
22U/6.3V_8
+5 Volt +/- 5%
TDC:8A
EDP:9A
+5VS5
1 2
PC81
PC60
22U/6.3V_8
0.1U/16V_4
PJP2
*POWER_JP/S
PC74
22U/6.3V_8
PJP1
*POWER_JP/S
PC75
22U/6.3V_8
PC64
PC66
2
PC63
22U/6.3V_8
22U/6.3V_8
PC65
22U/6.3V_8
22U/6.3V_8
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
3/5S5
3/5S5
3/5S5
33 41Tuesday, May 26, 2015
33 41Tuesday, May 26, 2015
1
33 41Tuesday, May 26, 2015
1A
1A
1A
1
2
3
4
5
+VIN <15,20,27,30,32,33,35,38,39,40,41>
+5VS5 <4,25,33,35,36,37>
+1.2VSUS <3,6,17,18,36>
+0.65V_DDR_VTT <19,34>
A A
PR225
PR230
*0_4
PR233
0_4/P
+0.65V_DDR_VTT
PC238
0.033U/10V_4
+1.2VSUS
0_4/P
PR229
0_4/P
PC246
*0.1U/16V_4
PC245
*0.1U/16V_4
PC236
10U/6.3V_6
PC234
+5VS5
If VID=Hi, Vref=0.675V
OCP=10.5A
PR222
243K/F_4
1P35V_TON
1P35V_S5
1P35V_CS
1P35V_S3
1P35V_PGOOD
11
1P35V_VID
PR231
S58S3
VID
PU18
9
13
10
CS
TON
PGOOD
PGND
14
FB
6
1P35V_FB
PAD
VDDQ
5
21
1P35V_VDDQ
PR232
7.87K/F_4
UGATE
BOOT1
PHASE
LGATE
VDD
7
20
VTT
2
VTTSNS
1
VTTGND
PR223
*0_2/S
PR224
*0_2/S
RT8231BGQW
LPMB
3
10K/F_4
4
VTTREF
19
VLDOIN
*10U/6.3V_6
Fsw=500KHz
PR228
499K/F_4
17
18
16
15
12
1P35V_UGATE
1P35V_BOOT
1P35V_PHASE
1P35V_LGATE
1P35V_VDD
PC237
1U/6.3V_4
PR221
2.2_6
+5VS5
20150121 updated
Vref=0.675V
Vvddq=Vref*(1+R1/R2)
PC235
0.1U/25V_4
35241
PQ20
AON7752
35241
Rds(on) 14m ohm
PC214
PL25
PC203
2200P/50V_4
4.7U/25V_8
PC212
PC206
678
4.7U/25V_8
0.1U/25V_4
PQ19
AON7408
1uH/7A(PCMB061H-1R0MS)
678
PR200
*2.2_6 PR227
PC224
*2200P/50V_4
7x7x1.8mm
PL24
*0_8/S
+VIN+VIN_DDR
PC202
0.1U/25V_4
20150121 updated
+1.2VSUS_S
PC244
*0_2/S
+1.2V +/- 5%
Countinue current:6A
Peak current:8A
OCP minimum:12A
+1.2VSUS
PJP4
*POWER_JP/S
1 2
PC240
PC241
22U/6.3V_8
0.1U/16V_4
PC242
22U/6.3V_8
*22U/6.3V_8
HWPG<4,16,30,33,35,37>
SUSON<30,36,37>
DDR_VTT_CNTL<3,4>
B B
DDR_VTTREF
C C
( 3mA )
MAINON<22,25,30,35,36,37>
+0.65V_DDR_VTT<19,34>
PR226
100/F_4
PC243
0.1U/16V_4
34
PC239
*22U/6.3V_8
D D
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
1
2
3
4
Date: Sheet of
DDR
DDR
DDR
34 41Tuesday, May 26, 2015
34 41Tuesday, May 26, 2015
5
34 41Tuesday, May 26, 2015
1A
1A
1A
5
4
3
2
1
35
+VIN <15,20,27,30,32,33,34,38,39,40,41>
+3VS5 <4,15,16,22,28,30,31,33,36,37>
+5VS5 <4,25,33,34,36,37>
D D
C C
+1.0V_DEEP_SUS <9,13,15,16,36>
+1.8V_DEEP_SUS <9,15,37>
PU5
PR52
7
+5VS5
PC76
1U/6.3V_4
PR66
0_4/P
PR53
*0_2/S
1237PGPCH
1237PFMPCH
1237ENPCH
PC61
*0.1U/16V_4
1237SSPCH
PC52
0.1U/16V_4
HWPG<4,16,30,33,34,37>
SLP_SUS_ON<15,30,36>
HWPG
PR48
0_4
*0_4
21
1
3
2
23
AOZ1267QI-3
NC
VCC
PGOOD
PFM
EN
SS
PR51
93.1K/F_4
6
8
IN
9
TON
IN
22
BST
PGND
PGND
PGND
PGND
PGND
AGND
LX
LX
LX
LX
LX
FB
IN
20
1237BSTPCH
10
1237LX
11
16
17
18
12
13
14
15
19
4
5
1237FBPCH
PR76
PR49
10K/F_4
PC86
0.1U/25V_4
0_6
PR50
2.49K/F_4
PC70
1237BSTPCH_S
4.7U/25V_8
PC85
0.1U/25V_4
1237FBPCH_S
PC77
4.7U/25V_8
+VIN_0.95V +VIN
PL13
*0_8/S
PC87
2200P/50V_4
PL18
1uH/7A(PCMB061H-1R0MS)
7x7x1.8mm
PR92
*2.2_6
PC96
*2200P/50V_4
PC62
0.1U/25V_4
+1.0VS5_S2
PR125
*0_2/S
(V1.00A+V1.00_MODPHY+VccPRIM_CORE)
+1.0VS5 Volt +/- 5%
Countinue current:6A
Peak current:9A
+1.0V_DEEP_SUS
PJP3
*POWER_JP/S
1 2
PC132
0.1U/16V_4
PC127
22U/6.3V_8
PC126
22U/6.3V_8
PC159
22U/6.3V_8
PC158
*22U/6.3V_8
PR65
*0_6/S
+3VS5
R2
4
6
VIN
FB
PR84
10K/F_4
PC71
4.7U/6.3V_6
LX
GND
3
2
PR91
20K/F_4
PL15
1uH/2.6A_2520
R1
PR89
*0_2/S
B B
HWPG
SLP_SUS_ON
PR74
*0_4/S
PR86
*0_4/S
0.1U/16V_4
PC90
PU6
5
PG
1
EN
G5719CTB1U
+1.8V +/- 5%
TDC:1A
EDP:2A
+1.8V_DEEP_SUS
PC91
10U/6.3V_6
PC92
0.1U/16V_4
20150116 updated
MAINON<22,25,30,34,36,37>
PC105
1U/6.3V_4
PR120
0_4/P
PC121
*0.1U/16V_4
PU9
1
VBIAS
2
GND
3
EN
G9183-12TP1U
VOUT
VADJ
+1.8V_DEEP_SUS+5VS5
PC97
6
VIN
4.7U/6.3V_4
5
4
+1.5V Volt +/- 5%
Countinue current:150mA
+1.5V
PC128
PR127
R1
88.7K/F_4
4.7U/6.3V_4
Vout=0.8(1+R1/R2)
PR119
R2
100K/F_4
VO=(0.6(R1+R2)/R2)
A A
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
+1.0/+1.5V/+1.8V_DEEP_SUS
+1.0/+1.5V/+1.8V_DEEP_SUS
NB5
NB5
5
4
3
2
NB5
+1.0/+1.5V/+1.8V_DEEP_SUS
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
35 41Tuesday, May 26, 2015
35 41Tuesday, May 26, 2015
35 41Tuesday, May 26, 2015
1A
1A
1A
5
4
3
2
1
36
PC140
0.1U/16V_4
*DMG3414U-7
2
2
2
PC141
0.1U/16V_4
61
2
61
+1.0V_DEEP_SUS
20150112 updated
3
1
+5VS5
PR88
*1M_4
PR87
*2M_4
+1.2VSUS
3
PQ31
DMG3414U-7
1
PC263
0.1U/16V_4
+5VS5
PR244
1M_4
PR240
2M_4
PR118
0_4/PPQ12
PR117
*0_6/S
PC148
*10U/6.3V_6
+VCCSTPLL
PR105
*22_8
34
5
PC265
0.1U/16V_4
PC266
*10U/6.3V_6
+1.2V_VCCPLL_OC
34
5
<= 65usec full
load ready
TDC:0.16A
+VCCSTPLL
PQ9A
*2N7002KDW
PR245
0_6/S
PR247
22_8
PQ33A
2N7002KDW
<= 65usec full
load ready
TDC:0.26A
+1.2V_VCCPLL_OC
+1.0V <2,4,6,16,30>
+3VS5 <4,15,16,22,28,30,31,33,35,37>
+5VS5 <4,25,33,34,35,37>
+VCCIO <2,6,16>
D D
C C
B B
PCH_SLP_S0_N<4,16>
MAINON<22,25,30,34,35,37>
+VCCSTPLL <2,4,5,6,9,38>
+1.0V_DEEP_SUS <9,13,15,16,35>
20150120 updated
PR68
LP#<41>
*0_4
PR94
*0_4
PR69
0_4/P
1
2
+3VS5
3 5
*NL17SZ08DFT2G
PU8
PR64
0_4/P
4
+1.0V_DEEP_SUS
PC83
1U/6.3V_4
20141229 updated
+3VS5
PC82
0.1U/16V_4
PR70
*0_4
PU4
AOZ1335DI
1
2
9
3
4
PC68
*0.1U/16V_4
VIN
VIN
VIN
VBIAS
ON
VOUT
GND
PR138
*0_4
PR137
*0_4
SLP_SUS_ON<15,30,35>
<= 65usec full
load ready
SUSON<30,34,37>
TDC:0.04A
+1.0V
PR47
8
PC53
0.1U/16V_4
5
PC94
*10U/6.3V_6
*0_6/S
PR54
*0_6/S
TDC:3A
+VCCIO
1
2
+3VS5
3 5
*NL17SZ08DFT2G
PR246 0_4
PU14
4
+VCCSTG_ON
PR139
*47K/F_4
PC164
*1000P/50V_4
PC264
*1000P/50V_4
PQ9B
*2N7002KDW
PQ33B
2N7002KDW
A A
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
+1.0V/+VCCSTPLL
+1.0V/+VCCSTPLL
+1.0V/+VCCSTPLL
1
36 41Tuesday, May 26, 2015
36 41Tuesday, May 26, 2015
36 41Tuesday, May 26, 2015
1A
1A
1A
5
4
3
2
1
+3V <2,4,10,11,12,13,14,15,16,20,21,22,23,25,26,27,29,30,31,38>
+5V <22,23,24,27,37,38>
+3VS5 <4,15,16,22,28,30,31,33,35,36>
+5VS5 <4,25,33,34,35,36>
+3VSUS <27,28>
+1.8V_DEEP_SUS <9,15,35>
+1.8V <5,23>
+5V <22,23,24,27,37,38>
D D
C C
+VIN <15,20,27,30,32,33,34,35,38,39,40,41>
+1.8VSUS <17,18>
5.2A
+3V
+3V_S2
PR143
*0_8/S
PC172
*10U/6.3V_6
+5VS5
MAINON<22,25,30,34,35,36>
PR134
*0_4/S
+3VS5
PC169
0.1U/16V_4
PC156
0.1U/16V_4
PC167
0.1U/16V_4
13
14
4
3
PC155
*0.1U/16V_4
1000P/50V_4
VOUT1
VOUT1
VBIAS
ON1
PC173
1
APL3523A
12
PU15
+5VS5
PR99
*0_4/S
+5VS5
PC136
0.1U/16V_4
PC123
0.1U/16V_4
PC102
0.1U/16V_4
13
14
4
3
PC101
*0.1U/16V_4
1000P/50V_4
VOUT1
VOUT1
VBIAS
ON1
PC149
1
APL3523A
PU13
12
+3VS5
PC166
OUT2
OUT2
GND
GND
ON2
8
9
11
15
5
0.1U/16V_4
PC157
*0.1U/16V_4
PR135
*0_4/S
PC170
0.1U/16V_4
PR142
*0_6/S
PC171
*10U/6.3V_6
SUSON <30,34,36,37>
+5V
+3VSUS+3VSUS_S2
PR133
*0_8/S
PC143
*10U/6.3V_6
MAINON MAINON
7
VIN12VIN1
VIN26VIN2
CT1
CT2
10
PC174
1000P/50V_4
+1.8V_DEEP_SUS
PC124
OUT2
OUT2
GND
GND
ON2
8
9
11
15
5
0.1U/16V_4
PC103
*0.1U/16V_4
PR100
*0_4/S
PC139
0.1U/16V_4
PC146
*10U/6.3V_6
7
VIN12VIN1
VIN26VIN2
CT1
CT2
10
PC150
1000P/50V_4
PR136
*0_6/S
0.05A5.1A
+1.8V
37
B B
PC254
10U/6.3V_6
SUSON<30,34,36,37>
A A
5
4
PR243 0_4/P
PC257
*0.1U/16V_4
+5VS5
HWPG<4,16,30,33,34,35>
+3VS5
PC256
1U/6.3V_4
PC251
0.1U/10V_4
PU19
3
VIN
G9661
2
EN
VDD4GND
1
PGOOD
PR242
0_4/P
R2
3
5
NC
6
VOUT
8
9
GND1
ADJ
7
PR241
127K/F_4
R1
PR238
100K/F_4
VO=(0.8(R1+R2)/R2)
R2<120Kohm
+1.8VSUS +/- 5%
Countinue current:1.5A
Peak current:3A
+1.8VSUS
PC255
*10U/6.3V_6
PC252
0.1U/10V_4
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Load switch IC
Load switch IC
NB5
NB5
2
NB5
Load switch IC
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
37 41Tuesday, May 26, 2015
37 41Tuesday, May 26, 2015
37 41Tuesday, May 26, 2015
1A
1A
1A
5
4
3
2
1
+VCCSA <6,39>
+VCCGT <7,40>
+VIN_VCC_CORE
+5VPCU <32,33,39,40>
+5V <22,23,24,27,37>
PC233
D D
+VCCSA
VCCSA_SENSE<6>
VSSSA_SENSE<6>
+VCCGT
VCCGT_SENSE<7>
VSSGT_SENSE<7>
C C
Place close to
GT Inductor
U22 75K
U23e
Re
0.01U/50V_4
Rd
PR208
10/F_4
PR212
*10/F_4
PC222
Rd
110K
PR216
75K/F_4
PR218
*110K/F_4
+5V
GT_CSP2
GT_CSP1
PR206
165K/F_4
PC229
0.033U/25V_4
PR219 0_4
PR213 *5.11K/F_4
PR217
5.11K/F_4
Re
U22 N/A
U23e
110K
GT_CSP1<40>
GT_CSP2<40>
GT_CSN1<40>
GT_CSN2<40>
B B
A A
U22 N/A
U23e
10-ohm
U22 0-ohm
U23e
U22 N/A
U23e
Rf
Rf
Rb
N/A Rb
Rc
5.11K Rc
5
PC216
*0.033U/25V_4
PR146
1 2
220K_4 NTC
PR207
73.2K/F_4
PC230
1000P/50V_4
PR72
100/F_4
PR73
100/F_4
PR79
100/F_4
PR80
100/F_4
PR126
1 2
U22 N/A
U23e
PR210
0_4
PR211
0_4
PMON<32>
PR186 0_4
PR189 0_4
270P/25V_4
Ra
U22Ra14K
U23e
15K
PC223
*1000P/50V_4
PR203 0_4
PR215
13K/F_4
100K/F_4 NTC
place close to
GT MOSFET
Ca
0.033U
4
PC231
1000P/50V_4
PR192
*0_4/P
PR202
49.9/F_4
PC227
PC217
10P/50V_4
PC221
0.1U/16V_4
this +VIN net should
tie to input CAP
*100P/50V_4
PR194
14K/F_4
+VIN
+5VPCU
PC225
PR197
20K/F_4
PC207
1000P/50V_4
VSNN_2ph
PR195
1K/F_4
PR201
3K/F_4
PC226
2200P/50V_4
VSPP_1b
VSNN_1b
CSREF_2ph
TSENSE_2ph
PR204
1K/F_4
1000P/50V_4
PR214
2.2K/F_4
1000P/50V_4
PR191
1K/F_4
PC210
1000P/50V_4
PR209
28K/F_4
IOUT_2ph
DIFFOUT_2ph
FB_2ph
COMP_2ph
ILIM_2ph
CSCOMP_2ph
CSSUM_2ph
CSP_2ph
CSP_1ph
PR199
2.2_6
PR205
1K/F_4
PC228
PC232
470P/50V_4
1
IOUT_2ph
2
DIFFOUT_2ph
3
FB_2ph
4
COMP_2ph
5
ILIM_2ph
6
CSCOMP_2ph
7
CSSUM_2ph
8
CSREF_2ph
9
CSP2_2ph
10
CSP1_2ph
11
TSENSE_2ph
12
VRMP
PC220
0.01U/50V_4
81208_VCC
PC213
1U/6.3V_4
PR198
U22 48.7K
U23e
49
30.1K/F_4
90.9K
Rg
TAB
VSN_2ph
48
13
PR193
VSN_2ph
VSP_2ph
47
ROSC_COREGT
30.1K/F_4
PMON
46
PSYS
VSP_2ph
ROSC_SAUS
VSP_1b
VSN_1b
COMP_1b
43
44
45
VSP_1b
VSN_1b
COMP_1b
PU17
NCP81208
PWM2_2ph17PWM1_2ph
16
ICCMAX_2ph
Rg Rh
ILIM_1b
42
ILIM_1b
ICCMAX_1a
PR190
PR188
41
CSN_1b
ICCMAX_1b
48.7K/F_4
PC219
0.01U/50V_4
35.7K/F_4
PC200
0.022U/25V_4
CSP_1b_N
38
40
39
CSP_1b
IOUT_1b
VR_RDY
VR_HOT#
COMP_1a
ADDR_VBOOT21ICCMAX_1b20ICCMAX_1a19ICCMAX_2ph18RSOC_SAUS15ROSC_COREGT14VCC
PWM_1a22TSENSE_1ph
23
ADDR_VBOOT
TSENSE_1ph
PR187
3
PC209
1000P/50V_4
VR_RDY
VREN
37
EN
PWM_1b
DRVON
ALERT#
IOUT_1a
CSP_1a
CSN_1a
ILIM_1a
VSN_1a
VSP_1a
24
VSP_1a
90.9K/F_4
20150122 updated
PR196
1K/F_4
PC205
15P/50V_4
PC204
2200P/50V_4
PR174
82K/F_4
PC197
470P/50V_4
PR170
0_4/P
PC196
*0.1U/16V_4
36
35
34
SCLK
SCLK
33
ALERT#
32
SDIO
SDIO
31
VR_HOT#
30
IOUT_1a
29
28
27
ILIM_1a
26
COMP_1a
25
VSN_1a
PR176
2.43K/F_4
Ri
PR177
2K/F_4
PR185
PR181
10K/F_4
15.8K/F_4
PWM2_2ph <40>
PWM1_2ph <40>
1 2
PR178
14K/F_4
PR165 49.9/F_4
PR166 0_4/P
PR164 10/F_4
PR156 75/F_4
PC198
1000P/50V_4
PR167
1K/F_4
PC201
1000P/50V_4
PR182 0_4
PC208
0.1U/16V_4
PWM_1a <39>
CSN_1b <39>
PR29
100K/F_4 NTC
Place close to
VCCSA Inductor
PR183
7.5K/F_4
PR172
0_4/P
VRON <30,41>
PC190
470P/50V_4
PR171
0_4
PC199
1000P/50V_4
PR175
0_4
PR180
13K/F_4
SW_1b <39>
PR173
10K/F_4
PWM_1b <39>
DRVON <39,40>
VR_SVID_CLK <5>
VR_SVID_ALERT# <5>
VR_SVID_DATA <5>
H_PROCHOT# <2,30,32>
PR155
69.8K/F_4
PR27
100K/F_4 NTC
1 2
place close to
VCORE MOSFET
+3V
IMVP_PWRGD
VSS_SENSE <5>
VCC_SENSE <5>
2
PC192
0.033U/10V_4
15P/50V_4
PR158
100/F_4
PC195
+VCCSTPLL
PR154
7.5K/F_4
PR163
14K/F_4
PC193
*2200P/50V_4
PR161
*75/F_4
PC194
PR157
1K/F_4
NB5
NB5
NB5
PR159
PR153
45.3/F_4
SW_1a <39>
PR31
100K/F_4 NTC
1 2
Rj
PR162
36.5K/F_4
0.01U/50V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
PC187
*75/F_4
0.1U/16V_4
VR_SVID_DATA
VR_SVID_ALERT#
VR_SVID_CLK
H_PROCHOT#
Place close to
VCORE Inductor
CSN_1a <39>
PC191
1000P/50V_4
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
CPU VR IC (NCP81208)
CPU VR IC (NCP81208)
CPU VR IC (NCP81208)
1
38
38 41Tuesday, May 26, 2015
38 41Tuesday, May 26, 2015
38 41Tuesday, May 26, 2015
1A
1A
1A
5
CPU CORE
4
3
2
PC69
+VIN
12
+
*15U/25V_7343
PC54
12
+
15U/25V_7343
PC249
For Acoustic
12
+
15U/25V_7343
1
39
D D
PR19
1_6
VCORE_HGRVCORE_HG
8
PR8
PC10
*0.1U/16V_4
0_4/P
+5VPCU
PC14
2.2U/6.3V_6
PWM_1a<38>
DRVON<38,39,40>
C C
PR6 0_4/P
PU3
1
VCORE_BST
DRVH
NCP81253
GND6PAD
9
BST
DRVL
SW
7
VCORE_SW_1
5
VCORE_LG
2
PWM
3
EN
4
VCC
PC19
0.22U/25V_6
+VIN_VCC_CORE +VIN
PC24
PC29
0.1U/25V_4
*4.7U/25V_8
DCR=0.927mohm ± 7%
0.15uH/31A(PCME062D-R15MS0R)
PQ1
NTMFD4C86N
PC30
PC23
4
D1
G1
1
S1
2
G2
8
S2
10
4.7U/25V_8
SW
5
6
7
VCORE_SW_1
PR28
*2.2_6
PC34
*2200P/50V_4
PC31
4.7U/25V_8
4.7U/25V_8
PC28
2200P/50V_4
PL12
PR33
*0_2/S
PL7
*0_8/S
7x7x2.4mm
PR38
*0_2/S
PC15
0.1U/25V_4
CSN_1a <38>
SW_1a <38>
U-line 22&23e(15W)
+VCC_CORE
TDC:21A
Icc max:28A
+VCC_CORE
+
PC45
*220u/2V_7343
+
PC43
220u/2V_7343
VCCSA
+VIN_VCCSA +VIN
B B
PR12
1_6
8
PR10
0_4/P
+5VPCU
PC17
2.2U/6.3V_6
DRVON<38,39,40>
A A
PR9
0_4/P
PWM_1b<38>
PC8
*0.1U/16V_4
PU1
1
VCCSA_BST
DRVH
NCP81253
GND6PAD
9
DRVL
BST
7
VCCSA_SW
SW
5
VCCSA_LG
2
PWM
3
EN
4
VCC
VCCSA_HGRVCCSA_HG
PC9
0.22U/25V_6
PQ3
AON7752
35241
35241
678
PQ2
AON7408
678
PC25
PC20
4.7U/25V_8
4.7U/25V_8
DCR=4.68mohm ± 7%
PL11
0.47uH/15A(PCMB062D-R47MS4R687)
PR26
*2.2_6
PC32
*2200P/50V_4
PR32
*0_2/S
PC22
0.1U/25V_4
PC27
2200P/50V_4
PR37
*0_2/S
PL6
*0_8/S
PC42
22U/6.3V_8
CSN_1b <38>
SW_1b <38>
PC16
0.1U/25V_4
PC46
22U/6.3V_8
PC48
U-line 22&23e(15W)
+VCCSA
TDC:4A(22)
Icc max:5A(22)
TDC:5A(23e)
Icc max:5A(23e)
PC44
PC35
22U/6.3V_8
22U/6.3V_8
*22U/6.3V_8
+VCCSA
PC50
*22U/6.3V_8
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
+VCORE/VCCSA (NCP81253)
+VCORE/VCCSA (NCP81253)
+VCORE/VCCSA (NCP81253)
1
39 41Tuesday, May 26, 2015
39 41Tuesday, May 26, 2015
39 41Tuesday, May 26, 2015
1A
1A
1A
5
4
3
2
1
+VIN <15,20,27,30,32,33,34,35,38,39,41>
+VCCGT <7,38>
+VIN_VCC_CORE
+5VPCU <32,33,38,39>
+5V <22,23,24,27,37,38>
D D
PC165
4.7U/25V_8
PR113
*2.2_6
PC104
*2200P/50V_4
PC168
4.7U/25V_8
0.15uH/31A(PCME062D-R15MS0R)
PC163
PR111
1_6
GT_HG GT_HGR
8
PR104
0_4/P
+5VPCU
DRVON<38,39,40>
C C
PR106
0_4/P
PWM1_2ph<38>
PC110
*0.1U/16V_4
2
3
4
PC133
2.2U/6.3V_6
PU12
PWM
EN
VCC
NCP81151
GND6PAD
9
DRVH
DRVL
BST
1
GT_BST1
7
GT_SW
SW
5
GT_LG
PC107
0.22U/25V_6
PQ13
NTMFD4C86N
4
D1
G1
1
S1
2
G2
8
S2
4.7U/25V_8
SW
5
6
GT_SW_1
7
10
+VIN_VCCGT +VIN
PC151
PL21
0.1U/25V_4
PC178
2200P/50V_4
7x7x2.4mm
PR145
*0_2/S
PC153
4.7U/25V_8
DCR=0.927mohm ± 7%
PR144
*0_2/S
PL23
*0_8/S
GT_CSN1 <38>
GT_CSP1 <38>
PC189
0.1U/25V_4
+
PC160
220u/2V_7343
+VCCGT
+
PC175
220u/2V_7343
40
U-line 22&23e(15W)
+VIN_VCCGT
PC183
PR150
*1_6
GT_HG2 GT_HGR2
8
PR151
DRVON<38,39,40>
B B
PWM2_2ph<38>
PR152
*0_4/P PC186
*0.1U/16V_4
*0_4/P
+5VPCU
2
3
4
PC185
*2.2U/6.3V_6
PU16
PWM
EN
VCC
*NCP81151
GND6PAD
9
DRVH
DRVL
BST
1
GT_BST2
7
GT_SW2
SW
5
GT_LG2
PC181
*0.22U/25V_6
PQ15
*NTMFD4C86N
4
D1
G1
1
S1
2
G2
8
S2
*4.7U/25V_8
SW
5
6
GT_SW2_1
7
10
PC182
*4.7U/25V_8
PR149
*2.2_6
PC180
*2200P/50V_4
PC179
*4.7U/25V_8
*0.15uH/31A(PCME062D-R15MS0R)
PC177
PC184
*4.7U/25V_8
DCR=0.927mohm ± 7%
PR147
*0_2/S
PL22
*0.1U/25V_4
PC152
2200P/50V_4
7x7x2.4mm
PR148
*0_2/S
GT_CSN2 <38>
GT_CSP2 <38>
+VCC_GT
TDC:18A(22)
Icc max:31A(22)
TDC:32A(23e)
Icc max 56A(23e)
+VCCGT
PC176
0.1U/16V_4
A A
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
+VCCGT (NCP81151)
+VCCGT (NCP81151)
+VCCGT (NCP81151)
1
40 41Tuesday, May 26, 2015
40 41Tuesday, May 26, 2015
40 41Tuesday, May 26, 2015
1A
1A
1A
5
4
3
2
1
41
D D
PR16
*0_4/S
+3VPCU
C C
PR7
*10K/F_4
+3VPCU+3VPCU +VCC_EOPIO
PR24
*10K/F_4
EDRAM_LP#EDRAM_C1
VRON<30,38>
LP#<36>
VID1_VCC_EDRAM<5>
VID0_VCC_EDRAM<5>
NB681_3V3_EDRAM
PR17
*1M/F_4
PC21
*0.1U/16V_4
PR18
PR22 *10K/F_4
PR11 *10K/F_4
PR15 *10K/F_4
NB681EN_EDRAM
0_4/P
PC18
*1U/6.3V_4
PR14
*0_4/S
EDRAM_LP#
EDRAM_C1
EDRAM_C0
for SKL pre ES sample
NB681PG_EDRAM
B B
TP1111
VCC_EDRAM
LP# C1 C0 Vout
0
1
1
1
1
X
0
0
1
1
PR13
*10K/F_4
PU2
10
11
5
6
3
4
13
*NB681AGD-Z
X
0
1
0
1
3V3
AGND
EN
LP#
C1
C0
PG
0
0.8
0.95
1.0
1.05
PGND
BST
SW
MODE
VOUT
VIN
1
NB681_VIN_EDRAM
PC11
*0.1U/25V_4
2
9
NB681BST_EDRAM
8
NB681SW_EDRAM
PR23
*100K/F_4
7
12
NB681VOUT_EDRAM
MODE
M1
M2
M3
M4
PC26
*0.22U/25V_6
PC13
*10U/25V_6
*1UH/7A(PCMB042T-1R0MS)
PR25
*2.2_6
PC33
*2200P/50V_4
PC7
*10U/25V_6
PR20
*0_6
VR rail Resistor
VCCIO
PRIMCORE Float
EDRAM/EOPIO
other
PC12
2200P/50V_4
PL8
4x4x2mm
PR30
*0_2/S
PL5
*0_6/S
0
100K
150K
+VIN
PC6
0.1U/25V_4
PC40
0.1U/16V_4
PC37
PC38
*22U/6.3V_6
*22U/6.3V_6
+VCC_EDRAM +/- 5%
Countinue current:4.5A
Peak current:6A
PL1
*0_6/S
+VCC_EDRAM
PL2
*0_6/S
PC39
*22U/6.3V_6
A A
PROJECT : Y0DD
PROJECT : Y0DD
PROJECT : Y0DD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
+VCC_EDRAM (NB681)_23E
+VCC_EDRAM (NB681)_23E
+VCC_EDRAM (NB681)_23E
1
41 41Tuesday, May 26, 2015
41 41Tuesday, May 26, 2015
41 41Tuesday, May 26, 2015
1A
1A
1A
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