HP SPECTRE X360 Schematics
5
4
3
2
1
13"
D D
C C
B B
Home Capacitve button
Keyboard
Touch Pad
TCP-15G24
A A
Pike Intel Cresent Bay ULT Platform Block Diagram
LPDDR3 1600MHz
SATA - 1st NGFF SSD
Package : 9.5 (mm)
Power :
PAGE 19
PAGE 22
PAGE 22
PAGE 21
System BIOS
SPI ROM
PS2
SMBUS
16Gb x32 2PCS
PAGE 12
LPDDR3 1600MHz
16Gb x32 2PCS
PAGE 13
SATA0/PCIE 4XLANE
PAGE 07
LPDDR3L x1600MHz 1.2V
LPDDR3L x1600MHz 1.2V
SPI Interface
TPM
SLB9665 V2.0
ITE 8987
Embedded Controller
Power :
Package : BGA128
Size : 7x 7 (mm)
FAN
PAGE 21
PAGE 25
PAGE 18
Crystal
48MHz
Crystal
32MHz
Broadwell U
Processor
Processor : Daul Core
Power : 15 (Watt)
Package : BGA1168
Size : 40 X 24 (mm)
INT
Audio Codec
ALC3242
Power :
Package : MQFN
Size : 7 x 7 (mm)
PAGE 18
Speaker
Headphone amplifier
HPA0022642RTJR
eDP X4
DP Port 2
DP Port 1
USB3.0 Interface
USB2.0 Interface
PAGE 2~10
HDA
I2C0
D
D
Deeebbbuuuggg
PCIE Gen 1 x 1 LaneLPC Interface
Port2 Port3
Carde Reader
RTS5237
PAGE 21
PAGE 18
PAGE 19
USB 3.0* Port 1,2 ,3
Combo Jack
iPHONE type
Camera
Port2
PAGE 15
Touch Screen
PAGE 15
PS8330B
Package : QFN-40
PS8201A
Package : QFN-40
TP2546
Package : QFN-16 3x3
Halt Mini Card
WLAN / BT Combo
USB2.0 Port 6
PAGE 23
www.schematic-x.blogspot.com
PAGE 16
PAGE 20
EC
eDP
Mini-DP
HDMI Conn
USB3.0 Port x 3
G-Sensor
HP3DC2TR
PAGE 15
PAGE 16
PAGE 17
(total 3.5A)
PAGE 20
PAGE 24
SM BUS
Sensor Hub
Size : 14 x 14 (mm)
Port4
IT8350
PCB 10L STACK UP
LAYER 1 : TOP
LAYER 2 : SGND
LAYER 3 : IN1(High)
LAYER 4 : IN2(Low)
LAYER 5 : SGND
LAYER 6 : SVCC
LAYER 7 : IN3
LAYER 8 : IN4
LAYER 9 : SGND
LAYER 10 : BOTPAGE 14
Accelerometer/Compass/Gryoscope
HP9DS0TR
PAGE 24
01
Digital MIC
5
4
PAGE 18
3
2
ERD
PPPRRROOOJJJEEECCCTTT :::
QQQuuuaaannntttaaa CCCooommmpppuuuttteeerrr IIInnnccc...
rrr vvv
SSSiiizzzeee DDDooocccuuummmeeennnttt NNNuuummmbbbeee RRReee
CCCuuussstttooommm
BBBllloooccckkk DDDiiiaaagggrrraaammm
::: ttt ooof ff
DDDaaattteee SSShhheeeeee
YYY000DDD
111AAA
1
111 333222TTTuuueeesssdddaaayyy,,, OOOccctttooobbbeeerrr 222888,,, 222000111444
5
4
3
2
1
02
U10A
D D
C C
H_PROCHOT#(25,28)
+1.2VSUS
R350
B B
DDR_VTT_CTRL(29,31)
470_4
TP88
IN_D2#(17)
IN_D2(17)
IN_D1#(17)
IN_D1(17)
IN_D0#(17)
IN_D0(17)
IN_CLK#(17)
IN_CLK(17)
INT_DP_TXN0(16)
INT_DP_TXP0(16)
INT_DP_TXN1(16)
INT_DP_TXP1(16)
INT_DP_TXN2(16)
INT_DP_TXP2(16)
INT_DP_TXN3(16)
INT_DP_TXP3(16)
EC_PECI(25)
R188 56.2/F_4
R134 10K/F_4
TP92
TP105
R318200/F_4
R330121/F_4
R315100/F_4
DPB_LANE0_N
DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P
PROC_DETECT#
PROCPWRGD
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
CATERR#
EC_PECI
PROCHOT#
AU60
AV60
AU61
AV15
AV61
C54
C55
B58
C58
B55
A55
A57
B57
C51
C50
C53
B54
C49
B50
A53
B53
D61
K61
N62
K63
C61
DDI1_TXN0
DDI1_TXP0
DDI1_TXN1
DDI1_TXP1
DDI1_TXN2
DDI1_TXP2
DDI1_TXN3
DDI1_TXP3
DDI2_TXN0
DDI2_TXP0
DDI2_TXN1
DDI2_TXP1
DDI2_TXN2
DDI2_TXP2
DDI2_TXN3
DDI2_TXP3
U10B
PROC_DETECT
CATERR
PECI
PROCHOT
PROCPWRGD
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_DRAMRST
SM_PG_CNTL1
BDW_ULT_LPDDR3
DDI EDP
1 OF 19
BDW_ULT_LPDDR3
MISC
THERMAL
PWR
DDR3
JTAG
2 OF 19
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_AUXN
EDP_AUXP
EDP_RCOMP
EDP_DISP_UTIL
PROC_TCK
PROC_TMS
PROC_TRST
PROC_TDI
PROC_TDO
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
PRDY
PREQ
C45
INT_eDP_TXN0
B46
INT_eDP_TXP0
A47
INT_eDP_TXN1
B47
INT_eDP_TXP1
C47
INT_eDP_TXN2
C46
INT_eDP_TXP2
A49
INT_eDP_TXN3
B49
INT_eDP_TXP3
A45
INT_eDP_AUXN
B45
INT_eDP_AUXP
D20
eDP_RCOMP
A43
EDP_DISP_UTIL
J62
K62
E60
XDP_TCK0
E61
XDP_TMS_CPU
E59
XDP_TRST#_CPU
F63
XDP_TDI_CPU
F62
XDP_TDO_CPU
J60
H60
H61
H62
K59
H63
K60
J61
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7SM_DRAMRST#
INT_eDP_TXN0 (15)
INT_eDP_TXP0 (15)
INT_eDP_TXN1 (15)
INT_eDP_TXP1 (15)
INT_eDP_TXN2 (15)
INT_eDP_TXP2 (15)
INT_eDP_TXN3 (15)
INT_eDP_TXP3 (15)
INT_eDP_AUXN (15)
INT_eDP_AUXP (15)
R824.9/F_2
TP83
TP28
TP21
XDP_PRDY#_CPU (11)
XDP_PREQ#_CPU (11)
XDP_TCK0 (7,11)
XDP_TMS_CPU (11)
XDP_TRST#_CPU (7,11)
XDP_TDI_CPU (11)
XDP_TDO_CPU (11)
XDP_BPM0 (11)
XDP_BPM1 (11)
TP102
TP103
TP22
TP99
TP25
TP19
+VCCIOA_OUT
eDP_COMPIO and ICOMPO signals should be shorted
near balls and routed with typical impedance <25 mohms
Processor pull-up (CPU)
H_PROCHOT#
XDP_TDO_CPU
XDP_TMS_CPU
XDP_TDI_CPU
XDP_TRST#_CPU
XDP_TCK0
R182 62_4
+V1.05S_VCCST
R166 51_4
R155 *51_4
R159 *51_4
R144 *51_4
R150 51_4
+V1.05S_VCCST
A A
PROJECT :PIKE
PROJECT :PIKE
PROJECT :PIKE
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 1/9(eDP/DDI)
ULT 1/9(eDP/DDI)
ULT 1/9(eDP/DDI)
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
1A
1A
1A
2 32Tuesday, October 28, 2014
2 32Tuesday, October 28, 2014
2 32Tuesday, October 28, 2014
5
M_A_DQ[63:0](12)
M_B_DQ[63:0](13)
M_A_DQSN[7:0](12)
M_A_DQSP[7:0](12)
M_B_DQSN[7:0](13)
M_B_DQSP[7:0](13)
4
Broadwell ULT Processor LPDDR3)
3
2
1
03
D D
BDW_ULT_LPDDR3
U10C
AH63
M_A_DQ0(12)
M_A_DQ1(12)
M_A_DQ2(12)
M_A_DQ3(12)
M_A_DQ4(12)
M_A_DQ5(12)
M_A_DQ6(12)
M_A_DQ7(12)
M_A_DQ8(12)
M_A_DQ9(12)
M_A_DQ10(12)
M_A_DQ11(12)
M_A_DQ12(12)
M_A_DQ13(12)
M_A_DQ14(12)
M_A_DQ15(12)
M_A_DQ16(12)
M_A_DQ17(12)
M_A_DQ18(12)
M_A_DQ19(12)
C C
B B
M_A_DQ20(12)
M_A_DQ21(12)
M_A_DQ22(12)
M_A_DQ23(12)
M_A_DQ24(12)
M_A_DQ25(12)
M_A_DQ26(12)
M_A_DQ27(12)
M_A_DQ28(12)
M_A_DQ29(12)
M_A_DQ30(12)
M_A_DQ31(12)
M_A_DQ32(12)
M_A_DQ33(12)
M_A_DQ34(12)
M_A_DQ35(12)
M_A_DQ36(12)
M_A_DQ37(12)
M_A_DQ38(12)
M_A_DQ39(12)
M_A_DQ40(12)
M_A_DQ41(12)
M_A_DQ42(12)
M_A_DQ43(12)
M_A_DQ44(12)
M_A_DQ45(12)
M_A_DQ46(12)
M_A_DQ47(12)
M_A_DQ48(12)
M_A_DQ49(12)
M_A_DQ50(12)
M_A_DQ51(12)
M_A_DQ52(12)
M_A_DQ53(12)
M_A_DQ54(12)
M_A_DQ55(12)
M_A_DQ56(12)
M_A_DQ57(12)
M_A_DQ58(12)
M_A_DQ59(12)
M_A_DQ60(12)
M_A_DQ61(12)
M_A_DQ62(12)
M_A_DQ63(12)
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AH62
AK63
AK62
AH61
AH60
AK61
AK60
AM63
AM62
AP63
AP62
AM61
AM60
AP61
AP60
AP58
AR58
AM57
AK57
AL58
AK58
AR57
AN57
AP55
AR55
AM54
AK54
AL55
AK55
AR54
AN54
AY58
AW58
AY56
AW56
AV58
AU58
AV56
AU56
AY54
AW54
AY52
AW52
AV54
AU54
AV52
AU52
AK40
AK42
AM43
AM45
AK45
AK43
AM40
AM42
AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
LPDDR3 CHANNEL A
3 OF 19
LPDDR3_RSVD1
LPDDR3_RSVD2
SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1
SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1
SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0
SA_CS#1
SA_ODT0
SA_CAA0
SA_CAA1
SA_CAA2
SA_CAA3
SA_CAA4
SA_CAA5
SA_CAA6
SA_CAA7
SA_CAA8
SA_CAA9
SA_CAB0
SA_CAB1
SA_CAB2
SA_CAB3
SA_CAB4
SA_CAB5
SA_CAB6
SA_CAB7
SA_CAB8
SA_CAB9
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7
AU37
AV37
AW36
AY36
AU43
AW43
AY42
AY43
AP33
AR32
AP32
AP36
AU39
AR36
AU40
AV40
AY39
AW39
AY41
AU41
AW41
AU42
AV42
AR35
AU34
AW34
AY34
AU35
AR38
AV35
AP35
AY37
AU36
AJ61
AN62
AM58
AM55
AV57
AV53
AL43
AL48
AJ62
AN61
AN58
AN55
AW57
AW53
AL42
AL49
AP49
AR51
AP51
M_A_CLKN0
M_A_CLKP0
M_A_CLKN1
M_A_CLKP1
M_A_CKE0
M_A_CKE1
M_A_CKE2
M_A_CKE3
M_A_CS#0
M_A_CS#1
M_A_ODT0
T3
T4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_B0
M_A_B1
M_A_B2
M_A_B3
M_A_B4
M_A_B5
M_A_B6
M_A_B7
M_A_B8
M_A_B9
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_CLKN0 (12,14)
M_A_CLKP0 (12,14)
M_A_CLKN1 (12,14)
M_A_CLKP1 (12,14)
M_A_CKE0 (12,14)
M_A_CKE1 (12,14)
M_A_CKE2 (12,14)
M_A_CKE3 (12,14)
M_A_CS#0 (12,14)
M_A_CS#1 (12,14)
M_A_ODT0 (12,14)
M_A_A0 (12,14)
M_A_A1 (12,14)
M_A_A2 (12,14)
M_A_A3 (12,14)
M_A_A4 (12,14)
M_A_A5 (12,14)
M_A_A6 (12,14)
M_A_A7 (12,14)
M_A_A8 (12,14)
M_A_A9 (12,14)
M_A_B0 (12,14)
M_A_B1 (12,14)
M_A_B2 (12,14)
M_A_B3 (12,14)
M_A_B4 (12,14)
M_A_B5 (12,14)
M_A_B6 (12,14)
M_A_B7 (12,14)
M_A_B8 (12,14)
M_A_B9 (12,14)
M_A_DQSN0 (12)
M_A_DQSN1 (12)
M_A_DQSN2 (12)
M_A_DQSN3 (12)
M_A_DQSN4 (12)
M_A_DQSN5 (12)
M_A_DQSN6 (12)
M_A_DQSN7 (12)
M_A_DQSP0 (12)
M_A_DQSP1 (12)
M_A_DQSP2 (12)
M_A_DQSP3 (12)
M_A_DQSP4 (12)
M_A_DQSP5 (12)
M_A_DQSP6 (12)
M_A_DQSP7 (12)
SM_VREF_CA (12)
SM_VREF_DQ0 (12)
SM_VREF_DQ1 (13)
M_B_DQ0(13)
M_B_DQ1(13)
M_B_DQ2(13)
M_B_DQ3(13)
M_B_DQ4(13)
M_B_DQ5(13)
M_B_DQ6(13)
M_B_DQ7(13)
M_B_DQ8(13)
M_B_DQ9(13)
M_B_DQ10(13)
M_B_DQ11(13)
M_B_DQ12(13)
M_B_DQ13(13)
M_B_DQ14(13)
M_B_DQ15(13)
M_B_DQ16(13)
M_B_DQ17(13)
M_B_DQ18(13)
M_B_DQ19(13)
M_B_DQ20(13)
M_B_DQ21(13)
M_B_DQ22(13)
M_B_DQ23(13)
M_B_DQ24(13)
M_B_DQ25(13)
M_B_DQ26(13)
M_B_DQ27(13)
M_B_DQ28(13)
M_B_DQ29(13)
M_B_DQ30(13)
M_B_DQ31(13)
M_B_DQ32(13)
M_B_DQ33(13)
M_B_DQ34(13)
M_B_DQ35(13)
M_B_DQ36(13)
M_B_DQ37(13)
M_B_DQ38(13)
M_B_DQ39(13)
M_B_DQ40(13)
M_B_DQ41(13)
M_B_DQ42(13)
M_B_DQ43(13)
M_B_DQ44(13)
M_B_DQ45(13)
M_B_DQ46(13)
M_B_DQ47(13)
M_B_DQ48(13)
M_B_DQ49(13)
M_B_DQ50(13)
M_B_DQ51(13)
M_B_DQ52(13)
M_B_DQ53(13)
M_B_DQ54(13)
M_B_DQ55(13)
M_B_DQ56(13)
M_B_DQ57(13)
M_B_DQ58(13)
M_B_DQ59(13)
M_B_DQ60(13)
M_B_DQ61(13)
M_B_DQ62(13)
M_B_DQ63(13)
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AY31
AW31
AY29
AW29
AV31
AU31
AV29
AU29
AY27
AW27
AY25
AW25
AV27
AU27
AV25
AU25
AM29
AK29
AL28
AK28
AR29
AN29
AR28
AP28
AN26
AR26
AR25
AP25
AK26
AM26
AK25
AL25
AY23
AW23
AY21
AW21
AV23
AU23
AV21
AU21
AY19
AW19
AY17
AW17
AV19
AU19
AV17
AU17
AR21
AR22
AL21
AM22
AN22
AP21
AK21
AK22
AN20
AR20
AK18
AL18
AK20
AM20
AR18
AP18
U10D
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
BDW_ULT_LPDDR3
LPDDR3 CHANNEL B
SB_CK#0
SB_CK0
SB_CK#1
SB_CK1
SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3
SB_CS#0
SB_CS#1
SB_ODT0
SB_CAA0
SB_CAA1
SB_CAA2
SB_CAA3
SB_CAA4
SB_CAA5
SB_CAA6
SB_CAA7
SB_CAA8
SB_CAA9
SB_CAB0
SB_CAB1
SB_CAB2
SB_CAB3
SB_CAB4
SB_CAB5
SB_CAB6
SB_CAB7
SB_CAB8
SB_CAB9
SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7
SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7
LPDDR3_RSVD3
LPDDR3_RSVD4
AM38
AN38
AK38
AL38
AY49
AU50
AW49
AV50
AM32
AK32
AL32
AP45
AU46
AW46
AY47
AY46
AU49
AU47
AV47
AP46
AR46
AK33
AM33
AK35
AM35
AL35
AP42
AM36
AK36
AR40
AP40
AW30
AV26
AN28
AN25
AW22
AV18
AN21
AN18
AV30
AW26
AM28
AM25
AV22
AW18
AM21
AM18
AR42
AR45
M_B_CLKN0
M_B_CLKP0
M_B_CLKN1
M_B_CLKP1
M_B_CKE0
M_B_CKE1
M_B_CKE2
M_B_CKE3
M_B_CS#0
M_B_CS#1
M_B_ODT0
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_B0
M_B_B1
M_B_B2
M_B_B3
M_B_B4
M_B_B5
M_B_B6
M_B_B7
M_B_B8
M_B_B9
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
T2
T1
M_B_CLKN0 (13,14)
M_B_CLKP0 (13,14)
M_B_CLKN1 (13,14)
M_B_CLKP1 (13,14)
M_B_CKE0 (13,14)
M_B_CKE1 (13,14)
M_B_CKE2 (13,14)
M_B_CKE3 (13,14)
M_B_CS#0 (13,14)
M_B_CS#1 (13,14)
M_B_ODT0 (13,14)
M_B_A0 (13,14)
M_B_A1 (13,14)
M_B_A2 (13,14)
M_B_A3 (13,14)
M_B_A4 (13,14)
M_B_A5 (13,14)
M_B_A6 (13,14)
M_B_A7 (13,14)
M_B_A8 (13,14)
M_B_A9 (13,14)
M_B_B0 (13,14)
M_B_B1 (13,14)
M_B_B2 (13,14)
M_B_B3 (13,14)
M_B_B4 (13,14)
M_B_B5 (13,14)
M_B_B6 (13,14)
M_B_B7 (13,14)
M_B_B8 (13,14)
M_B_B9 (13,14)
M_B_DQSN0 (13)
M_B_DQSN1 (13)
M_B_DQSN2 (13)
M_B_DQSN3 (13)
M_B_DQSN4 (13)
M_B_DQSN5 (13)
M_B_DQSN6 (13)
M_B_DQSN7 (13)
M_B_DQSP0 (13)
M_B_DQSP1 (13)
M_B_DQSP2 (13)
M_B_DQSP3 (13)
M_B_DQSP4 (13)
M_B_DQSP5 (13)
M_B_DQSP6 (13)
M_B_DQSP7 (13)
4 OF 19
A A
PROJECT :PIKE
PROJECT :PIKE
PROJECT :PIKE
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Re
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 2/9 (DDR3 I/F)
ULT 2/9 (DDR3 I/F)
ULT 2/9 (DDR3 I/F)
Date: Sheet
Date: Sheet of
5
4
3
2
Date: Sheet of
1
v
1A
1A
1A
of
3 32Tuesday, October 28, 2014
3 32Tuesday, October 28, 2014
3 32Tuesday, October 28, 2014
5
4
3
2
1
32A
BDW_ULT_LPDDR3
HSW ULT POWER
12 OF 19
Layout note: need routing
together and ALERT need
between CLK and DATA.
H_CPU_SVIDALRT#
VR_SVID_CLK
H_CPU_SVIDDAT
R194 43_4
+V1.05S_VCCST
+V1.05S_VCCST
R185
130/F_4
AH26
AJ31
AJ33
AJ37
AN33
AP43
AR48
AY35
AY40
AY44
AY50
AC58
AB23
AD23
AA23
AE59
AD60
AD59
AA59
AE60
AC59
AG58
AC22
AE22
AE23
AB57
AD57
AG57
L59
J58
N58
E63
A59
E20
L62
N63
L63
B59
F60
C59
D63
H59
P62
P60
P61
N59
N61
T59
U59
V59
C24
C28
C32
U10L
RSVD
RSVD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
RSVD
RSVD
VCC_SENSE
RSVD
VCCIO_OUT
VCCIOA_OUT
RSVD
RSVD
RSVD
VIDALERT
VIDSCLK
VIDSOUT
VCCST_PW RGD
VR_EN
VR_READY
VSS
PWR_DEBUG
VSS
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VCCST
VCCST
VCCST
VCC
VCC
VCC
VCC
VCC
VCC
1.4A
+1.2VSUS
Close to CPU
C340
C338
10U/6.3V_4/S
C337
10U/6.3V_4/S
C334
10U/6.3V_4/S
C330
D D
10U/6.3V_4/S
10U/6.3V_4/S
C333
10U/6.3V_4/S
Direct tie to CPU VCC/VSS-Ball
C331
2.2U/6.3V_4
IMVP_PWRGD_R(6,25)
VR_READY(28)
+V1.05S_VCCST
C C
B B
R165
150/F_4
PWR_DEBUG
R99 *0_6
*4.7U/6.3V_6
R212 *0_8/S
C332
C339
2.2U/6.3V_4
H_VCCST_PWRGD H_VCCST_PWRGD_R
TP16
PWR_DEBUG(11)
TP98
+VCCIO_OUT+1.05V
C122
+V1.05S_VCCST+1.05V
C184
*1U/6.3V_4
2.2U/6.3V_4
VCC_SENSE(28)
+VCCIOA_OUT
100- ±1% pull-up to VCC
near processor.
IMVP_PWRGD_R
R104 *0_4/S
C179
*22U/6.3V_6
C329
2.2U/6.3V_4
+VCC_CORE
+VCCIO_OUT
R119 *0_4/S
R154 100/F_4
H_CPU_SVIDALRT#
R107 10K_4
PWR_DEBUG
+V1.05S_VCCST
+VCC_CORE
VR_SVID_CLK
H_CPU_SVIDDAT
TP31
TP30
TP29
TP108
+VCC_CORE
C36
VCC
C40
VCC
C44
VCC
C48
VCC
C52
VCC
C56
VCC
E23
VCC
E25
VCC
E27
VCC
E29
VCC
E31
VCC
E33
VCC
E35
VCC
E37
VCC
E39
VCC
E41
VCC
E43
VCC
E45
VCC
E47
VCC
E49
VCC
E51
VCC
E53
VCC
E55
VCC
E57
VCC
F24
VCC
F28
VCC
F32
VCC
F36
VCC
F40
VCC
F44
VCC
F48
VCC
F52
VCC
F56
VCC
F59
VCC
G23
VCC
G25
VCC
G27
VCC
G29
VCC
G31
VCC
G33
VCC
G35
VCC
G37
VCC
G39
VCC
G41
VCC
G43
VCC
G45
VCC
G47
VCC
G49
VCC
G51
VCC
G53
VCC
G55
VCC
G57
VCC
H23
VCC
J23
VCC
K23
VCC
K57
VCC
L22
VCC
M23
VCC
M57
VCC
P57
VCC
U57
VCC
W57
VCC
R179
75/F_4
SVID ALERT
C168 *0.1U/10V_4
SVID CLK
PN need to update
ID DATA
SV
VR_SVID_DATA (28)
C84
22U/6.3V_6
C80
47U/6.3V_8
C105
22U/6.3V_6
C87
22U/6.3V_6
C108
22U/6.3V_6
VR_SVID_ALERT# (28)
VR_SVID_CLK (28)
C85
22U/6.3V_6
C82
22U/6.3V_6
C486
47U/6.3V_8
C77
22U/6.3V_6
C81
22U/6.3V_6
C485
47U/6.3V_8
C104
22U/6.3V_6
C86
22U/6.3V_6
C109
22U/6.3V_6
CFG0-19 need Reserve TP
CFG0(11)
CFG1(11)
C79
47U/6.3V_8
C107
22U/6.3V_6
C83
22U/6.3V_6
C106
22U/6.3V_6
HWPG(11,25,30) H_VCCST_PWRGD (11,30)
CFG2(11)
CFG3(11)
CFG4(11)
CFG5(11)
CFG6(11)
CFG7(11)
CFG8(11)
CFG9(11)
CFG10(11)
CFG11(11)
CFG12(11)
CFG13(11)
CFG14(11)
CFG15(11)
CFG16(11)
CFG17(11)
CFG18(11)
CFG19(11)
+VCC_CORE
EC7
EC8
*12P/6.3V_2
*12P/6.3V_2
D2 RB500V-40
21
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
EMI reserve
HWPG
+V1.05S_VCCST
R90
1K_4
C78
*10P/50V_4
TP113
TP44
TP47
TP39
TP46
TP50
TP41
TP45
TP37
TP43
TP42
TP40
TP35
TP32
TP70
TP36
TP52
TP48
TP38
TP34
R197
49.9/F_4
R114
8.2K/F_4
R540 10K_2
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG18
CFG17
CFG19
CFG_RCOMP
TD_IREF
AC60
AC62
AC63
AA63
AA60
AA62
AA61
Y62
Y61
Y60
V62
V61
V60
U60
T63
T62
T61
T60
U63
U62
V63
A5
E1
D1
J20
H18
B12
+3VS5
U10S
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG18
CFG17
CFG19
CFG_RCOMP
RSVD
RSVD
RSVD
RSVD
RSVD
TD_IREF
BDW_ULT_LPDDR3
RESERVED
PROC_OPI_RCOMP
19 OF 19
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
RSVD
RSVD
R373
*0_4/S
R97
100K_4 NTC
AV63
TP121
AU63
TP120
C63
TP93
C62
TP94
B43
A51
TP82
B51
TP85
L60
TP27
N60
W23
Y22
AY15
PROC_OPI_RCOMP
AV62
D58
P22
N21
P20
R20
IO Thrm Protect
+3VPCU
For 65 degree, 1.8v limit, (SW)
R369
16.5K/F_4
THRM_MOINTOR
R368
3.3K/F_4
For 75 degree, 1.2v limit, (HW)
R371
*0_4/S
THER_CPUTHER_CPU2
R2
SI modify
*100K_4 NTC
R373:stuff
R2: non-stuff
49.9/F_4
1 2
1 2
R349
C346
0.1U/10V_4
C345
0.1U/10V_4
04
THRM_MOINTOR1 (25)
A A
+VCCIOA_OUT (2)
+VCCIO_OUT
+1.2VSUS (2,12,13,29,31)
+1.05V (7,10,11,25,28,30,32)
+VCC_CORE (28)
5
Processor Strapping
CFG3
(Physcial Debug Enable)
DFX Privacy
CFG4
(DP Presence Strap)
4
The CFG signals have a default value of '1' if not terminated on the board.
1 0
Disable: Enable: Set DFX Enable in DFX interface MSR
Disable; No physical DP attached to eDP
Enable; An ext DP device is connected to eDP
3
CFG3
CFG4
2
Circuit
R199 *1K_4
R314 1K_4
PROJECT :PIKE
PROJECT :PIKE
PROJECT :PIKE
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Re
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
04 -- ULT 3/9 (POWER-1)
04 -- ULT 3/9 (POWER-1)
04 -- ULT 3/9 (POWER-1)
Date: Sheet
Date: Sheet of
Date: Sheet of
1
of
4 32Tuesday, October 28, 2014
4 32Tuesday, October 28, 2014
4 32Tuesday, October 28, 2014
v
1A
1A
1A
5
BDW_ULT_LPDDR3
U10N
A11
VSS
A14
VSS
A18
VSS
A24
VSS
A28
VSS
A32
VSS
A36
VSS
A40
VSS
A44
VSS
A48
AA58
AB10
AB20
AB22
AC61
AD21
AD63
AE10
AE58
AF11
AF12
AF14
AF15
AF17
AF18
AG11
AG21
AG23
AG60
AG61
AG62
AG63
AH17
AH19
AH20
AH22
AH24
AH28
AH30
AH32
AH34
AH36
AH38
AH40
AH42
AH44
AH49
AH51
AH53
AH55
AH57
AJ13
AJ14
AJ23
AJ25
AJ27
AJ29
VSS
A52
VSS
A56
VSS
AA1
VSS
VSS
VSS
VSS
VSS
AB7
VSS
VSS
VSS
AD3
VSS
VSS
VSS
AE5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
14 OF 19
D D
C C
B B
AJ35
VSS
AJ39
VSS
AJ41
VSS
AJ43
VSS
AJ45
VSS
AJ47
VSS
AJ50
VSS
AJ52
VSS
AJ54
VSS
AJ56
VSS
AJ58
VSS
AJ60
VSS
AJ63
VSS
AK23
VSS
AK3
VSS
AK52
VSS
AL10
VSS
AL13
VSS
AL17
VSS
AL20
VSS
AL22
VSS
AL23
VSS
AL26
VSS
AL29
VSS
AL31
VSS
AL33
VSS
AL36
VSS
AL39
VSS
AL40
VSS
AL45
VSS
AL46
VSS
AL51
VSS
AL52
VSS
AL54
VSS
AL57
VSS
AL60
VSS
AL61
VSS
AM1
VSS
AM17
VSS
AM23
VSS
AM31
VSS
AM52
VSS
AN17
VSS
AN23
VSS
AN31
VSS
AN32
VSS
AN35
VSS
AN36
VSS
AN39
VSS
AN40
VSS
AN42
VSS
AN43
VSS
AN45
VSS
AN46
VSS
AN48
VSS
AN49
VSS
AN51
VSS
AN52
VSS
AN60
VSS
AN63
VSS
AN7
VSS
AP10
VSS
AP17
VSS
AP20
VSS
U10R
AT2
RSVD
AU44
RSVD
AV44
RSVD
D15
RSVD
F22
RSVD
H22
RSVD
J21
RSVD
4
BDW_ULT_LPDDR3
18 OF 19
AP22
AP23
AP26
AP29
AP31
AP38
AP39
AP48
AP52
AP54
AP57
AR11
AR15
AR17
AR23
AR31
AR33
AR39
AR43
AR49
AR52
AT13
AT35
AT37
AT40
AT42
AT43
AT46
AT49
AT61
AT62
AT63
AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14
AV16
AV20
AV24
AV28
AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55
3
BDW_ULT_LPDDR3
U10O
VSS
VSS
VSS
VSS
AP3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AR5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AU1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
15 OF 19
N23
R23
T23
U10
AL1
AM11
AP7
AU10
AU15
AW14
AY14
AV59
VSS
AV8
VSS
AW16
VSS
AW24
VSS
AW33
VSS
AW35
VSS
AW37
VSS
AW4
VSS
AW40
VSS
AW42
VSS
AW44
VSS
AW47
VSS
AW50
VSS
AW51
VSS
AW59
VSS
AW60
VSS
AY11
VSS
AY16
VSS
AY18
VSS
AY22
VSS
AY24
VSS
AY26
VSS
AY30
VSS
AY33
VSS
AY4
VSS
AY51
VSS
AY53
VSS
AY57
VSS
AY59
VSS
AY6
VSS
B20
VSS
B24
VSS
B26
VSS
B28
VSS
B32
VSS
B36
VSS
B4
VSS
B40
VSS
B44
VSS
B48
VSS
B52
VSS
B56
VSS
B60
VSS
C11
VSS
C14
VSS
C18
VSS
C20
VSS
C25
VSS
C27
VSS
C38
VSS
C39
VSS
C57
VSS
D12
VSS
D14
VSS
D18
VSS
D2
VSS
D21
VSS
D23
VSS
D25
VSS
D26
VSS
D27
VSS
D29
VSS
D30
VSS
D31
VSS
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
TP129
DC_TEST_AY61_AW61
DC_TEST_AY62_AW62
DC_TEST_A3_B3
TP89
DC_TEST_A61_B61
DC_TEST_B62_B63
DC_TEST_C1_C2
TEST_AY60
TEST_B2
AY60
AY61
AY62
D33
D34
D35
D37
D38
D39
D41
D42
D43
D45
D46
D47
D49
D5
D50
D51
D53
D54
D55
D57
D59
D62
D8
E11
E17
F20
F26
F30
F34
F38
F42
F46
F50
F54
F58
F61
G18
G22
G3
G5
G6
G8
H13
AY2
AY3
B2
B3
B61
B62
B63
C1
C2
BDW_ULT_LPDDR3
U10P
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U10Q
DAISY_CHAIN_NCTF_AY2
DAISY_CHAIN_NCTF_AY3
DAISY_CHAIN_NCTF_AY60
DAISY_CHAIN_NCTF_AY61
DAISY_CHAIN_NCTF_AY62
DAISY_CHAIN_NCTF_B2
DAISY_CHAIN_NCTF_B3
DAISY_CHAIN_NCTF_B61
DAISY_CHAIN_NCTF_B62
DAISY_CHAIN_NCTF_B63
DAISY_CHAIN_NCTF_C1
DAISY_CHAIN_NCTF_C2
VSS
16 OF 19
2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS_SENSE
VSS
BDW_ULT_LPDDR3
17 OF 19
H17
H57
J10
J22
J59
J63
K1
K12
L13
L15
L17
L18
L20
L58
L61
L7
M22
N10
N3
P59
P63
R10
R22
R8
T1
T58
U20
U22
U61
U9
V10
V3
V7
W20
W22
Y10
Y59
Y63
V58
AH46
V23
E62
AH16
DAISY_CHAIN_NCTF_A3
DAISY_CHAIN_NCTF_A4
DAISY_CHAIN_NCTF_A60
DAISY_CHAIN_NCTF_A61
DAISY_CHAIN_NCTF_A62
DAISY_CHAIN_NCTF_AV1
DAISY_CHAIN_NCTF_AW1
DAISY_CHAIN_NCTF_AW2
DAISY_CHAIN_NCTF_AW3
DAISY_CHAIN_NCTF_AW61
DAISY_CHAIN_NCTF_AW62
DAISY_CHAIN_NCTF_AW63
R158
100/F_4
VSS_SENSE (28)
A3
DC_TEST_A3_B3
A4
TEST_A4
A60
TEST_A60
A61
DC_TEST_A61_B61
A62
TEST_A62
AV1
TEST_AV1
AW1
TEST_AW1
AW2
DC_TEST_AY2_AW2
AW3
DC_TEST_AY3_AW3
AW61
DC_TEST_AY61_AW61
AW62
DC_TEST_AY62_AW62
AW63
TEST_AW63
TP81
TP84
TP91
TP67
TP123
TP128
1
05
A A
PROJECT :PIKE
PROJECT :PIKE
PROJECT :PIKE
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 4/9 (RSV,GND)
ULT 4/9 (RSV,GND)
ULT 4/9 (RSV,GND)
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
1A
1A
1A
5 32Tuesday, October 28, 2014
5 32Tuesday, October 28, 2014
5 32Tuesday, October 28, 2014
5
4
3
2
1
Lynx Point-LP Platform Controller Hub (LVDS,DDI)
06
D D
SUSWARN#
R268 0_4
SUSACK#
SYS_RESET#
R271 0_4
R50 0_2
PCH_SLP_S0_N
PCH_SLP_WLAN_N
PCH_DPST_PWM(15)
PCH_LVDS_BLON(15)
PCH_DISP_ON(15)
TS_INT#(15)
TP116
TP79
TP117
R5150_2
TP107
TP100
PCH_HOME#
EC_PWROK
PLTRST#
RSMRST#
SUSWARN#
AC_PRESENT_R
PM_BATLOW#
PCH_DPST_PWM
PCH_LVDS_BLON
PCH_DISP_ON
GPIO77_ULT
GPIO78_ULT
PIRQC#
PIRQD#
PCI_PME#
CODEC_IRQ
TS_INTB#
TS_INT#
TP_INT#
SYS_PWROK_R(11,30)
EC_PWROK(25,30)
iAMT
iAMT
C C
B B
APWROK_EC(25)
RSMRST#(25)
SUSWARN#_EC(25)
DNBSWON#(11,25)
AC_PRESENT_EC(25)
PCH_SLP_S0#(31)
PCH_SLP_WLAN#(25)
SI modify
CODEC_IRQ(18)
PCH_HOME#(19)
U10H
AK2
SUSACK
AC3
SYS_RESET
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
PLTRST
AW6
RSMRST
AV4
SUSWARN/SUSPWRDNACK/GPIO30
AL7
PWRBTN
AJ8
ACPRESENT/GPIO31
AN4
BATLOW/GPIO72
AF3
SLP_S0
AM5
SLP_WLAN/GPIO29
U10I
B8
EDP_BKLCTL
A9
EDP_BKLEN
C6
EDP_VDDEN
U6
PIRQA/GPIO77
P4
PIRQB/GPIO78
N4
PIRQC/GPIO79
N2
PIRQD/GPIO80
AD4
PME
U7
GPIO55
L1
GPIO52
L3
GPIO54
R5
GPIO51
L4
GPIO53
BDW_ULT_LPDDR3
SYSTEM POWER MANAGEMENT
8 OF 19
BDW_ULT_LPDDR3
eDP SIDEBAND
GPIO
9 OF 19
DISPLAY
DSWVRMEN
DPWROK
WAKE
CLKRUN/GPIO32
SUS_STAT/GPIO61
SUSCLK/GPIO62
SLP_S5/GPIO63
SLP_S4
SLP_S3
SLP_A
SLP_SUS
SLP_LAN
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP
DDPB_HPD
DDPC_HPD
EDP_HPD
DSWVRMEN (7)
AW7
DSWVRMEN
AV5
DPWROK RSMRST#
AJ5
PCIE_WAKE#
V5
CLKRUN#
AG4
SUS_STAT#
AE6
PCH_SUSCLK
AP5
SLP_S5#
AJ6
AT4
AL5
AP4
AJ7
B9
C9
D9
D11
C5
B6
B5
A6
C8
A8
D6
TP54
SLP_SUS#_EC
SLP_LAN#
SDVO_CLK
SDVO_DATA
HDMI_HPD_CON
Ra
R538 0_2
R335 *0_4
Rb
TP51
TP72
TP65
TP53
ULT_EDP_HPD (15)
R66
100K_2
RTD2132R Vender request PD 100kohm
For DS3 -->Ra
Non-DS3 -->Rb
DPWROK_EC
TP141
SDVO_CLK (17)
SDVO_DATA (17)
INT_DP_SCL (16)
INT_DP_SDA (16)
HDMI_HPD_CON (17)
INT_DP_HPD_Q (16)
DPWROK_EC (25)
PCIE_WAKE# (21,23,25)
CLKRUN# (25)
PCH_SUSCLK (21)
SUSC# (25)
SUSB# (25)
SLP_A# (25)
SLP_SUS#_EC (25)
INT_DP_AUXN (16)
INT_DP_AUXP (16)
iAMT
HDMI
Mini-DP
Mini-DP
HDMI
Mini-DP
+3VS5(4,7,9,10,22,23,30,31,32)
+3V(7,8,9,10,11,12,13,15,16,17,18,19,21,22,23,24,25,30,32)
INT_DP_SCL
INT_DP_SDA
R113 4.7K_4
R118 4.7K_4
+3V
PCH Pull-high/low(CLG)
PM_BATLOW#
PCIE_WAKE#
DNBSWON#
SUSACK#
SUSWARN#
PWRBTN# internally PU in PCH to 3.3V_DSW
AC_PRESENT_R
A A
SYS_PWROK_R
CLKRUN#
SYS_RESET#
RSMRST#
APWROK_EC
R39 10K_2
R31 1K_2
R507 4.7K_4
R544 10K_4
R543 10K_4
R49 *10K_2
R261 1K_4
R12 8.2K/F_2
R240 10K_4
R242 *1K_4
R340 10K_4
R338 *100K_4
+3VS5
+3V_DEEP_SUS
+3V
5
for DS3
+3VS5
PLTRST#(CLG)
R24 100K_2
PLTRST#
PLTRST# (11,21,23,25)
4
Check Q16 Rise/Fall time less than 100ns
3
System PWR_OK(CLG)
SYS_PWROK_R
4
U6
*TC7SH08FU
+3VS5
C120 *0.1U/10V_4
2
1
EC_PWROK
3 5
R112
*10K_4
R138 *0_4/S
SI reserve for RF request
2
IMVP_PWRGD_R (4,25)
IMVP_PWRGD_R
*10P/50V_4
C128
PCI Pull-up(CLG)
TS_INT#
TS_INTB#
PIRQC#
PIRQD#
PCH_HOME#
GPIO77_ULT
GPIO78_ULT
CODEC_IRQ
TP_INT#
CODEC_IRQ
CODEC_IRQ
PU-->HD-A (win 7)
PD-->I2S (win 8)
R171 10K_4
R167 10K_4
R4 10K_2
R186 10K_4
R180 *10K_4
R11 10K_2
R196 10K_4
R10 *10K_2
R5 *10K_2
R542 10K_2
PROJECT :PIKE
PROJECT :PIKE
PROJECT :PIKE
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 5/9(Power Manger)
ULT 5/9(Power Manger)
ULT 5/9(Power Manger)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
+3V
1A
1A
1A
6 32Tuesday, October 28, 2014
6 32Tuesday, October 28, 2014
6 32Tuesday, October 28, 2014
Lynx Point-LP Platform Controller Hub
(HDA,JTAG,SATA)
+3V_RTC
D D
ACZ_SDIN0(18)
XDP_TRST#_CPU(2,11)
JTAG_TCK_PCH(11)
JTAG_TDI_PCH(11)
JTAG_TDO_PCH(11)
JTAG_TMS_PCH(11)
JTAGX_PCH(2,11)
RF Solution
C C
+1.05VS5
JTAGX_PCH
JTAG_TMS_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
B B
A A
C491 *22U/6.3V_6
C487 *10P/50V_2
C488 *10P/50V_2
C489 *10P/50V_2
C492 *10P/50V_2
C490 *10P/50V_2
+1.05VS5+1.05V
R321 *0_4
PCH Strap Table
Pin Name Strap description Sampled Configuration
SPKR
SDIO_D0 /GPIO66
INTVRMEN
HDA_SDO /I2S0_TXD
GSPI0_MOSI /GPIO86
GPIO15
DSWVRMEN
5
R352 1M_4
TP130
TP66
TP71
TP63
TP127
TP64
R248 *51_4
R241 *51_4
R234 *51_4
R254 *51_4
R262 *51_4
Close to Chipset
5
U10E
RTC_X1
RTC_X2
SM_INTRUDER#
PCH_INVRMEN
SRTC_RST#
RTC_RST#
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
XDP_TRST#_CPU
JTAG_TCK_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TMS_PCH
JTAGX_PCH
JTAGX_PCH
JTAG_TMS_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TCK_PCH
AW5
RTCX1
AY5
RTCX2
AU6
INTRUDER
AV7
INTVRMEN
AV6
SRTCRST
AU7
RTCRST
AW8
HDA_BCLK/I2S0_SCLK
AV11
HDA_SYNC/I2S0_SFRM
AU8
HDA_RST/I2S_MCLK
AY10
HDA_SDI0/I2S0_RXD
AU12
HDA_SDI1/I2S1_RXD
AU11
HDA_SDO/I2S0_TXD
AW10
HDA_DOCK_EN/I2S1_TXD
AV10
HDA_DOCK_RST/I2S1_SFRM
AY8
I2S1_SCLK
AU62
PCH_TRST
AE62
PCH_TCK
AD61
PCH_TDI
AE61
PCH_TDO
AD62
PCH_TMS
AL11
RSVD
AC4
RSVD
AE63
JTAGX
AV2
RSVD_AV2
LAD0(21,23,25)
LAD1(21,23,25)
LAD2(21,23,25)
LAD3(21,23,25)
LFRAME#(21,23,25)
PCH_SPI1_CLK
PCH_SPI_CS0#
PCH_SPI1_SI
PCH_SPI1_SO
PCH_SPI_IO2
PCH_SPI_IO3
AU14
AW12
AY12
AW11
AV12
RTC
JTAG
U10G
LAD0
LAD1
LAD2
LAD3
LFRAME
AA3
SPI_CLK
Y7
SPI_CS0
Y4
SPI_CS1
AC2
SPI_CS2
AA2
SPI_MOSI
AA4
SPI_MISO
Y6
SPI_IO2
AF1
SPI_IO3
No reboot mode setting PWROK
Top-Block Swap
PWROK
Integrated 1.05V VRM enable ALWAYS Should be always pull-up
Flash Descriptor Security
Only for Interposer
Boot BIOS Selection
PWROK
PWROK
TLS Confidentiality PWROK
Deep Sx Well
On-Die Voltage
Regulator Enable
ALWAYS Should be always pull-up
4
BDW_ULT_LPDDR3
SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3
SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2
SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1
SATAAUDIO
5 OF 19
BDW_ULT_LPDDR3
LPC
SPI C-LINK
7 OF 19
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode
1 = Default (weak pull-up 20K)
0 = Default (weak pull-down 20K)
1 = Can be Overridden
GNT0#
0 = ME Crypto Transport Layer Security
cipher suite with no confidentiality(Default)
1 = Intel ME Crypto TLS cipher suite with
confidentiality
4
SMBUS
SML1ALERT/PCHHOT/GPIO73
Boot Location
1
LPC
0
SPI(Default)
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0
SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3
SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2
SATA_TN2/PETN6_L1
SATA_TP2/PETP6_L1
SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
SATA0GP/GPIO34
SATA1GP/GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37
SATA_IREF
RSVD
RSVD
SATA_RCOMP
SATALED
SMBALERT/GPIO11
SMBDATA
SML0ALERT/GPIO60
SML0CLK
SML0DATA
SML1CLK/GPIO75
SML1DATA/GPIO74
CL_DATA
3
HDD0 (SATA3 6.0Gb/s) 15.6"
J5
SATA_RXN0
H5
SATA_RXP0
B15
SATA_TXN0
A15
SATA_TXP0
J8
H8
A17
B17
J6
H6
B14
C15
F5
E5
C17
D17
V1
U1
V6
AC1
GPIO37
A12
SATA_IREF
L11
K10
C12
SATA_RCOMP
U3
DG recommended that SATA AC coupling capacitors should be
close to the connector (<100 mils) for optimal signal quality.
AN2
SMBALERT#
AP2
SMBCLK
CL_CLK
CL_RST
SMB_PCH_CLK
AH1
SMB_PCH_DAT
AL2
SML0ALERT#
AN1
SMB_ME0_CLK
AK1
SMB_ME0_DAT
AU4
SML1ALERT#
AU3
SMB_ME1_CLK
AH3
SMB_ME1_DAT
AF2
AD2
AF4
+3V_DEEP_SUS
Circuit
+3V_RTC
CL_CLK (23)
CL_DAT (23)
CL_RST# (23)
+3V
+3V_RTC
SATA_RXN0 (21)
SATA_RXP0 (21)
SATA_TXN0 (21)
SATA_TXP0 (21)
SATA_RXN1 (21)
SATA_RXP1 (21)
SATA_TXN1 (21)
SATA_TXP1 (21)
SATA_RXN2 (21)
SATA_RXP2 (21)
SATA_TXN2 (21)
SATA_TXP2 (21)
SATA_RXN3 (21)
SATA_RXP3 (21)
SATA_TXN3 (21)
SATA_TXP3 (21)
R102 *0_6/S
R115 3.01K/F_4
R198 10K_4
SMB_PCH_CLK (8)
SMB_PCH_DAT (8)
SML0ALERT# (24)
SMB_ME0_CLK (24)
SMB_ME0_DAT (24)
TP125
SMB_ME1_CLK
SMB_ME1_DAT
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SMB_ME1_CLK
SMB_ME1_DAT
SML1ALERT#
SML0ALERT#
R214 *1K_4
R123 *1K_4
R124 *1K_4
R347 330K_4
GPIO33_EC(25)
R18 *1K_2
R348 330K_4
PCH_SPI_CS0#_R(25)
PCH_SPI1_CLK_R(25)
PCH_SPI1_SI_R(25)
PCH_SPI1_SO_R(25)
3
GPIO34 (21)
GPIO35 (21)
GPIO36 (21)
GPIO37 (21)
+V1.05S_ASATA3PLL
SATA_LED# (21)
+3V
SMBus/Pull-up(CLG)
R296 10K_4
R48 2.2K_2
R34 2.2K_2
R294 2.2K_4
R285 2.2K_4
R47 2.2K_2
R35 2.2K_2
R322 10K_4
R284 1K_4
SPKR
PCH_INVRMEN
R361 1K_4
GPIO15_ULT (9)
DSWVRMEN (6)
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
+3V_DEEP_SUS
SPKR (9)
GPIO66_ULT (9)
ACZ_SDOUT
2
RTC Clock 32.768KHz
SI modify from 12pF to 3.3pF
C326 3.3P/50V_4
12
Y3
C325 3.3P/50V_4
32.768KHz
R172 *0_4
RTC_X1
R336
10M_4
RTC_X2
RTC Circuitry(RTC)
RTC Power trace width 20mils.
+3VPCU
2 1
D9 MEK500V-40
C335
1U/6.3V_4
HDA Bus(CLG)
ACZ_SYNC_AUDIO(18)
ACZ_RST#_AUDIO(18)
ACZ_SDOUT_AUDIO(18)
BIT_CLK_AUDIO(18)
*10P/50V_4
Vender
EON
Winbond AKE3EFP0N07 (W25Q64FVSSIQ (QE))
Winbond
Size
8MB AKE3EZN0Q01 (EN25QH64-104HIP (QE))
8MB
16MB
Socket
R365 33_4
R346 33_4
R363 33_4
R353 33_4
C327
P/N
AKE3DZN0N01 (W25Q128FVSIQ (QE))
DFHS08FS023
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
ACZ_BCLK
PCH SPI ROM(CLG)
TP73
TP76
TP1-6 need place to TOP
C315 1U/10V_4
+3V (6,8,9,10,11,12,13,15,16,17,18,19,21,22,23,24,25,30,32)
+5V (17,18,19,22,32)
+1.05V (4,10,11,25,28,30,32)
+3VS5 (4,6,9,10,22,23,30,31,32)
+3VPCU (4,22,23,25,26,27,28,29,30,31,32)
+3V_RTC (10,22,26,27)
+V1.05S_ASATA3PLL (10)
2
TP75
TP74
TP78
TP122
PCH_SPI_CS0#
PCH_SPI1_SI PCH_SPI1_SI_R
PCH_SPI1_SO PCH_SPI1_SO_R
+3VSPI
PCH_SPI_IO2
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
BIOS_WP#
HOLD#
R298 15/F_4
R325 15/F_4
R337 15/F_4
R319 15/F_4
R323 3.3K/F_4
R324 15/F_4
PCH_SPI_CS0#_R
PCH_SPI1_CLK_RPCH_SPI1_CLK
C318
22P/50V_4
BIOS_WP#
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
30mils
+3V_RTC
32KHZ_EC (23,30)
R366
20K/F_4
R364
20K/F_4
J1
*SOLDERJUMPER-2
1 2
C341
1U/6.3V_4
C342
1U/6.3V_4
07
RTC_RST#
SRTC_RST#
GPIO Pull UP
4M SPI ROM Socket
U17
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
BIOS_WP#
iAMT
1
6
5
2
3
PROJECT :PIKE
PROJECT :PIKE
PROJECT :PIKE
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ULT 6/9(SATA/HDA)
ULT 6/9(SATA/HDA)
ULT 6/9(SATA/HDA)
1
6
5
2
3
*50960-0084N-001
DFHS08FS023
91960-0084L-8P-SOCKET
+3VS5
+3V_M
U16
CE#
VDD
SCK
SI
SO
HOLD#
WP#
VSS
W25Q128FVSIQ (QE)
AKE3DZN0N01
1
CE#
SCK
SI
SO
WP#
8
7
4
8
VDD
7
HOLD#
4
VSS
R305 *0_4
R510 *0_4/S
+3VSPI
R310 3.3K/F_4
HOLD#
R317 15/F_4
0.1U/10V_4
PCH_SPI_IO3
7 32Tuesday, October 28, 2014
7 32Tuesday, October 28, 2014
7 32Tuesday, October 28, 2014
HOLD#
C314
+3VSPI
1A
1A
1A
5
4
3
2
1
Lynx Point-LP Platform Controller Hub
(HDA,JTAG,SATA)
U10K
F10
PERN5_L0
E10
D D
PCIE_RXN3_WLAN(23)
WLAN
C C
Left side USB30
Cardreader
B B
Cardreader
WLAN
SSD
A A
PCIE_RXP3_WLAN(23)
PCIE_TXN3_WLAN(23)
PCIE_TXP3_WLAN(23)
USB30_RX3-(20)
USB30_RX3+(20)
USB30_TX3-(20)
USB30_TX3+(20)
PCIE_RXN2_CARD(21)
PCIE_RXP2_CARD(21)
PCIE_TXN2_CARD(21)
PCIE_TXP2_CARD(21)
+V1.05S_AUSB3PLL(10)
CLK_PCIE_CRN(21)
CLK_PCIE_CRP(21)
PCIE_CLKREQ_CR#(21)
CLK_PCIE_WLANN(23)
CLK_PCIE_WLANP(23)
PCIE_CLKREQ_WLAN#(23)
CLK_PCIE_SSDN(21)
CLK_PCIE_SSDP(21)
PCIE_CLKREQ_SSD#(21)
5
C114 0.1U/10V_4
C113 0.1U/10V_4
C111 0.1U/10V_4
R111 3.01K/F_4
R110 *0_4/S
CLK_PCIE_CRN
CLK_PCIE_CRP
PCIE_CLKREQ_CR#
CLK_PCIE_WLANN
CLK_PCIE_WLANP
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_SSD#
PCIE_TXN3_WLAN_C
PCIE_TXP3_WLAN_C
PCIE_TXN2_CARD_C
PCIE_TXP2_CARD_C
PCIE_RCOMP
PCIE_IREF
PCIE_CLKREQ0#
PCIE_CLKREQ3#
PCIE_CLKREQ_VGA#
C23
C22
F8
E8
B23
A23
H10
G10
B21
C21
E6
F6
B22
A21
G11
F11
C29
B30
F13
G13
B29
A29
G17
F17
C30
C31
F15
G15
B31
A31
E15
E13
A27
B27
C43
C42
B41
A41
C41
B42
AD1
B38
C37
A39
B39
B37
A37
PERP5_L0
PETN5_L0
PETP5_L0
PERN5_L1
PERP5_L1
PETN5_L1
PETP5_L1
PERN5_L2
PERP5_L2
PETN5_L2
PETP5_L2
PERN5_L3
PERP5_L3
PETN5_L3
PETP5_L3
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN1/USB3RN3
PERP1/USB3RP3
PETN1/USB3TN3
PETP1/USB3TP3
PERN2/USB3RN4
PERP2/USB3RP4
PETN2/USB3TN4
PETP2/USB3TP4
RSVD
RSVD
PCIE_RCOMP
PCIE_IREF
U10F
CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
U2
PCIECLKRQ0/GPIO18
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1/GPIO19
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
PCIECLKRQ2/GPIO20
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
N1
PCIECLKRQ3/GPIO21
CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
U5
PCIECLKRQ4/GPIO22
CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
T2
PCIECLKRQ5/GPIO23
4
BDW_ULT_LPDDR3
PCIE
11 OF 19
BDW_ULT_LPDDR3
CLOCK
SIGNALS
6 OF 19
USB
USB3.0
USB2N0
USB2P0
USB2N1
USB2P1
USB2N2
USB2P2
USB2N3
USB2P3
USB2N4
USB2P4
USB2N5
USB2P5
USB2N6
USB2P6
USB2N7
USB2P7
USB3RN1
USB3RP1
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
USBRBIAS
USBRBIAS
RSVD
RSVD
OC0/GPIO40
OC1/GPIO41
OC2/GPIO41
OC3/GPIO43
XTAL24_IN
XTAL24_OUT
RSVD
RSVD
DIFFCLK_BIASREF
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLKOUT_LPC_0
CLKOUT_LPC_1
CLKOUT_ITPXDP
CLKOUT_ITPXDP_P
AN8
AM8
AR7
AT7
AR8
AP8
AR10
AT10
AM15
AL15
AM13
AN13
AP11
AN11
AR13
AP13
G20
H20
C33
B34
E18
F18
B33
A33
TIE TRACES TOGETHER
CLOSE TO PINS WITH LENGTH
TO RESISTOR
AJ10
AJ11
AN10
AM10
AL3
AT1
AH2
AV3
A25
B25
K21
M21
C26
C35
C34
AK8
AL8
AN15
AP15
B35
A35
USB_BIAS
ACC_LED#
SIO_EXT_SMI#
PCI_SERR#
USB_OC4#
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
R108 10K/F_4
R109 10K/F_4
R32 10K/F_2
R38 10K/F_2
CLK_PCI_EC_R
CLK_PCI_LPC_R
3
USBP0- (20)
USBP0+ (20)
USBP1- (20)
USBP1+ (20)
USBP2- (15)
USBP2+ (15)
USBP3- (15)
USBP3+ (15)
USBP4- (24)
USBP4+ (24)
USBP5- (20)
USBP5+ (20)
USBP6- (23)
USBP6+ (23)
TP59
TP58
R28 22.6/F_2
TP126
USB2.0(M/B-1)
USB2.0(M/B-3)
Camera
TS board
Sensor Hub
USB2.0(M/B-2)
WLAN
USB30_RX1- (20)
USB30_RX1+ (20)
USB30_TX1- (20)
USB30_TX1+ (20)
USB30_RX2- (20)
USB30_RX2+ (20)
USB30_TX2- (20)
USB30_TX2+ (20)
C123 12P/50V_4
1
2
R121
1M_4
4
3
C124 12P/50V_4
R106 3.01K/F_4
R351 22_4
R354 22_4
R355 22_4
ACC_LED# (21)
SIO_EXT_SMI# (25)
PCI_SERR# (25)
TP86
24MHZ +-30PPM
Y1
TP87
EC15 18P/50V_4
EMI(near PCH)
EC16 18P/50V_4
EMI(near PCH)
EC17 *18P/50V_4
CK_XDP_N (11)
CK_XDP_P (11)
(USBP0)
(
USBP1)
USBP2)
(
(USBP4)
(USBP5)
(USBP6)
+V1.05S_AXCK_LCPLL (10)
CLK_24M_KBC (25)
CLK_24M_DEBUG (23)
CLK_PCI_TPM (21)
SI modify
Q20:non-stuff
R370, R374:stuff
MBCLK2(25)
MBDATA2(25)
R342 *4.7K_4
+3V
SMB_RUN_DAT(11,12,13,22)
R343 *4.7K_4
+3V
SMB_RUN_CLK(11,12,13,22)
PV modify
Q19 remove
R357,R358:stuff
R342,R343 non-stuff
2
CLK_REQ/Strap Pin(CLG)
PCIE_CLKREQ0#
PCIE_CLKREQ3#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_SSD#
PCIE_CLKREQ_CR#
PCIE_CLKREQ_VGA#
R200 10K_4
R168 10K_4
R238 10K_4
R195 10K_4
R16 10K_2
R13 10K_2
USBOC# Pull-up
+3V_DEEP_SUS
ACC_LED#
SIO_EXT_SMI#
PCI_SERR#
USB_OC4#
R283 10K_4
R309 10K_4C112 0.1U/10V_4
R252 10K_4
R327 10K_4
SMBus/Pull-up(CLG)
R370 *0_4/S
R374 *0_4/S
R357 *0_4/S
R358 *0_4/S
PROJECT :PIKE
PROJECT :PIKE
PROJECT :PIKE
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 7/9 (PCIE/USB/CLK)
ULT 7/9 (PCIE/USB/CLK)
ULT 7/9 (PCIE/USB/CLK)
Date: Sheet of
Date: Sheet of
Date: Sheet of
SMB_PCH_DAT
SMB_PCH_CLK
SI modify
for EC requesst
1
+3V
For DS3
HUB_MBCLK2 (24)
HUB_MBDATA2 (24)
SMB_PCH_DAT (7)
SMB_PCH_CLK (7)
08
8 32Tuesday, October 28, 2014
8 32Tuesday, October 28, 2014
8 32Tuesday, October 28, 2014
1A
1A
1A
+3V(6,7,9,10,11,12,13,15,16,17,18,19,21,22,23,24,25,30,32)
+3V_DEEP_SUS(6,7,9,10,11)
5
Lynx Point-LP Platform Controller Hub
Lynx Point-LP Platform Controller Hub
Lynx Point-LP Platform Controller HubLynx Point-LP Platform Controller Hub
(HDA,JTAG,SATA)
(HDA,JTAG,SATA)
(HDA,JTAG,SATA)(HDA,JTAG,SATA)
D D
PV modify from LAN_DISABLE# to GPIO12
SIO_EXT_SCI#(25)
GPIO15_ULT(7)
GPIO28_ULT(16)
GPIO26_ULT(17)
GPIO44_ULT(17)
BT_COMBO_EN#
PCH_VOL_UP(19)
PCH_VOL_DOWN(19)
C C
MPHY_PWREN(32)
GPIO14_ULT(21)
GPIO25_ULT(17)
RF_OFF(23)
DEVSLP0(21)
SPKR(7)
TP124
TP104
TS_OFF(15)
TS_RST(15)
TP61
GPIO28_ULT
GPIO26_ULT
TP77
GPIO44_ULT
TP114
GPIO25_ULT
TP60
BT_OFF(23)
TP62
RF_OFF
TP101
TP112
Haswell (GPIO)
GPIO76_ULT
SIO_EXT_SCI#
GPIO12
TS_OFF
GPIO24_ULT
DSW_WAKE#
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID5
BT_COMBO_EN#
PCH_VOL_UP
PCH_VOL_DOWN
MPHY_PWREN
GPIO13_ULT
GPIO14_ULT
BOARD_ID4
ACCEL_INTA#
BT_OFF
GPIO70_ULT
DEVSLP1
DEVSLP2
SPKR
DEVSLP0
P1
AU2
AM7
AD6
Y1
T3
AD5
AN5
AD7
AN3
AG6
AP1
AL4
AT5
AK4
AB6
U4
Y3
P3
Y2
AT3
AH4
AM4
AG5
AG3
AM3
AM2
P2
C4
L2
N5
V2
4
U10J
BMBUSY/GPIO76
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
GPIO15
GPIO16
GPIO17
GPIO24
GPIO27
GPIO28
GPIO26
GPIO56
GPIO57
GPIO58
GPIO59
GPIO44
GPIO47
GPIO48
GPIO49
GPIO50
HSIOPC/GPIO71
GPIO13
GPIO14
GPIO25
GPIO45
GPIO46
GPIO9
GPIO10
DEVSLP0/GPIO33
SDIO_POWER_EN/GPIO70
DEVSLP1/GPIO38
DEVSLP2/GPIO39
SPKR/GPIO81
BDW_ULT_LPDDR3
GPIO
10 OF 19
CPU/
MISC
SERIAL IO
THERMTRIP
RCIN/GPIO82
SERIRQ
PCH_OPI_RCOMP
RSVD
RSVD
GSPI0_CS/GPIO83
GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
GSPI0_MOSI/GPIO86
GSPI1_CS/GPIO87
GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90
UART0_RXD/GPIO91
UART0_TXD/GPIO92
UART0_RTS/GPIO93
UART0_CTS/GPIO94
UART1_RXD/GPIO0
UART1_TXD/GPIO1
UART1_RST/GPIO02
UART1_CTS/GPIO03
I2C0_SDA/GPIO4
I2C0_SCL/GPIO5
I2C1_SDA/GPIO6
I2C1_SCL/GPIO7
SDIO_CLK/GPIO64
SDIO_CMD/GPIO65
SDIO_D0/GPIO66
SDIO_D1/GPIO67
SDIO_D2/GPIO68
SDIO_D3/GPIO69
D60
V4
T4
AW15
AF20
AB21
R6
L6
N6
GSPI0_MISO
L8
GPIO86_ULT
R7
L5
N7
GSPI1_MISO
K2
GSPI1_MOSI
J1
UART0_RXD
K3
UART0_TXD
J2
UART0_RTS
G1
UART0_CTS
K4
UART1_RXD
G2
UART1_TXD
J3
UART1_RST
J4
UART1_CTS
F2
F3
G4
F1
E3
F4
D3
E4
C3
E2
GSPI0_CLK
GSPI1_CLK
SDIO_CMD
3
PCH_THRMTRIP#
EC_RCIN#
SERIRQ
PCH_OPI_RCOMP
GSPI0_CS
GSPI1_CS
I2C0_SDA
I2C0_SCL
I2C1_SDA
I2C1_SCL
SDIO_CLK
SDIO_D1
SDIO_D2
SDIO_D3
R139 *0_4/S
R362 49.9/F_4
TP8
TP18
I2C1_SDA (18)
I2C1_SCL (18)
PM_THRMTRIP# (25)
EC_RCIN# (25)
SERIRQ (21,25)
GPIO66_ULT (7)
2
GSPI1_MOSI
GSPI1_CLK
GSPI0_MISO
UART0_TXD
UART1_RST
UART1_CTS
GSPI1_CS
GSPI0_CS
RP1
10
9
8
7 4
10K_10P8R_6
RP3
10
9
8
7 4
10K_10P8R_6
1
2
3
56
1
2
3
56
SDIO_CLK
SDIO_D3
SDIO_D1
SDIO_D2
+3V
UART0_RXD
UART0_RTS
UART1_TXD
UART0_CTS
+3V
GSPI1_MISO
I2C1_SCL
I2C1_SDA
UART1_RXD
GPIO Pull-up/Pull-down(CLG)
RP2
10
9
8
7 4
10K_10P8R_6
SIO_EXT_SCI#
BT_OFF
RF_OFF
GPIO13_ULT
GPIO14_ULT
GPIO24_ULT
GPIO26_ULT
GPIO28_ULT
GPIO44_ULT
ACCEL_INTA#
I2C0_SCL
I2C0_SDA
PCH_VOL_UP
PCH_VOL_DOWN
TS_OFF
TS_RST
DEVSLP0
DEVSLP2
BT_COMBO_EN#
GPIO70_ULT
EC_RCIN#
SERIRQ
GPIO76_ULT
MPHY_PWREN
MPHY_PWREN
1
1
2
3
56
GSPI0_CLK
SDIO_CMD
+3V
R316 10K_4
R44 10K_2
R41 *10K_2
R293 10K_4
R29 10K_2
R20 10K_2
R306 10K_4
R19 10K_2
R258 10K_4
R30 10K_2
R169 *4.7K_4
R163 *4.7K_4
R229 10K_4
R189 10K_4
R228 10K_4
R9 10K_4
R7 10K_2
R253 10K_4
R201 *10K_4
R122 10K_4
R17 10K_2
R6 10K_2
R187 10K_4
R231 100K_4
R230 *10K_4
09
+3V_DEEP_SUS
+3V
GPIO25_ULT
GPIO12
DSW_WAKE#
B B
R282 10K_4
R33 10K_2
R40 10K_2
+3VS5
Close to EC
PM_THRMTRIP#
BOARD_ID1BOARD_ID2BOARD_ID3BOARD_ID4BOARD_ID5
Model
HYNIX LPDDR3 8GB
ELPIDA LPDDR3 8GB
SAM LPDDR3 8GB
HYNIX LPDDR3 4GB
A A
ELPIDA LPDDR3 4GB
SAM LPDDR3 4GB
SPI ROM 8MB
SPI ROM 16MB
0 1
0
0
0
0 0
0
00
0
0
0
0
0
0
0
0
0
1
1 1
1
0
1
5
BOARD_ID0
0000
1
1 1
0
0
1 0
0
0
R23 *10K_2
R42 10K_2
R37 *10K_2
R45 *10K_2
R22 10K_2
R21 10K_2
4
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
R25 10K_2
R43 *10K_2
R36 10K_2
R46 10K_2
R27 *10K_2
R26 *10K_2
+3V_DEEP_SUS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
R178 1K_4
PROJECT :PIKE
PROJECT :PIKE
PROJECT :PIKE
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ULT 8/9 (GPIO/MISC)
ULT 8/9 (GPIO/MISC)
ULT 8/9 (GPIO/MISC)
1
+V1.05S_VCCST
+3V(6,7,8,10,11,12,13,15,16,17,18,19,21,22,23,24,25,30,32)
+3VS5(4,6,7,10,22,23,30,31,32)
1A
1A
1A
9 32Tuesday, October 28, 2014
9 32Tuesday, October 28, 2014
9 32Tuesday, October 28, 2014
5
4
3
2
1
Lynx Point-LP Platform Controller Hub
(HDA,JTAG,SATA)(POWER)
10
U30
IN
EN
TPS22930
OUT
GND
20mil
+V1.05S_ASATA3PLL
20mil
+V1.05S_AUSB3PLL
+V1.05DX_MODPHY_PCH
+3V_DEEP_SUS+3VS5
A1
B1
+3V_DEEP_SUS+3VS5
+3VS5
100K/F_2
L17 0_6
L16 0_6
+1.05V
+1.05V_M
R499
iATM
R295 *0_6
A2
B2
place close with CPU
+1.05V_MODPHY
D D
C72 *1U/6.3V_4
C73 1U/6.3V_4
C74 1U/6.3V_4
+1.05V
+1.05V
C C
Change from +1.5V to +3V for I2S
+3V
iATM/DS3
B B
Q19
4 3
1
A A
*2N7002kDW
+3V_DEEP_SUS
+3VS5
+3V
+1.05V
VCCACLKPLL=31mA
+1.05V
VCCCLK=200mA
+1.05V
+1.05V
+V3.3A_PSUS
5
2
6
R551 *22_8
C217 *1U/6.3V_4 C268 0.1U/10V_4
C126 1U/6.3V_4
C116 22U/6.3VS_4
C95 22U/6.3VS_4
C127 1U/6.3V_4
C100 22U/6.3VS_4
C118 22U/6.3VS_4
L27 *0_6/S
2.2uH PN CV-2205JZ00
C240 1U/6.3V_4
C241 *10U/6.3VS_4
C242 *10U/6.3VS_4
C328 1U/6.3V_4
C283 22U/6.3VS_4
R535 0_2
C296 *1U/6.3V_4
C286 *.47U/6.3V_4
C201 22U/6.3VS_4
C93 1U/6.3V_4
C89 22U/6.3VS_4
C88 22U/6.3VS_4
L12
*0_6/S C202 1U/6.3V_4
L15
R190 *0_6/S
VPRO_ON (10,25)
+3V_M
+V1.05S_AXCK_LCPLL
*0_6/S
C125 1U/6.3V_4
C115 22U/6.3VS_4
C94 22U/6.3VS_4
R191 *0_6/S
C172 1U/6.3V_4
C1691U/6.3V_4
+VIN
+V1.05DX_MODPHY_PCH
VCCHSIO=1.838A
+V1.05S_AIDLE
+V1.05S_AUSB3PLL
+V1.05S_ASATA3PLL
VCCSATA3PLL=42mA
+V1.05S_APLLOPI
VCCAPLL=57mA
TP26
+V3.3DX_1.5DX_PAZSUS_PCH
TP55
+V1.05S_SSCF100
+V1.05S_SSCFF
+V3.3A_PSUS
R550
*1M_4
R552
*1M_4
DcpSus3=10mA
+V1.05A_VCCUSB3SUS
VCCHDA=11mA
DcpSus2=25mA
+V1.05A_USB2SUS
VCCSUS3_3=63mA
+V3.3A_PSUS
+3.3V_A_DSW_P
+V3.3S_PCORE
+V1.05S_AXCK_DCB
VPRO_ON(10,25)
AA21
AH14
AH13
AH10
AE20
AE21
W21
M20
L10
B18
B11
Y20
J13
AC9
AA9
W9
J18
K19
A20
J17
R21
T21
K18
V21
K9
M9
N8
P9
V8
U10M
VCCHSIO
VCCHSIO
VCCHSIO
VCC1_05
VCC1_05
VCCUSB3PLL
VCCSATA3PLL
RSVD
VCCAPLL
VCCAPLL
DCPSUS3
VCCHDA
DCPSUS2
VCCSUS3
VCCSUS3
VCCDSW3_3
VCC3
VCC3
VCCCLK
VCCCLK
VCCACLKPLL
VCCCLK
VCCCLK
VCCCLK
RSVD
RSVD
RSVD
VCCSUS3
VCCSUS3
R501
*0_2/S
VCCDSW3_3=114mA
LPT LP POWER
VPRO_ON_R
R502
*100K/F_2
BDW_ULT_LPDDR3
HSIO
OPI
USB3
HDA
VRM
GPIO/LPC
ICC
13 OF 19
iATM
A2
B2
C2
place close with CPU
RTC
SPI
CORE
THERMAL SENSOR
SERIAL IO
SUS OSCILLATOR
USB2
U31
IN1
OUT1
IN2
OUT2
EN
GND
TPS22964CYZPR
VCCSUS3
VCCRTC
DCPRTC
VCCSPI=18mA
VCCSPI
VCCASW=658mA
VCCASW
VCCASW
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
DCPSUSBYP
DCPSUSBYP
VCCASW
VCCASW
VCCASW
DCPSUS1
DCPSUS1
VCCTS1_5
VCCSDIO
VCCSDIO
DCPSUS4
VCC1_05
VCC1_05
+1.05V_M+1.05VS5
A1
B1
C1
VPRO_ON_R
VCC3
VCC3
RSVD
AH11
AG10
AE7
Y8
AG14
AG13
J11
H11
H15
AE8
AF22
AG19
AG20
AE9
AF9
AG8
AD10
AD8
J15
K14
K16
U8
T9
AB8
AC20
AG16
AG17
R500
100K/F_2
+V3.3A_DSW_PRTCSUS
C284 1U/6.3V_4
VCCRTC < 1mA
+VCCRTCEXT
C227 0.1U/10V_4
+V3.3M_PSPI
+V1.05M_FHV0
+V1.05M_FHV1
+V1.05S_CORE_PCH
+PCH_VCCDSW
+V1.05M_ASW
+V1.05A_SUS_PCH
+V1.5S_ATS
+V3.3S_PTS
VCC3_3=41mA
CCSDIO=17mA
V
+V3.3S_1.8S_SDIO_PCH
+V1.05A_AOSCSUS
+V1.05S_DUSB
+3VS5
A2
B2
place close with CPU
VCC1_05=1.741A
C210 1U/6.3V_4
C213 22U/6.3V_6
DcpSus1=109mA
VCCTS1_5=3mA
DcpSus4=1mA
iATM/DS3
U29
IN
OUT
EN
GND
TPS22930
C267 1U/6.3V_4
C269 0.1U/10V_4
C1 *0.1U/10V_4
R15 *0_4/S
R508 0_4
R509 *0_4
C222 1U/6.3V_4
C219 1U/6.3V_4
C231 10U/6.3VS_4
TP119
C232 0.1U/10V_4
C180 1U/6.3V_4
C220 1U/6.3V_4
+3V_M
A1
B1
R534 *0_2/S
+3V_DEEP_SUS
+3V_RTC
+3V_M
+1.05V_M
+1.05V
+1.05V
C285 0.47U/6.3V_4
Place close to
Pin AG19 and AG20
C277 1U/6.3V_4
R511 *0_4
R512 0_4
TP49
+1.5V
+3V
+3V
TP33
+1.05V
SLP_SUS_ON(25)
iATM/DS3
iATM/DS3
iATM
PV reserve
+5V(17,18,19,22,32)
+1.05V(4,7,11,25,28,30,32)
+3VS5(4,6,7,9,22,23,30,31,32)
+5VS5(20,28,29,31,32)
5
+V1.05S_AUSB3PLL(8)
+V1.05S_ASATA3PLL(7)
+V1.05S_AXCK_LCPLL(8)
+3V(6,7,8,9,11,12,13,15,16,17,18,19,21,22,23,24,25,30,32)
+3V_RTC(7,22,26,27)
+1.2VSUS(2,4,12,13,29,31)
4
3
2
PROJECT :PIKE
PROJECT :PIKE
PROJECT :PIKE
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 9/9(POWER-2)
ULT 9/9(POWER-2)
ULT 9/9(POWER-2)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
10 32Tuesday, October 28, 2014
10 32Tuesday, October 28, 2014
10 32Tuesday, October 28, 2014
1A
1A
1A
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